1 /*- 2 * BSD LICENSE 3 * 4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Intel Corporation nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <stdint.h> 35 #include <memory.h> 36 37 #include <rte_log.h> 38 #include <rte_mbuf.h> 39 #include <rte_debug.h> 40 #include <rte_ethdev.h> 41 #include <rte_mempool.h> 42 #include <rte_sched.h> 43 #include <rte_cycles.h> 44 #include <rte_string_fns.h> 45 #include <rte_cfgfile.h> 46 47 #include "main.h" 48 #include "cfg_file.h" 49 50 uint32_t app_numa_mask = 0; 51 static uint32_t app_inited_port_mask = 0; 52 53 int app_pipe_to_profile[MAX_SCHED_SUBPORTS][MAX_SCHED_PIPES]; 54 55 #define MAX_NAME_LEN 32 56 57 struct ring_conf ring_conf = { 58 .rx_size = APP_RX_DESC_DEFAULT, 59 .ring_size = APP_RING_SIZE, 60 .tx_size = APP_TX_DESC_DEFAULT, 61 }; 62 63 struct burst_conf burst_conf = { 64 .rx_burst = MAX_PKT_RX_BURST, 65 .ring_burst = PKT_ENQUEUE, 66 .qos_dequeue = PKT_DEQUEUE, 67 .tx_burst = MAX_PKT_TX_BURST, 68 }; 69 70 struct ring_thresh rx_thresh = { 71 .pthresh = RX_PTHRESH, 72 .hthresh = RX_HTHRESH, 73 .wthresh = RX_WTHRESH, 74 }; 75 76 struct ring_thresh tx_thresh = { 77 .pthresh = TX_PTHRESH, 78 .hthresh = TX_HTHRESH, 79 .wthresh = TX_WTHRESH, 80 }; 81 82 uint32_t nb_pfc; 83 const char *cfg_profile = NULL; 84 int mp_size = NB_MBUF; 85 struct flow_conf qos_conf[MAX_DATA_STREAMS]; 86 87 static const struct rte_eth_conf port_conf = { 88 .rxmode = { 89 .max_rx_pkt_len = ETHER_MAX_LEN, 90 .split_hdr_size = 0, 91 .header_split = 0, /**< Header Split disabled */ 92 .hw_ip_checksum = 0, /**< IP checksum offload disabled */ 93 .hw_vlan_filter = 0, /**< VLAN filtering disabled */ 94 .jumbo_frame = 0, /**< Jumbo Frame Support disabled */ 95 .hw_strip_crc = 1, /**< CRC stripped by hardware */ 96 }, 97 .txmode = { 98 .mq_mode = ETH_DCB_NONE, 99 }, 100 }; 101 102 static int 103 app_init_port(uint8_t portid, struct rte_mempool *mp) 104 { 105 int ret; 106 struct rte_eth_link link; 107 struct rte_eth_rxconf rx_conf; 108 struct rte_eth_txconf tx_conf; 109 uint16_t rx_size; 110 uint16_t tx_size; 111 112 /* check if port already initialized (multistream configuration) */ 113 if (app_inited_port_mask & (1u << portid)) 114 return 0; 115 116 rx_conf.rx_thresh.pthresh = rx_thresh.pthresh; 117 rx_conf.rx_thresh.hthresh = rx_thresh.hthresh; 118 rx_conf.rx_thresh.wthresh = rx_thresh.wthresh; 119 rx_conf.rx_free_thresh = 32; 120 rx_conf.rx_drop_en = 0; 121 122 tx_conf.tx_thresh.pthresh = tx_thresh.pthresh; 123 tx_conf.tx_thresh.hthresh = tx_thresh.hthresh; 124 tx_conf.tx_thresh.wthresh = tx_thresh.wthresh; 125 tx_conf.tx_free_thresh = 0; 126 tx_conf.tx_rs_thresh = 0; 127 tx_conf.txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS | ETH_TXQ_FLAGS_NOOFFLOADS; 128 129 /* init port */ 130 RTE_LOG(INFO, APP, "Initializing port %"PRIu8"... ", portid); 131 fflush(stdout); 132 ret = rte_eth_dev_configure(portid, 1, 1, &port_conf); 133 if (ret < 0) 134 rte_exit(EXIT_FAILURE, "Cannot configure device: " 135 "err=%d, port=%"PRIu8"\n", ret, portid); 136 137 rx_size = ring_conf.rx_size; 138 tx_size = ring_conf.tx_size; 139 ret = rte_eth_dev_adjust_nb_rx_tx_desc(portid, &rx_size, &tx_size); 140 if (ret < 0) 141 rte_exit(EXIT_FAILURE, "rte_eth_dev_adjust_nb_rx_tx_desc: " 142 "err=%d, port=%"PRIu8"\n", ret, portid); 143 ring_conf.rx_size = rx_size; 144 ring_conf.tx_size = tx_size; 145 146 /* init one RX queue */ 147 fflush(stdout); 148 ret = rte_eth_rx_queue_setup(portid, 0, (uint16_t)ring_conf.rx_size, 149 rte_eth_dev_socket_id(portid), &rx_conf, mp); 150 if (ret < 0) 151 rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: " 152 "err=%d, port=%"PRIu8"\n", ret, portid); 153 154 /* init one TX queue */ 155 fflush(stdout); 156 ret = rte_eth_tx_queue_setup(portid, 0, 157 (uint16_t)ring_conf.tx_size, rte_eth_dev_socket_id(portid), &tx_conf); 158 if (ret < 0) 159 rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d, " 160 "port=%"PRIu8" queue=%d\n", ret, portid, 0); 161 162 /* Start device */ 163 ret = rte_eth_dev_start(portid); 164 if (ret < 0) 165 rte_exit(EXIT_FAILURE, "rte_pmd_port_start: " 166 "err=%d, port=%"PRIu8"\n", ret, portid); 167 168 printf("done: "); 169 170 /* get link status */ 171 rte_eth_link_get(portid, &link); 172 if (link.link_status) { 173 printf(" Link Up - speed %u Mbps - %s\n", 174 (uint32_t) link.link_speed, 175 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ? 176 ("full-duplex") : ("half-duplex\n")); 177 } else { 178 printf(" Link Down\n"); 179 } 180 rte_eth_promiscuous_enable(portid); 181 182 /* mark port as initialized */ 183 app_inited_port_mask |= 1u << portid; 184 185 return 0; 186 } 187 188 static struct rte_sched_subport_params subport_params[MAX_SCHED_SUBPORTS] = { 189 { 190 .tb_rate = 1250000000, 191 .tb_size = 1000000, 192 193 .tc_rate = {1250000000, 1250000000, 1250000000, 1250000000}, 194 .tc_period = 10, 195 }, 196 }; 197 198 static struct rte_sched_pipe_params pipe_profiles[RTE_SCHED_PIPE_PROFILES_PER_PORT] = { 199 { /* Profile #0 */ 200 .tb_rate = 305175, 201 .tb_size = 1000000, 202 203 .tc_rate = {305175, 305175, 305175, 305175}, 204 .tc_period = 40, 205 #ifdef RTE_SCHED_SUBPORT_TC_OV 206 .tc_ov_weight = 1, 207 #endif 208 209 .wrr_weights = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, 210 }, 211 }; 212 213 struct rte_sched_port_params port_params = { 214 .name = "port_scheduler_0", 215 .socket = 0, /* computed */ 216 .rate = 0, /* computed */ 217 .mtu = 6 + 6 + 4 + 4 + 2 + 1500, 218 .frame_overhead = RTE_SCHED_FRAME_OVERHEAD_DEFAULT, 219 .n_subports_per_port = 1, 220 .n_pipes_per_subport = 4096, 221 .qsize = {64, 64, 64, 64}, 222 .pipe_profiles = pipe_profiles, 223 .n_pipe_profiles = sizeof(pipe_profiles) / sizeof(struct rte_sched_pipe_params), 224 225 #ifdef RTE_SCHED_RED 226 .red_params = { 227 /* Traffic Class 0 Colors Green / Yellow / Red */ 228 [0][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 229 [0][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 230 [0][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 231 232 /* Traffic Class 1 - Colors Green / Yellow / Red */ 233 [1][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 234 [1][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 235 [1][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 236 237 /* Traffic Class 2 - Colors Green / Yellow / Red */ 238 [2][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 239 [2][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 240 [2][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 241 242 /* Traffic Class 3 - Colors Green / Yellow / Red */ 243 [3][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 244 [3][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 245 [3][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9} 246 } 247 #endif /* RTE_SCHED_RED */ 248 }; 249 250 static struct rte_sched_port * 251 app_init_sched_port(uint32_t portid, uint32_t socketid) 252 { 253 static char port_name[32]; /* static as referenced from global port_params*/ 254 struct rte_eth_link link; 255 struct rte_sched_port *port = NULL; 256 uint32_t pipe, subport; 257 int err; 258 259 rte_eth_link_get((uint8_t)portid, &link); 260 261 port_params.socket = socketid; 262 port_params.rate = (uint64_t) link.link_speed * 1000 * 1000 / 8; 263 snprintf(port_name, sizeof(port_name), "port_%d", portid); 264 port_params.name = port_name; 265 266 port = rte_sched_port_config(&port_params); 267 if (port == NULL){ 268 rte_exit(EXIT_FAILURE, "Unable to config sched port\n"); 269 } 270 271 for (subport = 0; subport < port_params.n_subports_per_port; subport ++) { 272 err = rte_sched_subport_config(port, subport, &subport_params[subport]); 273 if (err) { 274 rte_exit(EXIT_FAILURE, "Unable to config sched subport %u, err=%d\n", 275 subport, err); 276 } 277 278 for (pipe = 0; pipe < port_params.n_pipes_per_subport; pipe ++) { 279 if (app_pipe_to_profile[subport][pipe] != -1) { 280 err = rte_sched_pipe_config(port, subport, pipe, 281 app_pipe_to_profile[subport][pipe]); 282 if (err) { 283 rte_exit(EXIT_FAILURE, "Unable to config sched pipe %u " 284 "for profile %d, err=%d\n", pipe, 285 app_pipe_to_profile[subport][pipe], err); 286 } 287 } 288 } 289 } 290 291 return port; 292 } 293 294 static int 295 app_load_cfg_profile(const char *profile) 296 { 297 if (profile == NULL) 298 return 0; 299 struct rte_cfgfile *file = rte_cfgfile_load(profile, 0); 300 if (file == NULL) 301 rte_exit(EXIT_FAILURE, "Cannot load configuration profile %s\n", profile); 302 303 cfg_load_port(file, &port_params); 304 cfg_load_subport(file, subport_params); 305 cfg_load_pipe(file, pipe_profiles); 306 307 rte_cfgfile_close(file); 308 309 return 0; 310 } 311 312 int app_init(void) 313 { 314 uint32_t i; 315 char ring_name[MAX_NAME_LEN]; 316 char pool_name[MAX_NAME_LEN]; 317 318 if (rte_eth_dev_count() == 0) 319 rte_exit(EXIT_FAILURE, "No Ethernet port - bye\n"); 320 321 /* load configuration profile */ 322 if (app_load_cfg_profile(cfg_profile) != 0) 323 rte_exit(EXIT_FAILURE, "Invalid configuration profile\n"); 324 325 /* Initialize each active flow */ 326 for(i = 0; i < nb_pfc; i++) { 327 uint32_t socket = rte_lcore_to_socket_id(qos_conf[i].rx_core); 328 struct rte_ring *ring; 329 330 snprintf(ring_name, MAX_NAME_LEN, "ring-%u-%u", i, qos_conf[i].rx_core); 331 ring = rte_ring_lookup(ring_name); 332 if (ring == NULL) 333 qos_conf[i].rx_ring = rte_ring_create(ring_name, ring_conf.ring_size, 334 socket, RING_F_SP_ENQ | RING_F_SC_DEQ); 335 else 336 qos_conf[i].rx_ring = ring; 337 338 snprintf(ring_name, MAX_NAME_LEN, "ring-%u-%u", i, qos_conf[i].tx_core); 339 ring = rte_ring_lookup(ring_name); 340 if (ring == NULL) 341 qos_conf[i].tx_ring = rte_ring_create(ring_name, ring_conf.ring_size, 342 socket, RING_F_SP_ENQ | RING_F_SC_DEQ); 343 else 344 qos_conf[i].tx_ring = ring; 345 346 347 /* create the mbuf pools for each RX Port */ 348 snprintf(pool_name, MAX_NAME_LEN, "mbuf_pool%u", i); 349 qos_conf[i].mbuf_pool = rte_pktmbuf_pool_create(pool_name, 350 mp_size, burst_conf.rx_burst * 4, 0, 351 RTE_MBUF_DEFAULT_BUF_SIZE, 352 rte_eth_dev_socket_id(qos_conf[i].rx_port)); 353 if (qos_conf[i].mbuf_pool == NULL) 354 rte_exit(EXIT_FAILURE, "Cannot init mbuf pool for socket %u\n", i); 355 356 app_init_port(qos_conf[i].rx_port, qos_conf[i].mbuf_pool); 357 app_init_port(qos_conf[i].tx_port, qos_conf[i].mbuf_pool); 358 359 qos_conf[i].sched_port = app_init_sched_port(qos_conf[i].tx_port, socket); 360 } 361 362 RTE_LOG(INFO, APP, "time stamp clock running at %" PRIu64 " Hz\n", 363 rte_get_timer_hz()); 364 365 RTE_LOG(INFO, APP, "Ring sizes: NIC RX = %u, Mempool = %d SW queue = %u," 366 "NIC TX = %u\n", ring_conf.rx_size, mp_size, ring_conf.ring_size, 367 ring_conf.tx_size); 368 369 RTE_LOG(INFO, APP, "Burst sizes: RX read = %hu, RX write = %hu,\n" 370 " Worker read/QoS enqueue = %hu,\n" 371 " QoS dequeue = %hu, Worker write = %hu\n", 372 burst_conf.rx_burst, burst_conf.ring_burst, burst_conf.ring_burst, 373 burst_conf.qos_dequeue, burst_conf.tx_burst); 374 375 RTE_LOG(INFO, APP, "NIC thresholds RX (p = %hhu, h = %hhu, w = %hhu)," 376 "TX (p = %hhu, h = %hhu, w = %hhu)\n", 377 rx_thresh.pthresh, rx_thresh.hthresh, rx_thresh.wthresh, 378 tx_thresh.pthresh, tx_thresh.hthresh, tx_thresh.wthresh); 379 380 return 0; 381 } 382