1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2014 Intel Corporation 3 */ 4 5 #include <stdint.h> 6 #include <memory.h> 7 8 #include <rte_log.h> 9 #include <rte_mbuf.h> 10 #include <rte_debug.h> 11 #include <rte_ethdev.h> 12 #include <rte_mempool.h> 13 #include <rte_sched.h> 14 #include <rte_cycles.h> 15 #include <rte_string_fns.h> 16 #include <rte_cfgfile.h> 17 18 #include "main.h" 19 #include "cfg_file.h" 20 21 uint32_t app_numa_mask = 0; 22 static uint32_t app_inited_port_mask = 0; 23 24 int app_pipe_to_profile[MAX_SCHED_SUBPORTS][MAX_SCHED_PIPES]; 25 26 #define MAX_NAME_LEN 32 27 28 struct ring_conf ring_conf = { 29 .rx_size = APP_RX_DESC_DEFAULT, 30 .ring_size = APP_RING_SIZE, 31 .tx_size = APP_TX_DESC_DEFAULT, 32 }; 33 34 struct burst_conf burst_conf = { 35 .rx_burst = MAX_PKT_RX_BURST, 36 .ring_burst = PKT_ENQUEUE, 37 .qos_dequeue = PKT_DEQUEUE, 38 .tx_burst = MAX_PKT_TX_BURST, 39 }; 40 41 struct ring_thresh rx_thresh = { 42 .pthresh = RX_PTHRESH, 43 .hthresh = RX_HTHRESH, 44 .wthresh = RX_WTHRESH, 45 }; 46 47 struct ring_thresh tx_thresh = { 48 .pthresh = TX_PTHRESH, 49 .hthresh = TX_HTHRESH, 50 .wthresh = TX_WTHRESH, 51 }; 52 53 uint32_t nb_pfc; 54 const char *cfg_profile = NULL; 55 int mp_size = NB_MBUF; 56 struct flow_conf qos_conf[MAX_DATA_STREAMS]; 57 58 static struct rte_eth_conf port_conf = { 59 .rxmode = { 60 .max_rx_pkt_len = RTE_ETHER_MAX_LEN, 61 .split_hdr_size = 0, 62 }, 63 .txmode = { 64 .mq_mode = ETH_DCB_NONE, 65 }, 66 }; 67 68 static int 69 app_init_port(uint16_t portid, struct rte_mempool *mp) 70 { 71 int ret; 72 struct rte_eth_link link; 73 struct rte_eth_dev_info dev_info; 74 struct rte_eth_rxconf rx_conf; 75 struct rte_eth_txconf tx_conf; 76 uint16_t rx_size; 77 uint16_t tx_size; 78 struct rte_eth_conf local_port_conf = port_conf; 79 char link_status_text[RTE_ETH_LINK_MAX_STR_LEN]; 80 81 /* check if port already initialized (multistream configuration) */ 82 if (app_inited_port_mask & (1u << portid)) 83 return 0; 84 85 rx_conf.rx_thresh.pthresh = rx_thresh.pthresh; 86 rx_conf.rx_thresh.hthresh = rx_thresh.hthresh; 87 rx_conf.rx_thresh.wthresh = rx_thresh.wthresh; 88 rx_conf.rx_free_thresh = 32; 89 rx_conf.rx_drop_en = 0; 90 rx_conf.rx_deferred_start = 0; 91 92 tx_conf.tx_thresh.pthresh = tx_thresh.pthresh; 93 tx_conf.tx_thresh.hthresh = tx_thresh.hthresh; 94 tx_conf.tx_thresh.wthresh = tx_thresh.wthresh; 95 tx_conf.tx_free_thresh = 0; 96 tx_conf.tx_rs_thresh = 0; 97 tx_conf.tx_deferred_start = 0; 98 99 /* init port */ 100 RTE_LOG(INFO, APP, "Initializing port %"PRIu16"... ", portid); 101 fflush(stdout); 102 103 ret = rte_eth_dev_info_get(portid, &dev_info); 104 if (ret != 0) 105 rte_exit(EXIT_FAILURE, 106 "Error during getting device (port %u) info: %s\n", 107 portid, strerror(-ret)); 108 109 if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE) 110 local_port_conf.txmode.offloads |= 111 DEV_TX_OFFLOAD_MBUF_FAST_FREE; 112 ret = rte_eth_dev_configure(portid, 1, 1, &local_port_conf); 113 if (ret < 0) 114 rte_exit(EXIT_FAILURE, 115 "Cannot configure device: err=%d, port=%u\n", 116 ret, portid); 117 118 rx_size = ring_conf.rx_size; 119 tx_size = ring_conf.tx_size; 120 ret = rte_eth_dev_adjust_nb_rx_tx_desc(portid, &rx_size, &tx_size); 121 if (ret < 0) 122 rte_exit(EXIT_FAILURE, 123 "rte_eth_dev_adjust_nb_rx_tx_desc: err=%d,port=%u\n", 124 ret, portid); 125 ring_conf.rx_size = rx_size; 126 ring_conf.tx_size = tx_size; 127 128 /* init one RX queue */ 129 fflush(stdout); 130 rx_conf.offloads = local_port_conf.rxmode.offloads; 131 ret = rte_eth_rx_queue_setup(portid, 0, (uint16_t)ring_conf.rx_size, 132 rte_eth_dev_socket_id(portid), &rx_conf, mp); 133 if (ret < 0) 134 rte_exit(EXIT_FAILURE, 135 "rte_eth_tx_queue_setup: err=%d, port=%u\n", 136 ret, portid); 137 138 /* init one TX queue */ 139 fflush(stdout); 140 tx_conf.offloads = local_port_conf.txmode.offloads; 141 ret = rte_eth_tx_queue_setup(portid, 0, 142 (uint16_t)ring_conf.tx_size, rte_eth_dev_socket_id(portid), &tx_conf); 143 if (ret < 0) 144 rte_exit(EXIT_FAILURE, 145 "rte_eth_tx_queue_setup: err=%d, port=%u queue=%d\n", 146 ret, portid, 0); 147 148 /* Start device */ 149 ret = rte_eth_dev_start(portid); 150 if (ret < 0) 151 rte_exit(EXIT_FAILURE, 152 "rte_pmd_port_start: err=%d, port=%u\n", 153 ret, portid); 154 155 printf("done: "); 156 157 /* get link status */ 158 ret = rte_eth_link_get(portid, &link); 159 if (ret < 0) 160 rte_exit(EXIT_FAILURE, 161 "rte_eth_link_get: err=%d, port=%u: %s\n", 162 ret, portid, rte_strerror(-ret)); 163 164 rte_eth_link_to_str(link_status_text, sizeof(link_status_text), &link); 165 printf("%s\n", link_status_text); 166 167 ret = rte_eth_promiscuous_enable(portid); 168 if (ret != 0) 169 rte_exit(EXIT_FAILURE, 170 "rte_eth_promiscuous_enable: err=%s, port=%u\n", 171 rte_strerror(-ret), portid); 172 173 /* mark port as initialized */ 174 app_inited_port_mask |= 1u << portid; 175 176 return 0; 177 } 178 179 static struct rte_sched_pipe_params pipe_profiles[MAX_SCHED_PIPE_PROFILES] = { 180 { /* Profile #0 */ 181 .tb_rate = 305175, 182 .tb_size = 1000000, 183 184 .tc_rate = {305175, 305175, 305175, 305175, 305175, 305175, 185 305175, 305175, 305175, 305175, 305175, 305175, 305175}, 186 .tc_period = 40, 187 #ifdef RTE_SCHED_SUBPORT_TC_OV 188 .tc_ov_weight = 1, 189 #endif 190 191 .wrr_weights = {1, 1, 1, 1}, 192 }, 193 }; 194 195 static struct rte_sched_subport_profile_params 196 subport_profile[MAX_SCHED_SUBPORT_PROFILES] = { 197 { 198 .tb_rate = 1250000000, 199 .tb_size = 1000000, 200 .tc_rate = {1250000000, 1250000000, 1250000000, 1250000000, 201 1250000000, 1250000000, 1250000000, 1250000000, 1250000000, 202 1250000000, 1250000000, 1250000000, 1250000000}, 203 .tc_period = 10, 204 }, 205 }; 206 207 struct rte_sched_subport_params subport_params[MAX_SCHED_SUBPORTS] = { 208 { 209 .n_pipes_per_subport_enabled = 4096, 210 .qsize = {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, 211 .pipe_profiles = pipe_profiles, 212 .n_pipe_profiles = sizeof(pipe_profiles) / 213 sizeof(struct rte_sched_pipe_params), 214 .n_max_pipe_profiles = MAX_SCHED_PIPE_PROFILES, 215 #ifdef RTE_SCHED_RED 216 .red_params = { 217 /* Traffic Class 0 Colors Green / Yellow / Red */ 218 [0][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 219 [0][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 220 [0][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 221 222 /* Traffic Class 1 - Colors Green / Yellow / Red */ 223 [1][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 224 [1][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 225 [1][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 226 227 /* Traffic Class 2 - Colors Green / Yellow / Red */ 228 [2][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 229 [2][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 230 [2][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 231 232 /* Traffic Class 3 - Colors Green / Yellow / Red */ 233 [3][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 234 [3][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 235 [3][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 236 237 /* Traffic Class 4 - Colors Green / Yellow / Red */ 238 [4][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 239 [4][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 240 [4][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 241 242 /* Traffic Class 5 - Colors Green / Yellow / Red */ 243 [5][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 244 [5][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 245 [5][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 246 247 /* Traffic Class 6 - Colors Green / Yellow / Red */ 248 [6][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 249 [6][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 250 [6][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 251 252 /* Traffic Class 7 - Colors Green / Yellow / Red */ 253 [7][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 254 [7][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 255 [7][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 256 257 /* Traffic Class 8 - Colors Green / Yellow / Red */ 258 [8][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 259 [8][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 260 [8][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 261 262 /* Traffic Class 9 - Colors Green / Yellow / Red */ 263 [9][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 264 [9][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 265 [9][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 266 267 /* Traffic Class 10 - Colors Green / Yellow / Red */ 268 [10][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 269 [10][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 270 [10][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 271 272 /* Traffic Class 11 - Colors Green / Yellow / Red */ 273 [11][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 274 [11][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 275 [11][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 276 277 /* Traffic Class 12 - Colors Green / Yellow / Red */ 278 [12][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 279 [12][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 280 [12][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 281 }, 282 #endif /* RTE_SCHED_RED */ 283 }, 284 }; 285 286 struct rte_sched_port_params port_params = { 287 .name = "port_scheduler_0", 288 .socket = 0, /* computed */ 289 .rate = 0, /* computed */ 290 .mtu = 6 + 6 + 4 + 4 + 2 + 1500, 291 .frame_overhead = RTE_SCHED_FRAME_OVERHEAD_DEFAULT, 292 .n_subports_per_port = 1, 293 .n_subport_profiles = 1, 294 .subport_profiles = subport_profile, 295 .n_max_subport_profiles = MAX_SCHED_SUBPORT_PROFILES, 296 .n_pipes_per_subport = MAX_SCHED_PIPES, 297 }; 298 299 static struct rte_sched_port * 300 app_init_sched_port(uint32_t portid, uint32_t socketid) 301 { 302 static char port_name[32]; /* static as referenced from global port_params*/ 303 struct rte_eth_link link; 304 struct rte_sched_port *port = NULL; 305 uint32_t pipe, subport; 306 int err; 307 308 err = rte_eth_link_get(portid, &link); 309 if (err < 0) 310 rte_exit(EXIT_FAILURE, 311 "rte_eth_link_get: err=%d, port=%u: %s\n", 312 err, portid, rte_strerror(-err)); 313 314 port_params.socket = socketid; 315 port_params.rate = (uint64_t) link.link_speed * 1000 * 1000 / 8; 316 snprintf(port_name, sizeof(port_name), "port_%d", portid); 317 port_params.name = port_name; 318 319 port = rte_sched_port_config(&port_params); 320 if (port == NULL){ 321 rte_exit(EXIT_FAILURE, "Unable to config sched port\n"); 322 } 323 324 for (subport = 0; subport < port_params.n_subports_per_port; subport ++) { 325 err = rte_sched_subport_config(port, subport, 326 &subport_params[subport], 327 0); 328 if (err) { 329 rte_exit(EXIT_FAILURE, "Unable to config sched " 330 "subport %u, err=%d\n", subport, err); 331 } 332 333 uint32_t n_pipes_per_subport = 334 subport_params[subport].n_pipes_per_subport_enabled; 335 336 for (pipe = 0; pipe < n_pipes_per_subport; pipe++) { 337 if (app_pipe_to_profile[subport][pipe] != -1) { 338 err = rte_sched_pipe_config(port, subport, pipe, 339 app_pipe_to_profile[subport][pipe]); 340 if (err) { 341 rte_exit(EXIT_FAILURE, "Unable to config sched pipe %u " 342 "for profile %d, err=%d\n", pipe, 343 app_pipe_to_profile[subport][pipe], err); 344 } 345 } 346 } 347 } 348 349 return port; 350 } 351 352 static int 353 app_load_cfg_profile(const char *profile) 354 { 355 if (profile == NULL) 356 return 0; 357 struct rte_cfgfile *file = rte_cfgfile_load(profile, 0); 358 if (file == NULL) 359 rte_exit(EXIT_FAILURE, "Cannot load configuration profile %s\n", profile); 360 361 cfg_load_port(file, &port_params); 362 cfg_load_subport(file, subport_params); 363 cfg_load_subport_profile(file, subport_profile); 364 cfg_load_pipe(file, pipe_profiles); 365 366 rte_cfgfile_close(file); 367 368 return 0; 369 } 370 371 int app_init(void) 372 { 373 uint32_t i; 374 char ring_name[MAX_NAME_LEN]; 375 char pool_name[MAX_NAME_LEN]; 376 377 if (rte_eth_dev_count_avail() == 0) 378 rte_exit(EXIT_FAILURE, "No Ethernet port - bye\n"); 379 380 /* load configuration profile */ 381 if (app_load_cfg_profile(cfg_profile) != 0) 382 rte_exit(EXIT_FAILURE, "Invalid configuration profile\n"); 383 384 /* Initialize each active flow */ 385 for(i = 0; i < nb_pfc; i++) { 386 uint32_t socket = rte_lcore_to_socket_id(qos_conf[i].rx_core); 387 struct rte_ring *ring; 388 389 snprintf(ring_name, MAX_NAME_LEN, "ring-%u-%u", i, qos_conf[i].rx_core); 390 ring = rte_ring_lookup(ring_name); 391 if (ring == NULL) 392 qos_conf[i].rx_ring = rte_ring_create(ring_name, ring_conf.ring_size, 393 socket, RING_F_SP_ENQ | RING_F_SC_DEQ); 394 else 395 qos_conf[i].rx_ring = ring; 396 397 snprintf(ring_name, MAX_NAME_LEN, "ring-%u-%u", i, qos_conf[i].tx_core); 398 ring = rte_ring_lookup(ring_name); 399 if (ring == NULL) 400 qos_conf[i].tx_ring = rte_ring_create(ring_name, ring_conf.ring_size, 401 socket, RING_F_SP_ENQ | RING_F_SC_DEQ); 402 else 403 qos_conf[i].tx_ring = ring; 404 405 406 /* create the mbuf pools for each RX Port */ 407 snprintf(pool_name, MAX_NAME_LEN, "mbuf_pool%u", i); 408 qos_conf[i].mbuf_pool = rte_pktmbuf_pool_create(pool_name, 409 mp_size, burst_conf.rx_burst * 4, 0, 410 RTE_MBUF_DEFAULT_BUF_SIZE, 411 rte_eth_dev_socket_id(qos_conf[i].rx_port)); 412 if (qos_conf[i].mbuf_pool == NULL) 413 rte_exit(EXIT_FAILURE, "Cannot init mbuf pool for socket %u\n", i); 414 415 app_init_port(qos_conf[i].rx_port, qos_conf[i].mbuf_pool); 416 app_init_port(qos_conf[i].tx_port, qos_conf[i].mbuf_pool); 417 418 qos_conf[i].sched_port = app_init_sched_port(qos_conf[i].tx_port, socket); 419 } 420 421 RTE_LOG(INFO, APP, "time stamp clock running at %" PRIu64 " Hz\n", 422 rte_get_timer_hz()); 423 424 RTE_LOG(INFO, APP, "Ring sizes: NIC RX = %u, Mempool = %d SW queue = %u," 425 "NIC TX = %u\n", ring_conf.rx_size, mp_size, ring_conf.ring_size, 426 ring_conf.tx_size); 427 428 RTE_LOG(INFO, APP, "Burst sizes: RX read = %hu, RX write = %hu,\n" 429 " Worker read/QoS enqueue = %hu,\n" 430 " QoS dequeue = %hu, Worker write = %hu\n", 431 burst_conf.rx_burst, burst_conf.ring_burst, burst_conf.ring_burst, 432 burst_conf.qos_dequeue, burst_conf.tx_burst); 433 434 RTE_LOG(INFO, APP, "NIC thresholds RX (p = %hhu, h = %hhu, w = %hhu)," 435 "TX (p = %hhu, h = %hhu, w = %hhu)\n", 436 rx_thresh.pthresh, rx_thresh.hthresh, rx_thresh.wthresh, 437 tx_thresh.pthresh, tx_thresh.hthresh, tx_thresh.wthresh); 438 439 return 0; 440 } 441