1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2014 Intel Corporation 3 */ 4 5 #include <stdint.h> 6 #include <memory.h> 7 8 #include <rte_log.h> 9 #include <rte_mbuf.h> 10 #include <rte_debug.h> 11 #include <rte_ethdev.h> 12 #include <rte_mempool.h> 13 #include <rte_sched.h> 14 #include <rte_cycles.h> 15 #include <rte_string_fns.h> 16 #include <rte_cfgfile.h> 17 18 #include "main.h" 19 #include "cfg_file.h" 20 21 uint32_t app_numa_mask = 0; 22 static uint32_t app_inited_port_mask = 0; 23 24 int app_pipe_to_profile[MAX_SCHED_SUBPORTS][MAX_SCHED_PIPES]; 25 26 #define MAX_NAME_LEN 32 27 28 struct ring_conf ring_conf = { 29 .rx_size = APP_RX_DESC_DEFAULT, 30 .ring_size = APP_RING_SIZE, 31 .tx_size = APP_TX_DESC_DEFAULT, 32 }; 33 34 struct burst_conf burst_conf = { 35 .rx_burst = MAX_PKT_RX_BURST, 36 .ring_burst = PKT_ENQUEUE, 37 .qos_dequeue = PKT_DEQUEUE, 38 .tx_burst = MAX_PKT_TX_BURST, 39 }; 40 41 struct ring_thresh rx_thresh = { 42 .pthresh = RX_PTHRESH, 43 .hthresh = RX_HTHRESH, 44 .wthresh = RX_WTHRESH, 45 }; 46 47 struct ring_thresh tx_thresh = { 48 .pthresh = TX_PTHRESH, 49 .hthresh = TX_HTHRESH, 50 .wthresh = TX_WTHRESH, 51 }; 52 53 uint32_t nb_pfc; 54 const char *cfg_profile = NULL; 55 int mp_size = NB_MBUF; 56 struct flow_conf qos_conf[MAX_DATA_STREAMS]; 57 58 static struct rte_eth_conf port_conf = { 59 .rxmode = { 60 .split_hdr_size = 0, 61 }, 62 .txmode = { 63 .mq_mode = RTE_ETH_MQ_TX_NONE, 64 }, 65 }; 66 67 static int 68 app_init_port(uint16_t portid, struct rte_mempool *mp) 69 { 70 int ret; 71 struct rte_eth_link link; 72 struct rte_eth_dev_info dev_info; 73 struct rte_eth_rxconf rx_conf; 74 struct rte_eth_txconf tx_conf; 75 uint16_t rx_size; 76 uint16_t tx_size; 77 struct rte_eth_conf local_port_conf = port_conf; 78 char link_status_text[RTE_ETH_LINK_MAX_STR_LEN]; 79 80 /* check if port already initialized (multistream configuration) */ 81 if (app_inited_port_mask & (1u << portid)) 82 return 0; 83 84 rx_conf.rx_thresh.pthresh = rx_thresh.pthresh; 85 rx_conf.rx_thresh.hthresh = rx_thresh.hthresh; 86 rx_conf.rx_thresh.wthresh = rx_thresh.wthresh; 87 rx_conf.rx_free_thresh = 32; 88 rx_conf.rx_drop_en = 0; 89 rx_conf.rx_deferred_start = 0; 90 91 tx_conf.tx_thresh.pthresh = tx_thresh.pthresh; 92 tx_conf.tx_thresh.hthresh = tx_thresh.hthresh; 93 tx_conf.tx_thresh.wthresh = tx_thresh.wthresh; 94 tx_conf.tx_free_thresh = 0; 95 tx_conf.tx_rs_thresh = 0; 96 tx_conf.tx_deferred_start = 0; 97 98 /* init port */ 99 RTE_LOG(INFO, APP, "Initializing port %"PRIu16"... ", portid); 100 fflush(stdout); 101 102 ret = rte_eth_dev_info_get(portid, &dev_info); 103 if (ret != 0) 104 rte_exit(EXIT_FAILURE, 105 "Error during getting device (port %u) info: %s\n", 106 portid, strerror(-ret)); 107 108 if (dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE) 109 local_port_conf.txmode.offloads |= 110 RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE; 111 ret = rte_eth_dev_configure(portid, 1, 1, &local_port_conf); 112 if (ret < 0) 113 rte_exit(EXIT_FAILURE, 114 "Cannot configure device: err=%d, port=%u\n", 115 ret, portid); 116 117 rx_size = ring_conf.rx_size; 118 tx_size = ring_conf.tx_size; 119 ret = rte_eth_dev_adjust_nb_rx_tx_desc(portid, &rx_size, &tx_size); 120 if (ret < 0) 121 rte_exit(EXIT_FAILURE, 122 "rte_eth_dev_adjust_nb_rx_tx_desc: err=%d,port=%u\n", 123 ret, portid); 124 ring_conf.rx_size = rx_size; 125 ring_conf.tx_size = tx_size; 126 127 /* init one RX queue */ 128 fflush(stdout); 129 rx_conf.offloads = local_port_conf.rxmode.offloads; 130 ret = rte_eth_rx_queue_setup(portid, 0, (uint16_t)ring_conf.rx_size, 131 rte_eth_dev_socket_id(portid), &rx_conf, mp); 132 if (ret < 0) 133 rte_exit(EXIT_FAILURE, 134 "rte_eth_tx_queue_setup: err=%d, port=%u\n", 135 ret, portid); 136 137 /* init one TX queue */ 138 fflush(stdout); 139 tx_conf.offloads = local_port_conf.txmode.offloads; 140 ret = rte_eth_tx_queue_setup(portid, 0, 141 (uint16_t)ring_conf.tx_size, rte_eth_dev_socket_id(portid), &tx_conf); 142 if (ret < 0) 143 rte_exit(EXIT_FAILURE, 144 "rte_eth_tx_queue_setup: err=%d, port=%u queue=%d\n", 145 ret, portid, 0); 146 147 /* Start device */ 148 ret = rte_eth_dev_start(portid); 149 if (ret < 0) 150 rte_exit(EXIT_FAILURE, 151 "rte_pmd_port_start: err=%d, port=%u\n", 152 ret, portid); 153 154 printf("done: "); 155 156 /* get link status */ 157 ret = rte_eth_link_get(portid, &link); 158 if (ret < 0) 159 rte_exit(EXIT_FAILURE, 160 "rte_eth_link_get: err=%d, port=%u: %s\n", 161 ret, portid, rte_strerror(-ret)); 162 163 rte_eth_link_to_str(link_status_text, sizeof(link_status_text), &link); 164 printf("%s\n", link_status_text); 165 166 ret = rte_eth_promiscuous_enable(portid); 167 if (ret != 0) 168 rte_exit(EXIT_FAILURE, 169 "rte_eth_promiscuous_enable: err=%s, port=%u\n", 170 rte_strerror(-ret), portid); 171 172 /* mark port as initialized */ 173 app_inited_port_mask |= 1u << portid; 174 175 return 0; 176 } 177 178 static struct rte_sched_pipe_params pipe_profiles[MAX_SCHED_PIPE_PROFILES] = { 179 { /* Profile #0 */ 180 .tb_rate = 305175, 181 .tb_size = 1000000, 182 183 .tc_rate = {305175, 305175, 305175, 305175, 305175, 305175, 184 305175, 305175, 305175, 305175, 305175, 305175, 305175}, 185 .tc_period = 40, 186 #ifdef RTE_SCHED_SUBPORT_TC_OV 187 .tc_ov_weight = 1, 188 #endif 189 190 .wrr_weights = {1, 1, 1, 1}, 191 }, 192 }; 193 194 static struct rte_sched_subport_profile_params 195 subport_profile[MAX_SCHED_SUBPORT_PROFILES] = { 196 { 197 .tb_rate = 1250000000, 198 .tb_size = 1000000, 199 .tc_rate = {1250000000, 1250000000, 1250000000, 1250000000, 200 1250000000, 1250000000, 1250000000, 1250000000, 1250000000, 201 1250000000, 1250000000, 1250000000, 1250000000}, 202 .tc_period = 10, 203 }, 204 }; 205 206 struct rte_sched_subport_params subport_params[MAX_SCHED_SUBPORTS] = { 207 { 208 .n_pipes_per_subport_enabled = 4096, 209 .qsize = {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, 210 .pipe_profiles = pipe_profiles, 211 .n_pipe_profiles = sizeof(pipe_profiles) / 212 sizeof(struct rte_sched_pipe_params), 213 .n_max_pipe_profiles = MAX_SCHED_PIPE_PROFILES, 214 #ifdef RTE_SCHED_RED 215 .red_params = { 216 /* Traffic Class 0 Colors Green / Yellow / Red */ 217 [0][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 218 [0][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 219 [0][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 220 221 /* Traffic Class 1 - Colors Green / Yellow / Red */ 222 [1][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 223 [1][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 224 [1][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 225 226 /* Traffic Class 2 - Colors Green / Yellow / Red */ 227 [2][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 228 [2][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 229 [2][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 230 231 /* Traffic Class 3 - Colors Green / Yellow / Red */ 232 [3][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 233 [3][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 234 [3][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 235 236 /* Traffic Class 4 - Colors Green / Yellow / Red */ 237 [4][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 238 [4][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 239 [4][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 240 241 /* Traffic Class 5 - Colors Green / Yellow / Red */ 242 [5][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 243 [5][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 244 [5][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 245 246 /* Traffic Class 6 - Colors Green / Yellow / Red */ 247 [6][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 248 [6][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 249 [6][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 250 251 /* Traffic Class 7 - Colors Green / Yellow / Red */ 252 [7][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 253 [7][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 254 [7][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 255 256 /* Traffic Class 8 - Colors Green / Yellow / Red */ 257 [8][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 258 [8][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 259 [8][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 260 261 /* Traffic Class 9 - Colors Green / Yellow / Red */ 262 [9][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 263 [9][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 264 [9][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 265 266 /* Traffic Class 10 - Colors Green / Yellow / Red */ 267 [10][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 268 [10][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 269 [10][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 270 271 /* Traffic Class 11 - Colors Green / Yellow / Red */ 272 [11][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 273 [11][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 274 [11][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 275 276 /* Traffic Class 12 - Colors Green / Yellow / Red */ 277 [12][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 278 [12][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 279 [12][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, 280 }, 281 #endif /* RTE_SCHED_RED */ 282 }, 283 }; 284 285 struct rte_sched_port_params port_params = { 286 .name = "port_scheduler_0", 287 .socket = 0, /* computed */ 288 .rate = 0, /* computed */ 289 .mtu = 6 + 6 + 4 + 4 + 2 + 1500, 290 .frame_overhead = RTE_SCHED_FRAME_OVERHEAD_DEFAULT, 291 .n_subports_per_port = 1, 292 .n_subport_profiles = 1, 293 .subport_profiles = subport_profile, 294 .n_max_subport_profiles = MAX_SCHED_SUBPORT_PROFILES, 295 .n_pipes_per_subport = MAX_SCHED_PIPES, 296 }; 297 298 static struct rte_sched_port * 299 app_init_sched_port(uint32_t portid, uint32_t socketid) 300 { 301 static char port_name[32]; /* static as referenced from global port_params*/ 302 struct rte_eth_link link; 303 struct rte_sched_port *port = NULL; 304 uint32_t pipe, subport; 305 int err; 306 307 err = rte_eth_link_get(portid, &link); 308 if (err < 0) 309 rte_exit(EXIT_FAILURE, 310 "rte_eth_link_get: err=%d, port=%u: %s\n", 311 err, portid, rte_strerror(-err)); 312 313 port_params.socket = socketid; 314 port_params.rate = (uint64_t) link.link_speed * 1000 * 1000 / 8; 315 snprintf(port_name, sizeof(port_name), "port_%d", portid); 316 port_params.name = port_name; 317 318 port = rte_sched_port_config(&port_params); 319 if (port == NULL){ 320 rte_exit(EXIT_FAILURE, "Unable to config sched port\n"); 321 } 322 323 for (subport = 0; subport < port_params.n_subports_per_port; subport ++) { 324 err = rte_sched_subport_config(port, subport, 325 &subport_params[subport], 326 0); 327 if (err) { 328 rte_exit(EXIT_FAILURE, "Unable to config sched " 329 "subport %u, err=%d\n", subport, err); 330 } 331 332 uint32_t n_pipes_per_subport = 333 subport_params[subport].n_pipes_per_subport_enabled; 334 335 for (pipe = 0; pipe < n_pipes_per_subport; pipe++) { 336 if (app_pipe_to_profile[subport][pipe] != -1) { 337 err = rte_sched_pipe_config(port, subport, pipe, 338 app_pipe_to_profile[subport][pipe]); 339 if (err) { 340 rte_exit(EXIT_FAILURE, "Unable to config sched pipe %u " 341 "for profile %d, err=%d\n", pipe, 342 app_pipe_to_profile[subport][pipe], err); 343 } 344 } 345 } 346 } 347 348 return port; 349 } 350 351 static int 352 app_load_cfg_profile(const char *profile) 353 { 354 if (profile == NULL) 355 return 0; 356 struct rte_cfgfile *file = rte_cfgfile_load(profile, 0); 357 if (file == NULL) 358 rte_exit(EXIT_FAILURE, "Cannot load configuration profile %s\n", profile); 359 360 cfg_load_port(file, &port_params); 361 cfg_load_subport(file, subport_params); 362 cfg_load_subport_profile(file, subport_profile); 363 cfg_load_pipe(file, pipe_profiles); 364 365 rte_cfgfile_close(file); 366 367 return 0; 368 } 369 370 int app_init(void) 371 { 372 uint32_t i; 373 char ring_name[MAX_NAME_LEN]; 374 char pool_name[MAX_NAME_LEN]; 375 376 if (rte_eth_dev_count_avail() == 0) 377 rte_exit(EXIT_FAILURE, "No Ethernet port - bye\n"); 378 379 /* load configuration profile */ 380 if (app_load_cfg_profile(cfg_profile) != 0) 381 rte_exit(EXIT_FAILURE, "Invalid configuration profile\n"); 382 383 /* Initialize each active flow */ 384 for(i = 0; i < nb_pfc; i++) { 385 uint32_t socket = rte_lcore_to_socket_id(qos_conf[i].rx_core); 386 struct rte_ring *ring; 387 388 snprintf(ring_name, MAX_NAME_LEN, "ring-%u-%u", i, qos_conf[i].rx_core); 389 ring = rte_ring_lookup(ring_name); 390 if (ring == NULL) 391 qos_conf[i].rx_ring = rte_ring_create(ring_name, ring_conf.ring_size, 392 socket, RING_F_SP_ENQ | RING_F_SC_DEQ); 393 else 394 qos_conf[i].rx_ring = ring; 395 396 snprintf(ring_name, MAX_NAME_LEN, "ring-%u-%u", i, qos_conf[i].tx_core); 397 ring = rte_ring_lookup(ring_name); 398 if (ring == NULL) 399 qos_conf[i].tx_ring = rte_ring_create(ring_name, ring_conf.ring_size, 400 socket, RING_F_SP_ENQ | RING_F_SC_DEQ); 401 else 402 qos_conf[i].tx_ring = ring; 403 404 405 /* create the mbuf pools for each RX Port */ 406 snprintf(pool_name, MAX_NAME_LEN, "mbuf_pool%u", i); 407 qos_conf[i].mbuf_pool = rte_pktmbuf_pool_create(pool_name, 408 mp_size, burst_conf.rx_burst * 4, 0, 409 RTE_MBUF_DEFAULT_BUF_SIZE, 410 rte_eth_dev_socket_id(qos_conf[i].rx_port)); 411 if (qos_conf[i].mbuf_pool == NULL) 412 rte_exit(EXIT_FAILURE, "Cannot init mbuf pool for socket %u\n", i); 413 414 app_init_port(qos_conf[i].rx_port, qos_conf[i].mbuf_pool); 415 app_init_port(qos_conf[i].tx_port, qos_conf[i].mbuf_pool); 416 417 qos_conf[i].sched_port = app_init_sched_port(qos_conf[i].tx_port, socket); 418 } 419 420 RTE_LOG(INFO, APP, "time stamp clock running at %" PRIu64 " Hz\n", 421 rte_get_timer_hz()); 422 423 RTE_LOG(INFO, APP, "Ring sizes: NIC RX = %u, Mempool = %d SW queue = %u," 424 "NIC TX = %u\n", ring_conf.rx_size, mp_size, ring_conf.ring_size, 425 ring_conf.tx_size); 426 427 RTE_LOG(INFO, APP, "Burst sizes: RX read = %hu, RX write = %hu,\n" 428 " Worker read/QoS enqueue = %hu,\n" 429 " QoS dequeue = %hu, Worker write = %hu\n", 430 burst_conf.rx_burst, burst_conf.ring_burst, burst_conf.ring_burst, 431 burst_conf.qos_dequeue, burst_conf.tx_burst); 432 433 RTE_LOG(INFO, APP, "NIC thresholds RX (p = %hhu, h = %hhu, w = %hhu)," 434 "TX (p = %hhu, h = %hhu, w = %hhu)\n", 435 rx_thresh.pthresh, rx_thresh.hthresh, rx_thresh.wthresh, 436 tx_thresh.pthresh, tx_thresh.hthresh, tx_thresh.wthresh); 437 438 return 0; 439 } 440