1 /*- 2 * BSD LICENSE 3 * 4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Intel Corporation nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <stdio.h> 35 #include <string.h> 36 #include <stdlib.h> 37 #include <stdint.h> 38 #include <locale.h> 39 #include <unistd.h> 40 #include <limits.h> 41 #include <getopt.h> 42 43 #include <rte_log.h> 44 #include <rte_eal.h> 45 #include <rte_lcore.h> 46 #include <rte_string_fns.h> 47 48 #include "main.h" 49 50 #define APP_NAME "qos_sched" 51 #define MAX_OPT_VALUES 8 52 #define SYS_CPU_DIR "/sys/devices/system/cpu/cpu%u/topology/" 53 54 static uint32_t app_master_core = 1; 55 static uint32_t app_numa_mask; 56 static uint64_t app_used_core_mask = 0; 57 static uint64_t app_used_port_mask = 0; 58 static uint64_t app_used_rx_port_mask = 0; 59 static uint64_t app_used_tx_port_mask = 0; 60 61 62 static const char usage[] = 63 " \n" 64 " %s <APP PARAMS> \n" 65 " \n" 66 "Application mandatory parameters: \n" 67 " --pfc \"RX PORT, TX PORT, RX LCORE, WT LCORE\" : Packet flow configuration \n" 68 " multiple pfc can be configured in command line \n" 69 " \n" 70 "Application optional parameters: \n" 71 " --i : run in interactive mode (default value is %u) \n" 72 " --mst I : master core index (default value is %u) \n" 73 " --rsz \"A, B, C\" : Ring sizes \n" 74 " A = Size (in number of buffer descriptors) of each of the NIC RX \n" 75 " rings read by the I/O RX lcores (default value is %u) \n" 76 " B = Size (in number of elements) of each of the SW rings used by the\n" 77 " I/O RX lcores to send packets to worker lcores (default value is\n" 78 " %u) \n" 79 " C = Size (in number of buffer descriptors) of each of the NIC TX \n" 80 " rings written by worker lcores (default value is %u) \n" 81 " --bsz \"A, B, C, D\": Burst sizes \n" 82 " A = I/O RX lcore read burst size from NIC RX (default value is %u) \n" 83 " B = I/O RX lcore write burst size to output SW rings, \n" 84 " Worker lcore read burst size from input SW rings, \n" 85 " QoS enqueue size (default value is %u) \n" 86 " C = QoS dequeue size (default value is %u) \n" 87 " D = Worker lcore write burst size to NIC TX (default value is %u) \n" 88 " --msz M : Mempool size (in number of mbufs) for each pfc (default %u) \n" 89 " --rth \"A, B, C\" : RX queue threshold parameters \n" 90 " A = RX prefetch threshold (default value is %u) \n" 91 " B = RX host threshold (default value is %u) \n" 92 " C = RX write-back threshold (default value is %u) \n" 93 " --tth \"A, B, C\" : TX queue threshold parameters \n" 94 " A = TX prefetch threshold (default value is %u) \n" 95 " B = TX host threshold (default value is %u) \n" 96 " C = TX write-back threshold (default value is %u) \n" 97 " --cfg FILE : profile configuration to load \n" 98 ; 99 100 /* display usage */ 101 static void 102 app_usage(const char *prgname) 103 { 104 printf(usage, prgname, APP_INTERACTIVE_DEFAULT, app_master_core, 105 APP_RX_DESC_DEFAULT, APP_RING_SIZE, APP_TX_DESC_DEFAULT, 106 MAX_PKT_RX_BURST, PKT_ENQUEUE, PKT_DEQUEUE, 107 MAX_PKT_TX_BURST, NB_MBUF, 108 RX_PTHRESH, RX_HTHRESH, RX_WTHRESH, 109 TX_PTHRESH, TX_HTHRESH, TX_WTHRESH 110 ); 111 } 112 113 static inline int str_is(const char *str, const char *is) 114 { 115 return (strcmp(str, is) == 0); 116 } 117 118 /* returns core mask used by DPDK */ 119 static uint64_t 120 app_eal_core_mask(void) 121 { 122 uint32_t i; 123 uint64_t cm = 0; 124 struct rte_config *cfg = rte_eal_get_configuration(); 125 126 for (i = 0; i < RTE_MAX_LCORE; i++) { 127 if (cfg->lcore_role[i] == ROLE_RTE) 128 cm |= (1ULL << i); 129 } 130 131 cm |= (1ULL << cfg->master_lcore); 132 133 return cm; 134 } 135 136 137 /* returns total number of cores presented in a system */ 138 static uint32_t 139 app_cpu_core_count(void) 140 { 141 int i, len; 142 char path[PATH_MAX]; 143 uint32_t ncores = 0; 144 145 for(i = 0; i < RTE_MAX_LCORE; i++) { 146 len = snprintf(path, sizeof(path), SYS_CPU_DIR, i); 147 if (len <= 0 || (unsigned)len >= sizeof(path)) 148 continue; 149 150 if (access(path, F_OK) == 0) 151 ncores++; 152 } 153 154 return ncores; 155 } 156 157 /* returns: 158 number of values parsed 159 -1 in case of error 160 */ 161 static int 162 app_parse_opt_vals(const char *conf_str, char separator, uint32_t n_vals, uint32_t *opt_vals) 163 { 164 char *string; 165 uint32_t i, n_tokens; 166 char *tokens[MAX_OPT_VALUES]; 167 168 if (conf_str == NULL || opt_vals == NULL || n_vals == 0 || n_vals > MAX_OPT_VALUES) 169 return -1; 170 171 /* duplicate configuration string before splitting it to tokens */ 172 string = strdup(conf_str); 173 if (string == NULL) 174 return -1; 175 176 n_tokens = rte_strsplit(string, strnlen(string, 32), tokens, n_vals, separator); 177 178 for(i = 0; i < n_tokens; i++) { 179 opt_vals[i] = (uint32_t)atol(tokens[i]); 180 } 181 182 free(string); 183 184 return n_tokens; 185 } 186 187 static int 188 app_parse_ring_conf(const char *conf_str) 189 { 190 int ret; 191 uint32_t vals[3]; 192 193 ret = app_parse_opt_vals(conf_str, ',', 3, vals); 194 if (ret != 3) 195 return ret; 196 197 ring_conf.rx_size = vals[0]; 198 ring_conf.ring_size = vals[1]; 199 ring_conf.tx_size = vals[2]; 200 201 return 0; 202 } 203 204 static int 205 app_parse_rth_conf(const char *conf_str) 206 { 207 int ret; 208 uint32_t vals[3]; 209 210 ret = app_parse_opt_vals(conf_str, ',', 3, vals); 211 if (ret != 3) 212 return ret; 213 214 rx_thresh.pthresh = (uint8_t)vals[0]; 215 rx_thresh.hthresh = (uint8_t)vals[1]; 216 rx_thresh.wthresh = (uint8_t)vals[2]; 217 218 return 0; 219 } 220 221 static int 222 app_parse_tth_conf(const char *conf_str) 223 { 224 int ret; 225 uint32_t vals[3]; 226 227 ret = app_parse_opt_vals(conf_str, ',', 3, vals); 228 if (ret != 3) 229 return ret; 230 231 tx_thresh.pthresh = (uint8_t)vals[0]; 232 tx_thresh.hthresh = (uint8_t)vals[1]; 233 tx_thresh.wthresh = (uint8_t)vals[2]; 234 235 return 0; 236 } 237 238 static int 239 app_parse_flow_conf(const char *conf_str) 240 { 241 int ret; 242 uint32_t vals[5]; 243 struct flow_conf *pconf; 244 uint64_t mask; 245 246 ret = app_parse_opt_vals(conf_str, ',', 6, vals); 247 if (ret < 4 || ret > 5) 248 return ret; 249 250 pconf = &qos_conf[nb_pfc]; 251 252 pconf->rx_port = (uint8_t)vals[0]; 253 pconf->tx_port = (uint8_t)vals[1]; 254 pconf->rx_core = (uint8_t)vals[2]; 255 pconf->wt_core = (uint8_t)vals[3]; 256 if (ret == 5) 257 pconf->tx_core = (uint8_t)vals[4]; 258 else 259 pconf->tx_core = pconf->wt_core; 260 261 if (pconf->rx_core == pconf->wt_core) { 262 RTE_LOG(ERR, APP, "pfc %u: rx thread and worker thread cannot share same core\n", nb_pfc); 263 return -1; 264 } 265 266 if (pconf->rx_port >= RTE_MAX_ETHPORTS) { 267 RTE_LOG(ERR, APP, "pfc %u: invalid rx port %"PRIu8" index\n", 268 nb_pfc, pconf->rx_port); 269 return -1; 270 } 271 if (pconf->tx_port >= RTE_MAX_ETHPORTS) { 272 RTE_LOG(ERR, APP, "pfc %u: invalid tx port %"PRIu8" index\n", 273 nb_pfc, pconf->rx_port); 274 return -1; 275 } 276 277 mask = 1lu << pconf->rx_port; 278 if (app_used_rx_port_mask & mask) { 279 RTE_LOG(ERR, APP, "pfc %u: rx port %"PRIu8" is used already\n", 280 nb_pfc, pconf->rx_port); 281 return -1; 282 } 283 app_used_rx_port_mask |= mask; 284 app_used_port_mask |= mask; 285 286 mask = 1lu << pconf->tx_port; 287 if (app_used_tx_port_mask & mask) { 288 RTE_LOG(ERR, APP, "pfc %u: port %"PRIu8" is used already\n", 289 nb_pfc, pconf->tx_port); 290 return -1; 291 } 292 app_used_tx_port_mask |= mask; 293 app_used_port_mask |= mask; 294 295 mask = 1lu << pconf->rx_core; 296 app_used_core_mask |= mask; 297 298 mask = 1lu << pconf->wt_core; 299 app_used_core_mask |= mask; 300 301 mask = 1lu << pconf->tx_core; 302 app_used_core_mask |= mask; 303 304 nb_pfc++; 305 306 return 0; 307 } 308 309 static int 310 app_parse_burst_conf(const char *conf_str) 311 { 312 int ret; 313 uint32_t vals[4]; 314 315 ret = app_parse_opt_vals(conf_str, ',', 4, vals); 316 if (ret != 4) 317 return ret; 318 319 burst_conf.rx_burst = (uint16_t)vals[0]; 320 burst_conf.ring_burst = (uint16_t)vals[1]; 321 burst_conf.qos_dequeue = (uint16_t)vals[2]; 322 burst_conf.tx_burst = (uint16_t)vals[3]; 323 324 return 0; 325 } 326 327 /* 328 * Parses the argument given in the command line of the application, 329 * calculates mask for used cores and initializes EAL with calculated core mask 330 */ 331 int 332 app_parse_args(int argc, char **argv) 333 { 334 int opt, ret; 335 int option_index; 336 const char *optname; 337 char *prgname = argv[0]; 338 uint32_t i, nb_lcores; 339 340 static struct option lgopts[] = { 341 { "pfc", 1, 0, 0 }, 342 { "mst", 1, 0, 0 }, 343 { "rsz", 1, 0, 0 }, 344 { "bsz", 1, 0, 0 }, 345 { "msz", 1, 0, 0 }, 346 { "rth", 1, 0, 0 }, 347 { "tth", 1, 0, 0 }, 348 { "cfg", 1, 0, 0 }, 349 { NULL, 0, 0, 0 } 350 }; 351 352 /* initialize EAL first */ 353 ret = rte_eal_init(argc, argv); 354 if (ret < 0) 355 return -1; 356 357 argc -= ret; 358 argv += ret; 359 360 /* set en_US locale to print big numbers with ',' */ 361 setlocale(LC_NUMERIC, "en_US.utf-8"); 362 363 while ((opt = getopt_long(argc, argv, "i", 364 lgopts, &option_index)) != EOF) { 365 366 switch (opt) { 367 case 'i': 368 printf("Interactive-mode selected\n"); 369 interactive = 1; 370 break; 371 /* long options */ 372 case 0: 373 optname = lgopts[option_index].name; 374 if (str_is(optname, "pfc")) { 375 ret = app_parse_flow_conf(optarg); 376 if (ret) { 377 RTE_LOG(ERR, APP, "Invalid pipe configuration %s\n", optarg); 378 return -1; 379 } 380 break; 381 } 382 if (str_is(optname, "mst")) { 383 app_master_core = (uint32_t)atoi(optarg); 384 break; 385 } 386 if (str_is(optname, "rsz")) { 387 ret = app_parse_ring_conf(optarg); 388 if (ret) { 389 RTE_LOG(ERR, APP, "Invalid ring configuration %s\n", optarg); 390 return -1; 391 } 392 break; 393 } 394 if (str_is(optname, "bsz")) { 395 ret = app_parse_burst_conf(optarg); 396 if (ret) { 397 RTE_LOG(ERR, APP, "Invalid burst configuration %s\n", optarg); 398 return -1; 399 } 400 break; 401 } 402 if (str_is(optname, "msz")) { 403 mp_size = atoi(optarg); 404 if (mp_size <= 0) { 405 RTE_LOG(ERR, APP, "Invalid mempool size %s\n", optarg); 406 return -1; 407 } 408 break; 409 } 410 if (str_is(optname, "rth")) { 411 ret = app_parse_rth_conf(optarg); 412 if (ret) { 413 RTE_LOG(ERR, APP, "Invalid RX threshold configuration %s\n", optarg); 414 return -1; 415 } 416 break; 417 } 418 if (str_is(optname, "tth")) { 419 ret = app_parse_tth_conf(optarg); 420 if (ret) { 421 RTE_LOG(ERR, APP, "Invalid TX threshold configuration %s\n", optarg); 422 return -1; 423 } 424 break; 425 } 426 if (str_is(optname, "cfg")) { 427 cfg_profile = optarg; 428 break; 429 } 430 break; 431 432 default: 433 app_usage(prgname); 434 return -1; 435 } 436 } 437 438 /* check master core index validity */ 439 for(i = 0; i <= app_master_core; i++) { 440 if (app_used_core_mask & (1u << app_master_core)) { 441 RTE_LOG(ERR, APP, "Master core index is not configured properly\n"); 442 app_usage(prgname); 443 return -1; 444 } 445 } 446 app_used_core_mask |= 1u << app_master_core; 447 448 if ((app_used_core_mask != app_eal_core_mask()) || 449 (app_master_core != rte_get_master_lcore())) { 450 RTE_LOG(ERR, APP, "EAL core mask not configured properly, must be %" PRIx64 451 " instead of %" PRIx64 "\n" , app_used_core_mask, app_eal_core_mask()); 452 return -1; 453 } 454 455 if (nb_pfc == 0) { 456 RTE_LOG(ERR, APP, "Packet flow not configured!\n"); 457 app_usage(prgname); 458 return -1; 459 } 460 461 /* sanity check for cores assignment */ 462 nb_lcores = app_cpu_core_count(); 463 464 for(i = 0; i < nb_pfc; i++) { 465 if (qos_conf[i].rx_core >= nb_lcores) { 466 RTE_LOG(ERR, APP, "pfc %u: invalid RX lcore index %u\n", i + 1, 467 qos_conf[i].rx_core); 468 return -1; 469 } 470 if (qos_conf[i].wt_core >= nb_lcores) { 471 RTE_LOG(ERR, APP, "pfc %u: invalid WT lcore index %u\n", i + 1, 472 qos_conf[i].wt_core); 473 return -1; 474 } 475 uint32_t rx_sock = rte_lcore_to_socket_id(qos_conf[i].rx_core); 476 uint32_t wt_sock = rte_lcore_to_socket_id(qos_conf[i].wt_core); 477 if (rx_sock != wt_sock) { 478 RTE_LOG(ERR, APP, "pfc %u: RX and WT must be on the same socket\n", i + 1); 479 return -1; 480 } 481 app_numa_mask |= 1 << rte_lcore_to_socket_id(qos_conf[i].rx_core); 482 } 483 484 return 0; 485 } 486 487