xref: /dpdk/examples/qos_meter/main.c (revision e752649c5b558daa2fb3d19d49664a79a6c3133c)
1e6541fdeSIntel /*-
2e6541fdeSIntel  *   BSD LICENSE
3e6541fdeSIntel  *
4e2366e74STomasz Kulasek  *   Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
5e6541fdeSIntel  *   All rights reserved.
6e6541fdeSIntel  *
7e6541fdeSIntel  *   Redistribution and use in source and binary forms, with or without
8e6541fdeSIntel  *   modification, are permitted provided that the following conditions
9e6541fdeSIntel  *   are met:
10e6541fdeSIntel  *
11e6541fdeSIntel  *     * Redistributions of source code must retain the above copyright
12e6541fdeSIntel  *       notice, this list of conditions and the following disclaimer.
13e6541fdeSIntel  *     * Redistributions in binary form must reproduce the above copyright
14e6541fdeSIntel  *       notice, this list of conditions and the following disclaimer in
15e6541fdeSIntel  *       the documentation and/or other materials provided with the
16e6541fdeSIntel  *       distribution.
17e6541fdeSIntel  *     * Neither the name of Intel Corporation nor the names of its
18e6541fdeSIntel  *       contributors may be used to endorse or promote products derived
19e6541fdeSIntel  *       from this software without specific prior written permission.
20e6541fdeSIntel  *
21e6541fdeSIntel  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22e6541fdeSIntel  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23e6541fdeSIntel  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24e6541fdeSIntel  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25e6541fdeSIntel  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26e6541fdeSIntel  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27e6541fdeSIntel  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28e6541fdeSIntel  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29e6541fdeSIntel  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30e6541fdeSIntel  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31e6541fdeSIntel  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32e6541fdeSIntel  */
33e6541fdeSIntel 
34e6541fdeSIntel #include <stdio.h>
35e6541fdeSIntel #include <getopt.h>
36e6541fdeSIntel 
37e6541fdeSIntel #include <rte_common.h>
38e6541fdeSIntel #include <rte_eal.h>
39e2366e74STomasz Kulasek #include <rte_malloc.h>
40e6541fdeSIntel #include <rte_mempool.h>
41e6541fdeSIntel #include <rte_ethdev.h>
42e6541fdeSIntel #include <rte_cycles.h>
43e6541fdeSIntel #include <rte_mbuf.h>
44e6541fdeSIntel #include <rte_meter.h>
45e6541fdeSIntel 
46e6541fdeSIntel /*
47e6541fdeSIntel  * Traffic metering configuration
48e6541fdeSIntel  *
49e6541fdeSIntel  */
50e6541fdeSIntel #define APP_MODE_FWD                    0
51e6541fdeSIntel #define APP_MODE_SRTCM_COLOR_BLIND      1
52e6541fdeSIntel #define APP_MODE_SRTCM_COLOR_AWARE      2
53e6541fdeSIntel #define APP_MODE_TRTCM_COLOR_BLIND      3
54e6541fdeSIntel #define APP_MODE_TRTCM_COLOR_AWARE      4
55e6541fdeSIntel 
56e6541fdeSIntel #define APP_MODE	APP_MODE_SRTCM_COLOR_BLIND
57e6541fdeSIntel 
58e6541fdeSIntel 
59e6541fdeSIntel #include "main.h"
60e6541fdeSIntel 
61e6541fdeSIntel 
62e6541fdeSIntel #define APP_PKT_FLOW_POS                33
63e6541fdeSIntel #define APP_PKT_COLOR_POS               5
64e6541fdeSIntel 
65e6541fdeSIntel 
66e6541fdeSIntel #if APP_PKT_FLOW_POS > 64 || APP_PKT_COLOR_POS > 64
67e6541fdeSIntel #error Byte offset needs to be less than 64
68e6541fdeSIntel #endif
69e6541fdeSIntel 
70e6541fdeSIntel /*
71e6541fdeSIntel  * Buffer pool configuration
72e6541fdeSIntel  *
73e6541fdeSIntel  ***/
74e6541fdeSIntel #define NB_MBUF             8192
75e6541fdeSIntel #define MEMPOOL_CACHE_SIZE  256
76e6541fdeSIntel 
77e6541fdeSIntel static struct rte_mempool *pool = NULL;
78e6541fdeSIntel 
79e6541fdeSIntel /*
80e6541fdeSIntel  * NIC configuration
81e6541fdeSIntel  *
82e6541fdeSIntel  ***/
83e6541fdeSIntel static struct rte_eth_conf port_conf = {
84e6541fdeSIntel 	.rxmode = {
8513c4ebd6SBruce Richardson 		.mq_mode	= ETH_MQ_RX_RSS,
86e6541fdeSIntel 		.max_rx_pkt_len = ETHER_MAX_LEN,
87e6541fdeSIntel 		.split_hdr_size = 0,
88e6541fdeSIntel 		.header_split   = 0,
89e6541fdeSIntel 		.hw_ip_checksum = 1,
90e6541fdeSIntel 		.hw_vlan_filter = 0,
91e6541fdeSIntel 		.jumbo_frame    = 0,
92e6541fdeSIntel 		.hw_strip_crc   = 0,
93e6541fdeSIntel 	},
94e6541fdeSIntel 	.rx_adv_conf = {
95e6541fdeSIntel 		.rss_conf = {
96e6541fdeSIntel 			.rss_key = NULL,
978a387fa8SHelin Zhang 			.rss_hf = ETH_RSS_IP,
98e6541fdeSIntel 		},
99e6541fdeSIntel 	},
100e6541fdeSIntel 	.txmode = {
101e6541fdeSIntel 		.mq_mode = ETH_DCB_NONE,
102e6541fdeSIntel 	},
103e6541fdeSIntel };
104e6541fdeSIntel 
105e6541fdeSIntel #define NIC_RX_QUEUE_DESC               128
106e6541fdeSIntel #define NIC_TX_QUEUE_DESC               512
107e6541fdeSIntel 
108e6541fdeSIntel #define NIC_RX_QUEUE                    0
109e6541fdeSIntel #define NIC_TX_QUEUE                    0
110e6541fdeSIntel 
111e6541fdeSIntel /*
112e6541fdeSIntel  * Packet RX/TX
113e6541fdeSIntel  *
114e6541fdeSIntel  ***/
115e6541fdeSIntel #define PKT_RX_BURST_MAX                32
116e6541fdeSIntel #define PKT_TX_BURST_MAX                32
117e6541fdeSIntel #define TIME_TX_DRAIN                   200000ULL
118e6541fdeSIntel 
119e6541fdeSIntel static uint8_t port_rx;
120e6541fdeSIntel static uint8_t port_tx;
121e6541fdeSIntel static struct rte_mbuf *pkts_rx[PKT_RX_BURST_MAX];
122e2366e74STomasz Kulasek struct rte_eth_dev_tx_buffer *tx_buffer;
123e6541fdeSIntel 
124e6541fdeSIntel struct rte_meter_srtcm_params app_srtcm_params[] = {
125e6541fdeSIntel 	{.cir = 1000000 * 46,  .cbs = 2048, .ebs = 2048},
126e6541fdeSIntel };
127e6541fdeSIntel 
128e6541fdeSIntel struct rte_meter_trtcm_params app_trtcm_params[] = {
129e6541fdeSIntel 	{.cir = 1000000 * 46,  .pir = 1500000 * 46,  .cbs = 2048, .pbs = 2048},
130e6541fdeSIntel };
131e6541fdeSIntel 
132e6541fdeSIntel #define APP_FLOWS_MAX  256
133e6541fdeSIntel 
134e6541fdeSIntel FLOW_METER app_flows[APP_FLOWS_MAX];
135e6541fdeSIntel 
136*e752649cSSlawomir Mrozowicz static int
137e6541fdeSIntel app_configure_flow_table(void)
138e6541fdeSIntel {
139e6541fdeSIntel 	uint32_t i, j;
140*e752649cSSlawomir Mrozowicz 	int ret;
141e6541fdeSIntel 
142*e752649cSSlawomir Mrozowicz 	for (i = 0, j = 0; i < APP_FLOWS_MAX;
143*e752649cSSlawomir Mrozowicz 			i ++, j = (j + 1) % RTE_DIM(PARAMS)) {
144*e752649cSSlawomir Mrozowicz 		ret = FUNC_CONFIG(&app_flows[i], &PARAMS[j]);
145*e752649cSSlawomir Mrozowicz 		if (ret)
146*e752649cSSlawomir Mrozowicz 			return ret;
147e6541fdeSIntel 	}
148*e752649cSSlawomir Mrozowicz 
149*e752649cSSlawomir Mrozowicz 	return 0;
150e6541fdeSIntel }
151e6541fdeSIntel 
152e6541fdeSIntel static inline void
153fc8a10d8SIntel app_set_pkt_color(uint8_t *pkt_data, enum policer_action color)
154fc8a10d8SIntel {
155fc8a10d8SIntel 	pkt_data[APP_PKT_COLOR_POS] = (uint8_t)color;
156fc8a10d8SIntel }
157fc8a10d8SIntel 
158fc8a10d8SIntel static inline int
159e6541fdeSIntel app_pkt_handle(struct rte_mbuf *pkt, uint64_t time)
160e6541fdeSIntel {
161fc8a10d8SIntel 	uint8_t input_color, output_color;
162e6541fdeSIntel 	uint8_t *pkt_data = rte_pktmbuf_mtod(pkt, uint8_t *);
163e6541fdeSIntel 	uint32_t pkt_len = rte_pktmbuf_pkt_len(pkt) - sizeof(struct ether_hdr);
164e6541fdeSIntel 	uint8_t flow_id = (uint8_t)(pkt_data[APP_PKT_FLOW_POS] & (APP_FLOWS_MAX - 1));
165fc8a10d8SIntel 	input_color = pkt_data[APP_PKT_COLOR_POS];
166fc8a10d8SIntel 	enum policer_action action;
167e6541fdeSIntel 
168e6541fdeSIntel 	/* color input is not used for blind modes */
169fc8a10d8SIntel 	output_color = (uint8_t) FUNC_METER(&app_flows[flow_id], time, pkt_len,
170fc8a10d8SIntel 		(enum rte_meter_color) input_color);
171fc8a10d8SIntel 
172fc8a10d8SIntel 	/* Apply policing and set the output color */
173fc8a10d8SIntel 	action = policer_table[input_color][output_color];
174fc8a10d8SIntel 	app_set_pkt_color(pkt_data, action);
175fc8a10d8SIntel 
176fc8a10d8SIntel 	return action;
177e6541fdeSIntel }
178e6541fdeSIntel 
179e6541fdeSIntel 
180e6541fdeSIntel static __attribute__((noreturn)) int
181e6541fdeSIntel main_loop(__attribute__((unused)) void *dummy)
182e6541fdeSIntel {
183e6541fdeSIntel 	uint64_t current_time, last_time = rte_rdtsc();
184e6541fdeSIntel 	uint32_t lcore_id = rte_lcore_id();
185e6541fdeSIntel 
186e6541fdeSIntel 	printf("Core %u: port RX = %d, port TX = %d\n", lcore_id, port_rx, port_tx);
187e6541fdeSIntel 
188e6541fdeSIntel 	while (1) {
189e6541fdeSIntel 		uint64_t time_diff;
190e6541fdeSIntel 		int i, nb_rx;
191e6541fdeSIntel 
192e6541fdeSIntel 		/* Mechanism to avoid stale packets in the output buffer */
193e6541fdeSIntel 		current_time = rte_rdtsc();
194e6541fdeSIntel 		time_diff = current_time - last_time;
195e6541fdeSIntel 		if (unlikely(time_diff > TIME_TX_DRAIN)) {
196e2366e74STomasz Kulasek 			/* Flush tx buffer */
197e2366e74STomasz Kulasek 			rte_eth_tx_buffer_flush(port_tx, NIC_TX_QUEUE, tx_buffer);
198e6541fdeSIntel 			last_time = current_time;
199e6541fdeSIntel 		}
200e6541fdeSIntel 
201e6541fdeSIntel 		/* Read packet burst from NIC RX */
202e6541fdeSIntel 		nb_rx = rte_eth_rx_burst(port_rx, NIC_RX_QUEUE, pkts_rx, PKT_RX_BURST_MAX);
203e6541fdeSIntel 
204e6541fdeSIntel 		/* Handle packets */
205e6541fdeSIntel 		for (i = 0; i < nb_rx; i ++) {
206e6541fdeSIntel 			struct rte_mbuf *pkt = pkts_rx[i];
207e6541fdeSIntel 
208e6541fdeSIntel 			/* Handle current packet */
209fc8a10d8SIntel 			if (app_pkt_handle(pkt, current_time) == DROP)
210fc8a10d8SIntel 				rte_pktmbuf_free(pkt);
211e2366e74STomasz Kulasek 			else
212e2366e74STomasz Kulasek 				rte_eth_tx_buffer(port_tx, NIC_TX_QUEUE, tx_buffer, pkt);
213e6541fdeSIntel 		}
214e6541fdeSIntel 	}
215e6541fdeSIntel }
216e6541fdeSIntel 
217e6541fdeSIntel static void
218e6541fdeSIntel print_usage(const char *prgname)
219e6541fdeSIntel {
220e6541fdeSIntel 	printf ("%s [EAL options] -- -p PORTMASK\n"
221e6541fdeSIntel 		"  -p PORTMASK: hexadecimal bitmask of ports to configure\n",
222e6541fdeSIntel 		prgname);
223e6541fdeSIntel }
224e6541fdeSIntel 
225e6541fdeSIntel static int
226e6541fdeSIntel parse_portmask(const char *portmask)
227e6541fdeSIntel {
228e6541fdeSIntel 	char *end = NULL;
229e6541fdeSIntel 	unsigned long pm;
230e6541fdeSIntel 
231e6541fdeSIntel 	/* parse hexadecimal string */
232e6541fdeSIntel 	pm = strtoul(portmask, &end, 16);
233e6541fdeSIntel 	if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0'))
234e6541fdeSIntel 		return -1;
235e6541fdeSIntel 
236e6541fdeSIntel 	if (pm == 0)
237e6541fdeSIntel 		return -1;
238e6541fdeSIntel 
239e6541fdeSIntel 	return pm;
240e6541fdeSIntel }
241e6541fdeSIntel 
242e6541fdeSIntel /* Parse the argument given in the command line of the application */
243e6541fdeSIntel static int
244e6541fdeSIntel parse_args(int argc, char **argv)
245e6541fdeSIntel {
246e6541fdeSIntel 	int opt;
247e6541fdeSIntel 	char **argvopt;
248e6541fdeSIntel 	int option_index;
249e6541fdeSIntel 	char *prgname = argv[0];
250e6541fdeSIntel 	static struct option lgopts[] = {
251e6541fdeSIntel 		{NULL, 0, 0, 0}
252e6541fdeSIntel 	};
253e6541fdeSIntel 	uint64_t port_mask, i, mask;
254e6541fdeSIntel 
255e6541fdeSIntel 	argvopt = argv;
256e6541fdeSIntel 
257e6541fdeSIntel 	while ((opt = getopt_long(argc, argvopt, "p:", lgopts, &option_index)) != EOF) {
258e6541fdeSIntel 		switch (opt) {
259e6541fdeSIntel 		case 'p':
260e6541fdeSIntel 			port_mask = parse_portmask(optarg);
261e6541fdeSIntel 			if (port_mask == 0) {
262e6541fdeSIntel 				printf("invalid port mask (null port mask)\n");
263e6541fdeSIntel 				print_usage(prgname);
264e6541fdeSIntel 				return -1;
265e6541fdeSIntel 			}
266e6541fdeSIntel 
267e6541fdeSIntel 			for (i = 0, mask = 1; i < 64; i ++, mask <<= 1){
268e6541fdeSIntel 				if (mask & port_mask){
269e6541fdeSIntel 					port_rx = i;
270e6541fdeSIntel 					port_mask &= ~ mask;
271e6541fdeSIntel 					break;
272e6541fdeSIntel 				}
273e6541fdeSIntel 			}
274e6541fdeSIntel 
275e6541fdeSIntel 			for (i = 0, mask = 1; i < 64; i ++, mask <<= 1){
276e6541fdeSIntel 				if (mask & port_mask){
277e6541fdeSIntel 					port_tx = i;
278e6541fdeSIntel 					port_mask &= ~ mask;
279e6541fdeSIntel 					break;
280e6541fdeSIntel 				}
281e6541fdeSIntel 			}
282e6541fdeSIntel 
283e6541fdeSIntel 			if (port_mask != 0) {
284e6541fdeSIntel 				printf("invalid port mask (more than 2 ports)\n");
285e6541fdeSIntel 				print_usage(prgname);
286e6541fdeSIntel 				return -1;
287e6541fdeSIntel 			}
288e6541fdeSIntel 			break;
289e6541fdeSIntel 
290e6541fdeSIntel 		default:
291e6541fdeSIntel 			print_usage(prgname);
292e6541fdeSIntel 			return -1;
293e6541fdeSIntel 		}
294e6541fdeSIntel 	}
295e6541fdeSIntel 
296e6541fdeSIntel 	if (optind <= 1) {
297e6541fdeSIntel 		print_usage(prgname);
298e6541fdeSIntel 		return -1;
299e6541fdeSIntel 	}
300e6541fdeSIntel 
301e6541fdeSIntel 	argv[optind-1] = prgname;
302e6541fdeSIntel 
303e6541fdeSIntel 	optind = 0; /* reset getopt lib */
304e6541fdeSIntel 	return 0;
305e6541fdeSIntel }
306e6541fdeSIntel 
307e6541fdeSIntel int
30898a16481SDavid Marchand main(int argc, char **argv)
309e6541fdeSIntel {
310e6541fdeSIntel 	uint32_t lcore_id;
311e6541fdeSIntel 	int ret;
312e6541fdeSIntel 
313e6541fdeSIntel 	/* EAL init */
314e6541fdeSIntel 	ret = rte_eal_init(argc, argv);
315e6541fdeSIntel 	if (ret < 0)
316e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Invalid EAL parameters\n");
317e6541fdeSIntel 	argc -= ret;
318e6541fdeSIntel 	argv += ret;
319e6541fdeSIntel 	if (rte_lcore_count() != 1) {
320e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "This application does not accept more than one core. "
321e6541fdeSIntel 		"Please adjust the \"-c COREMASK\" parameter accordingly.\n");
322e6541fdeSIntel 	}
323e6541fdeSIntel 
324e6541fdeSIntel 	/* Application non-EAL arguments parse */
325e6541fdeSIntel 	ret = parse_args(argc, argv);
326e6541fdeSIntel 	if (ret < 0)
327e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Invalid input arguments\n");
328e6541fdeSIntel 
329e6541fdeSIntel 	/* Buffer pool init */
330ea0c20eaSOlivier Matz 	pool = rte_pktmbuf_pool_create("pool", NB_MBUF, MEMPOOL_CACHE_SIZE,
331824cb29cSKonstantin Ananyev 		0, RTE_MBUF_DEFAULT_BUF_SIZE, rte_socket_id());
332e6541fdeSIntel 	if (pool == NULL)
333e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Buffer pool creation error\n");
334e6541fdeSIntel 
335e6541fdeSIntel 	/* NIC init */
336e6541fdeSIntel 	ret = rte_eth_dev_configure(port_rx, 1, 1, &port_conf);
337e6541fdeSIntel 	if (ret < 0)
338e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Port %d configuration error (%d)\n", port_rx, ret);
339e6541fdeSIntel 
34081f7ecd9SPablo de Lara 	ret = rte_eth_rx_queue_setup(port_rx, NIC_RX_QUEUE, NIC_RX_QUEUE_DESC,
34181f7ecd9SPablo de Lara 				rte_eth_dev_socket_id(port_rx),
34281f7ecd9SPablo de Lara 				NULL, pool);
343e6541fdeSIntel 	if (ret < 0)
344e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Port %d RX queue setup error (%d)\n", port_rx, ret);
345e6541fdeSIntel 
34681f7ecd9SPablo de Lara 	ret = rte_eth_tx_queue_setup(port_rx, NIC_TX_QUEUE, NIC_TX_QUEUE_DESC,
34781f7ecd9SPablo de Lara 				rte_eth_dev_socket_id(port_rx),
34881f7ecd9SPablo de Lara 				NULL);
349e6541fdeSIntel 	if (ret < 0)
350e6541fdeSIntel 	rte_exit(EXIT_FAILURE, "Port %d TX queue setup error (%d)\n", port_rx, ret);
351e6541fdeSIntel 
352e6541fdeSIntel 	ret = rte_eth_dev_configure(port_tx, 1, 1, &port_conf);
353e6541fdeSIntel 	if (ret < 0)
354e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Port %d configuration error (%d)\n", port_tx, ret);
355e6541fdeSIntel 
35681f7ecd9SPablo de Lara 	ret = rte_eth_rx_queue_setup(port_tx, NIC_RX_QUEUE, NIC_RX_QUEUE_DESC,
35781f7ecd9SPablo de Lara 				rte_eth_dev_socket_id(port_tx),
35881f7ecd9SPablo de Lara 				NULL, pool);
359e6541fdeSIntel 	if (ret < 0)
360e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Port %d RX queue setup error (%d)\n", port_tx, ret);
361e6541fdeSIntel 
36281f7ecd9SPablo de Lara 	ret = rte_eth_tx_queue_setup(port_tx, NIC_TX_QUEUE, NIC_TX_QUEUE_DESC,
36381f7ecd9SPablo de Lara 				rte_eth_dev_socket_id(port_tx),
36481f7ecd9SPablo de Lara 				NULL);
365e6541fdeSIntel 	if (ret < 0)
366e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Port %d TX queue setup error (%d)\n", port_tx, ret);
367e6541fdeSIntel 
368e2366e74STomasz Kulasek 	tx_buffer = rte_zmalloc_socket("tx_buffer",
369e2366e74STomasz Kulasek 			RTE_ETH_TX_BUFFER_SIZE(PKT_TX_BURST_MAX), 0,
370e2366e74STomasz Kulasek 			rte_eth_dev_socket_id(port_tx));
371e2366e74STomasz Kulasek 	if (tx_buffer == NULL)
372e2366e74STomasz Kulasek 		rte_exit(EXIT_FAILURE, "Port %d TX buffer allocation error\n",
373e2366e74STomasz Kulasek 				port_tx);
374e2366e74STomasz Kulasek 
375e2366e74STomasz Kulasek 	rte_eth_tx_buffer_init(tx_buffer, PKT_TX_BURST_MAX);
376e2366e74STomasz Kulasek 
377e6541fdeSIntel 	ret = rte_eth_dev_start(port_rx);
378e6541fdeSIntel 	if (ret < 0)
379e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Port %d start error (%d)\n", port_rx, ret);
380e6541fdeSIntel 
381e6541fdeSIntel 	ret = rte_eth_dev_start(port_tx);
382e6541fdeSIntel 	if (ret < 0)
383e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Port %d start error (%d)\n", port_tx, ret);
384e6541fdeSIntel 
385e6541fdeSIntel 	rte_eth_promiscuous_enable(port_rx);
386e6541fdeSIntel 
387e6541fdeSIntel 	rte_eth_promiscuous_enable(port_tx);
388e6541fdeSIntel 
389e6541fdeSIntel 	/* App configuration */
390*e752649cSSlawomir Mrozowicz 	ret = app_configure_flow_table();
391*e752649cSSlawomir Mrozowicz 	if (ret < 0)
392*e752649cSSlawomir Mrozowicz 		rte_exit(EXIT_FAILURE, "Invalid configure flow table\n");
393e6541fdeSIntel 
394e6541fdeSIntel 	/* Launch per-lcore init on every lcore */
395e6541fdeSIntel 	rte_eal_mp_remote_launch(main_loop, NULL, CALL_MASTER);
396e6541fdeSIntel 	RTE_LCORE_FOREACH_SLAVE(lcore_id) {
397e6541fdeSIntel 		if (rte_eal_wait_lcore(lcore_id) < 0)
398e6541fdeSIntel 			return -1;
399e6541fdeSIntel 	}
400e6541fdeSIntel 
401e6541fdeSIntel 	return 0;
402e6541fdeSIntel }
403