13998e2a0SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause 23998e2a0SBruce Richardson * Copyright(c) 2010-2016 Intel Corporation 3e6541fdeSIntel */ 4e6541fdeSIntel 5e6541fdeSIntel #include <stdio.h> 6e6541fdeSIntel #include <getopt.h> 7e6541fdeSIntel 8e6541fdeSIntel #include <rte_common.h> 9e6541fdeSIntel #include <rte_eal.h> 10e2366e74STomasz Kulasek #include <rte_malloc.h> 11e6541fdeSIntel #include <rte_mempool.h> 12e6541fdeSIntel #include <rte_ethdev.h> 13e6541fdeSIntel #include <rte_cycles.h> 14e6541fdeSIntel #include <rte_mbuf.h> 15e6541fdeSIntel #include <rte_meter.h> 16e6541fdeSIntel 17e6541fdeSIntel /* 18e6541fdeSIntel * Traffic metering configuration 19e6541fdeSIntel * 20e6541fdeSIntel */ 21e6541fdeSIntel #define APP_MODE_FWD 0 22e6541fdeSIntel #define APP_MODE_SRTCM_COLOR_BLIND 1 23e6541fdeSIntel #define APP_MODE_SRTCM_COLOR_AWARE 2 24e6541fdeSIntel #define APP_MODE_TRTCM_COLOR_BLIND 3 25e6541fdeSIntel #define APP_MODE_TRTCM_COLOR_AWARE 4 26e6541fdeSIntel 27e6541fdeSIntel #define APP_MODE APP_MODE_SRTCM_COLOR_BLIND 28e6541fdeSIntel 29e6541fdeSIntel 30e6541fdeSIntel #include "main.h" 31e6541fdeSIntel 32e6541fdeSIntel 33e6541fdeSIntel #define APP_PKT_FLOW_POS 33 34e6541fdeSIntel #define APP_PKT_COLOR_POS 5 35e6541fdeSIntel 36e6541fdeSIntel 37e6541fdeSIntel #if APP_PKT_FLOW_POS > 64 || APP_PKT_COLOR_POS > 64 38e6541fdeSIntel #error Byte offset needs to be less than 64 39e6541fdeSIntel #endif 40e6541fdeSIntel 41e6541fdeSIntel /* 42e6541fdeSIntel * Buffer pool configuration 43e6541fdeSIntel * 44e6541fdeSIntel ***/ 45e6541fdeSIntel #define NB_MBUF 8192 46e6541fdeSIntel #define MEMPOOL_CACHE_SIZE 256 47e6541fdeSIntel 48e6541fdeSIntel static struct rte_mempool *pool = NULL; 49e6541fdeSIntel 50e6541fdeSIntel /* 51e6541fdeSIntel * NIC configuration 52e6541fdeSIntel * 53e6541fdeSIntel ***/ 54e6541fdeSIntel static struct rte_eth_conf port_conf = { 55e6541fdeSIntel .rxmode = { 5613c4ebd6SBruce Richardson .mq_mode = ETH_MQ_RX_RSS, 57e6541fdeSIntel .max_rx_pkt_len = ETHER_MAX_LEN, 58e6541fdeSIntel .split_hdr_size = 0, 590b8fccaaSShahaf Shuler .ignore_offload_bitfield = 1, 600b8fccaaSShahaf Shuler .offloads = (DEV_RX_OFFLOAD_CHECKSUM | 610b8fccaaSShahaf Shuler DEV_RX_OFFLOAD_CRC_STRIP), 62e6541fdeSIntel }, 63e6541fdeSIntel .rx_adv_conf = { 64e6541fdeSIntel .rss_conf = { 65e6541fdeSIntel .rss_key = NULL, 668a387fa8SHelin Zhang .rss_hf = ETH_RSS_IP, 67e6541fdeSIntel }, 68e6541fdeSIntel }, 69e6541fdeSIntel .txmode = { 70e6541fdeSIntel .mq_mode = ETH_DCB_NONE, 71e6541fdeSIntel }, 72e6541fdeSIntel }; 73e6541fdeSIntel 74867a6c66SKevin Laatz #define NIC_RX_QUEUE_DESC 1024 75867a6c66SKevin Laatz #define NIC_TX_QUEUE_DESC 1024 76e6541fdeSIntel 77e6541fdeSIntel #define NIC_RX_QUEUE 0 78e6541fdeSIntel #define NIC_TX_QUEUE 0 79e6541fdeSIntel 80e6541fdeSIntel /* 81e6541fdeSIntel * Packet RX/TX 82e6541fdeSIntel * 83e6541fdeSIntel ***/ 84e6541fdeSIntel #define PKT_RX_BURST_MAX 32 85e6541fdeSIntel #define PKT_TX_BURST_MAX 32 86e6541fdeSIntel #define TIME_TX_DRAIN 200000ULL 87e6541fdeSIntel 8847523597SZhiyong Yang static uint16_t port_rx; 8947523597SZhiyong Yang static uint16_t port_tx; 90e6541fdeSIntel static struct rte_mbuf *pkts_rx[PKT_RX_BURST_MAX]; 91e2366e74STomasz Kulasek struct rte_eth_dev_tx_buffer *tx_buffer; 92e6541fdeSIntel 93*c06ddf96SCristian Dumitrescu struct rte_meter_srtcm_params app_srtcm_params = { 94*c06ddf96SCristian Dumitrescu .cir = 1000000 * 46, 95*c06ddf96SCristian Dumitrescu .cbs = 2048, 96*c06ddf96SCristian Dumitrescu .ebs = 2048 97e6541fdeSIntel }; 98e6541fdeSIntel 99*c06ddf96SCristian Dumitrescu struct rte_meter_srtcm_profile app_srtcm_profile; 100*c06ddf96SCristian Dumitrescu 101*c06ddf96SCristian Dumitrescu struct rte_meter_trtcm_params app_trtcm_params = { 102*c06ddf96SCristian Dumitrescu .cir = 1000000 * 46, 103*c06ddf96SCristian Dumitrescu .pir = 1500000 * 46, 104*c06ddf96SCristian Dumitrescu .cbs = 2048, 105*c06ddf96SCristian Dumitrescu .pbs = 2048 106e6541fdeSIntel }; 107e6541fdeSIntel 108*c06ddf96SCristian Dumitrescu struct rte_meter_trtcm_profile app_trtcm_profile; 109*c06ddf96SCristian Dumitrescu 110e6541fdeSIntel #define APP_FLOWS_MAX 256 111e6541fdeSIntel 112e6541fdeSIntel FLOW_METER app_flows[APP_FLOWS_MAX]; 113e6541fdeSIntel 114e752649cSSlawomir Mrozowicz static int 115e6541fdeSIntel app_configure_flow_table(void) 116e6541fdeSIntel { 117*c06ddf96SCristian Dumitrescu uint32_t i; 118e752649cSSlawomir Mrozowicz int ret; 119e6541fdeSIntel 120*c06ddf96SCristian Dumitrescu ret = rte_meter_srtcm_profile_config(&app_srtcm_profile, 121*c06ddf96SCristian Dumitrescu &app_srtcm_params); 122*c06ddf96SCristian Dumitrescu if (ret) 123*c06ddf96SCristian Dumitrescu return ret; 124*c06ddf96SCristian Dumitrescu 125*c06ddf96SCristian Dumitrescu ret = rte_meter_trtcm_profile_config(&app_trtcm_profile, 126*c06ddf96SCristian Dumitrescu &app_trtcm_params); 127*c06ddf96SCristian Dumitrescu if (ret) 128*c06ddf96SCristian Dumitrescu return ret; 129*c06ddf96SCristian Dumitrescu 130*c06ddf96SCristian Dumitrescu for (i = 0; i < APP_FLOWS_MAX; i++) { 131*c06ddf96SCristian Dumitrescu ret = FUNC_CONFIG(&app_flows[i], &PROFILE); 132e752649cSSlawomir Mrozowicz if (ret) 133e752649cSSlawomir Mrozowicz return ret; 134e6541fdeSIntel } 135e752649cSSlawomir Mrozowicz 136e752649cSSlawomir Mrozowicz return 0; 137e6541fdeSIntel } 138e6541fdeSIntel 139e6541fdeSIntel static inline void 140fc8a10d8SIntel app_set_pkt_color(uint8_t *pkt_data, enum policer_action color) 141fc8a10d8SIntel { 142fc8a10d8SIntel pkt_data[APP_PKT_COLOR_POS] = (uint8_t)color; 143fc8a10d8SIntel } 144fc8a10d8SIntel 145fc8a10d8SIntel static inline int 146e6541fdeSIntel app_pkt_handle(struct rte_mbuf *pkt, uint64_t time) 147e6541fdeSIntel { 148fc8a10d8SIntel uint8_t input_color, output_color; 149e6541fdeSIntel uint8_t *pkt_data = rte_pktmbuf_mtod(pkt, uint8_t *); 150e6541fdeSIntel uint32_t pkt_len = rte_pktmbuf_pkt_len(pkt) - sizeof(struct ether_hdr); 151e6541fdeSIntel uint8_t flow_id = (uint8_t)(pkt_data[APP_PKT_FLOW_POS] & (APP_FLOWS_MAX - 1)); 152fc8a10d8SIntel input_color = pkt_data[APP_PKT_COLOR_POS]; 153fc8a10d8SIntel enum policer_action action; 154e6541fdeSIntel 155e6541fdeSIntel /* color input is not used for blind modes */ 156*c06ddf96SCristian Dumitrescu output_color = (uint8_t) FUNC_METER(&app_flows[flow_id], 157*c06ddf96SCristian Dumitrescu &PROFILE, 158*c06ddf96SCristian Dumitrescu time, 159*c06ddf96SCristian Dumitrescu pkt_len, 160fc8a10d8SIntel (enum rte_meter_color) input_color); 161fc8a10d8SIntel 162fc8a10d8SIntel /* Apply policing and set the output color */ 163fc8a10d8SIntel action = policer_table[input_color][output_color]; 164fc8a10d8SIntel app_set_pkt_color(pkt_data, action); 165fc8a10d8SIntel 166fc8a10d8SIntel return action; 167e6541fdeSIntel } 168e6541fdeSIntel 169e6541fdeSIntel 170e6541fdeSIntel static __attribute__((noreturn)) int 171e6541fdeSIntel main_loop(__attribute__((unused)) void *dummy) 172e6541fdeSIntel { 173e6541fdeSIntel uint64_t current_time, last_time = rte_rdtsc(); 174e6541fdeSIntel uint32_t lcore_id = rte_lcore_id(); 175e6541fdeSIntel 176e6541fdeSIntel printf("Core %u: port RX = %d, port TX = %d\n", lcore_id, port_rx, port_tx); 177e6541fdeSIntel 178e6541fdeSIntel while (1) { 179e6541fdeSIntel uint64_t time_diff; 180e6541fdeSIntel int i, nb_rx; 181e6541fdeSIntel 182e6541fdeSIntel /* Mechanism to avoid stale packets in the output buffer */ 183e6541fdeSIntel current_time = rte_rdtsc(); 184e6541fdeSIntel time_diff = current_time - last_time; 185e6541fdeSIntel if (unlikely(time_diff > TIME_TX_DRAIN)) { 186e2366e74STomasz Kulasek /* Flush tx buffer */ 187e2366e74STomasz Kulasek rte_eth_tx_buffer_flush(port_tx, NIC_TX_QUEUE, tx_buffer); 188e6541fdeSIntel last_time = current_time; 189e6541fdeSIntel } 190e6541fdeSIntel 191e6541fdeSIntel /* Read packet burst from NIC RX */ 192e6541fdeSIntel nb_rx = rte_eth_rx_burst(port_rx, NIC_RX_QUEUE, pkts_rx, PKT_RX_BURST_MAX); 193e6541fdeSIntel 194e6541fdeSIntel /* Handle packets */ 195e6541fdeSIntel for (i = 0; i < nb_rx; i ++) { 196e6541fdeSIntel struct rte_mbuf *pkt = pkts_rx[i]; 197e6541fdeSIntel 198e6541fdeSIntel /* Handle current packet */ 199fc8a10d8SIntel if (app_pkt_handle(pkt, current_time) == DROP) 200fc8a10d8SIntel rte_pktmbuf_free(pkt); 201e2366e74STomasz Kulasek else 202e2366e74STomasz Kulasek rte_eth_tx_buffer(port_tx, NIC_TX_QUEUE, tx_buffer, pkt); 203e6541fdeSIntel } 204e6541fdeSIntel } 205e6541fdeSIntel } 206e6541fdeSIntel 207e6541fdeSIntel static void 208e6541fdeSIntel print_usage(const char *prgname) 209e6541fdeSIntel { 210e6541fdeSIntel printf ("%s [EAL options] -- -p PORTMASK\n" 211e6541fdeSIntel " -p PORTMASK: hexadecimal bitmask of ports to configure\n", 212e6541fdeSIntel prgname); 213e6541fdeSIntel } 214e6541fdeSIntel 215e6541fdeSIntel static int 216e6541fdeSIntel parse_portmask(const char *portmask) 217e6541fdeSIntel { 218e6541fdeSIntel char *end = NULL; 219e6541fdeSIntel unsigned long pm; 220e6541fdeSIntel 221e6541fdeSIntel /* parse hexadecimal string */ 222e6541fdeSIntel pm = strtoul(portmask, &end, 16); 223e6541fdeSIntel if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 224e6541fdeSIntel return -1; 225e6541fdeSIntel 226e6541fdeSIntel if (pm == 0) 227e6541fdeSIntel return -1; 228e6541fdeSIntel 229e6541fdeSIntel return pm; 230e6541fdeSIntel } 231e6541fdeSIntel 232e6541fdeSIntel /* Parse the argument given in the command line of the application */ 233e6541fdeSIntel static int 234e6541fdeSIntel parse_args(int argc, char **argv) 235e6541fdeSIntel { 236e6541fdeSIntel int opt; 237e6541fdeSIntel char **argvopt; 238e6541fdeSIntel int option_index; 239e6541fdeSIntel char *prgname = argv[0]; 240e6541fdeSIntel static struct option lgopts[] = { 241e6541fdeSIntel {NULL, 0, 0, 0} 242e6541fdeSIntel }; 243e6541fdeSIntel uint64_t port_mask, i, mask; 244e6541fdeSIntel 245e6541fdeSIntel argvopt = argv; 246e6541fdeSIntel 247e6541fdeSIntel while ((opt = getopt_long(argc, argvopt, "p:", lgopts, &option_index)) != EOF) { 248e6541fdeSIntel switch (opt) { 249e6541fdeSIntel case 'p': 250e6541fdeSIntel port_mask = parse_portmask(optarg); 251e6541fdeSIntel if (port_mask == 0) { 252e6541fdeSIntel printf("invalid port mask (null port mask)\n"); 253e6541fdeSIntel print_usage(prgname); 254e6541fdeSIntel return -1; 255e6541fdeSIntel } 256e6541fdeSIntel 257e6541fdeSIntel for (i = 0, mask = 1; i < 64; i ++, mask <<= 1){ 258e6541fdeSIntel if (mask & port_mask){ 259e6541fdeSIntel port_rx = i; 260e6541fdeSIntel port_mask &= ~ mask; 261e6541fdeSIntel break; 262e6541fdeSIntel } 263e6541fdeSIntel } 264e6541fdeSIntel 265e6541fdeSIntel for (i = 0, mask = 1; i < 64; i ++, mask <<= 1){ 266e6541fdeSIntel if (mask & port_mask){ 267e6541fdeSIntel port_tx = i; 268e6541fdeSIntel port_mask &= ~ mask; 269e6541fdeSIntel break; 270e6541fdeSIntel } 271e6541fdeSIntel } 272e6541fdeSIntel 273e6541fdeSIntel if (port_mask != 0) { 274e6541fdeSIntel printf("invalid port mask (more than 2 ports)\n"); 275e6541fdeSIntel print_usage(prgname); 276e6541fdeSIntel return -1; 277e6541fdeSIntel } 278e6541fdeSIntel break; 279e6541fdeSIntel 280e6541fdeSIntel default: 281e6541fdeSIntel print_usage(prgname); 282e6541fdeSIntel return -1; 283e6541fdeSIntel } 284e6541fdeSIntel } 285e6541fdeSIntel 286e6541fdeSIntel if (optind <= 1) { 287e6541fdeSIntel print_usage(prgname); 288e6541fdeSIntel return -1; 289e6541fdeSIntel } 290e6541fdeSIntel 291e6541fdeSIntel argv[optind-1] = prgname; 292e6541fdeSIntel 2939d5ca532SKeith Wiles optind = 1; /* reset getopt lib */ 294e6541fdeSIntel return 0; 295e6541fdeSIntel } 296e6541fdeSIntel 297e6541fdeSIntel int 29898a16481SDavid Marchand main(int argc, char **argv) 299e6541fdeSIntel { 300e6541fdeSIntel uint32_t lcore_id; 30160efb44fSRoman Zhukov uint16_t nb_rxd = NIC_RX_QUEUE_DESC; 30260efb44fSRoman Zhukov uint16_t nb_txd = NIC_TX_QUEUE_DESC; 3030b8fccaaSShahaf Shuler struct rte_eth_conf conf; 3040b8fccaaSShahaf Shuler struct rte_eth_rxconf rxq_conf; 3050b8fccaaSShahaf Shuler struct rte_eth_txconf txq_conf; 3060b8fccaaSShahaf Shuler struct rte_eth_dev_info dev_info; 307e6541fdeSIntel int ret; 308e6541fdeSIntel 309e6541fdeSIntel /* EAL init */ 310e6541fdeSIntel ret = rte_eal_init(argc, argv); 311e6541fdeSIntel if (ret < 0) 312e6541fdeSIntel rte_exit(EXIT_FAILURE, "Invalid EAL parameters\n"); 313e6541fdeSIntel argc -= ret; 314e6541fdeSIntel argv += ret; 315e6541fdeSIntel if (rte_lcore_count() != 1) { 316e6541fdeSIntel rte_exit(EXIT_FAILURE, "This application does not accept more than one core. " 317e6541fdeSIntel "Please adjust the \"-c COREMASK\" parameter accordingly.\n"); 318e6541fdeSIntel } 319e6541fdeSIntel 320e6541fdeSIntel /* Application non-EAL arguments parse */ 321e6541fdeSIntel ret = parse_args(argc, argv); 322e6541fdeSIntel if (ret < 0) 323e6541fdeSIntel rte_exit(EXIT_FAILURE, "Invalid input arguments\n"); 324e6541fdeSIntel 325e6541fdeSIntel /* Buffer pool init */ 326ea0c20eaSOlivier Matz pool = rte_pktmbuf_pool_create("pool", NB_MBUF, MEMPOOL_CACHE_SIZE, 327824cb29cSKonstantin Ananyev 0, RTE_MBUF_DEFAULT_BUF_SIZE, rte_socket_id()); 328e6541fdeSIntel if (pool == NULL) 329e6541fdeSIntel rte_exit(EXIT_FAILURE, "Buffer pool creation error\n"); 330e6541fdeSIntel 331e6541fdeSIntel /* NIC init */ 3320b8fccaaSShahaf Shuler conf = port_conf; 3330b8fccaaSShahaf Shuler rte_eth_dev_info_get(port_rx, &dev_info); 3340b8fccaaSShahaf Shuler if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE) 3350b8fccaaSShahaf Shuler conf.txmode.offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE; 3360b8fccaaSShahaf Shuler ret = rte_eth_dev_configure(port_rx, 1, 1, &conf); 337e6541fdeSIntel if (ret < 0) 338e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d configuration error (%d)\n", port_rx, ret); 339e6541fdeSIntel 34060efb44fSRoman Zhukov ret = rte_eth_dev_adjust_nb_rx_tx_desc(port_rx, &nb_rxd, &nb_txd); 34160efb44fSRoman Zhukov if (ret < 0) 34260efb44fSRoman Zhukov rte_exit(EXIT_FAILURE, "Port %d adjust number of descriptors error (%d)\n", 34360efb44fSRoman Zhukov port_rx, ret); 34460efb44fSRoman Zhukov 3450b8fccaaSShahaf Shuler rxq_conf = dev_info.default_rxconf; 3460b8fccaaSShahaf Shuler rxq_conf.offloads = conf.rxmode.offloads; 34760efb44fSRoman Zhukov ret = rte_eth_rx_queue_setup(port_rx, NIC_RX_QUEUE, nb_rxd, 34881f7ecd9SPablo de Lara rte_eth_dev_socket_id(port_rx), 3490b8fccaaSShahaf Shuler &rxq_conf, pool); 350e6541fdeSIntel if (ret < 0) 351e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d RX queue setup error (%d)\n", port_rx, ret); 352e6541fdeSIntel 3530b8fccaaSShahaf Shuler txq_conf = dev_info.default_txconf; 3540b8fccaaSShahaf Shuler txq_conf.txq_flags = ETH_TXQ_FLAGS_IGNORE; 3550b8fccaaSShahaf Shuler txq_conf.offloads = conf.txmode.offloads; 35660efb44fSRoman Zhukov ret = rte_eth_tx_queue_setup(port_rx, NIC_TX_QUEUE, nb_txd, 35781f7ecd9SPablo de Lara rte_eth_dev_socket_id(port_rx), 3580b8fccaaSShahaf Shuler &txq_conf); 359e6541fdeSIntel if (ret < 0) 360e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d TX queue setup error (%d)\n", port_rx, ret); 361e6541fdeSIntel 3620b8fccaaSShahaf Shuler conf = port_conf; 3630b8fccaaSShahaf Shuler rte_eth_dev_info_get(port_tx, &dev_info); 3640b8fccaaSShahaf Shuler if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE) 3650b8fccaaSShahaf Shuler conf.txmode.offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE; 3660b8fccaaSShahaf Shuler ret = rte_eth_dev_configure(port_tx, 1, 1, &conf); 367e6541fdeSIntel if (ret < 0) 368e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d configuration error (%d)\n", port_tx, ret); 369e6541fdeSIntel 37060efb44fSRoman Zhukov nb_rxd = NIC_RX_QUEUE_DESC; 37160efb44fSRoman Zhukov nb_txd = NIC_TX_QUEUE_DESC; 37260efb44fSRoman Zhukov ret = rte_eth_dev_adjust_nb_rx_tx_desc(port_tx, &nb_rxd, &nb_txd); 37360efb44fSRoman Zhukov if (ret < 0) 37460efb44fSRoman Zhukov rte_exit(EXIT_FAILURE, "Port %d adjust number of descriptors error (%d)\n", 37560efb44fSRoman Zhukov port_tx, ret); 37660efb44fSRoman Zhukov 3770b8fccaaSShahaf Shuler rxq_conf = dev_info.default_rxconf; 3780b8fccaaSShahaf Shuler rxq_conf.offloads = conf.rxmode.offloads; 37960efb44fSRoman Zhukov ret = rte_eth_rx_queue_setup(port_tx, NIC_RX_QUEUE, nb_rxd, 38081f7ecd9SPablo de Lara rte_eth_dev_socket_id(port_tx), 38181f7ecd9SPablo de Lara NULL, pool); 382e6541fdeSIntel if (ret < 0) 383e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d RX queue setup error (%d)\n", port_tx, ret); 384e6541fdeSIntel 3850b8fccaaSShahaf Shuler txq_conf = dev_info.default_txconf; 3860b8fccaaSShahaf Shuler txq_conf.txq_flags = ETH_TXQ_FLAGS_IGNORE; 3870b8fccaaSShahaf Shuler txq_conf.offloads = conf.txmode.offloads; 38860efb44fSRoman Zhukov ret = rte_eth_tx_queue_setup(port_tx, NIC_TX_QUEUE, nb_txd, 38981f7ecd9SPablo de Lara rte_eth_dev_socket_id(port_tx), 39081f7ecd9SPablo de Lara NULL); 391e6541fdeSIntel if (ret < 0) 392e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d TX queue setup error (%d)\n", port_tx, ret); 393e6541fdeSIntel 394e2366e74STomasz Kulasek tx_buffer = rte_zmalloc_socket("tx_buffer", 395e2366e74STomasz Kulasek RTE_ETH_TX_BUFFER_SIZE(PKT_TX_BURST_MAX), 0, 396e2366e74STomasz Kulasek rte_eth_dev_socket_id(port_tx)); 397e2366e74STomasz Kulasek if (tx_buffer == NULL) 398e2366e74STomasz Kulasek rte_exit(EXIT_FAILURE, "Port %d TX buffer allocation error\n", 399e2366e74STomasz Kulasek port_tx); 400e2366e74STomasz Kulasek 401e2366e74STomasz Kulasek rte_eth_tx_buffer_init(tx_buffer, PKT_TX_BURST_MAX); 402e2366e74STomasz Kulasek 403e6541fdeSIntel ret = rte_eth_dev_start(port_rx); 404e6541fdeSIntel if (ret < 0) 405e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d start error (%d)\n", port_rx, ret); 406e6541fdeSIntel 407e6541fdeSIntel ret = rte_eth_dev_start(port_tx); 408e6541fdeSIntel if (ret < 0) 409e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d start error (%d)\n", port_tx, ret); 410e6541fdeSIntel 411e6541fdeSIntel rte_eth_promiscuous_enable(port_rx); 412e6541fdeSIntel 413e6541fdeSIntel rte_eth_promiscuous_enable(port_tx); 414e6541fdeSIntel 415e6541fdeSIntel /* App configuration */ 416e752649cSSlawomir Mrozowicz ret = app_configure_flow_table(); 417e752649cSSlawomir Mrozowicz if (ret < 0) 418e752649cSSlawomir Mrozowicz rte_exit(EXIT_FAILURE, "Invalid configure flow table\n"); 419e6541fdeSIntel 420e6541fdeSIntel /* Launch per-lcore init on every lcore */ 421e6541fdeSIntel rte_eal_mp_remote_launch(main_loop, NULL, CALL_MASTER); 422e6541fdeSIntel RTE_LCORE_FOREACH_SLAVE(lcore_id) { 423e6541fdeSIntel if (rte_eal_wait_lcore(lcore_id) < 0) 424e6541fdeSIntel return -1; 425e6541fdeSIntel } 426e6541fdeSIntel 427e6541fdeSIntel return 0; 428e6541fdeSIntel } 429