xref: /dpdk/examples/qos_meter/main.c (revision 35b2d13fd6fdcbd191f2a30d74648faeb1186c65)
13998e2a0SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause
23998e2a0SBruce Richardson  * Copyright(c) 2010-2016 Intel Corporation
3e6541fdeSIntel  */
4e6541fdeSIntel 
5e6541fdeSIntel #include <stdio.h>
6e6541fdeSIntel #include <getopt.h>
7e6541fdeSIntel 
8e6541fdeSIntel #include <rte_common.h>
9e6541fdeSIntel #include <rte_eal.h>
10e2366e74STomasz Kulasek #include <rte_malloc.h>
11e6541fdeSIntel #include <rte_mempool.h>
12e6541fdeSIntel #include <rte_ethdev.h>
13e6541fdeSIntel #include <rte_cycles.h>
14e6541fdeSIntel #include <rte_mbuf.h>
15e6541fdeSIntel #include <rte_meter.h>
16e6541fdeSIntel 
17e6541fdeSIntel /*
18e6541fdeSIntel  * Traffic metering configuration
19e6541fdeSIntel  *
20e6541fdeSIntel  */
21e6541fdeSIntel #define APP_MODE_FWD                    0
22e6541fdeSIntel #define APP_MODE_SRTCM_COLOR_BLIND      1
23e6541fdeSIntel #define APP_MODE_SRTCM_COLOR_AWARE      2
24e6541fdeSIntel #define APP_MODE_TRTCM_COLOR_BLIND      3
25e6541fdeSIntel #define APP_MODE_TRTCM_COLOR_AWARE      4
26e6541fdeSIntel 
27e6541fdeSIntel #define APP_MODE	APP_MODE_SRTCM_COLOR_BLIND
28e6541fdeSIntel 
29e6541fdeSIntel 
30e6541fdeSIntel #include "main.h"
31e6541fdeSIntel 
32e6541fdeSIntel 
33e6541fdeSIntel #define APP_PKT_FLOW_POS                33
34e6541fdeSIntel #define APP_PKT_COLOR_POS               5
35e6541fdeSIntel 
36e6541fdeSIntel 
37e6541fdeSIntel #if APP_PKT_FLOW_POS > 64 || APP_PKT_COLOR_POS > 64
38e6541fdeSIntel #error Byte offset needs to be less than 64
39e6541fdeSIntel #endif
40e6541fdeSIntel 
41e6541fdeSIntel /*
42e6541fdeSIntel  * Buffer pool configuration
43e6541fdeSIntel  *
44e6541fdeSIntel  ***/
45e6541fdeSIntel #define NB_MBUF             8192
46e6541fdeSIntel #define MEMPOOL_CACHE_SIZE  256
47e6541fdeSIntel 
48e6541fdeSIntel static struct rte_mempool *pool = NULL;
49e6541fdeSIntel 
50e6541fdeSIntel /*
51e6541fdeSIntel  * NIC configuration
52e6541fdeSIntel  *
53e6541fdeSIntel  ***/
54e6541fdeSIntel static struct rte_eth_conf port_conf = {
55e6541fdeSIntel 	.rxmode = {
5613c4ebd6SBruce Richardson 		.mq_mode	= ETH_MQ_RX_RSS,
57*35b2d13fSOlivier Matz 		.max_rx_pkt_len = RTE_ETHER_MAX_LEN,
58e6541fdeSIntel 		.split_hdr_size = 0,
59323e7b66SFerruh Yigit 		.offloads = DEV_RX_OFFLOAD_CHECKSUM,
60e6541fdeSIntel 	},
61e6541fdeSIntel 	.rx_adv_conf = {
62e6541fdeSIntel 		.rss_conf = {
63e6541fdeSIntel 			.rss_key = NULL,
648a387fa8SHelin Zhang 			.rss_hf = ETH_RSS_IP,
65e6541fdeSIntel 		},
66e6541fdeSIntel 	},
67e6541fdeSIntel 	.txmode = {
68e6541fdeSIntel 		.mq_mode = ETH_DCB_NONE,
69e6541fdeSIntel 	},
70e6541fdeSIntel };
71e6541fdeSIntel 
72867a6c66SKevin Laatz #define NIC_RX_QUEUE_DESC               1024
73867a6c66SKevin Laatz #define NIC_TX_QUEUE_DESC               1024
74e6541fdeSIntel 
75e6541fdeSIntel #define NIC_RX_QUEUE                    0
76e6541fdeSIntel #define NIC_TX_QUEUE                    0
77e6541fdeSIntel 
78e6541fdeSIntel /*
79e6541fdeSIntel  * Packet RX/TX
80e6541fdeSIntel  *
81e6541fdeSIntel  ***/
82e6541fdeSIntel #define PKT_RX_BURST_MAX                32
83e6541fdeSIntel #define PKT_TX_BURST_MAX                32
84e6541fdeSIntel #define TIME_TX_DRAIN                   200000ULL
85e6541fdeSIntel 
8647523597SZhiyong Yang static uint16_t port_rx;
8747523597SZhiyong Yang static uint16_t port_tx;
88e6541fdeSIntel static struct rte_mbuf *pkts_rx[PKT_RX_BURST_MAX];
89e2366e74STomasz Kulasek struct rte_eth_dev_tx_buffer *tx_buffer;
90e6541fdeSIntel 
91c06ddf96SCristian Dumitrescu struct rte_meter_srtcm_params app_srtcm_params = {
92c06ddf96SCristian Dumitrescu 	.cir = 1000000 * 46,
93c06ddf96SCristian Dumitrescu 	.cbs = 2048,
94c06ddf96SCristian Dumitrescu 	.ebs = 2048
95e6541fdeSIntel };
96e6541fdeSIntel 
97c06ddf96SCristian Dumitrescu struct rte_meter_srtcm_profile app_srtcm_profile;
98c06ddf96SCristian Dumitrescu 
99c06ddf96SCristian Dumitrescu struct rte_meter_trtcm_params app_trtcm_params = {
100c06ddf96SCristian Dumitrescu 	.cir = 1000000 * 46,
101c06ddf96SCristian Dumitrescu 	.pir = 1500000 * 46,
102c06ddf96SCristian Dumitrescu 	.cbs = 2048,
103c06ddf96SCristian Dumitrescu 	.pbs = 2048
104e6541fdeSIntel };
105e6541fdeSIntel 
106c06ddf96SCristian Dumitrescu struct rte_meter_trtcm_profile app_trtcm_profile;
107c06ddf96SCristian Dumitrescu 
108e6541fdeSIntel #define APP_FLOWS_MAX  256
109e6541fdeSIntel 
110e6541fdeSIntel FLOW_METER app_flows[APP_FLOWS_MAX];
111e6541fdeSIntel 
112e752649cSSlawomir Mrozowicz static int
113e6541fdeSIntel app_configure_flow_table(void)
114e6541fdeSIntel {
115c06ddf96SCristian Dumitrescu 	uint32_t i;
116e752649cSSlawomir Mrozowicz 	int ret;
117e6541fdeSIntel 
118c06ddf96SCristian Dumitrescu 	ret = rte_meter_srtcm_profile_config(&app_srtcm_profile,
119c06ddf96SCristian Dumitrescu 		&app_srtcm_params);
120c06ddf96SCristian Dumitrescu 	if (ret)
121c06ddf96SCristian Dumitrescu 		return ret;
122c06ddf96SCristian Dumitrescu 
123c06ddf96SCristian Dumitrescu 	ret = rte_meter_trtcm_profile_config(&app_trtcm_profile,
124c06ddf96SCristian Dumitrescu 		&app_trtcm_params);
125c06ddf96SCristian Dumitrescu 	if (ret)
126c06ddf96SCristian Dumitrescu 		return ret;
127c06ddf96SCristian Dumitrescu 
128c06ddf96SCristian Dumitrescu 	for (i = 0; i < APP_FLOWS_MAX; i++) {
129c06ddf96SCristian Dumitrescu 		ret = FUNC_CONFIG(&app_flows[i], &PROFILE);
130e752649cSSlawomir Mrozowicz 		if (ret)
131e752649cSSlawomir Mrozowicz 			return ret;
132e6541fdeSIntel 	}
133e752649cSSlawomir Mrozowicz 
134e752649cSSlawomir Mrozowicz 	return 0;
135e6541fdeSIntel }
136e6541fdeSIntel 
137e6541fdeSIntel static inline void
138fc8a10d8SIntel app_set_pkt_color(uint8_t *pkt_data, enum policer_action color)
139fc8a10d8SIntel {
140fc8a10d8SIntel 	pkt_data[APP_PKT_COLOR_POS] = (uint8_t)color;
141fc8a10d8SIntel }
142fc8a10d8SIntel 
143fc8a10d8SIntel static inline int
144e6541fdeSIntel app_pkt_handle(struct rte_mbuf *pkt, uint64_t time)
145e6541fdeSIntel {
146fc8a10d8SIntel 	uint8_t input_color, output_color;
147e6541fdeSIntel 	uint8_t *pkt_data = rte_pktmbuf_mtod(pkt, uint8_t *);
1486d13ea8eSOlivier Matz 	uint32_t pkt_len = rte_pktmbuf_pkt_len(pkt) -
1496d13ea8eSOlivier Matz 		sizeof(struct rte_ether_hdr);
150e6541fdeSIntel 	uint8_t flow_id = (uint8_t)(pkt_data[APP_PKT_FLOW_POS] & (APP_FLOWS_MAX - 1));
151fc8a10d8SIntel 	input_color = pkt_data[APP_PKT_COLOR_POS];
152fc8a10d8SIntel 	enum policer_action action;
153e6541fdeSIntel 
154e6541fdeSIntel 	/* color input is not used for blind modes */
155c06ddf96SCristian Dumitrescu 	output_color = (uint8_t) FUNC_METER(&app_flows[flow_id],
156c06ddf96SCristian Dumitrescu 		&PROFILE,
157c06ddf96SCristian Dumitrescu 		time,
158c06ddf96SCristian Dumitrescu 		pkt_len,
159fc8a10d8SIntel 		(enum rte_meter_color) input_color);
160fc8a10d8SIntel 
161fc8a10d8SIntel 	/* Apply policing and set the output color */
162fc8a10d8SIntel 	action = policer_table[input_color][output_color];
163fc8a10d8SIntel 	app_set_pkt_color(pkt_data, action);
164fc8a10d8SIntel 
165fc8a10d8SIntel 	return action;
166e6541fdeSIntel }
167e6541fdeSIntel 
168e6541fdeSIntel 
169e6541fdeSIntel static __attribute__((noreturn)) int
170e6541fdeSIntel main_loop(__attribute__((unused)) void *dummy)
171e6541fdeSIntel {
172e6541fdeSIntel 	uint64_t current_time, last_time = rte_rdtsc();
173e6541fdeSIntel 	uint32_t lcore_id = rte_lcore_id();
174e6541fdeSIntel 
175e6541fdeSIntel 	printf("Core %u: port RX = %d, port TX = %d\n", lcore_id, port_rx, port_tx);
176e6541fdeSIntel 
177e6541fdeSIntel 	while (1) {
178e6541fdeSIntel 		uint64_t time_diff;
179e6541fdeSIntel 		int i, nb_rx;
180e6541fdeSIntel 
181e6541fdeSIntel 		/* Mechanism to avoid stale packets in the output buffer */
182e6541fdeSIntel 		current_time = rte_rdtsc();
183e6541fdeSIntel 		time_diff = current_time - last_time;
184e6541fdeSIntel 		if (unlikely(time_diff > TIME_TX_DRAIN)) {
185e2366e74STomasz Kulasek 			/* Flush tx buffer */
186e2366e74STomasz Kulasek 			rte_eth_tx_buffer_flush(port_tx, NIC_TX_QUEUE, tx_buffer);
187e6541fdeSIntel 			last_time = current_time;
188e6541fdeSIntel 		}
189e6541fdeSIntel 
190e6541fdeSIntel 		/* Read packet burst from NIC RX */
191e6541fdeSIntel 		nb_rx = rte_eth_rx_burst(port_rx, NIC_RX_QUEUE, pkts_rx, PKT_RX_BURST_MAX);
192e6541fdeSIntel 
193e6541fdeSIntel 		/* Handle packets */
194e6541fdeSIntel 		for (i = 0; i < nb_rx; i ++) {
195e6541fdeSIntel 			struct rte_mbuf *pkt = pkts_rx[i];
196e6541fdeSIntel 
197e6541fdeSIntel 			/* Handle current packet */
198fc8a10d8SIntel 			if (app_pkt_handle(pkt, current_time) == DROP)
199fc8a10d8SIntel 				rte_pktmbuf_free(pkt);
200e2366e74STomasz Kulasek 			else
201e2366e74STomasz Kulasek 				rte_eth_tx_buffer(port_tx, NIC_TX_QUEUE, tx_buffer, pkt);
202e6541fdeSIntel 		}
203e6541fdeSIntel 	}
204e6541fdeSIntel }
205e6541fdeSIntel 
206e6541fdeSIntel static void
207e6541fdeSIntel print_usage(const char *prgname)
208e6541fdeSIntel {
209e6541fdeSIntel 	printf ("%s [EAL options] -- -p PORTMASK\n"
210e6541fdeSIntel 		"  -p PORTMASK: hexadecimal bitmask of ports to configure\n",
211e6541fdeSIntel 		prgname);
212e6541fdeSIntel }
213e6541fdeSIntel 
214e6541fdeSIntel static int
215e6541fdeSIntel parse_portmask(const char *portmask)
216e6541fdeSIntel {
217e6541fdeSIntel 	char *end = NULL;
218e6541fdeSIntel 	unsigned long pm;
219e6541fdeSIntel 
220e6541fdeSIntel 	/* parse hexadecimal string */
221e6541fdeSIntel 	pm = strtoul(portmask, &end, 16);
222e6541fdeSIntel 	if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0'))
223e6541fdeSIntel 		return -1;
224e6541fdeSIntel 
225e6541fdeSIntel 	if (pm == 0)
226e6541fdeSIntel 		return -1;
227e6541fdeSIntel 
228e6541fdeSIntel 	return pm;
229e6541fdeSIntel }
230e6541fdeSIntel 
231e6541fdeSIntel /* Parse the argument given in the command line of the application */
232e6541fdeSIntel static int
233e6541fdeSIntel parse_args(int argc, char **argv)
234e6541fdeSIntel {
235e6541fdeSIntel 	int opt;
236e6541fdeSIntel 	char **argvopt;
237e6541fdeSIntel 	int option_index;
238e6541fdeSIntel 	char *prgname = argv[0];
239e6541fdeSIntel 	static struct option lgopts[] = {
240e6541fdeSIntel 		{NULL, 0, 0, 0}
241e6541fdeSIntel 	};
242e6541fdeSIntel 	uint64_t port_mask, i, mask;
243e6541fdeSIntel 
244e6541fdeSIntel 	argvopt = argv;
245e6541fdeSIntel 
246e6541fdeSIntel 	while ((opt = getopt_long(argc, argvopt, "p:", lgopts, &option_index)) != EOF) {
247e6541fdeSIntel 		switch (opt) {
248e6541fdeSIntel 		case 'p':
249e6541fdeSIntel 			port_mask = parse_portmask(optarg);
250e6541fdeSIntel 			if (port_mask == 0) {
251e6541fdeSIntel 				printf("invalid port mask (null port mask)\n");
252e6541fdeSIntel 				print_usage(prgname);
253e6541fdeSIntel 				return -1;
254e6541fdeSIntel 			}
255e6541fdeSIntel 
256e6541fdeSIntel 			for (i = 0, mask = 1; i < 64; i ++, mask <<= 1){
257e6541fdeSIntel 				if (mask & port_mask){
258e6541fdeSIntel 					port_rx = i;
259e6541fdeSIntel 					port_mask &= ~ mask;
260e6541fdeSIntel 					break;
261e6541fdeSIntel 				}
262e6541fdeSIntel 			}
263e6541fdeSIntel 
264e6541fdeSIntel 			for (i = 0, mask = 1; i < 64; i ++, mask <<= 1){
265e6541fdeSIntel 				if (mask & port_mask){
266e6541fdeSIntel 					port_tx = i;
267e6541fdeSIntel 					port_mask &= ~ mask;
268e6541fdeSIntel 					break;
269e6541fdeSIntel 				}
270e6541fdeSIntel 			}
271e6541fdeSIntel 
272e6541fdeSIntel 			if (port_mask != 0) {
273e6541fdeSIntel 				printf("invalid port mask (more than 2 ports)\n");
274e6541fdeSIntel 				print_usage(prgname);
275e6541fdeSIntel 				return -1;
276e6541fdeSIntel 			}
277e6541fdeSIntel 			break;
278e6541fdeSIntel 
279e6541fdeSIntel 		default:
280e6541fdeSIntel 			print_usage(prgname);
281e6541fdeSIntel 			return -1;
282e6541fdeSIntel 		}
283e6541fdeSIntel 	}
284e6541fdeSIntel 
285e6541fdeSIntel 	if (optind <= 1) {
286e6541fdeSIntel 		print_usage(prgname);
287e6541fdeSIntel 		return -1;
288e6541fdeSIntel 	}
289e6541fdeSIntel 
290e6541fdeSIntel 	argv[optind-1] = prgname;
291e6541fdeSIntel 
2929d5ca532SKeith Wiles 	optind = 1; /* reset getopt lib */
293e6541fdeSIntel 	return 0;
294e6541fdeSIntel }
295e6541fdeSIntel 
296e6541fdeSIntel int
29798a16481SDavid Marchand main(int argc, char **argv)
298e6541fdeSIntel {
299e6541fdeSIntel 	uint32_t lcore_id;
30060efb44fSRoman Zhukov 	uint16_t nb_rxd = NIC_RX_QUEUE_DESC;
30160efb44fSRoman Zhukov 	uint16_t nb_txd = NIC_TX_QUEUE_DESC;
3020b8fccaaSShahaf Shuler 	struct rte_eth_conf conf;
3030b8fccaaSShahaf Shuler 	struct rte_eth_rxconf rxq_conf;
3040b8fccaaSShahaf Shuler 	struct rte_eth_txconf txq_conf;
3050b8fccaaSShahaf Shuler 	struct rte_eth_dev_info dev_info;
306e6541fdeSIntel 	int ret;
307e6541fdeSIntel 
308e6541fdeSIntel 	/* EAL init */
309e6541fdeSIntel 	ret = rte_eal_init(argc, argv);
310e6541fdeSIntel 	if (ret < 0)
311e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Invalid EAL parameters\n");
312e6541fdeSIntel 	argc -= ret;
313e6541fdeSIntel 	argv += ret;
314e6541fdeSIntel 	if (rte_lcore_count() != 1) {
315e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "This application does not accept more than one core. "
316e6541fdeSIntel 		"Please adjust the \"-c COREMASK\" parameter accordingly.\n");
317e6541fdeSIntel 	}
318e6541fdeSIntel 
319e6541fdeSIntel 	/* Application non-EAL arguments parse */
320e6541fdeSIntel 	ret = parse_args(argc, argv);
321e6541fdeSIntel 	if (ret < 0)
322e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Invalid input arguments\n");
323e6541fdeSIntel 
324e6541fdeSIntel 	/* Buffer pool init */
325ea0c20eaSOlivier Matz 	pool = rte_pktmbuf_pool_create("pool", NB_MBUF, MEMPOOL_CACHE_SIZE,
326824cb29cSKonstantin Ananyev 		0, RTE_MBUF_DEFAULT_BUF_SIZE, rte_socket_id());
327e6541fdeSIntel 	if (pool == NULL)
328e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Buffer pool creation error\n");
329e6541fdeSIntel 
330e6541fdeSIntel 	/* NIC init */
3310b8fccaaSShahaf Shuler 	conf = port_conf;
3320b8fccaaSShahaf Shuler 	rte_eth_dev_info_get(port_rx, &dev_info);
3330b8fccaaSShahaf Shuler 	if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
3340b8fccaaSShahaf Shuler 		conf.txmode.offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
3354f5701f2SFerruh Yigit 
3364f5701f2SFerruh Yigit 	conf.rx_adv_conf.rss_conf.rss_hf &= dev_info.flow_type_rss_offloads;
3374f5701f2SFerruh Yigit 	if (conf.rx_adv_conf.rss_conf.rss_hf !=
3384f5701f2SFerruh Yigit 			port_conf.rx_adv_conf.rss_conf.rss_hf) {
3394f5701f2SFerruh Yigit 		printf("Port %u modified RSS hash function based on hardware support,"
3404f5701f2SFerruh Yigit 			"requested:%#"PRIx64" configured:%#"PRIx64"\n",
3414f5701f2SFerruh Yigit 			port_rx,
3424f5701f2SFerruh Yigit 			port_conf.rx_adv_conf.rss_conf.rss_hf,
3434f5701f2SFerruh Yigit 			conf.rx_adv_conf.rss_conf.rss_hf);
3444f5701f2SFerruh Yigit 	}
3454f5701f2SFerruh Yigit 
3460b8fccaaSShahaf Shuler 	ret = rte_eth_dev_configure(port_rx, 1, 1, &conf);
347e6541fdeSIntel 	if (ret < 0)
348e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Port %d configuration error (%d)\n", port_rx, ret);
349e6541fdeSIntel 
35060efb44fSRoman Zhukov 	ret = rte_eth_dev_adjust_nb_rx_tx_desc(port_rx, &nb_rxd, &nb_txd);
35160efb44fSRoman Zhukov 	if (ret < 0)
35260efb44fSRoman Zhukov 		rte_exit(EXIT_FAILURE, "Port %d adjust number of descriptors error (%d)\n",
35360efb44fSRoman Zhukov 				port_rx, ret);
35460efb44fSRoman Zhukov 
3550b8fccaaSShahaf Shuler 	rxq_conf = dev_info.default_rxconf;
3560b8fccaaSShahaf Shuler 	rxq_conf.offloads = conf.rxmode.offloads;
35760efb44fSRoman Zhukov 	ret = rte_eth_rx_queue_setup(port_rx, NIC_RX_QUEUE, nb_rxd,
35881f7ecd9SPablo de Lara 				rte_eth_dev_socket_id(port_rx),
3590b8fccaaSShahaf Shuler 				&rxq_conf, pool);
360e6541fdeSIntel 	if (ret < 0)
361e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Port %d RX queue setup error (%d)\n", port_rx, ret);
362e6541fdeSIntel 
3630b8fccaaSShahaf Shuler 	txq_conf = dev_info.default_txconf;
3640b8fccaaSShahaf Shuler 	txq_conf.offloads = conf.txmode.offloads;
36560efb44fSRoman Zhukov 	ret = rte_eth_tx_queue_setup(port_rx, NIC_TX_QUEUE, nb_txd,
36681f7ecd9SPablo de Lara 				rte_eth_dev_socket_id(port_rx),
3670b8fccaaSShahaf Shuler 				&txq_conf);
368e6541fdeSIntel 	if (ret < 0)
369e6541fdeSIntel 	rte_exit(EXIT_FAILURE, "Port %d TX queue setup error (%d)\n", port_rx, ret);
370e6541fdeSIntel 
3710b8fccaaSShahaf Shuler 	conf = port_conf;
3720b8fccaaSShahaf Shuler 	rte_eth_dev_info_get(port_tx, &dev_info);
3730b8fccaaSShahaf Shuler 	if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
3740b8fccaaSShahaf Shuler 		conf.txmode.offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
3754f5701f2SFerruh Yigit 
3764f5701f2SFerruh Yigit 	conf.rx_adv_conf.rss_conf.rss_hf &= dev_info.flow_type_rss_offloads;
3774f5701f2SFerruh Yigit 	if (conf.rx_adv_conf.rss_conf.rss_hf !=
3784f5701f2SFerruh Yigit 			port_conf.rx_adv_conf.rss_conf.rss_hf) {
3794f5701f2SFerruh Yigit 		printf("Port %u modified RSS hash function based on hardware support,"
3804f5701f2SFerruh Yigit 			"requested:%#"PRIx64" configured:%#"PRIx64"\n",
3814f5701f2SFerruh Yigit 			port_tx,
3824f5701f2SFerruh Yigit 			port_conf.rx_adv_conf.rss_conf.rss_hf,
3834f5701f2SFerruh Yigit 			conf.rx_adv_conf.rss_conf.rss_hf);
3844f5701f2SFerruh Yigit 	}
3854f5701f2SFerruh Yigit 
3860b8fccaaSShahaf Shuler 	ret = rte_eth_dev_configure(port_tx, 1, 1, &conf);
387e6541fdeSIntel 	if (ret < 0)
388e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Port %d configuration error (%d)\n", port_tx, ret);
389e6541fdeSIntel 
39060efb44fSRoman Zhukov 	nb_rxd = NIC_RX_QUEUE_DESC;
39160efb44fSRoman Zhukov 	nb_txd = NIC_TX_QUEUE_DESC;
39260efb44fSRoman Zhukov 	ret = rte_eth_dev_adjust_nb_rx_tx_desc(port_tx, &nb_rxd, &nb_txd);
39360efb44fSRoman Zhukov 	if (ret < 0)
39460efb44fSRoman Zhukov 		rte_exit(EXIT_FAILURE, "Port %d adjust number of descriptors error (%d)\n",
39560efb44fSRoman Zhukov 				port_tx, ret);
39660efb44fSRoman Zhukov 
3970b8fccaaSShahaf Shuler 	rxq_conf = dev_info.default_rxconf;
3980b8fccaaSShahaf Shuler 	rxq_conf.offloads = conf.rxmode.offloads;
39960efb44fSRoman Zhukov 	ret = rte_eth_rx_queue_setup(port_tx, NIC_RX_QUEUE, nb_rxd,
40081f7ecd9SPablo de Lara 				rte_eth_dev_socket_id(port_tx),
40181f7ecd9SPablo de Lara 				NULL, pool);
402e6541fdeSIntel 	if (ret < 0)
403e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Port %d RX queue setup error (%d)\n", port_tx, ret);
404e6541fdeSIntel 
4050b8fccaaSShahaf Shuler 	txq_conf = dev_info.default_txconf;
4060b8fccaaSShahaf Shuler 	txq_conf.offloads = conf.txmode.offloads;
40760efb44fSRoman Zhukov 	ret = rte_eth_tx_queue_setup(port_tx, NIC_TX_QUEUE, nb_txd,
40881f7ecd9SPablo de Lara 				rte_eth_dev_socket_id(port_tx),
40981f7ecd9SPablo de Lara 				NULL);
410e6541fdeSIntel 	if (ret < 0)
411e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Port %d TX queue setup error (%d)\n", port_tx, ret);
412e6541fdeSIntel 
413e2366e74STomasz Kulasek 	tx_buffer = rte_zmalloc_socket("tx_buffer",
414e2366e74STomasz Kulasek 			RTE_ETH_TX_BUFFER_SIZE(PKT_TX_BURST_MAX), 0,
415e2366e74STomasz Kulasek 			rte_eth_dev_socket_id(port_tx));
416e2366e74STomasz Kulasek 	if (tx_buffer == NULL)
417e2366e74STomasz Kulasek 		rte_exit(EXIT_FAILURE, "Port %d TX buffer allocation error\n",
418e2366e74STomasz Kulasek 				port_tx);
419e2366e74STomasz Kulasek 
420e2366e74STomasz Kulasek 	rte_eth_tx_buffer_init(tx_buffer, PKT_TX_BURST_MAX);
421e2366e74STomasz Kulasek 
422e6541fdeSIntel 	ret = rte_eth_dev_start(port_rx);
423e6541fdeSIntel 	if (ret < 0)
424e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Port %d start error (%d)\n", port_rx, ret);
425e6541fdeSIntel 
426e6541fdeSIntel 	ret = rte_eth_dev_start(port_tx);
427e6541fdeSIntel 	if (ret < 0)
428e6541fdeSIntel 		rte_exit(EXIT_FAILURE, "Port %d start error (%d)\n", port_tx, ret);
429e6541fdeSIntel 
430e6541fdeSIntel 	rte_eth_promiscuous_enable(port_rx);
431e6541fdeSIntel 
432e6541fdeSIntel 	rte_eth_promiscuous_enable(port_tx);
433e6541fdeSIntel 
434e6541fdeSIntel 	/* App configuration */
435e752649cSSlawomir Mrozowicz 	ret = app_configure_flow_table();
436e752649cSSlawomir Mrozowicz 	if (ret < 0)
437e752649cSSlawomir Mrozowicz 		rte_exit(EXIT_FAILURE, "Invalid configure flow table\n");
438e6541fdeSIntel 
439e6541fdeSIntel 	/* Launch per-lcore init on every lcore */
440e6541fdeSIntel 	rte_eal_mp_remote_launch(main_loop, NULL, CALL_MASTER);
441e6541fdeSIntel 	RTE_LCORE_FOREACH_SLAVE(lcore_id) {
442e6541fdeSIntel 		if (rte_eal_wait_lcore(lcore_id) < 0)
443e6541fdeSIntel 			return -1;
444e6541fdeSIntel 	}
445e6541fdeSIntel 
446e6541fdeSIntel 	return 0;
447e6541fdeSIntel }
448