13998e2a0SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause 23998e2a0SBruce Richardson * Copyright(c) 2010-2016 Intel Corporation 3e6541fdeSIntel */ 4e6541fdeSIntel 5e6541fdeSIntel #include <stdio.h> 6e6541fdeSIntel #include <getopt.h> 7e6541fdeSIntel 8e6541fdeSIntel #include <rte_common.h> 9e6541fdeSIntel #include <rte_eal.h> 10e2366e74STomasz Kulasek #include <rte_malloc.h> 11e6541fdeSIntel #include <rte_mempool.h> 12e6541fdeSIntel #include <rte_ethdev.h> 13e6541fdeSIntel #include <rte_cycles.h> 14e6541fdeSIntel #include <rte_mbuf.h> 15e6541fdeSIntel #include <rte_meter.h> 16e6541fdeSIntel 17e6541fdeSIntel /* 18e6541fdeSIntel * Traffic metering configuration 19e6541fdeSIntel * 20e6541fdeSIntel */ 21e6541fdeSIntel #define APP_MODE_FWD 0 22e6541fdeSIntel #define APP_MODE_SRTCM_COLOR_BLIND 1 23e6541fdeSIntel #define APP_MODE_SRTCM_COLOR_AWARE 2 24e6541fdeSIntel #define APP_MODE_TRTCM_COLOR_BLIND 3 25e6541fdeSIntel #define APP_MODE_TRTCM_COLOR_AWARE 4 26e6541fdeSIntel 27e6541fdeSIntel #define APP_MODE APP_MODE_SRTCM_COLOR_BLIND 28e6541fdeSIntel 29e6541fdeSIntel 30e6541fdeSIntel #include "main.h" 31e6541fdeSIntel 32e6541fdeSIntel 33e6541fdeSIntel #define APP_PKT_FLOW_POS 33 34e6541fdeSIntel #define APP_PKT_COLOR_POS 5 35e6541fdeSIntel 36e6541fdeSIntel 37e6541fdeSIntel #if APP_PKT_FLOW_POS > 64 || APP_PKT_COLOR_POS > 64 38e6541fdeSIntel #error Byte offset needs to be less than 64 39e6541fdeSIntel #endif 40e6541fdeSIntel 41e6541fdeSIntel /* 42e6541fdeSIntel * Buffer pool configuration 43e6541fdeSIntel * 44e6541fdeSIntel ***/ 45e6541fdeSIntel #define NB_MBUF 8192 46e6541fdeSIntel #define MEMPOOL_CACHE_SIZE 256 47e6541fdeSIntel 48e6541fdeSIntel static struct rte_mempool *pool = NULL; 49e6541fdeSIntel 50e6541fdeSIntel /* 51e6541fdeSIntel * NIC configuration 52e6541fdeSIntel * 53e6541fdeSIntel ***/ 54e6541fdeSIntel static struct rte_eth_conf port_conf = { 55e6541fdeSIntel .rxmode = { 5613c4ebd6SBruce Richardson .mq_mode = ETH_MQ_RX_RSS, 57e6541fdeSIntel .max_rx_pkt_len = ETHER_MAX_LEN, 58e6541fdeSIntel .split_hdr_size = 0, 59*0b8fccaaSShahaf Shuler .ignore_offload_bitfield = 1, 60*0b8fccaaSShahaf Shuler .offloads = (DEV_RX_OFFLOAD_CHECKSUM | 61*0b8fccaaSShahaf Shuler DEV_RX_OFFLOAD_CRC_STRIP), 62e6541fdeSIntel }, 63e6541fdeSIntel .rx_adv_conf = { 64e6541fdeSIntel .rss_conf = { 65e6541fdeSIntel .rss_key = NULL, 668a387fa8SHelin Zhang .rss_hf = ETH_RSS_IP, 67e6541fdeSIntel }, 68e6541fdeSIntel }, 69e6541fdeSIntel .txmode = { 70e6541fdeSIntel .mq_mode = ETH_DCB_NONE, 71e6541fdeSIntel }, 72e6541fdeSIntel }; 73e6541fdeSIntel 74e6541fdeSIntel #define NIC_RX_QUEUE_DESC 128 75e6541fdeSIntel #define NIC_TX_QUEUE_DESC 512 76e6541fdeSIntel 77e6541fdeSIntel #define NIC_RX_QUEUE 0 78e6541fdeSIntel #define NIC_TX_QUEUE 0 79e6541fdeSIntel 80e6541fdeSIntel /* 81e6541fdeSIntel * Packet RX/TX 82e6541fdeSIntel * 83e6541fdeSIntel ***/ 84e6541fdeSIntel #define PKT_RX_BURST_MAX 32 85e6541fdeSIntel #define PKT_TX_BURST_MAX 32 86e6541fdeSIntel #define TIME_TX_DRAIN 200000ULL 87e6541fdeSIntel 8847523597SZhiyong Yang static uint16_t port_rx; 8947523597SZhiyong Yang static uint16_t port_tx; 90e6541fdeSIntel static struct rte_mbuf *pkts_rx[PKT_RX_BURST_MAX]; 91e2366e74STomasz Kulasek struct rte_eth_dev_tx_buffer *tx_buffer; 92e6541fdeSIntel 93e6541fdeSIntel struct rte_meter_srtcm_params app_srtcm_params[] = { 94e6541fdeSIntel {.cir = 1000000 * 46, .cbs = 2048, .ebs = 2048}, 95e6541fdeSIntel }; 96e6541fdeSIntel 97e6541fdeSIntel struct rte_meter_trtcm_params app_trtcm_params[] = { 98e6541fdeSIntel {.cir = 1000000 * 46, .pir = 1500000 * 46, .cbs = 2048, .pbs = 2048}, 99e6541fdeSIntel }; 100e6541fdeSIntel 101e6541fdeSIntel #define APP_FLOWS_MAX 256 102e6541fdeSIntel 103e6541fdeSIntel FLOW_METER app_flows[APP_FLOWS_MAX]; 104e6541fdeSIntel 105e752649cSSlawomir Mrozowicz static int 106e6541fdeSIntel app_configure_flow_table(void) 107e6541fdeSIntel { 108e6541fdeSIntel uint32_t i, j; 109e752649cSSlawomir Mrozowicz int ret; 110e6541fdeSIntel 111e752649cSSlawomir Mrozowicz for (i = 0, j = 0; i < APP_FLOWS_MAX; 112e752649cSSlawomir Mrozowicz i ++, j = (j + 1) % RTE_DIM(PARAMS)) { 113e752649cSSlawomir Mrozowicz ret = FUNC_CONFIG(&app_flows[i], &PARAMS[j]); 114e752649cSSlawomir Mrozowicz if (ret) 115e752649cSSlawomir Mrozowicz return ret; 116e6541fdeSIntel } 117e752649cSSlawomir Mrozowicz 118e752649cSSlawomir Mrozowicz return 0; 119e6541fdeSIntel } 120e6541fdeSIntel 121e6541fdeSIntel static inline void 122fc8a10d8SIntel app_set_pkt_color(uint8_t *pkt_data, enum policer_action color) 123fc8a10d8SIntel { 124fc8a10d8SIntel pkt_data[APP_PKT_COLOR_POS] = (uint8_t)color; 125fc8a10d8SIntel } 126fc8a10d8SIntel 127fc8a10d8SIntel static inline int 128e6541fdeSIntel app_pkt_handle(struct rte_mbuf *pkt, uint64_t time) 129e6541fdeSIntel { 130fc8a10d8SIntel uint8_t input_color, output_color; 131e6541fdeSIntel uint8_t *pkt_data = rte_pktmbuf_mtod(pkt, uint8_t *); 132e6541fdeSIntel uint32_t pkt_len = rte_pktmbuf_pkt_len(pkt) - sizeof(struct ether_hdr); 133e6541fdeSIntel uint8_t flow_id = (uint8_t)(pkt_data[APP_PKT_FLOW_POS] & (APP_FLOWS_MAX - 1)); 134fc8a10d8SIntel input_color = pkt_data[APP_PKT_COLOR_POS]; 135fc8a10d8SIntel enum policer_action action; 136e6541fdeSIntel 137e6541fdeSIntel /* color input is not used for blind modes */ 138fc8a10d8SIntel output_color = (uint8_t) FUNC_METER(&app_flows[flow_id], time, pkt_len, 139fc8a10d8SIntel (enum rte_meter_color) input_color); 140fc8a10d8SIntel 141fc8a10d8SIntel /* Apply policing and set the output color */ 142fc8a10d8SIntel action = policer_table[input_color][output_color]; 143fc8a10d8SIntel app_set_pkt_color(pkt_data, action); 144fc8a10d8SIntel 145fc8a10d8SIntel return action; 146e6541fdeSIntel } 147e6541fdeSIntel 148e6541fdeSIntel 149e6541fdeSIntel static __attribute__((noreturn)) int 150e6541fdeSIntel main_loop(__attribute__((unused)) void *dummy) 151e6541fdeSIntel { 152e6541fdeSIntel uint64_t current_time, last_time = rte_rdtsc(); 153e6541fdeSIntel uint32_t lcore_id = rte_lcore_id(); 154e6541fdeSIntel 155e6541fdeSIntel printf("Core %u: port RX = %d, port TX = %d\n", lcore_id, port_rx, port_tx); 156e6541fdeSIntel 157e6541fdeSIntel while (1) { 158e6541fdeSIntel uint64_t time_diff; 159e6541fdeSIntel int i, nb_rx; 160e6541fdeSIntel 161e6541fdeSIntel /* Mechanism to avoid stale packets in the output buffer */ 162e6541fdeSIntel current_time = rte_rdtsc(); 163e6541fdeSIntel time_diff = current_time - last_time; 164e6541fdeSIntel if (unlikely(time_diff > TIME_TX_DRAIN)) { 165e2366e74STomasz Kulasek /* Flush tx buffer */ 166e2366e74STomasz Kulasek rte_eth_tx_buffer_flush(port_tx, NIC_TX_QUEUE, tx_buffer); 167e6541fdeSIntel last_time = current_time; 168e6541fdeSIntel } 169e6541fdeSIntel 170e6541fdeSIntel /* Read packet burst from NIC RX */ 171e6541fdeSIntel nb_rx = rte_eth_rx_burst(port_rx, NIC_RX_QUEUE, pkts_rx, PKT_RX_BURST_MAX); 172e6541fdeSIntel 173e6541fdeSIntel /* Handle packets */ 174e6541fdeSIntel for (i = 0; i < nb_rx; i ++) { 175e6541fdeSIntel struct rte_mbuf *pkt = pkts_rx[i]; 176e6541fdeSIntel 177e6541fdeSIntel /* Handle current packet */ 178fc8a10d8SIntel if (app_pkt_handle(pkt, current_time) == DROP) 179fc8a10d8SIntel rte_pktmbuf_free(pkt); 180e2366e74STomasz Kulasek else 181e2366e74STomasz Kulasek rte_eth_tx_buffer(port_tx, NIC_TX_QUEUE, tx_buffer, pkt); 182e6541fdeSIntel } 183e6541fdeSIntel } 184e6541fdeSIntel } 185e6541fdeSIntel 186e6541fdeSIntel static void 187e6541fdeSIntel print_usage(const char *prgname) 188e6541fdeSIntel { 189e6541fdeSIntel printf ("%s [EAL options] -- -p PORTMASK\n" 190e6541fdeSIntel " -p PORTMASK: hexadecimal bitmask of ports to configure\n", 191e6541fdeSIntel prgname); 192e6541fdeSIntel } 193e6541fdeSIntel 194e6541fdeSIntel static int 195e6541fdeSIntel parse_portmask(const char *portmask) 196e6541fdeSIntel { 197e6541fdeSIntel char *end = NULL; 198e6541fdeSIntel unsigned long pm; 199e6541fdeSIntel 200e6541fdeSIntel /* parse hexadecimal string */ 201e6541fdeSIntel pm = strtoul(portmask, &end, 16); 202e6541fdeSIntel if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 203e6541fdeSIntel return -1; 204e6541fdeSIntel 205e6541fdeSIntel if (pm == 0) 206e6541fdeSIntel return -1; 207e6541fdeSIntel 208e6541fdeSIntel return pm; 209e6541fdeSIntel } 210e6541fdeSIntel 211e6541fdeSIntel /* Parse the argument given in the command line of the application */ 212e6541fdeSIntel static int 213e6541fdeSIntel parse_args(int argc, char **argv) 214e6541fdeSIntel { 215e6541fdeSIntel int opt; 216e6541fdeSIntel char **argvopt; 217e6541fdeSIntel int option_index; 218e6541fdeSIntel char *prgname = argv[0]; 219e6541fdeSIntel static struct option lgopts[] = { 220e6541fdeSIntel {NULL, 0, 0, 0} 221e6541fdeSIntel }; 222e6541fdeSIntel uint64_t port_mask, i, mask; 223e6541fdeSIntel 224e6541fdeSIntel argvopt = argv; 225e6541fdeSIntel 226e6541fdeSIntel while ((opt = getopt_long(argc, argvopt, "p:", lgopts, &option_index)) != EOF) { 227e6541fdeSIntel switch (opt) { 228e6541fdeSIntel case 'p': 229e6541fdeSIntel port_mask = parse_portmask(optarg); 230e6541fdeSIntel if (port_mask == 0) { 231e6541fdeSIntel printf("invalid port mask (null port mask)\n"); 232e6541fdeSIntel print_usage(prgname); 233e6541fdeSIntel return -1; 234e6541fdeSIntel } 235e6541fdeSIntel 236e6541fdeSIntel for (i = 0, mask = 1; i < 64; i ++, mask <<= 1){ 237e6541fdeSIntel if (mask & port_mask){ 238e6541fdeSIntel port_rx = i; 239e6541fdeSIntel port_mask &= ~ mask; 240e6541fdeSIntel break; 241e6541fdeSIntel } 242e6541fdeSIntel } 243e6541fdeSIntel 244e6541fdeSIntel for (i = 0, mask = 1; i < 64; i ++, mask <<= 1){ 245e6541fdeSIntel if (mask & port_mask){ 246e6541fdeSIntel port_tx = i; 247e6541fdeSIntel port_mask &= ~ mask; 248e6541fdeSIntel break; 249e6541fdeSIntel } 250e6541fdeSIntel } 251e6541fdeSIntel 252e6541fdeSIntel if (port_mask != 0) { 253e6541fdeSIntel printf("invalid port mask (more than 2 ports)\n"); 254e6541fdeSIntel print_usage(prgname); 255e6541fdeSIntel return -1; 256e6541fdeSIntel } 257e6541fdeSIntel break; 258e6541fdeSIntel 259e6541fdeSIntel default: 260e6541fdeSIntel print_usage(prgname); 261e6541fdeSIntel return -1; 262e6541fdeSIntel } 263e6541fdeSIntel } 264e6541fdeSIntel 265e6541fdeSIntel if (optind <= 1) { 266e6541fdeSIntel print_usage(prgname); 267e6541fdeSIntel return -1; 268e6541fdeSIntel } 269e6541fdeSIntel 270e6541fdeSIntel argv[optind-1] = prgname; 271e6541fdeSIntel 2729d5ca532SKeith Wiles optind = 1; /* reset getopt lib */ 273e6541fdeSIntel return 0; 274e6541fdeSIntel } 275e6541fdeSIntel 276e6541fdeSIntel int 27798a16481SDavid Marchand main(int argc, char **argv) 278e6541fdeSIntel { 279e6541fdeSIntel uint32_t lcore_id; 28060efb44fSRoman Zhukov uint16_t nb_rxd = NIC_RX_QUEUE_DESC; 28160efb44fSRoman Zhukov uint16_t nb_txd = NIC_TX_QUEUE_DESC; 282*0b8fccaaSShahaf Shuler struct rte_eth_conf conf; 283*0b8fccaaSShahaf Shuler struct rte_eth_rxconf rxq_conf; 284*0b8fccaaSShahaf Shuler struct rte_eth_txconf txq_conf; 285*0b8fccaaSShahaf Shuler struct rte_eth_dev_info dev_info; 286e6541fdeSIntel int ret; 287e6541fdeSIntel 288e6541fdeSIntel /* EAL init */ 289e6541fdeSIntel ret = rte_eal_init(argc, argv); 290e6541fdeSIntel if (ret < 0) 291e6541fdeSIntel rte_exit(EXIT_FAILURE, "Invalid EAL parameters\n"); 292e6541fdeSIntel argc -= ret; 293e6541fdeSIntel argv += ret; 294e6541fdeSIntel if (rte_lcore_count() != 1) { 295e6541fdeSIntel rte_exit(EXIT_FAILURE, "This application does not accept more than one core. " 296e6541fdeSIntel "Please adjust the \"-c COREMASK\" parameter accordingly.\n"); 297e6541fdeSIntel } 298e6541fdeSIntel 299e6541fdeSIntel /* Application non-EAL arguments parse */ 300e6541fdeSIntel ret = parse_args(argc, argv); 301e6541fdeSIntel if (ret < 0) 302e6541fdeSIntel rte_exit(EXIT_FAILURE, "Invalid input arguments\n"); 303e6541fdeSIntel 304e6541fdeSIntel /* Buffer pool init */ 305ea0c20eaSOlivier Matz pool = rte_pktmbuf_pool_create("pool", NB_MBUF, MEMPOOL_CACHE_SIZE, 306824cb29cSKonstantin Ananyev 0, RTE_MBUF_DEFAULT_BUF_SIZE, rte_socket_id()); 307e6541fdeSIntel if (pool == NULL) 308e6541fdeSIntel rte_exit(EXIT_FAILURE, "Buffer pool creation error\n"); 309e6541fdeSIntel 310e6541fdeSIntel /* NIC init */ 311*0b8fccaaSShahaf Shuler conf = port_conf; 312*0b8fccaaSShahaf Shuler rte_eth_dev_info_get(port_rx, &dev_info); 313*0b8fccaaSShahaf Shuler if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE) 314*0b8fccaaSShahaf Shuler conf.txmode.offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE; 315*0b8fccaaSShahaf Shuler ret = rte_eth_dev_configure(port_rx, 1, 1, &conf); 316e6541fdeSIntel if (ret < 0) 317e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d configuration error (%d)\n", port_rx, ret); 318e6541fdeSIntel 31960efb44fSRoman Zhukov ret = rte_eth_dev_adjust_nb_rx_tx_desc(port_rx, &nb_rxd, &nb_txd); 32060efb44fSRoman Zhukov if (ret < 0) 32160efb44fSRoman Zhukov rte_exit(EXIT_FAILURE, "Port %d adjust number of descriptors error (%d)\n", 32260efb44fSRoman Zhukov port_rx, ret); 32360efb44fSRoman Zhukov 324*0b8fccaaSShahaf Shuler rxq_conf = dev_info.default_rxconf; 325*0b8fccaaSShahaf Shuler rxq_conf.offloads = conf.rxmode.offloads; 32660efb44fSRoman Zhukov ret = rte_eth_rx_queue_setup(port_rx, NIC_RX_QUEUE, nb_rxd, 32781f7ecd9SPablo de Lara rte_eth_dev_socket_id(port_rx), 328*0b8fccaaSShahaf Shuler &rxq_conf, pool); 329e6541fdeSIntel if (ret < 0) 330e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d RX queue setup error (%d)\n", port_rx, ret); 331e6541fdeSIntel 332*0b8fccaaSShahaf Shuler txq_conf = dev_info.default_txconf; 333*0b8fccaaSShahaf Shuler txq_conf.txq_flags = ETH_TXQ_FLAGS_IGNORE; 334*0b8fccaaSShahaf Shuler txq_conf.offloads = conf.txmode.offloads; 33560efb44fSRoman Zhukov ret = rte_eth_tx_queue_setup(port_rx, NIC_TX_QUEUE, nb_txd, 33681f7ecd9SPablo de Lara rte_eth_dev_socket_id(port_rx), 337*0b8fccaaSShahaf Shuler &txq_conf); 338e6541fdeSIntel if (ret < 0) 339e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d TX queue setup error (%d)\n", port_rx, ret); 340e6541fdeSIntel 341*0b8fccaaSShahaf Shuler conf = port_conf; 342*0b8fccaaSShahaf Shuler rte_eth_dev_info_get(port_tx, &dev_info); 343*0b8fccaaSShahaf Shuler if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE) 344*0b8fccaaSShahaf Shuler conf.txmode.offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE; 345*0b8fccaaSShahaf Shuler ret = rte_eth_dev_configure(port_tx, 1, 1, &conf); 346e6541fdeSIntel if (ret < 0) 347e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d configuration error (%d)\n", port_tx, ret); 348e6541fdeSIntel 34960efb44fSRoman Zhukov nb_rxd = NIC_RX_QUEUE_DESC; 35060efb44fSRoman Zhukov nb_txd = NIC_TX_QUEUE_DESC; 35160efb44fSRoman Zhukov ret = rte_eth_dev_adjust_nb_rx_tx_desc(port_tx, &nb_rxd, &nb_txd); 35260efb44fSRoman Zhukov if (ret < 0) 35360efb44fSRoman Zhukov rte_exit(EXIT_FAILURE, "Port %d adjust number of descriptors error (%d)\n", 35460efb44fSRoman Zhukov port_tx, ret); 35560efb44fSRoman Zhukov 356*0b8fccaaSShahaf Shuler rxq_conf = dev_info.default_rxconf; 357*0b8fccaaSShahaf Shuler rxq_conf.offloads = conf.rxmode.offloads; 35860efb44fSRoman Zhukov ret = rte_eth_rx_queue_setup(port_tx, NIC_RX_QUEUE, nb_rxd, 35981f7ecd9SPablo de Lara rte_eth_dev_socket_id(port_tx), 36081f7ecd9SPablo de Lara NULL, pool); 361e6541fdeSIntel if (ret < 0) 362e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d RX queue setup error (%d)\n", port_tx, ret); 363e6541fdeSIntel 364*0b8fccaaSShahaf Shuler txq_conf = dev_info.default_txconf; 365*0b8fccaaSShahaf Shuler txq_conf.txq_flags = ETH_TXQ_FLAGS_IGNORE; 366*0b8fccaaSShahaf Shuler txq_conf.offloads = conf.txmode.offloads; 36760efb44fSRoman Zhukov ret = rte_eth_tx_queue_setup(port_tx, NIC_TX_QUEUE, nb_txd, 36881f7ecd9SPablo de Lara rte_eth_dev_socket_id(port_tx), 36981f7ecd9SPablo de Lara NULL); 370e6541fdeSIntel if (ret < 0) 371e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d TX queue setup error (%d)\n", port_tx, ret); 372e6541fdeSIntel 373e2366e74STomasz Kulasek tx_buffer = rte_zmalloc_socket("tx_buffer", 374e2366e74STomasz Kulasek RTE_ETH_TX_BUFFER_SIZE(PKT_TX_BURST_MAX), 0, 375e2366e74STomasz Kulasek rte_eth_dev_socket_id(port_tx)); 376e2366e74STomasz Kulasek if (tx_buffer == NULL) 377e2366e74STomasz Kulasek rte_exit(EXIT_FAILURE, "Port %d TX buffer allocation error\n", 378e2366e74STomasz Kulasek port_tx); 379e2366e74STomasz Kulasek 380e2366e74STomasz Kulasek rte_eth_tx_buffer_init(tx_buffer, PKT_TX_BURST_MAX); 381e2366e74STomasz Kulasek 382e6541fdeSIntel ret = rte_eth_dev_start(port_rx); 383e6541fdeSIntel if (ret < 0) 384e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d start error (%d)\n", port_rx, ret); 385e6541fdeSIntel 386e6541fdeSIntel ret = rte_eth_dev_start(port_tx); 387e6541fdeSIntel if (ret < 0) 388e6541fdeSIntel rte_exit(EXIT_FAILURE, "Port %d start error (%d)\n", port_tx, ret); 389e6541fdeSIntel 390e6541fdeSIntel rte_eth_promiscuous_enable(port_rx); 391e6541fdeSIntel 392e6541fdeSIntel rte_eth_promiscuous_enable(port_tx); 393e6541fdeSIntel 394e6541fdeSIntel /* App configuration */ 395e752649cSSlawomir Mrozowicz ret = app_configure_flow_table(); 396e752649cSSlawomir Mrozowicz if (ret < 0) 397e752649cSSlawomir Mrozowicz rte_exit(EXIT_FAILURE, "Invalid configure flow table\n"); 398e6541fdeSIntel 399e6541fdeSIntel /* Launch per-lcore init on every lcore */ 400e6541fdeSIntel rte_eal_mp_remote_launch(main_loop, NULL, CALL_MASTER); 401e6541fdeSIntel RTE_LCORE_FOREACH_SLAVE(lcore_id) { 402e6541fdeSIntel if (rte_eal_wait_lcore(lcore_id) < 0) 403e6541fdeSIntel return -1; 404e6541fdeSIntel } 405e6541fdeSIntel 406e6541fdeSIntel return 0; 407e6541fdeSIntel } 408