13998e2a0SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause 23998e2a0SBruce Richardson * Copyright(c) 2010-2014 Intel Corporation 3af75078fSIntel */ 4af75078fSIntel 5af75078fSIntel /* 6af75078fSIntel * Sample application demostrating how to do packet I/O in a multi-process 7af75078fSIntel * environment. The same code can be run as a primary process and as a 8af75078fSIntel * secondary process, just with a different proc-id parameter in each case 9af75078fSIntel * (apart from the EAL flag to indicate a secondary process). 10af75078fSIntel * 11af75078fSIntel * Each process will read from the same ports, given by the port-mask 12af75078fSIntel * parameter, which should be the same in each case, just using a different 13af75078fSIntel * queue per port as determined by the proc-id parameter. 14af75078fSIntel */ 15af75078fSIntel 16af75078fSIntel #include <stdio.h> 17af75078fSIntel #include <string.h> 18af75078fSIntel #include <stdint.h> 19af75078fSIntel #include <stdlib.h> 20af75078fSIntel #include <stdarg.h> 21af75078fSIntel #include <errno.h> 22af75078fSIntel #include <sys/queue.h> 23af75078fSIntel #include <getopt.h> 24af75078fSIntel #include <signal.h> 25af75078fSIntel #include <inttypes.h> 26af75078fSIntel 27af75078fSIntel #include <rte_common.h> 28af75078fSIntel #include <rte_log.h> 29af75078fSIntel #include <rte_memory.h> 30af75078fSIntel #include <rte_launch.h> 31af75078fSIntel #include <rte_eal.h> 32af75078fSIntel #include <rte_per_lcore.h> 33af75078fSIntel #include <rte_lcore.h> 34af75078fSIntel #include <rte_atomic.h> 35af75078fSIntel #include <rte_branch_prediction.h> 36af75078fSIntel #include <rte_debug.h> 37af75078fSIntel #include <rte_interrupts.h> 38af75078fSIntel #include <rte_ether.h> 39af75078fSIntel #include <rte_ethdev.h> 40af75078fSIntel #include <rte_mempool.h> 41af75078fSIntel #include <rte_memcpy.h> 42af75078fSIntel #include <rte_mbuf.h> 43af75078fSIntel #include <rte_string_fns.h> 44d3641ae8SIntel #include <rte_cycles.h> 45af75078fSIntel 46af75078fSIntel #define RTE_LOGTYPE_APP RTE_LOGTYPE_USER1 47af75078fSIntel 48af75078fSIntel #define NB_MBUFS 64*1024 /* use 64k mbufs */ 49af75078fSIntel #define MBUF_CACHE_SIZE 256 50af75078fSIntel #define PKT_BURST 32 51867a6c66SKevin Laatz #define RX_RING_SIZE 1024 52867a6c66SKevin Laatz #define TX_RING_SIZE 1024 53af75078fSIntel 54af75078fSIntel #define PARAM_PROC_ID "proc-id" 55af75078fSIntel #define PARAM_NUM_PROCS "num-procs" 56af75078fSIntel 57af75078fSIntel /* for each lcore, record the elements of the ports array to use */ 58af75078fSIntel struct lcore_ports{ 59af75078fSIntel unsigned start_port; 60af75078fSIntel unsigned num_ports; 61af75078fSIntel }; 62af75078fSIntel 63af75078fSIntel /* structure to record the rx and tx packets. Put two per cache line as ports 64af75078fSIntel * used in pairs */ 65af75078fSIntel struct port_stats{ 66af75078fSIntel unsigned rx; 67af75078fSIntel unsigned tx; 68af75078fSIntel unsigned drop; 69fdf20fa7SSergio Gonzalez Monroy } __attribute__((aligned(RTE_CACHE_LINE_SIZE / 2))); 70af75078fSIntel 71af75078fSIntel static int proc_id = -1; 72af75078fSIntel static unsigned num_procs = 0; 73af75078fSIntel 7447523597SZhiyong Yang static uint16_t ports[RTE_MAX_ETHPORTS]; 75af75078fSIntel static unsigned num_ports = 0; 76af75078fSIntel 77af75078fSIntel static struct lcore_ports lcore_ports[RTE_MAX_LCORE]; 78af75078fSIntel static struct port_stats pstats[RTE_MAX_ETHPORTS]; 79af75078fSIntel 80af75078fSIntel /* prints the usage statement and quits with an error message */ 81af75078fSIntel static void 82af75078fSIntel smp_usage(const char *prgname, const char *errmsg) 83af75078fSIntel { 84af75078fSIntel printf("\nError: %s\n",errmsg); 85af75078fSIntel printf("\n%s [EAL options] -- -p <port mask> " 86af75078fSIntel "--"PARAM_NUM_PROCS" <n>" 87af75078fSIntel " --"PARAM_PROC_ID" <id>\n" 88af75078fSIntel "-p : a hex bitmask indicating what ports are to be used\n" 89af75078fSIntel "--num-procs: the number of processes which will be used\n" 90af75078fSIntel "--proc-id : the id of the current process (id < num-procs)\n" 91af75078fSIntel "\n", 92af75078fSIntel prgname); 93af75078fSIntel exit(1); 94af75078fSIntel } 95af75078fSIntel 96af75078fSIntel 97af75078fSIntel /* signal handler configured for SIGTERM and SIGINT to print stats on exit */ 98af75078fSIntel static void 99af75078fSIntel print_stats(int signum) 100af75078fSIntel { 101af75078fSIntel unsigned i; 102af75078fSIntel printf("\nExiting on signal %d\n\n", signum); 103af75078fSIntel for (i = 0; i < num_ports; i++){ 104af75078fSIntel const uint8_t p_num = ports[i]; 105af75078fSIntel printf("Port %u: RX - %u, TX - %u, Drop - %u\n", (unsigned)p_num, 106af75078fSIntel pstats[p_num].rx, pstats[p_num].tx, pstats[p_num].drop); 107af75078fSIntel } 108af75078fSIntel exit(0); 109af75078fSIntel } 110af75078fSIntel 111af75078fSIntel /* Parse the argument given in the command line of the application */ 112af75078fSIntel static int 113af75078fSIntel smp_parse_args(int argc, char **argv) 114af75078fSIntel { 115af75078fSIntel int opt, ret; 116af75078fSIntel char **argvopt; 117af75078fSIntel int option_index; 1188728ccf3SThomas Monjalon uint16_t i, port_mask = 0; 119af75078fSIntel char *prgname = argv[0]; 120af75078fSIntel static struct option lgopts[] = { 121af75078fSIntel {PARAM_NUM_PROCS, 1, 0, 0}, 122af75078fSIntel {PARAM_PROC_ID, 1, 0, 0}, 123af75078fSIntel {NULL, 0, 0, 0} 124af75078fSIntel }; 125af75078fSIntel 126af75078fSIntel argvopt = argv; 127af75078fSIntel 128af75078fSIntel while ((opt = getopt_long(argc, argvopt, "p:", \ 129af75078fSIntel lgopts, &option_index)) != EOF) { 130af75078fSIntel 131af75078fSIntel switch (opt) { 132af75078fSIntel case 'p': 133af75078fSIntel port_mask = strtoull(optarg, NULL, 16); 134af75078fSIntel break; 135af75078fSIntel /* long options */ 136af75078fSIntel case 0: 137af75078fSIntel if (strncmp(lgopts[option_index].name, PARAM_NUM_PROCS, 8) == 0) 138af75078fSIntel num_procs = atoi(optarg); 139af75078fSIntel else if (strncmp(lgopts[option_index].name, PARAM_PROC_ID, 7) == 0) 140af75078fSIntel proc_id = atoi(optarg); 141af75078fSIntel break; 142af75078fSIntel 143af75078fSIntel default: 144af75078fSIntel smp_usage(prgname, "Cannot parse all command-line arguments\n"); 145af75078fSIntel } 146af75078fSIntel } 147af75078fSIntel 148af75078fSIntel if (optind >= 0) 149af75078fSIntel argv[optind-1] = prgname; 150af75078fSIntel 151af75078fSIntel if (proc_id < 0) 152af75078fSIntel smp_usage(prgname, "Invalid or missing proc-id parameter\n"); 153af75078fSIntel if (rte_eal_process_type() == RTE_PROC_PRIMARY && num_procs == 0) 154af75078fSIntel smp_usage(prgname, "Invalid or missing num-procs parameter\n"); 155af75078fSIntel if (port_mask == 0) 156af75078fSIntel smp_usage(prgname, "Invalid or missing port mask\n"); 157af75078fSIntel 158af75078fSIntel /* get the port numbers from the port mask */ 1598728ccf3SThomas Monjalon RTE_ETH_FOREACH_DEV(i) 160af75078fSIntel if(port_mask & (1 << i)) 161af75078fSIntel ports[num_ports++] = (uint8_t)i; 162af75078fSIntel 163af75078fSIntel ret = optind-1; 1649d5ca532SKeith Wiles optind = 1; /* reset getopt lib */ 165af75078fSIntel 166693f715dSHuawei Xie return ret; 167af75078fSIntel } 168af75078fSIntel 169af75078fSIntel /* 170af75078fSIntel * Initialises a given port using global settings and with the rx buffers 171af75078fSIntel * coming from the mbuf_pool passed as parameter 172af75078fSIntel */ 173af75078fSIntel static inline int 17447523597SZhiyong Yang smp_port_init(uint16_t port, struct rte_mempool *mbuf_pool, 17547523597SZhiyong Yang uint16_t num_queues) 176af75078fSIntel { 177af75078fSIntel struct rte_eth_conf port_conf = { 178af75078fSIntel .rxmode = { 17932e7aa0bSIntel .mq_mode = ETH_MQ_RX_RSS, 180af75078fSIntel .split_hdr_size = 0, 181323e7b66SFerruh Yigit .offloads = DEV_RX_OFFLOAD_CHECKSUM, 182af75078fSIntel }, 183af75078fSIntel .rx_adv_conf = { 184af75078fSIntel .rss_conf = { 185af75078fSIntel .rss_key = NULL, 1868a387fa8SHelin Zhang .rss_hf = ETH_RSS_IP, 187af75078fSIntel }, 188af75078fSIntel }, 189af75078fSIntel .txmode = { 19032e7aa0bSIntel .mq_mode = ETH_MQ_TX_NONE, 191af75078fSIntel } 192af75078fSIntel }; 193af75078fSIntel const uint16_t rx_rings = num_queues, tx_rings = num_queues; 19494aa16b4SBruce Richardson struct rte_eth_dev_info info; 195f8c02ca8SShahaf Shuler struct rte_eth_rxconf rxq_conf; 196f8c02ca8SShahaf Shuler struct rte_eth_txconf txq_conf; 197af75078fSIntel int retval; 198af75078fSIntel uint16_t q; 19960efb44fSRoman Zhukov uint16_t nb_rxd = RX_RING_SIZE; 20060efb44fSRoman Zhukov uint16_t nb_txd = TX_RING_SIZE; 2014f5701f2SFerruh Yigit uint64_t rss_hf_tmp; 202af75078fSIntel 203af75078fSIntel if (rte_eal_process_type() == RTE_PROC_SECONDARY) 204af75078fSIntel return 0; 205af75078fSIntel 206a9dbe180SThomas Monjalon if (!rte_eth_dev_is_valid_port(port)) 207af75078fSIntel return -1; 208af75078fSIntel 20947523597SZhiyong Yang printf("# Initialising port %u... ", port); 210af75078fSIntel fflush(stdout); 211af75078fSIntel 21294aa16b4SBruce Richardson rte_eth_dev_info_get(port, &info); 21394aa16b4SBruce Richardson info.default_rxconf.rx_drop_en = 1; 21494aa16b4SBruce Richardson 215f8c02ca8SShahaf Shuler if (info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE) 216f8c02ca8SShahaf Shuler port_conf.txmode.offloads |= 217f8c02ca8SShahaf Shuler DEV_TX_OFFLOAD_MBUF_FAST_FREE; 2184f5701f2SFerruh Yigit 2194f5701f2SFerruh Yigit rss_hf_tmp = port_conf.rx_adv_conf.rss_conf.rss_hf; 2204f5701f2SFerruh Yigit port_conf.rx_adv_conf.rss_conf.rss_hf &= info.flow_type_rss_offloads; 2214f5701f2SFerruh Yigit if (port_conf.rx_adv_conf.rss_conf.rss_hf != rss_hf_tmp) { 2224f5701f2SFerruh Yigit printf("Port %u modified RSS hash function based on hardware support," 2234f5701f2SFerruh Yigit "requested:%#"PRIx64" configured:%#"PRIx64"\n", 2244f5701f2SFerruh Yigit port, 2254f5701f2SFerruh Yigit rss_hf_tmp, 2264f5701f2SFerruh Yigit port_conf.rx_adv_conf.rss_conf.rss_hf); 2274f5701f2SFerruh Yigit } 2284f5701f2SFerruh Yigit 229af75078fSIntel retval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf); 230af75078fSIntel if (retval < 0) 231af75078fSIntel return retval; 232af75078fSIntel 23360efb44fSRoman Zhukov retval = rte_eth_dev_adjust_nb_rx_tx_desc(port, &nb_rxd, &nb_txd); 23460efb44fSRoman Zhukov if (retval < 0) 23560efb44fSRoman Zhukov return retval; 23660efb44fSRoman Zhukov 237f8c02ca8SShahaf Shuler rxq_conf = info.default_rxconf; 238f8c02ca8SShahaf Shuler rxq_conf.offloads = port_conf.rxmode.offloads; 239af75078fSIntel for (q = 0; q < rx_rings; q ++) { 24060efb44fSRoman Zhukov retval = rte_eth_rx_queue_setup(port, q, nb_rxd, 24181f7ecd9SPablo de Lara rte_eth_dev_socket_id(port), 242f8c02ca8SShahaf Shuler &rxq_conf, 243af75078fSIntel mbuf_pool); 244af75078fSIntel if (retval < 0) 245af75078fSIntel return retval; 246af75078fSIntel } 247af75078fSIntel 248f8c02ca8SShahaf Shuler txq_conf = info.default_txconf; 249f8c02ca8SShahaf Shuler txq_conf.offloads = port_conf.txmode.offloads; 250af75078fSIntel for (q = 0; q < tx_rings; q ++) { 25160efb44fSRoman Zhukov retval = rte_eth_tx_queue_setup(port, q, nb_txd, 25281f7ecd9SPablo de Lara rte_eth_dev_socket_id(port), 253f8c02ca8SShahaf Shuler &txq_conf); 254af75078fSIntel if (retval < 0) 255af75078fSIntel return retval; 256af75078fSIntel } 257af75078fSIntel 258af75078fSIntel rte_eth_promiscuous_enable(port); 259af75078fSIntel 260af75078fSIntel retval = rte_eth_dev_start(port); 261af75078fSIntel if (retval < 0) 262af75078fSIntel return retval; 263af75078fSIntel 264af75078fSIntel return 0; 265af75078fSIntel } 266af75078fSIntel 267af75078fSIntel /* Goes through each of the lcores and calculates what ports should 268af75078fSIntel * be used by that core. Fills in the global lcore_ports[] array. 269af75078fSIntel */ 270af75078fSIntel static void 271af75078fSIntel assign_ports_to_cores(void) 272af75078fSIntel { 273af75078fSIntel 274*200bc52eSDavid Marchand const unsigned int lcores = rte_lcore_count(); 275af75078fSIntel const unsigned port_pairs = num_ports / 2; 276af75078fSIntel const unsigned pairs_per_lcore = port_pairs / lcores; 277af75078fSIntel unsigned extra_pairs = port_pairs % lcores; 278af75078fSIntel unsigned ports_assigned = 0; 279af75078fSIntel unsigned i; 280af75078fSIntel 281af75078fSIntel RTE_LCORE_FOREACH(i) { 282af75078fSIntel lcore_ports[i].start_port = ports_assigned; 283af75078fSIntel lcore_ports[i].num_ports = pairs_per_lcore * 2; 284af75078fSIntel if (extra_pairs > 0) { 285af75078fSIntel lcore_ports[i].num_ports += 2; 286af75078fSIntel extra_pairs--; 287af75078fSIntel } 288af75078fSIntel ports_assigned += lcore_ports[i].num_ports; 289af75078fSIntel } 290af75078fSIntel } 291af75078fSIntel 292af75078fSIntel /* Main function used by the processing threads. 293af75078fSIntel * Prints out some configuration details for the thread and then begins 294af75078fSIntel * performing packet RX and TX. 295af75078fSIntel */ 296af75078fSIntel static int 297af75078fSIntel lcore_main(void *arg __rte_unused) 298af75078fSIntel { 299af75078fSIntel const unsigned id = rte_lcore_id(); 300af75078fSIntel const unsigned start_port = lcore_ports[id].start_port; 301af75078fSIntel const unsigned end_port = start_port + lcore_ports[id].num_ports; 302af75078fSIntel const uint16_t q_id = (uint16_t)proc_id; 303af75078fSIntel unsigned p, i; 304af75078fSIntel char msgbuf[256]; 305af75078fSIntel int msgbufpos = 0; 306af75078fSIntel 307af75078fSIntel if (start_port == end_port){ 308af75078fSIntel printf("Lcore %u has nothing to do\n", id); 309af75078fSIntel return 0; 310af75078fSIntel } 311af75078fSIntel 312af75078fSIntel /* build up message in msgbuf before printing to decrease likelihood 313af75078fSIntel * of multi-core message interleaving. 314af75078fSIntel */ 3156f41fe75SStephen Hemminger msgbufpos += snprintf(msgbuf, sizeof(msgbuf) - msgbufpos, 316af75078fSIntel "Lcore %u using ports ", id); 317af75078fSIntel for (p = start_port; p < end_port; p++){ 3186f41fe75SStephen Hemminger msgbufpos += snprintf(msgbuf + msgbufpos, sizeof(msgbuf) - msgbufpos, 319af75078fSIntel "%u ", (unsigned)ports[p]); 320af75078fSIntel } 321af75078fSIntel printf("%s\n", msgbuf); 322af75078fSIntel printf("lcore %u using queue %u of each port\n", id, (unsigned)q_id); 323af75078fSIntel 324af75078fSIntel /* handle packet I/O from the ports, reading and writing to the 325af75078fSIntel * queue number corresponding to our process number (not lcore id) 326af75078fSIntel */ 327af75078fSIntel 328af75078fSIntel for (;;) { 329af75078fSIntel struct rte_mbuf *buf[PKT_BURST]; 330af75078fSIntel 331af75078fSIntel for (p = start_port; p < end_port; p++) { 332af75078fSIntel const uint8_t src = ports[p]; 333af75078fSIntel const uint8_t dst = ports[p ^ 1]; /* 0 <-> 1, 2 <-> 3 etc */ 334af75078fSIntel const uint16_t rx_c = rte_eth_rx_burst(src, q_id, buf, PKT_BURST); 335af75078fSIntel if (rx_c == 0) 336af75078fSIntel continue; 337af75078fSIntel pstats[src].rx += rx_c; 338af75078fSIntel 339af75078fSIntel const uint16_t tx_c = rte_eth_tx_burst(dst, q_id, buf, rx_c); 340af75078fSIntel pstats[dst].tx += tx_c; 341af75078fSIntel if (tx_c != rx_c) { 342af75078fSIntel pstats[dst].drop += (rx_c - tx_c); 343af75078fSIntel for (i = tx_c; i < rx_c; i++) 344af75078fSIntel rte_pktmbuf_free(buf[i]); 345af75078fSIntel } 346af75078fSIntel } 347af75078fSIntel } 348af75078fSIntel } 349af75078fSIntel 350d3641ae8SIntel /* Check the link status of all ports in up to 9s, and print them finally */ 351d3641ae8SIntel static void 35247523597SZhiyong Yang check_all_ports_link_status(uint16_t port_num, uint32_t port_mask) 353d3641ae8SIntel { 354d3641ae8SIntel #define CHECK_INTERVAL 100 /* 100ms */ 355d3641ae8SIntel #define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */ 35647523597SZhiyong Yang uint16_t portid; 35747523597SZhiyong Yang uint8_t count, all_ports_up, print_flag = 0; 358d3641ae8SIntel struct rte_eth_link link; 359d3641ae8SIntel 360d3641ae8SIntel printf("\nChecking link status"); 361d3641ae8SIntel fflush(stdout); 362d3641ae8SIntel for (count = 0; count <= MAX_CHECK_TIME; count++) { 363d3641ae8SIntel all_ports_up = 1; 364d3641ae8SIntel for (portid = 0; portid < port_num; portid++) { 365d3641ae8SIntel if ((port_mask & (1 << portid)) == 0) 366d3641ae8SIntel continue; 367d3641ae8SIntel memset(&link, 0, sizeof(link)); 368d3641ae8SIntel rte_eth_link_get_nowait(portid, &link); 369d3641ae8SIntel /* print link status if flag set */ 370d3641ae8SIntel if (print_flag == 1) { 371d3641ae8SIntel if (link.link_status) 37247523597SZhiyong Yang printf( 37347523597SZhiyong Yang "Port%d Link Up. Speed %u Mbps - %s\n", 37447523597SZhiyong Yang portid, link.link_speed, 375d3641ae8SIntel (link.link_duplex == ETH_LINK_FULL_DUPLEX) ? 376d3641ae8SIntel ("full-duplex") : ("half-duplex\n")); 377d3641ae8SIntel else 37847523597SZhiyong Yang printf("Port %d Link Down\n", portid); 379d3641ae8SIntel continue; 380d3641ae8SIntel } 381d3641ae8SIntel /* clear all_ports_up flag if any link down */ 38209419f23SThomas Monjalon if (link.link_status == ETH_LINK_DOWN) { 383d3641ae8SIntel all_ports_up = 0; 384d3641ae8SIntel break; 385d3641ae8SIntel } 386d3641ae8SIntel } 387d3641ae8SIntel /* after finally printing all link status, get out */ 388d3641ae8SIntel if (print_flag == 1) 389d3641ae8SIntel break; 390d3641ae8SIntel 391d3641ae8SIntel if (all_ports_up == 0) { 392d3641ae8SIntel printf("."); 393d3641ae8SIntel fflush(stdout); 394d3641ae8SIntel rte_delay_ms(CHECK_INTERVAL); 395d3641ae8SIntel } 396d3641ae8SIntel 397d3641ae8SIntel /* set the print_flag if all ports up or timeout */ 398d3641ae8SIntel if (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) { 399d3641ae8SIntel print_flag = 1; 400d3641ae8SIntel printf("done\n"); 401d3641ae8SIntel } 402d3641ae8SIntel } 403d3641ae8SIntel } 404d3641ae8SIntel 405af75078fSIntel /* Main function. 406af75078fSIntel * Performs initialisation and then calls the lcore_main on each core 407af75078fSIntel * to do the packet-processing work. 408af75078fSIntel */ 409af75078fSIntel int 410af75078fSIntel main(int argc, char **argv) 411af75078fSIntel { 412af75078fSIntel static const char *_SMP_MBUF_POOL = "SMP_MBUF_POOL"; 413af75078fSIntel int ret; 414af75078fSIntel unsigned i; 415af75078fSIntel enum rte_proc_type_t proc_type; 416af75078fSIntel struct rte_mempool *mp; 417af75078fSIntel 418af75078fSIntel /* set up signal handlers to print stats on exit */ 419af75078fSIntel signal(SIGINT, print_stats); 420af75078fSIntel signal(SIGTERM, print_stats); 421af75078fSIntel 422af75078fSIntel /* initialise the EAL for all */ 423af75078fSIntel ret = rte_eal_init(argc, argv); 424af75078fSIntel if (ret < 0) 425af75078fSIntel rte_exit(EXIT_FAILURE, "Cannot init EAL\n"); 426af75078fSIntel argc -= ret; 427af75078fSIntel argv += ret; 428af75078fSIntel 42968fa37e0SThomas Monjalon /* determine the NIC devices available */ 430d9a42a69SThomas Monjalon if (rte_eth_dev_count_avail() == 0) 431af75078fSIntel rte_exit(EXIT_FAILURE, "No Ethernet ports - bye\n"); 432af75078fSIntel 433af75078fSIntel /* parse application arguments (those after the EAL ones) */ 434af75078fSIntel smp_parse_args(argc, argv); 435af75078fSIntel 43668fa37e0SThomas Monjalon proc_type = rte_eal_process_type(); 437af75078fSIntel mp = (proc_type == RTE_PROC_SECONDARY) ? 438af75078fSIntel rte_mempool_lookup(_SMP_MBUF_POOL) : 439ea0c20eaSOlivier Matz rte_pktmbuf_pool_create(_SMP_MBUF_POOL, NB_MBUFS, 440824cb29cSKonstantin Ananyev MBUF_CACHE_SIZE, 0, RTE_MBUF_DEFAULT_BUF_SIZE, 441ea0c20eaSOlivier Matz rte_socket_id()); 442af75078fSIntel if (mp == NULL) 443af75078fSIntel rte_exit(EXIT_FAILURE, "Cannot get memory pool for buffers\n"); 444af75078fSIntel 445af75078fSIntel if (num_ports & 1) 446af75078fSIntel rte_exit(EXIT_FAILURE, "Application must use an even number of ports\n"); 447af75078fSIntel for(i = 0; i < num_ports; i++){ 448af75078fSIntel if(proc_type == RTE_PROC_PRIMARY) 449af75078fSIntel if (smp_port_init(ports[i], mp, (uint16_t)num_procs) < 0) 450af75078fSIntel rte_exit(EXIT_FAILURE, "Error initialising ports\n"); 451af75078fSIntel } 452af75078fSIntel 453d3641ae8SIntel if (proc_type == RTE_PROC_PRIMARY) 454d3641ae8SIntel check_all_ports_link_status((uint8_t)num_ports, (~0x0)); 455d3641ae8SIntel 456af75078fSIntel assign_ports_to_cores(); 457af75078fSIntel 458af75078fSIntel RTE_LOG(INFO, APP, "Finished Process Init.\n"); 459af75078fSIntel 460af75078fSIntel rte_eal_mp_remote_launch(lcore_main, NULL, CALL_MASTER); 461af75078fSIntel 462af75078fSIntel return 0; 463af75078fSIntel } 464