13998e2a0SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause
23998e2a0SBruce Richardson * Copyright(c) 2010-2014 Intel Corporation
3af75078fSIntel */
4af75078fSIntel
5af75078fSIntel /*
67be78d02SJosh Soref * Sample application demonstrating how to do packet I/O in a multi-process
7af75078fSIntel * environment. The same code can be run as a primary process and as a
8af75078fSIntel * secondary process, just with a different proc-id parameter in each case
9af75078fSIntel * (apart from the EAL flag to indicate a secondary process).
10af75078fSIntel *
11af75078fSIntel * Each process will read from the same ports, given by the port-mask
12af75078fSIntel * parameter, which should be the same in each case, just using a different
13af75078fSIntel * queue per port as determined by the proc-id parameter.
14af75078fSIntel */
15af75078fSIntel
16af75078fSIntel #include <stdio.h>
17af75078fSIntel #include <string.h>
18af75078fSIntel #include <stdint.h>
19af75078fSIntel #include <stdlib.h>
20af75078fSIntel #include <stdarg.h>
21af75078fSIntel #include <errno.h>
22af75078fSIntel #include <sys/queue.h>
23af75078fSIntel #include <getopt.h>
24af75078fSIntel #include <signal.h>
25af75078fSIntel #include <inttypes.h>
26af75078fSIntel
27af75078fSIntel #include <rte_common.h>
28af75078fSIntel #include <rte_log.h>
29af75078fSIntel #include <rte_memory.h>
30af75078fSIntel #include <rte_launch.h>
31af75078fSIntel #include <rte_eal.h>
32af75078fSIntel #include <rte_per_lcore.h>
33af75078fSIntel #include <rte_lcore.h>
34af75078fSIntel #include <rte_branch_prediction.h>
35af75078fSIntel #include <rte_debug.h>
36af75078fSIntel #include <rte_interrupts.h>
37af75078fSIntel #include <rte_ether.h>
38af75078fSIntel #include <rte_ethdev.h>
39af75078fSIntel #include <rte_mempool.h>
40af75078fSIntel #include <rte_memcpy.h>
41af75078fSIntel #include <rte_mbuf.h>
42af75078fSIntel #include <rte_string_fns.h>
43d3641ae8SIntel #include <rte_cycles.h>
44af75078fSIntel
45af75078fSIntel #define RTE_LOGTYPE_APP RTE_LOGTYPE_USER1
46af75078fSIntel
47af75078fSIntel #define NB_MBUFS 64*1024 /* use 64k mbufs */
48af75078fSIntel #define MBUF_CACHE_SIZE 256
49af75078fSIntel #define PKT_BURST 32
50867a6c66SKevin Laatz #define RX_RING_SIZE 1024
51867a6c66SKevin Laatz #define TX_RING_SIZE 1024
52af75078fSIntel
53af75078fSIntel #define PARAM_PROC_ID "proc-id"
54af75078fSIntel #define PARAM_NUM_PROCS "num-procs"
55af75078fSIntel
56af75078fSIntel /* for each lcore, record the elements of the ports array to use */
57af75078fSIntel struct lcore_ports{
58af75078fSIntel unsigned start_port;
59af75078fSIntel unsigned num_ports;
60af75078fSIntel };
61af75078fSIntel
62af75078fSIntel /* structure to record the rx and tx packets. Put two per cache line as ports
63af75078fSIntel * used in pairs */
64*7e06c0deSTyler Retzlaff struct __rte_aligned(RTE_CACHE_LINE_SIZE / 2) port_stats{
65af75078fSIntel unsigned rx;
66af75078fSIntel unsigned tx;
67af75078fSIntel unsigned drop;
68*7e06c0deSTyler Retzlaff };
69af75078fSIntel
70af75078fSIntel static int proc_id = -1;
71af75078fSIntel static unsigned num_procs = 0;
72af75078fSIntel
7347523597SZhiyong Yang static uint16_t ports[RTE_MAX_ETHPORTS];
74af75078fSIntel static unsigned num_ports = 0;
75af75078fSIntel
76af75078fSIntel static struct lcore_ports lcore_ports[RTE_MAX_LCORE];
77af75078fSIntel static struct port_stats pstats[RTE_MAX_ETHPORTS];
78af75078fSIntel
79af75078fSIntel /* prints the usage statement and quits with an error message */
80af75078fSIntel static void
smp_usage(const char * prgname,const char * errmsg)81af75078fSIntel smp_usage(const char *prgname, const char *errmsg)
82af75078fSIntel {
83af75078fSIntel printf("\nError: %s\n",errmsg);
84af75078fSIntel printf("\n%s [EAL options] -- -p <port mask> "
85af75078fSIntel "--"PARAM_NUM_PROCS" <n>"
86af75078fSIntel " --"PARAM_PROC_ID" <id>\n"
87af75078fSIntel "-p : a hex bitmask indicating what ports are to be used\n"
88af75078fSIntel "--num-procs: the number of processes which will be used\n"
89af75078fSIntel "--proc-id : the id of the current process (id < num-procs)\n"
90af75078fSIntel "\n",
91af75078fSIntel prgname);
92af75078fSIntel exit(1);
93af75078fSIntel }
94af75078fSIntel
95af75078fSIntel
96af75078fSIntel /* signal handler configured for SIGTERM and SIGINT to print stats on exit */
97af75078fSIntel static void
print_stats(int signum)98af75078fSIntel print_stats(int signum)
99af75078fSIntel {
100af75078fSIntel unsigned i;
101af75078fSIntel printf("\nExiting on signal %d\n\n", signum);
102af75078fSIntel for (i = 0; i < num_ports; i++){
103af75078fSIntel const uint8_t p_num = ports[i];
104af75078fSIntel printf("Port %u: RX - %u, TX - %u, Drop - %u\n", (unsigned)p_num,
105af75078fSIntel pstats[p_num].rx, pstats[p_num].tx, pstats[p_num].drop);
106af75078fSIntel }
107af75078fSIntel exit(0);
108af75078fSIntel }
109af75078fSIntel
110af75078fSIntel /* Parse the argument given in the command line of the application */
111af75078fSIntel static int
smp_parse_args(int argc,char ** argv)112af75078fSIntel smp_parse_args(int argc, char **argv)
113af75078fSIntel {
114af75078fSIntel int opt, ret;
115af75078fSIntel char **argvopt;
116af75078fSIntel int option_index;
1178728ccf3SThomas Monjalon uint16_t i, port_mask = 0;
118af75078fSIntel char *prgname = argv[0];
119af75078fSIntel static struct option lgopts[] = {
120af75078fSIntel {PARAM_NUM_PROCS, 1, 0, 0},
121af75078fSIntel {PARAM_PROC_ID, 1, 0, 0},
122af75078fSIntel {NULL, 0, 0, 0}
123af75078fSIntel };
124af75078fSIntel
125af75078fSIntel argvopt = argv;
126af75078fSIntel
127af75078fSIntel while ((opt = getopt_long(argc, argvopt, "p:", \
128af75078fSIntel lgopts, &option_index)) != EOF) {
129af75078fSIntel
130af75078fSIntel switch (opt) {
131af75078fSIntel case 'p':
132af75078fSIntel port_mask = strtoull(optarg, NULL, 16);
133af75078fSIntel break;
134af75078fSIntel /* long options */
135af75078fSIntel case 0:
136af75078fSIntel if (strncmp(lgopts[option_index].name, PARAM_NUM_PROCS, 8) == 0)
137af75078fSIntel num_procs = atoi(optarg);
138af75078fSIntel else if (strncmp(lgopts[option_index].name, PARAM_PROC_ID, 7) == 0)
139af75078fSIntel proc_id = atoi(optarg);
140af75078fSIntel break;
141af75078fSIntel
142af75078fSIntel default:
143af75078fSIntel smp_usage(prgname, "Cannot parse all command-line arguments\n");
144af75078fSIntel }
145af75078fSIntel }
146af75078fSIntel
147af75078fSIntel if (optind >= 0)
148af75078fSIntel argv[optind-1] = prgname;
149af75078fSIntel
150af75078fSIntel if (proc_id < 0)
151af75078fSIntel smp_usage(prgname, "Invalid or missing proc-id parameter\n");
152af75078fSIntel if (rte_eal_process_type() == RTE_PROC_PRIMARY && num_procs == 0)
153af75078fSIntel smp_usage(prgname, "Invalid or missing num-procs parameter\n");
154af75078fSIntel if (port_mask == 0)
155af75078fSIntel smp_usage(prgname, "Invalid or missing port mask\n");
156af75078fSIntel
157af75078fSIntel /* get the port numbers from the port mask */
1588728ccf3SThomas Monjalon RTE_ETH_FOREACH_DEV(i)
159af75078fSIntel if(port_mask & (1 << i))
160af75078fSIntel ports[num_ports++] = (uint8_t)i;
161af75078fSIntel
162af75078fSIntel ret = optind-1;
1639d5ca532SKeith Wiles optind = 1; /* reset getopt lib */
164af75078fSIntel
165693f715dSHuawei Xie return ret;
166af75078fSIntel }
167af75078fSIntel
168af75078fSIntel /*
169af75078fSIntel * Initialises a given port using global settings and with the rx buffers
170af75078fSIntel * coming from the mbuf_pool passed as parameter
171af75078fSIntel */
172af75078fSIntel static inline int
smp_port_init(uint16_t port,struct rte_mempool * mbuf_pool,uint16_t num_queues)17347523597SZhiyong Yang smp_port_init(uint16_t port, struct rte_mempool *mbuf_pool,
17447523597SZhiyong Yang uint16_t num_queues)
175af75078fSIntel {
176af75078fSIntel struct rte_eth_conf port_conf = {
177af75078fSIntel .rxmode = {
178295968d1SFerruh Yigit .mq_mode = RTE_ETH_MQ_RX_RSS,
179295968d1SFerruh Yigit .offloads = RTE_ETH_RX_OFFLOAD_CHECKSUM,
180af75078fSIntel },
181af75078fSIntel .rx_adv_conf = {
182af75078fSIntel .rss_conf = {
183af75078fSIntel .rss_key = NULL,
184295968d1SFerruh Yigit .rss_hf = RTE_ETH_RSS_IP,
185af75078fSIntel },
186af75078fSIntel },
187af75078fSIntel .txmode = {
188295968d1SFerruh Yigit .mq_mode = RTE_ETH_MQ_TX_NONE,
189af75078fSIntel }
190af75078fSIntel };
191af75078fSIntel const uint16_t rx_rings = num_queues, tx_rings = num_queues;
19294aa16b4SBruce Richardson struct rte_eth_dev_info info;
193f8c02ca8SShahaf Shuler struct rte_eth_rxconf rxq_conf;
194f8c02ca8SShahaf Shuler struct rte_eth_txconf txq_conf;
195af75078fSIntel int retval;
196af75078fSIntel uint16_t q;
19760efb44fSRoman Zhukov uint16_t nb_rxd = RX_RING_SIZE;
19860efb44fSRoman Zhukov uint16_t nb_txd = TX_RING_SIZE;
1994f5701f2SFerruh Yigit uint64_t rss_hf_tmp;
200af75078fSIntel
201af75078fSIntel if (rte_eal_process_type() == RTE_PROC_SECONDARY)
202af75078fSIntel return 0;
203af75078fSIntel
204a9dbe180SThomas Monjalon if (!rte_eth_dev_is_valid_port(port))
205af75078fSIntel return -1;
206af75078fSIntel
20747523597SZhiyong Yang printf("# Initialising port %u... ", port);
208af75078fSIntel fflush(stdout);
209af75078fSIntel
210089e5ed7SIvan Ilchenko retval = rte_eth_dev_info_get(port, &info);
211089e5ed7SIvan Ilchenko if (retval != 0) {
212089e5ed7SIvan Ilchenko printf("Error during getting device (port %u) info: %s\n",
213089e5ed7SIvan Ilchenko port, strerror(-retval));
214089e5ed7SIvan Ilchenko return retval;
215089e5ed7SIvan Ilchenko }
216089e5ed7SIvan Ilchenko
21794aa16b4SBruce Richardson info.default_rxconf.rx_drop_en = 1;
21894aa16b4SBruce Richardson
219295968d1SFerruh Yigit if (info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE)
220f8c02ca8SShahaf Shuler port_conf.txmode.offloads |=
221295968d1SFerruh Yigit RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE;
2224f5701f2SFerruh Yigit
2234f5701f2SFerruh Yigit rss_hf_tmp = port_conf.rx_adv_conf.rss_conf.rss_hf;
2244f5701f2SFerruh Yigit port_conf.rx_adv_conf.rss_conf.rss_hf &= info.flow_type_rss_offloads;
2254f5701f2SFerruh Yigit if (port_conf.rx_adv_conf.rss_conf.rss_hf != rss_hf_tmp) {
2264f5701f2SFerruh Yigit printf("Port %u modified RSS hash function based on hardware support,"
2274f5701f2SFerruh Yigit "requested:%#"PRIx64" configured:%#"PRIx64"\n",
2284f5701f2SFerruh Yigit port,
2294f5701f2SFerruh Yigit rss_hf_tmp,
2304f5701f2SFerruh Yigit port_conf.rx_adv_conf.rss_conf.rss_hf);
2314f5701f2SFerruh Yigit }
2324f5701f2SFerruh Yigit
233af75078fSIntel retval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf);
2341c839246SWenwu Ma if (retval == -EINVAL) {
2351c839246SWenwu Ma printf("Port %u configuration failed. Re-attempting with HW checksum disabled.\n",
2361c839246SWenwu Ma port);
2371c839246SWenwu Ma port_conf.rxmode.offloads &= ~(RTE_ETH_RX_OFFLOAD_CHECKSUM);
2381c839246SWenwu Ma retval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf);
2391c839246SWenwu Ma }
2401c839246SWenwu Ma
2411c839246SWenwu Ma if (retval == -ENOTSUP) {
2421c839246SWenwu Ma printf("Port %u configuration failed. Re-attempting with HW RSS disabled.\n",
2431c839246SWenwu Ma port);
2441c839246SWenwu Ma port_conf.rxmode.mq_mode &= ~(RTE_ETH_MQ_RX_RSS);
2451c839246SWenwu Ma retval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf);
2461c839246SWenwu Ma }
2471c839246SWenwu Ma
248af75078fSIntel if (retval < 0)
249af75078fSIntel return retval;
250af75078fSIntel
25160efb44fSRoman Zhukov retval = rte_eth_dev_adjust_nb_rx_tx_desc(port, &nb_rxd, &nb_txd);
25260efb44fSRoman Zhukov if (retval < 0)
25360efb44fSRoman Zhukov return retval;
25460efb44fSRoman Zhukov
255f8c02ca8SShahaf Shuler rxq_conf = info.default_rxconf;
256f8c02ca8SShahaf Shuler rxq_conf.offloads = port_conf.rxmode.offloads;
257af75078fSIntel for (q = 0; q < rx_rings; q ++) {
25860efb44fSRoman Zhukov retval = rte_eth_rx_queue_setup(port, q, nb_rxd,
25981f7ecd9SPablo de Lara rte_eth_dev_socket_id(port),
260f8c02ca8SShahaf Shuler &rxq_conf,
261af75078fSIntel mbuf_pool);
262af75078fSIntel if (retval < 0)
263af75078fSIntel return retval;
264af75078fSIntel }
265af75078fSIntel
266f8c02ca8SShahaf Shuler txq_conf = info.default_txconf;
267f8c02ca8SShahaf Shuler txq_conf.offloads = port_conf.txmode.offloads;
268af75078fSIntel for (q = 0; q < tx_rings; q ++) {
26960efb44fSRoman Zhukov retval = rte_eth_tx_queue_setup(port, q, nb_txd,
27081f7ecd9SPablo de Lara rte_eth_dev_socket_id(port),
271f8c02ca8SShahaf Shuler &txq_conf);
272af75078fSIntel if (retval < 0)
273af75078fSIntel return retval;
274af75078fSIntel }
275af75078fSIntel
276f430bbceSIvan Ilchenko retval = rte_eth_promiscuous_enable(port);
277f430bbceSIvan Ilchenko if (retval != 0)
278f430bbceSIvan Ilchenko return retval;
279af75078fSIntel
280af75078fSIntel retval = rte_eth_dev_start(port);
281af75078fSIntel if (retval < 0)
282af75078fSIntel return retval;
283af75078fSIntel
284af75078fSIntel return 0;
285af75078fSIntel }
286af75078fSIntel
287af75078fSIntel /* Goes through each of the lcores and calculates what ports should
288af75078fSIntel * be used by that core. Fills in the global lcore_ports[] array.
289af75078fSIntel */
290af75078fSIntel static void
assign_ports_to_cores(void)291af75078fSIntel assign_ports_to_cores(void)
292af75078fSIntel {
293af75078fSIntel
294200bc52eSDavid Marchand const unsigned int lcores = rte_lcore_count();
295af75078fSIntel const unsigned port_pairs = num_ports / 2;
296af75078fSIntel const unsigned pairs_per_lcore = port_pairs / lcores;
297af75078fSIntel unsigned extra_pairs = port_pairs % lcores;
298af75078fSIntel unsigned ports_assigned = 0;
299af75078fSIntel unsigned i;
300af75078fSIntel
301af75078fSIntel RTE_LCORE_FOREACH(i) {
302af75078fSIntel lcore_ports[i].start_port = ports_assigned;
303af75078fSIntel lcore_ports[i].num_ports = pairs_per_lcore * 2;
304af75078fSIntel if (extra_pairs > 0) {
305af75078fSIntel lcore_ports[i].num_ports += 2;
306af75078fSIntel extra_pairs--;
307af75078fSIntel }
308af75078fSIntel ports_assigned += lcore_ports[i].num_ports;
309af75078fSIntel }
310af75078fSIntel }
311af75078fSIntel
312af75078fSIntel /* Main function used by the processing threads.
313af75078fSIntel * Prints out some configuration details for the thread and then begins
314af75078fSIntel * performing packet RX and TX.
315af75078fSIntel */
316af75078fSIntel static int
lcore_main(void * arg __rte_unused)317af75078fSIntel lcore_main(void *arg __rte_unused)
318af75078fSIntel {
319af75078fSIntel const unsigned id = rte_lcore_id();
320af75078fSIntel const unsigned start_port = lcore_ports[id].start_port;
321af75078fSIntel const unsigned end_port = start_port + lcore_ports[id].num_ports;
322af75078fSIntel const uint16_t q_id = (uint16_t)proc_id;
323af75078fSIntel unsigned p, i;
324af75078fSIntel char msgbuf[256];
325af75078fSIntel int msgbufpos = 0;
326af75078fSIntel
327af75078fSIntel if (start_port == end_port){
328af75078fSIntel printf("Lcore %u has nothing to do\n", id);
329af75078fSIntel return 0;
330af75078fSIntel }
331af75078fSIntel
332af75078fSIntel /* build up message in msgbuf before printing to decrease likelihood
333af75078fSIntel * of multi-core message interleaving.
334af75078fSIntel */
3356f41fe75SStephen Hemminger msgbufpos += snprintf(msgbuf, sizeof(msgbuf) - msgbufpos,
336af75078fSIntel "Lcore %u using ports ", id);
337af75078fSIntel for (p = start_port; p < end_port; p++){
3386f41fe75SStephen Hemminger msgbufpos += snprintf(msgbuf + msgbufpos, sizeof(msgbuf) - msgbufpos,
339af75078fSIntel "%u ", (unsigned)ports[p]);
340af75078fSIntel }
341af75078fSIntel printf("%s\n", msgbuf);
342af75078fSIntel printf("lcore %u using queue %u of each port\n", id, (unsigned)q_id);
343af75078fSIntel
344af75078fSIntel /* handle packet I/O from the ports, reading and writing to the
345af75078fSIntel * queue number corresponding to our process number (not lcore id)
346af75078fSIntel */
347af75078fSIntel
348af75078fSIntel for (;;) {
349af75078fSIntel struct rte_mbuf *buf[PKT_BURST];
350af75078fSIntel
351af75078fSIntel for (p = start_port; p < end_port; p++) {
352af75078fSIntel const uint8_t src = ports[p];
353af75078fSIntel const uint8_t dst = ports[p ^ 1]; /* 0 <-> 1, 2 <-> 3 etc */
354af75078fSIntel const uint16_t rx_c = rte_eth_rx_burst(src, q_id, buf, PKT_BURST);
355af75078fSIntel if (rx_c == 0)
356af75078fSIntel continue;
357af75078fSIntel pstats[src].rx += rx_c;
358af75078fSIntel
359af75078fSIntel const uint16_t tx_c = rte_eth_tx_burst(dst, q_id, buf, rx_c);
360af75078fSIntel pstats[dst].tx += tx_c;
361af75078fSIntel if (tx_c != rx_c) {
362af75078fSIntel pstats[dst].drop += (rx_c - tx_c);
363af75078fSIntel for (i = tx_c; i < rx_c; i++)
364af75078fSIntel rte_pktmbuf_free(buf[i]);
365af75078fSIntel }
366af75078fSIntel }
367af75078fSIntel }
368af75078fSIntel }
369af75078fSIntel
370d3641ae8SIntel /* Check the link status of all ports in up to 9s, and print them finally */
371d3641ae8SIntel static void
check_all_ports_link_status(uint16_t port_num,uint32_t port_mask)37247523597SZhiyong Yang check_all_ports_link_status(uint16_t port_num, uint32_t port_mask)
373d3641ae8SIntel {
374d3641ae8SIntel #define CHECK_INTERVAL 100 /* 100ms */
375d3641ae8SIntel #define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */
37647523597SZhiyong Yang uint16_t portid;
37747523597SZhiyong Yang uint8_t count, all_ports_up, print_flag = 0;
378d3641ae8SIntel struct rte_eth_link link;
37922e5c73bSIgor Romanov int ret;
380db4e8135SIvan Dyukov char link_status_text[RTE_ETH_LINK_MAX_STR_LEN];
381d3641ae8SIntel
382d3641ae8SIntel printf("\nChecking link status");
383d3641ae8SIntel fflush(stdout);
384d3641ae8SIntel for (count = 0; count <= MAX_CHECK_TIME; count++) {
385d3641ae8SIntel all_ports_up = 1;
386d3641ae8SIntel for (portid = 0; portid < port_num; portid++) {
387d3641ae8SIntel if ((port_mask & (1 << portid)) == 0)
388d3641ae8SIntel continue;
389d3641ae8SIntel memset(&link, 0, sizeof(link));
39022e5c73bSIgor Romanov ret = rte_eth_link_get_nowait(portid, &link);
39122e5c73bSIgor Romanov if (ret < 0) {
39222e5c73bSIgor Romanov all_ports_up = 0;
39322e5c73bSIgor Romanov if (print_flag == 1)
39422e5c73bSIgor Romanov printf("Port %u link get failed: %s\n",
39522e5c73bSIgor Romanov portid, rte_strerror(-ret));
39622e5c73bSIgor Romanov continue;
39722e5c73bSIgor Romanov }
398d3641ae8SIntel /* print link status if flag set */
399d3641ae8SIntel if (print_flag == 1) {
400db4e8135SIvan Dyukov rte_eth_link_to_str(link_status_text,
401db4e8135SIvan Dyukov sizeof(link_status_text), &link);
402db4e8135SIvan Dyukov printf("Port %d %s\n", portid,
403db4e8135SIvan Dyukov link_status_text);
404d3641ae8SIntel continue;
405d3641ae8SIntel }
406d3641ae8SIntel /* clear all_ports_up flag if any link down */
407295968d1SFerruh Yigit if (link.link_status == RTE_ETH_LINK_DOWN) {
408d3641ae8SIntel all_ports_up = 0;
409d3641ae8SIntel break;
410d3641ae8SIntel }
411d3641ae8SIntel }
412d3641ae8SIntel /* after finally printing all link status, get out */
413d3641ae8SIntel if (print_flag == 1)
414d3641ae8SIntel break;
415d3641ae8SIntel
416d3641ae8SIntel if (all_ports_up == 0) {
417d3641ae8SIntel printf(".");
418d3641ae8SIntel fflush(stdout);
419d3641ae8SIntel rte_delay_ms(CHECK_INTERVAL);
420d3641ae8SIntel }
421d3641ae8SIntel
422d3641ae8SIntel /* set the print_flag if all ports up or timeout */
423d3641ae8SIntel if (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) {
424d3641ae8SIntel print_flag = 1;
425d3641ae8SIntel printf("done\n");
426d3641ae8SIntel }
427d3641ae8SIntel }
428d3641ae8SIntel }
429d3641ae8SIntel
430af75078fSIntel /* Main function.
431af75078fSIntel * Performs initialisation and then calls the lcore_main on each core
432af75078fSIntel * to do the packet-processing work.
433af75078fSIntel */
434af75078fSIntel int
main(int argc,char ** argv)435af75078fSIntel main(int argc, char **argv)
436af75078fSIntel {
437af75078fSIntel static const char *_SMP_MBUF_POOL = "SMP_MBUF_POOL";
438af75078fSIntel int ret;
439af75078fSIntel unsigned i;
440af75078fSIntel enum rte_proc_type_t proc_type;
441af75078fSIntel struct rte_mempool *mp;
442af75078fSIntel
443af75078fSIntel /* set up signal handlers to print stats on exit */
444af75078fSIntel signal(SIGINT, print_stats);
445af75078fSIntel signal(SIGTERM, print_stats);
446af75078fSIntel
447af75078fSIntel /* initialise the EAL for all */
448af75078fSIntel ret = rte_eal_init(argc, argv);
449af75078fSIntel if (ret < 0)
450af75078fSIntel rte_exit(EXIT_FAILURE, "Cannot init EAL\n");
451af75078fSIntel argc -= ret;
452af75078fSIntel argv += ret;
453af75078fSIntel
45468fa37e0SThomas Monjalon /* determine the NIC devices available */
455d9a42a69SThomas Monjalon if (rte_eth_dev_count_avail() == 0)
456af75078fSIntel rte_exit(EXIT_FAILURE, "No Ethernet ports - bye\n");
457af75078fSIntel
458af75078fSIntel /* parse application arguments (those after the EAL ones) */
459af75078fSIntel smp_parse_args(argc, argv);
460af75078fSIntel
46168fa37e0SThomas Monjalon proc_type = rte_eal_process_type();
462af75078fSIntel mp = (proc_type == RTE_PROC_SECONDARY) ?
463af75078fSIntel rte_mempool_lookup(_SMP_MBUF_POOL) :
464ea0c20eaSOlivier Matz rte_pktmbuf_pool_create(_SMP_MBUF_POOL, NB_MBUFS,
465824cb29cSKonstantin Ananyev MBUF_CACHE_SIZE, 0, RTE_MBUF_DEFAULT_BUF_SIZE,
466ea0c20eaSOlivier Matz rte_socket_id());
467af75078fSIntel if (mp == NULL)
468af75078fSIntel rte_exit(EXIT_FAILURE, "Cannot get memory pool for buffers\n");
469af75078fSIntel
4709a212dc0SConor Fogarty /* Primary instance initialized. 8< */
471af75078fSIntel if (num_ports & 1)
472af75078fSIntel rte_exit(EXIT_FAILURE, "Application must use an even number of ports\n");
473af75078fSIntel for(i = 0; i < num_ports; i++){
474af75078fSIntel if(proc_type == RTE_PROC_PRIMARY)
475af75078fSIntel if (smp_port_init(ports[i], mp, (uint16_t)num_procs) < 0)
476af75078fSIntel rte_exit(EXIT_FAILURE, "Error initialising ports\n");
477af75078fSIntel }
4789a212dc0SConor Fogarty /* >8 End of primary instance initialization. */
479af75078fSIntel
480d3641ae8SIntel if (proc_type == RTE_PROC_PRIMARY)
481d3641ae8SIntel check_all_ports_link_status((uint8_t)num_ports, (~0x0));
482d3641ae8SIntel
483af75078fSIntel assign_ports_to_cores();
484af75078fSIntel
485af75078fSIntel RTE_LOG(INFO, APP, "Finished Process Init.\n");
486af75078fSIntel
487cb056611SStephen Hemminger rte_eal_mp_remote_launch(lcore_main, NULL, CALL_MAIN);
488af75078fSIntel
48910aa3757SChengchang Tang /* clean up the EAL */
49010aa3757SChengchang Tang rte_eal_cleanup();
49110aa3757SChengchang Tang
492af75078fSIntel return 0;
493af75078fSIntel }
494