xref: /dpdk/examples/multi_process/client_server_mp/shared/common.h (revision 6f41fe75e2dd8dd38f7bea7b9501edd4f9b72fa5)
1af75078fSIntel /*-
2af75078fSIntel  *   BSD LICENSE
3af75078fSIntel  *
4e9d48c00SBruce Richardson  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5af75078fSIntel  *   All rights reserved.
6af75078fSIntel  *
7af75078fSIntel  *   Redistribution and use in source and binary forms, with or without
8af75078fSIntel  *   modification, are permitted provided that the following conditions
9af75078fSIntel  *   are met:
10af75078fSIntel  *
11af75078fSIntel  *     * Redistributions of source code must retain the above copyright
12af75078fSIntel  *       notice, this list of conditions and the following disclaimer.
13af75078fSIntel  *     * Redistributions in binary form must reproduce the above copyright
14af75078fSIntel  *       notice, this list of conditions and the following disclaimer in
15af75078fSIntel  *       the documentation and/or other materials provided with the
16af75078fSIntel  *       distribution.
17af75078fSIntel  *     * Neither the name of Intel Corporation nor the names of its
18af75078fSIntel  *       contributors may be used to endorse or promote products derived
19af75078fSIntel  *       from this software without specific prior written permission.
20af75078fSIntel  *
21af75078fSIntel  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22af75078fSIntel  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23af75078fSIntel  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24af75078fSIntel  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25af75078fSIntel  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26af75078fSIntel  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27af75078fSIntel  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28af75078fSIntel  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29af75078fSIntel  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30af75078fSIntel  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31af75078fSIntel  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32af75078fSIntel  */
33af75078fSIntel 
34af75078fSIntel #ifndef _COMMON_H_
35af75078fSIntel #define _COMMON_H_
36af75078fSIntel 
37af75078fSIntel #define MAX_CLIENTS             16
38af75078fSIntel 
39af75078fSIntel /*
40af75078fSIntel  * Shared port info, including statistics information for display by server.
41af75078fSIntel  * Structure will be put in a memzone.
42af75078fSIntel  * - All port id values share one cache line as this data will be read-only
43af75078fSIntel  * during operation.
44af75078fSIntel  * - All rx statistic values share cache lines, as this data is written only
45af75078fSIntel  * by the server process. (rare reads by stats display)
46af75078fSIntel  * - The tx statistics have values for all ports per cache line, but the stats
47af75078fSIntel  * themselves are written by the clients, so we have a distinct set, on different
48af75078fSIntel  * cache lines for each client to use.
49af75078fSIntel  */
50af75078fSIntel struct rx_stats{
51af75078fSIntel 	uint64_t rx[RTE_MAX_ETHPORTS];
52af75078fSIntel } __rte_cache_aligned;
53af75078fSIntel 
54af75078fSIntel struct tx_stats{
55af75078fSIntel 	uint64_t tx[RTE_MAX_ETHPORTS];
56af75078fSIntel 	uint64_t tx_drop[RTE_MAX_ETHPORTS];
57af75078fSIntel } __rte_cache_aligned;
58af75078fSIntel 
59af75078fSIntel struct port_info {
60af75078fSIntel 	uint8_t num_ports;
61af75078fSIntel 	uint8_t id[RTE_MAX_ETHPORTS];
62af75078fSIntel 	volatile struct rx_stats rx_stats;
63af75078fSIntel 	volatile struct tx_stats tx_stats[MAX_CLIENTS];
64af75078fSIntel };
65af75078fSIntel 
66af75078fSIntel /* define common names for structures shared between server and client */
67af75078fSIntel #define MP_CLIENT_RXQ_NAME "MProc_Client_%u_RX"
68af75078fSIntel #define PKTMBUF_POOL_NAME "MProc_pktmbuf_pool"
69af75078fSIntel #define MZ_PORT_INFO "MProc_port_info"
70af75078fSIntel 
71af75078fSIntel /*
72af75078fSIntel  * Given the rx queue name template above, get the queue name
73af75078fSIntel  */
74af75078fSIntel static inline const char *
75af75078fSIntel get_rx_queue_name(unsigned id)
76af75078fSIntel {
77af75078fSIntel 	/* buffer for return value. Size calculated by %u being replaced
78af75078fSIntel 	 * by maximum 3 digits (plus an extra byte for safety) */
79af75078fSIntel 	static char buffer[sizeof(MP_CLIENT_RXQ_NAME) + 2];
80af75078fSIntel 
81*6f41fe75SStephen Hemminger 	snprintf(buffer, sizeof(buffer) - 1, MP_CLIENT_RXQ_NAME, id);
82af75078fSIntel 	return buffer;
83af75078fSIntel }
84af75078fSIntel 
85af75078fSIntel #define RTE_LOGTYPE_APP RTE_LOGTYPE_USER1
86af75078fSIntel 
87af75078fSIntel #endif
88