1 /*- 2 * BSD LICENSE 3 * 4 * Copyright(c) 2010-2013 Intel Corporation. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Intel Corporation nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 #include <stdio.h> 36 #include <stdlib.h> 37 #include <string.h> 38 #include <stdint.h> 39 #include <inttypes.h> 40 #include <sys/types.h> 41 #include <string.h> 42 #include <sys/queue.h> 43 #include <netinet/in.h> 44 #include <setjmp.h> 45 #include <stdarg.h> 46 #include <ctype.h> 47 #include <errno.h> 48 #include <getopt.h> 49 50 #include <rte_common.h> 51 #include <rte_log.h> 52 #include <rte_memory.h> 53 #include <rte_memcpy.h> 54 #include <rte_memzone.h> 55 #include <rte_tailq.h> 56 #include <rte_eal.h> 57 #include <rte_per_lcore.h> 58 #include <rte_launch.h> 59 #include <rte_atomic.h> 60 #include <rte_cycles.h> 61 #include <rte_prefetch.h> 62 #include <rte_lcore.h> 63 #include <rte_per_lcore.h> 64 #include <rte_branch_prediction.h> 65 #include <rte_interrupts.h> 66 #include <rte_pci.h> 67 #include <rte_random.h> 68 #include <rte_debug.h> 69 #include <rte_ether.h> 70 #include <rte_ethdev.h> 71 #include <rte_ring.h> 72 #include <rte_mempool.h> 73 #include <rte_mbuf.h> 74 75 #include "main.h" 76 77 #define RTE_LOGTYPE_LSI RTE_LOGTYPE_USER1 78 79 #define MBUF_SIZE (2048 + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM) 80 #define NB_MBUF 8192 81 82 /* 83 * RX and TX Prefetch, Host, and Write-back threshold values should be 84 * carefully set for optimal performance. Consult the network 85 * controller's datasheet and supporting DPDK documentation for guidance 86 * on how these parameters should be set. 87 */ 88 #define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */ 89 #define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */ 90 #define RX_WTHRESH 4 /**< Default values of RX write-back threshold reg. */ 91 92 /* 93 * These default values are optimized for use with the Intel(R) 82599 10 GbE 94 * Controller and the DPDK ixgbe PMD. Consider using other values for other 95 * network controllers and/or network drivers. 96 */ 97 #define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */ 98 #define TX_HTHRESH 0 /**< Default values of TX host threshold reg. */ 99 #define TX_WTHRESH 0 /**< Default values of TX write-back threshold reg. */ 100 101 #define MAX_PKT_BURST 32 102 #define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */ 103 104 /* 105 * Configurable number of RX/TX ring descriptors 106 */ 107 #define RTE_TEST_RX_DESC_DEFAULT 128 108 #define RTE_TEST_TX_DESC_DEFAULT 512 109 static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT; 110 static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT; 111 112 /* ethernet addresses of ports */ 113 static struct ether_addr lsi_ports_eth_addr[RTE_MAX_ETHPORTS]; 114 115 /* mask of enabled ports */ 116 static uint32_t lsi_enabled_port_mask = 0; 117 118 static unsigned int lsi_rx_queue_per_lcore = 1; 119 120 /* destination port for L2 forwarding */ 121 static unsigned lsi_dst_ports[RTE_MAX_ETHPORTS] = {0}; 122 123 #define MAX_PKT_BURST 32 124 struct mbuf_table { 125 unsigned len; 126 struct rte_mbuf *m_table[MAX_PKT_BURST]; 127 }; 128 129 #define MAX_RX_QUEUE_PER_LCORE 16 130 #define MAX_TX_QUEUE_PER_PORT 16 131 struct lcore_queue_conf { 132 unsigned n_rx_port; 133 unsigned rx_port_list[MAX_RX_QUEUE_PER_LCORE]; 134 unsigned tx_queue_id; 135 struct mbuf_table tx_mbufs[RTE_MAX_ETHPORTS]; 136 137 } __rte_cache_aligned; 138 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE]; 139 140 static const struct rte_eth_conf port_conf = { 141 .rxmode = { 142 .split_hdr_size = 0, 143 .header_split = 0, /**< Header Split disabled */ 144 .hw_ip_checksum = 0, /**< IP checksum offload disabled */ 145 .hw_vlan_filter = 0, /**< VLAN filtering disabled */ 146 .jumbo_frame = 0, /**< Jumbo Frame Support disabled */ 147 .hw_strip_crc = 0, /**< CRC stripped by hardware */ 148 }, 149 .txmode = { 150 .mq_mode = ETH_MQ_TX_NONE, 151 }, 152 .intr_conf = { 153 .lsc = 1, /**< lsc interrupt feature enabled */ 154 }, 155 }; 156 157 static const struct rte_eth_rxconf rx_conf = { 158 .rx_thresh = { 159 .pthresh = RX_PTHRESH, 160 .hthresh = RX_HTHRESH, 161 .wthresh = RX_WTHRESH, 162 }, 163 }; 164 165 static const struct rte_eth_txconf tx_conf = { 166 .tx_thresh = { 167 .pthresh = TX_PTHRESH, 168 .hthresh = TX_HTHRESH, 169 .wthresh = TX_WTHRESH, 170 }, 171 .tx_free_thresh = 0, /* Use PMD default values */ 172 .tx_rs_thresh = 0, /* Use PMD default values */ 173 }; 174 175 struct rte_mempool * lsi_pktmbuf_pool = NULL; 176 177 /* Per-port statistics struct */ 178 struct lsi_port_statistics { 179 uint64_t tx; 180 uint64_t rx; 181 uint64_t dropped; 182 } __rte_cache_aligned; 183 struct lsi_port_statistics port_statistics[RTE_MAX_ETHPORTS]; 184 185 /* A tsc-based timer responsible for triggering statistics printout */ 186 #define TIMER_MILLISECOND 2000000ULL /* around 1ms at 2 Ghz */ 187 #define MAX_TIMER_PERIOD 86400 /* 1 day max */ 188 static int64_t timer_period = 10 * TIMER_MILLISECOND * 1000; /* default period is 10 seconds */ 189 190 /* Print out statistics on packets dropped */ 191 static void 192 print_stats(void) 193 { 194 struct rte_eth_link link; 195 uint64_t total_packets_dropped, total_packets_tx, total_packets_rx; 196 unsigned portid; 197 198 total_packets_dropped = 0; 199 total_packets_tx = 0; 200 total_packets_rx = 0; 201 202 const char clr[] = { 27, '[', '2', 'J', '\0' }; 203 const char topLeft[] = { 27, '[', '1', ';', '1', 'H','\0' }; 204 205 /* Clear screen and move to top left */ 206 printf("%s%s", clr, topLeft); 207 208 printf("\nPort statistics ===================================="); 209 210 for (portid = 0; portid < RTE_MAX_ETHPORTS; portid++) { 211 /* skip ports that are not enabled */ 212 if ((lsi_enabled_port_mask & (1 << portid)) == 0) 213 continue; 214 215 memset(&link, 0, sizeof(link)); 216 rte_eth_link_get_nowait((uint8_t)portid, &link); 217 printf("\nStatistics for port %u ------------------------------" 218 "\nLink status: %25s" 219 "\nLink speed: %26u" 220 "\nLink duplex: %25s" 221 "\nPackets sent: %24"PRIu64 222 "\nPackets received: %20"PRIu64 223 "\nPackets dropped: %21"PRIu64, 224 portid, 225 (link.link_status ? "Link up" : "Link down"), 226 (unsigned)link.link_speed, 227 (link.link_duplex == ETH_LINK_FULL_DUPLEX ? \ 228 "full-duplex" : "half-duplex"), 229 port_statistics[portid].tx, 230 port_statistics[portid].rx, 231 port_statistics[portid].dropped); 232 233 total_packets_dropped += port_statistics[portid].dropped; 234 total_packets_tx += port_statistics[portid].tx; 235 total_packets_rx += port_statistics[portid].rx; 236 } 237 printf("\nAggregate statistics ===============================" 238 "\nTotal packets sent: %18"PRIu64 239 "\nTotal packets received: %14"PRIu64 240 "\nTotal packets dropped: %15"PRIu64, 241 total_packets_tx, 242 total_packets_rx, 243 total_packets_dropped); 244 printf("\n====================================================\n"); 245 } 246 247 /* Send the packet on an output interface */ 248 static int 249 lsi_send_burst(struct lcore_queue_conf *qconf, unsigned n, uint8_t port) 250 { 251 struct rte_mbuf **m_table; 252 unsigned ret; 253 unsigned queueid; 254 255 queueid = (uint16_t) qconf->tx_queue_id; 256 m_table = (struct rte_mbuf **)qconf->tx_mbufs[port].m_table; 257 258 ret = rte_eth_tx_burst(port, (uint16_t) queueid, m_table, (uint16_t) n); 259 port_statistics[port].tx += ret; 260 if (unlikely(ret < n)) { 261 port_statistics[port].dropped += (n - ret); 262 do { 263 rte_pktmbuf_free(m_table[ret]); 264 } while (++ret < n); 265 } 266 267 return 0; 268 } 269 270 /* Send the packet on an output interface */ 271 static int 272 lsi_send_packet(struct rte_mbuf *m, uint8_t port) 273 { 274 unsigned lcore_id, len; 275 struct lcore_queue_conf *qconf; 276 277 lcore_id = rte_lcore_id(); 278 279 qconf = &lcore_queue_conf[lcore_id]; 280 len = qconf->tx_mbufs[port].len; 281 qconf->tx_mbufs[port].m_table[len] = m; 282 len++; 283 284 /* enough pkts to be sent */ 285 if (unlikely(len == MAX_PKT_BURST)) { 286 lsi_send_burst(qconf, MAX_PKT_BURST, port); 287 len = 0; 288 } 289 290 qconf->tx_mbufs[port].len = len; 291 return 0; 292 } 293 294 static void 295 lsi_simple_forward(struct rte_mbuf *m, unsigned portid) 296 { 297 struct ether_hdr *eth; 298 void *tmp; 299 unsigned dst_port = lsi_dst_ports[portid]; 300 301 eth = rte_pktmbuf_mtod(m, struct ether_hdr *); 302 303 /* 02:00:00:00:00:xx */ 304 tmp = ð->d_addr.addr_bytes[0]; 305 *((uint64_t *)tmp) = 0x000000000002 + ((uint64_t)dst_port << 40); 306 307 /* src addr */ 308 ether_addr_copy(&lsi_ports_eth_addr[dst_port], ð->s_addr); 309 310 lsi_send_packet(m, (uint8_t) dst_port); 311 } 312 313 /* main processing loop */ 314 static void 315 lsi_main_loop(void) 316 { 317 struct rte_mbuf *pkts_burst[MAX_PKT_BURST]; 318 struct rte_mbuf *m; 319 unsigned lcore_id; 320 uint64_t prev_tsc, diff_tsc, cur_tsc, timer_tsc; 321 unsigned i, j, portid, nb_rx; 322 struct lcore_queue_conf *qconf; 323 const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US; 324 325 prev_tsc = 0; 326 timer_tsc = 0; 327 328 lcore_id = rte_lcore_id(); 329 qconf = &lcore_queue_conf[lcore_id]; 330 331 if (qconf->n_rx_port == 0) { 332 RTE_LOG(INFO, LSI, "lcore %u has nothing to do\n", lcore_id); 333 return; 334 } 335 336 RTE_LOG(INFO, LSI, "entering main loop on lcore %u\n", lcore_id); 337 338 for (i = 0; i < qconf->n_rx_port; i++) { 339 340 portid = qconf->rx_port_list[i]; 341 RTE_LOG(INFO, LSI, " -- lcoreid=%u portid=%u\n", lcore_id, 342 portid); 343 } 344 345 while (1) { 346 347 cur_tsc = rte_rdtsc(); 348 349 /* 350 * TX burst queue drain 351 */ 352 diff_tsc = cur_tsc - prev_tsc; 353 if (unlikely(diff_tsc > drain_tsc)) { 354 355 /* this could be optimized (use queueid instead of 356 * portid), but it is not called so often */ 357 for (portid = 0; portid < RTE_MAX_ETHPORTS; portid++) { 358 if (qconf->tx_mbufs[portid].len == 0) 359 continue; 360 lsi_send_burst(&lcore_queue_conf[lcore_id], 361 qconf->tx_mbufs[portid].len, 362 (uint8_t) portid); 363 qconf->tx_mbufs[portid].len = 0; 364 } 365 366 /* if timer is enabled */ 367 if (timer_period > 0) { 368 369 /* advance the timer */ 370 timer_tsc += diff_tsc; 371 372 /* if timer has reached its timeout */ 373 if (unlikely(timer_tsc >= (uint64_t) timer_period)) { 374 375 /* do this only on master core */ 376 if (lcore_id == rte_get_master_lcore()) { 377 print_stats(); 378 /* reset the timer */ 379 timer_tsc = 0; 380 } 381 } 382 } 383 384 prev_tsc = cur_tsc; 385 } 386 387 /* 388 * Read packet from RX queues 389 */ 390 for (i = 0; i < qconf->n_rx_port; i++) { 391 392 portid = qconf->rx_port_list[i]; 393 nb_rx = rte_eth_rx_burst((uint8_t) portid, 0, 394 pkts_burst, MAX_PKT_BURST); 395 396 port_statistics[portid].rx += nb_rx; 397 398 for (j = 0; j < nb_rx; j++) { 399 m = pkts_burst[j]; 400 rte_prefetch0(rte_pktmbuf_mtod(m, void *)); 401 lsi_simple_forward(m, portid); 402 } 403 } 404 } 405 } 406 407 static int 408 lsi_launch_one_lcore(__attribute__((unused)) void *dummy) 409 { 410 lsi_main_loop(); 411 return 0; 412 } 413 414 /* display usage */ 415 static void 416 lsi_usage(const char *prgname) 417 { 418 printf("%s [EAL options] -- -p PORTMASK [-q NQ]\n" 419 " -p PORTMASK: hexadecimal bitmask of ports to configure\n" 420 " -q NQ: number of queue (=ports) per lcore (default is 1)\n" 421 " -T PERIOD: statistics will be refreshed each PERIOD seconds (0 to disable, 10 default, 86400 maximum)\n", 422 prgname); 423 } 424 425 static int 426 lsi_parse_portmask(const char *portmask) 427 { 428 char *end = NULL; 429 unsigned long pm; 430 431 /* parse hexadecimal string */ 432 pm = strtoul(portmask, &end, 16); 433 if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 434 return -1; 435 436 if (pm == 0) 437 return -1; 438 439 return pm; 440 } 441 442 static unsigned int 443 lsi_parse_nqueue(const char *q_arg) 444 { 445 char *end = NULL; 446 unsigned long n; 447 448 /* parse hexadecimal string */ 449 n = strtoul(q_arg, &end, 10); 450 if ((q_arg[0] == '\0') || (end == NULL) || (*end != '\0')) 451 return 0; 452 if (n == 0) 453 return 0; 454 if (n >= MAX_RX_QUEUE_PER_LCORE) 455 return 0; 456 457 return n; 458 } 459 460 static int 461 lsi_parse_timer_period(const char *q_arg) 462 { 463 char *end = NULL; 464 int n; 465 466 /* parse number string */ 467 n = strtol(q_arg, &end, 10); 468 if ((q_arg[0] == '\0') || (end == NULL) || (*end != '\0')) 469 return -1; 470 if (n >= MAX_TIMER_PERIOD) 471 return -1; 472 473 return n; 474 } 475 476 /* Parse the argument given in the command line of the application */ 477 static int 478 lsi_parse_args(int argc, char **argv) 479 { 480 int opt, ret; 481 char **argvopt; 482 int option_index; 483 char *prgname = argv[0]; 484 static struct option lgopts[] = { 485 {NULL, 0, 0, 0} 486 }; 487 488 argvopt = argv; 489 490 while ((opt = getopt_long(argc, argvopt, "p:q:T:", 491 lgopts, &option_index)) != EOF) { 492 493 switch (opt) { 494 /* portmask */ 495 case 'p': 496 lsi_enabled_port_mask = lsi_parse_portmask(optarg); 497 if (lsi_enabled_port_mask == 0) { 498 printf("invalid portmask\n"); 499 lsi_usage(prgname); 500 return -1; 501 } 502 break; 503 504 /* nqueue */ 505 case 'q': 506 lsi_rx_queue_per_lcore = lsi_parse_nqueue(optarg); 507 if (lsi_rx_queue_per_lcore == 0) { 508 printf("invalid queue number\n"); 509 lsi_usage(prgname); 510 return -1; 511 } 512 break; 513 514 /* timer period */ 515 case 'T': 516 timer_period = lsi_parse_timer_period(optarg) * 1000 * TIMER_MILLISECOND; 517 if (timer_period < 0) { 518 printf("invalid timer period\n"); 519 lsi_usage(prgname); 520 return -1; 521 } 522 break; 523 524 /* long options */ 525 case 0: 526 lsi_usage(prgname); 527 return -1; 528 529 default: 530 lsi_usage(prgname); 531 return -1; 532 } 533 } 534 535 if (optind >= 0) 536 argv[optind-1] = prgname; 537 538 ret = optind-1; 539 optind = 0; /* reset getopt lib */ 540 return ret; 541 } 542 543 /** 544 * It will be called as the callback for specified port after a LSI interrupt 545 * has been fully handled. This callback needs to be implemented carefully as 546 * it will be called in the interrupt host thread which is different from the 547 * application main thread. 548 * 549 * @param port_id 550 * Port id. 551 * @param type 552 * event type. 553 * @param param 554 * Pointer to(address of) the parameters. 555 * 556 * @return 557 * void. 558 */ 559 static void 560 lsi_event_callback(uint8_t port_id, enum rte_eth_event_type type, void *param) 561 { 562 struct rte_eth_link link; 563 564 RTE_SET_USED(param); 565 566 printf("\n\nIn registered callback...\n"); 567 printf("Event type: %s\n", type == RTE_ETH_EVENT_INTR_LSC ? "LSC interrupt" : "unknown event"); 568 rte_eth_link_get_nowait(port_id, &link); 569 if (link.link_status) { 570 printf("Port %d Link Up - speed %u Mbps - %s\n\n", 571 port_id, (unsigned)link.link_speed, 572 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ? 573 ("full-duplex") : ("half-duplex")); 574 } else 575 printf("Port %d Link Down\n\n", port_id); 576 } 577 578 /* Check the link status of all ports in up to 9s, and print them finally */ 579 static void 580 check_all_ports_link_status(uint8_t port_num, uint32_t port_mask) 581 { 582 #define CHECK_INTERVAL 100 /* 100ms */ 583 #define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */ 584 uint8_t portid, count, all_ports_up, print_flag = 0; 585 struct rte_eth_link link; 586 587 printf("\nChecking link status"); 588 fflush(stdout); 589 for (count = 0; count <= MAX_CHECK_TIME; count++) { 590 all_ports_up = 1; 591 for (portid = 0; portid < port_num; portid++) { 592 if ((port_mask & (1 << portid)) == 0) 593 continue; 594 memset(&link, 0, sizeof(link)); 595 rte_eth_link_get_nowait(portid, &link); 596 /* print link status if flag set */ 597 if (print_flag == 1) { 598 if (link.link_status) 599 printf("Port %d Link Up - speed %u " 600 "Mbps - %s\n", (uint8_t)portid, 601 (unsigned)link.link_speed, 602 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ? 603 ("full-duplex") : ("half-duplex\n")); 604 else 605 printf("Port %d Link Down\n", 606 (uint8_t)portid); 607 continue; 608 } 609 /* clear all_ports_up flag if any link down */ 610 if (link.link_status == 0) { 611 all_ports_up = 0; 612 break; 613 } 614 } 615 /* after finally printing all link status, get out */ 616 if (print_flag == 1) 617 break; 618 619 if (all_ports_up == 0) { 620 printf("."); 621 fflush(stdout); 622 rte_delay_ms(CHECK_INTERVAL); 623 } 624 625 /* set the print_flag if all ports up or timeout */ 626 if (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) { 627 print_flag = 1; 628 printf("done\n"); 629 } 630 } 631 } 632 633 int 634 MAIN(int argc, char **argv) 635 { 636 struct lcore_queue_conf *qconf; 637 struct rte_eth_dev_info dev_info; 638 int ret; 639 uint8_t nb_ports; 640 uint8_t portid, portid_last = 0; 641 unsigned lcore_id, rx_lcore_id; 642 unsigned nb_ports_in_mask = 0; 643 644 /* init EAL */ 645 ret = rte_eal_init(argc, argv); 646 if (ret < 0) 647 rte_exit(EXIT_FAILURE, "rte_eal_init failed"); 648 argc -= ret; 649 argv += ret; 650 651 /* parse application arguments (after the EAL ones) */ 652 ret = lsi_parse_args(argc, argv); 653 if (ret < 0) 654 rte_exit(EXIT_FAILURE, "Invalid arguments"); 655 656 /* create the mbuf pool */ 657 lsi_pktmbuf_pool = 658 rte_mempool_create("mbuf_pool", NB_MBUF, 659 MBUF_SIZE, 32, 660 sizeof(struct rte_pktmbuf_pool_private), 661 rte_pktmbuf_pool_init, NULL, 662 rte_pktmbuf_init, NULL, 663 rte_socket_id(), 0); 664 if (lsi_pktmbuf_pool == NULL) 665 rte_panic("Cannot init mbuf pool\n"); 666 667 /* init driver(s) */ 668 if (rte_pmd_init_all() < 0) 669 rte_panic("Cannot init pmd\n"); 670 671 if (rte_eal_pci_probe() < 0) 672 rte_panic("Cannot probe PCI\n"); 673 674 nb_ports = rte_eth_dev_count(); 675 if (nb_ports == 0) 676 rte_panic("No Ethernet port - bye\n"); 677 678 if (nb_ports > RTE_MAX_ETHPORTS) 679 nb_ports = RTE_MAX_ETHPORTS; 680 681 /* 682 * Each logical core is assigned a dedicated TX queue on each port. 683 */ 684 for (portid = 0; portid < nb_ports; portid++) { 685 /* skip ports that are not enabled */ 686 if ((lsi_enabled_port_mask & (1 << portid)) == 0) 687 continue; 688 689 /* save the destination port id */ 690 if (nb_ports_in_mask % 2) { 691 lsi_dst_ports[portid] = portid_last; 692 lsi_dst_ports[portid_last] = portid; 693 } 694 else 695 portid_last = portid; 696 697 nb_ports_in_mask++; 698 699 rte_eth_dev_info_get(portid, &dev_info); 700 } 701 if (nb_ports_in_mask < 2 || nb_ports_in_mask % 2) 702 rte_exit(EXIT_FAILURE, "Current enabled port number is %u, " 703 "but it should be even and at least 2\n", 704 nb_ports_in_mask); 705 706 rx_lcore_id = 0; 707 qconf = &lcore_queue_conf[rx_lcore_id]; 708 709 /* Initialize the port/queue configuration of each logical core */ 710 for (portid = 0; portid < nb_ports; portid++) { 711 /* skip ports that are not enabled */ 712 if ((lsi_enabled_port_mask & (1 << portid)) == 0) 713 continue; 714 715 /* get the lcore_id for this port */ 716 while (rte_lcore_is_enabled(rx_lcore_id) == 0 || 717 lcore_queue_conf[rx_lcore_id].n_rx_port == 718 lsi_rx_queue_per_lcore) { 719 720 rx_lcore_id++; 721 if (rx_lcore_id >= RTE_MAX_LCORE) 722 rte_exit(EXIT_FAILURE, "Not enough cores\n"); 723 } 724 if (qconf != &lcore_queue_conf[rx_lcore_id]) 725 /* Assigned a new logical core in the loop above. */ 726 qconf = &lcore_queue_conf[rx_lcore_id]; 727 728 qconf->rx_port_list[qconf->n_rx_port] = portid; 729 qconf->n_rx_port++; 730 printf("Lcore %u: RX port %u\n",rx_lcore_id, (unsigned) portid); 731 } 732 733 /* Initialise each port */ 734 for (portid = 0; portid < nb_ports; portid++) { 735 /* skip ports that are not enabled */ 736 if ((lsi_enabled_port_mask & (1 << portid)) == 0) { 737 printf("Skipping disabled port %u\n", (unsigned) portid); 738 continue; 739 } 740 /* init port */ 741 printf("Initializing port %u... ", (unsigned) portid); 742 fflush(stdout); 743 ret = rte_eth_dev_configure(portid, 1, 1, &port_conf); 744 if (ret < 0) 745 rte_exit(EXIT_FAILURE, "Cannot configure device: err=%d, port=%u\n", 746 ret, (unsigned) portid); 747 748 /* register lsi interrupt callback, need to be after 749 * rte_eth_dev_configure(). if (intr_conf.lsc == 0), no 750 * lsc interrupt will be present, and below callback to 751 * be registered will never be called. 752 */ 753 rte_eth_dev_callback_register(portid, 754 RTE_ETH_EVENT_INTR_LSC, lsi_event_callback, NULL); 755 756 rte_eth_macaddr_get(portid, 757 &lsi_ports_eth_addr[portid]); 758 759 /* init one RX queue */ 760 fflush(stdout); 761 ret = rte_eth_rx_queue_setup(portid, 0, nb_rxd, 762 rte_eth_dev_socket_id(portid), &rx_conf, 763 lsi_pktmbuf_pool); 764 if (ret < 0) 765 rte_exit(EXIT_FAILURE, "rte_eth_rx_queue_setup: err=%d, port=%u\n", 766 ret, (unsigned) portid); 767 768 /* init one TX queue logical core on each port */ 769 fflush(stdout); 770 ret = rte_eth_tx_queue_setup(portid, 0, nb_txd, 771 rte_eth_dev_socket_id(portid), &tx_conf); 772 if (ret < 0) 773 rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d,port=%u\n", 774 ret, (unsigned) portid); 775 776 /* Start device */ 777 ret = rte_eth_dev_start(portid); 778 if (ret < 0) 779 rte_exit(EXIT_FAILURE, "rte_eth_dev_start: err=%d, port=%u\n", 780 ret, (unsigned) portid); 781 printf("done:\n"); 782 783 printf("Port %u, MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n\n", 784 (unsigned) portid, 785 lsi_ports_eth_addr[portid].addr_bytes[0], 786 lsi_ports_eth_addr[portid].addr_bytes[1], 787 lsi_ports_eth_addr[portid].addr_bytes[2], 788 lsi_ports_eth_addr[portid].addr_bytes[3], 789 lsi_ports_eth_addr[portid].addr_bytes[4], 790 lsi_ports_eth_addr[portid].addr_bytes[5]); 791 792 /* initialize port stats */ 793 memset(&port_statistics, 0, sizeof(port_statistics)); 794 } 795 796 check_all_ports_link_status(nb_ports, lsi_enabled_port_mask); 797 798 /* launch per-lcore init on every lcore */ 799 rte_eal_mp_remote_launch(lsi_launch_one_lcore, NULL, CALL_MASTER); 800 RTE_LCORE_FOREACH_SLAVE(lcore_id) { 801 if (rte_eal_wait_lcore(lcore_id) < 0) 802 return -1; 803 } 804 805 return 0; 806 } 807