1 /*- 2 * BSD LICENSE 3 * 4 * Copyright(c) 2010-2013 Intel Corporation. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Intel Corporation nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 #include <stdio.h> 36 #include <stdlib.h> 37 #include <string.h> 38 #include <stdint.h> 39 #include <inttypes.h> 40 #include <sys/types.h> 41 #include <string.h> 42 #include <sys/queue.h> 43 #include <netinet/in.h> 44 #include <setjmp.h> 45 #include <stdarg.h> 46 #include <ctype.h> 47 #include <errno.h> 48 #include <getopt.h> 49 50 #include <rte_common.h> 51 #include <rte_log.h> 52 #include <rte_memory.h> 53 #include <rte_memcpy.h> 54 #include <rte_memzone.h> 55 #include <rte_tailq.h> 56 #include <rte_eal.h> 57 #include <rte_per_lcore.h> 58 #include <rte_launch.h> 59 #include <rte_atomic.h> 60 #include <rte_cycles.h> 61 #include <rte_prefetch.h> 62 #include <rte_lcore.h> 63 #include <rte_per_lcore.h> 64 #include <rte_branch_prediction.h> 65 #include <rte_interrupts.h> 66 #include <rte_pci.h> 67 #include <rte_random.h> 68 #include <rte_debug.h> 69 #include <rte_ether.h> 70 #include <rte_ethdev.h> 71 #include <rte_ring.h> 72 #include <rte_mempool.h> 73 #include <rte_mbuf.h> 74 75 #include "main.h" 76 77 #define RTE_LOGTYPE_LSI RTE_LOGTYPE_USER1 78 79 #define LSI_MAX_PORTS 32 80 81 #define MBUF_SIZE (2048 + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM) 82 #define NB_MBUF 8192 83 84 /* 85 * RX and TX Prefetch, Host, and Write-back threshold values should be 86 * carefully set for optimal performance. Consult the network 87 * controller's datasheet and supporting DPDK documentation for guidance 88 * on how these parameters should be set. 89 */ 90 #define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */ 91 #define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */ 92 #define RX_WTHRESH 4 /**< Default values of RX write-back threshold reg. */ 93 94 /* 95 * These default values are optimized for use with the Intel(R) 82599 10 GbE 96 * Controller and the DPDK ixgbe PMD. Consider using other values for other 97 * network controllers and/or network drivers. 98 */ 99 #define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */ 100 #define TX_HTHRESH 0 /**< Default values of TX host threshold reg. */ 101 #define TX_WTHRESH 0 /**< Default values of TX write-back threshold reg. */ 102 103 #define MAX_PKT_BURST 32 104 #define BURST_TX_DRAIN 200000ULL /* around 100us at 2 Ghz */ 105 106 #define SOCKET0 0 107 108 /* 109 * Configurable number of RX/TX ring descriptors 110 */ 111 #define RTE_TEST_RX_DESC_DEFAULT 128 112 #define RTE_TEST_TX_DESC_DEFAULT 512 113 static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT; 114 static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT; 115 116 /* ethernet addresses of ports */ 117 static struct ether_addr lsi_ports_eth_addr[LSI_MAX_PORTS]; 118 119 /* mask of enabled ports */ 120 static uint32_t lsi_enabled_port_mask = 0; 121 122 static unsigned int lsi_rx_queue_per_lcore = 1; 123 124 /* destination port for L2 forwarding */ 125 static unsigned lsi_dst_ports[LSI_MAX_PORTS] = {0}; 126 127 #define MAX_PKT_BURST 32 128 struct mbuf_table { 129 unsigned len; 130 struct rte_mbuf *m_table[MAX_PKT_BURST]; 131 }; 132 133 #define MAX_RX_QUEUE_PER_LCORE 16 134 #define MAX_TX_QUEUE_PER_PORT 16 135 struct lcore_queue_conf { 136 unsigned n_rx_port; 137 unsigned rx_port_list[MAX_RX_QUEUE_PER_LCORE]; 138 unsigned tx_queue_id; 139 struct mbuf_table tx_mbufs[LSI_MAX_PORTS]; 140 141 } __rte_cache_aligned; 142 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE]; 143 144 static const struct rte_eth_conf port_conf = { 145 .rxmode = { 146 .split_hdr_size = 0, 147 .header_split = 0, /**< Header Split disabled */ 148 .hw_ip_checksum = 0, /**< IP checksum offload disabled */ 149 .hw_vlan_filter = 0, /**< VLAN filtering disabled */ 150 .jumbo_frame = 0, /**< Jumbo Frame Support disabled */ 151 .hw_strip_crc = 0, /**< CRC stripped by hardware */ 152 }, 153 .txmode = { 154 .mq_mode = ETH_DCB_NONE, 155 }, 156 .intr_conf = { 157 .lsc = 1, /**< lsc interrupt feature enabled */ 158 }, 159 }; 160 161 static const struct rte_eth_rxconf rx_conf = { 162 .rx_thresh = { 163 .pthresh = RX_PTHRESH, 164 .hthresh = RX_HTHRESH, 165 .wthresh = RX_WTHRESH, 166 }, 167 }; 168 169 static const struct rte_eth_txconf tx_conf = { 170 .tx_thresh = { 171 .pthresh = TX_PTHRESH, 172 .hthresh = TX_HTHRESH, 173 .wthresh = TX_WTHRESH, 174 }, 175 .tx_free_thresh = 0, /* Use PMD default values */ 176 .tx_rs_thresh = 0, /* Use PMD default values */ 177 }; 178 179 struct rte_mempool * lsi_pktmbuf_pool = NULL; 180 181 /* Per-port statistics struct */ 182 struct lsi_port_statistics { 183 uint64_t tx; 184 uint64_t rx; 185 uint64_t dropped; 186 } __rte_cache_aligned; 187 struct lsi_port_statistics port_statistics[LSI_MAX_PORTS]; 188 189 /* A tsc-based timer responsible for triggering statistics printout */ 190 #define TIMER_MILLISECOND 2000000ULL /* around 1ms at 2 Ghz */ 191 #define MAX_TIMER_PERIOD 86400 /* 1 day max */ 192 static int64_t timer_period = 10 * TIMER_MILLISECOND * 1000; /* default period is 10 seconds */ 193 194 /* Print out statistics on packets dropped */ 195 static void 196 print_stats(void) 197 { 198 struct rte_eth_link link; 199 uint64_t total_packets_dropped, total_packets_tx, total_packets_rx; 200 unsigned portid; 201 202 total_packets_dropped = 0; 203 total_packets_tx = 0; 204 total_packets_rx = 0; 205 206 const char clr[] = { 27, '[', '2', 'J', '\0' }; 207 const char topLeft[] = { 27, '[', '1', ';', '1', 'H','\0' }; 208 209 /* Clear screen and move to top left */ 210 printf("%s%s", clr, topLeft); 211 212 printf("\nPort statistics ===================================="); 213 214 for (portid = 0; portid < LSI_MAX_PORTS; portid++) { 215 /* skip ports that are not enabled */ 216 if ((lsi_enabled_port_mask & (1 << portid)) == 0) 217 continue; 218 219 memset(&link, 0, sizeof(link)); 220 rte_eth_link_get_nowait((uint8_t)portid, &link); 221 printf("\nStatistics for port %u ------------------------------" 222 "\nLink status: %25s" 223 "\nLink speed: %26u" 224 "\nLink duplex: %25s" 225 "\nPackets sent: %24"PRIu64 226 "\nPackets received: %20"PRIu64 227 "\nPackets dropped: %21"PRIu64, 228 portid, 229 (link.link_status ? "Link up" : "Link down"), 230 (unsigned)link.link_speed, 231 (link.link_duplex == ETH_LINK_FULL_DUPLEX ? \ 232 "full-duplex" : "half-duplex"), 233 port_statistics[portid].tx, 234 port_statistics[portid].rx, 235 port_statistics[portid].dropped); 236 237 total_packets_dropped += port_statistics[portid].dropped; 238 total_packets_tx += port_statistics[portid].tx; 239 total_packets_rx += port_statistics[portid].rx; 240 } 241 printf("\nAggregate statistics ===============================" 242 "\nTotal packets sent: %18"PRIu64 243 "\nTotal packets received: %14"PRIu64 244 "\nTotal packets dropped: %15"PRIu64, 245 total_packets_tx, 246 total_packets_rx, 247 total_packets_dropped); 248 printf("\n====================================================\n"); 249 } 250 251 /* Send the packet on an output interface */ 252 static int 253 lsi_send_burst(struct lcore_queue_conf *qconf, unsigned n, uint8_t port) 254 { 255 struct rte_mbuf **m_table; 256 unsigned ret; 257 unsigned queueid; 258 259 queueid = (uint16_t) qconf->tx_queue_id; 260 m_table = (struct rte_mbuf **)qconf->tx_mbufs[port].m_table; 261 262 ret = rte_eth_tx_burst(port, (uint16_t) queueid, m_table, (uint16_t) n); 263 port_statistics[port].tx += ret; 264 if (unlikely(ret < n)) { 265 port_statistics[port].dropped += (n - ret); 266 do { 267 rte_pktmbuf_free(m_table[ret]); 268 } while (++ret < n); 269 } 270 271 return 0; 272 } 273 274 /* Send the packet on an output interface */ 275 static int 276 lsi_send_packet(struct rte_mbuf *m, uint8_t port) 277 { 278 unsigned lcore_id, len; 279 struct lcore_queue_conf *qconf; 280 281 lcore_id = rte_lcore_id(); 282 283 qconf = &lcore_queue_conf[lcore_id]; 284 len = qconf->tx_mbufs[port].len; 285 qconf->tx_mbufs[port].m_table[len] = m; 286 len++; 287 288 /* enough pkts to be sent */ 289 if (unlikely(len == MAX_PKT_BURST)) { 290 lsi_send_burst(qconf, MAX_PKT_BURST, port); 291 len = 0; 292 } 293 294 qconf->tx_mbufs[port].len = len; 295 return 0; 296 } 297 298 static void 299 lsi_simple_forward(struct rte_mbuf *m, unsigned portid) 300 { 301 struct ether_hdr *eth; 302 void *tmp; 303 unsigned dst_port = lsi_dst_ports[portid]; 304 305 eth = rte_pktmbuf_mtod(m, struct ether_hdr *); 306 307 /* 02:00:00:00:00:xx */ 308 tmp = ð->d_addr.addr_bytes[0]; 309 *((uint64_t *)tmp) = 0x000000000002 + ((uint64_t)dst_port << 40); 310 311 /* src addr */ 312 ether_addr_copy(&lsi_ports_eth_addr[dst_port], ð->s_addr); 313 314 lsi_send_packet(m, (uint8_t) dst_port); 315 } 316 317 /* main processing loop */ 318 static void 319 lsi_main_loop(void) 320 { 321 struct rte_mbuf *pkts_burst[MAX_PKT_BURST]; 322 struct rte_mbuf *m; 323 unsigned lcore_id; 324 uint64_t prev_tsc = 0; 325 uint64_t diff_tsc, cur_tsc, timer_tsc; 326 unsigned i, j, portid, nb_rx; 327 struct lcore_queue_conf *qconf; 328 329 timer_tsc = 0; 330 331 lcore_id = rte_lcore_id(); 332 qconf = &lcore_queue_conf[lcore_id]; 333 334 if (qconf->n_rx_port == 0) { 335 RTE_LOG(INFO, LSI, "lcore %u has nothing to do\n", lcore_id); 336 while(1); 337 } 338 339 RTE_LOG(INFO, LSI, "entering main loop on lcore %u\n", lcore_id); 340 341 for (i = 0; i < qconf->n_rx_port; i++) { 342 343 portid = qconf->rx_port_list[i]; 344 RTE_LOG(INFO, LSI, " -- lcoreid=%u portid=%u\n", lcore_id, 345 portid); 346 } 347 348 while (1) { 349 350 cur_tsc = rte_rdtsc(); 351 352 /* 353 * TX burst queue drain 354 */ 355 diff_tsc = cur_tsc - prev_tsc; 356 if (unlikely(diff_tsc > BURST_TX_DRAIN)) { 357 358 /* this could be optimized (use queueid instead of 359 * portid), but it is not called so often */ 360 for (portid = 0; portid < LSI_MAX_PORTS; portid++) { 361 if (qconf->tx_mbufs[portid].len == 0) 362 continue; 363 lsi_send_burst(&lcore_queue_conf[lcore_id], 364 qconf->tx_mbufs[portid].len, 365 (uint8_t) portid); 366 qconf->tx_mbufs[portid].len = 0; 367 } 368 369 /* if timer is enabled */ 370 if (timer_period > 0) { 371 372 /* advance the timer */ 373 timer_tsc += diff_tsc; 374 375 /* if timer has reached its timeout */ 376 if (unlikely(timer_tsc >= (uint64_t) timer_period)) { 377 378 /* do this only on master core */ 379 if (lcore_id == rte_get_master_lcore()) { 380 print_stats(); 381 /* reset the timer */ 382 timer_tsc = 0; 383 } 384 } 385 } 386 387 prev_tsc = cur_tsc; 388 } 389 390 /* 391 * Read packet from RX queues 392 */ 393 for (i = 0; i < qconf->n_rx_port; i++) { 394 395 portid = qconf->rx_port_list[i]; 396 nb_rx = rte_eth_rx_burst((uint8_t) portid, 0, 397 pkts_burst, MAX_PKT_BURST); 398 399 port_statistics[portid].rx += nb_rx; 400 401 for (j = 0; j < nb_rx; j++) { 402 m = pkts_burst[j]; 403 rte_prefetch0(rte_pktmbuf_mtod(m, void *)); 404 lsi_simple_forward(m, portid); 405 } 406 } 407 } 408 } 409 410 static int 411 lsi_launch_one_lcore(__attribute__((unused)) void *dummy) 412 { 413 lsi_main_loop(); 414 return 0; 415 } 416 417 /* display usage */ 418 static void 419 lsi_usage(const char *prgname) 420 { 421 printf("%s [EAL options] -- -p PORTMASK [-q NQ]\n" 422 " -p PORTMASK: hexadecimal bitmask of ports to configure\n" 423 " -q NQ: number of queue (=ports) per lcore (default is 1)\n" 424 " -T PERIOD: statistics will be refreshed each PERIOD seconds (0 to disable, 10 default, 86400 maximum)\n", 425 prgname); 426 } 427 428 static int 429 lsi_parse_portmask(const char *portmask) 430 { 431 char *end = NULL; 432 unsigned long pm; 433 434 /* parse hexadecimal string */ 435 pm = strtoul(portmask, &end, 16); 436 if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 437 return -1; 438 439 if (pm == 0) 440 return -1; 441 442 return pm; 443 } 444 445 static unsigned int 446 lsi_parse_nqueue(const char *q_arg) 447 { 448 char *end = NULL; 449 unsigned long n; 450 451 /* parse hexadecimal string */ 452 n = strtoul(q_arg, &end, 10); 453 if ((q_arg[0] == '\0') || (end == NULL) || (*end != '\0')) 454 return 0; 455 if (n == 0) 456 return 0; 457 if (n >= MAX_RX_QUEUE_PER_LCORE) 458 return 0; 459 460 return n; 461 } 462 463 static int 464 lsi_parse_timer_period(const char *q_arg) 465 { 466 char *end = NULL; 467 int n; 468 469 /* parse number string */ 470 n = strtol(q_arg, &end, 10); 471 if ((q_arg[0] == '\0') || (end == NULL) || (*end != '\0')) 472 return -1; 473 if (n >= MAX_TIMER_PERIOD) 474 return -1; 475 476 return n; 477 } 478 479 /* Parse the argument given in the command line of the application */ 480 static int 481 lsi_parse_args(int argc, char **argv) 482 { 483 int opt, ret; 484 char **argvopt; 485 int option_index; 486 char *prgname = argv[0]; 487 static struct option lgopts[] = { 488 {NULL, 0, 0, 0} 489 }; 490 491 argvopt = argv; 492 493 while ((opt = getopt_long(argc, argvopt, "p:q:T:", 494 lgopts, &option_index)) != EOF) { 495 496 switch (opt) { 497 /* portmask */ 498 case 'p': 499 lsi_enabled_port_mask = lsi_parse_portmask(optarg); 500 if (lsi_enabled_port_mask == 0) { 501 printf("invalid portmask\n"); 502 lsi_usage(prgname); 503 return -1; 504 } 505 break; 506 507 /* nqueue */ 508 case 'q': 509 lsi_rx_queue_per_lcore = lsi_parse_nqueue(optarg); 510 if (lsi_rx_queue_per_lcore == 0) { 511 printf("invalid queue number\n"); 512 lsi_usage(prgname); 513 return -1; 514 } 515 break; 516 517 /* timer period */ 518 case 'T': 519 timer_period = lsi_parse_timer_period(optarg) * 1000 * TIMER_MILLISECOND; 520 if (timer_period < 0) { 521 printf("invalid timer period\n"); 522 lsi_usage(prgname); 523 return -1; 524 } 525 break; 526 527 /* long options */ 528 case 0: 529 lsi_usage(prgname); 530 return -1; 531 532 default: 533 lsi_usage(prgname); 534 return -1; 535 } 536 } 537 538 if (optind >= 0) 539 argv[optind-1] = prgname; 540 541 ret = optind-1; 542 optind = 0; /* reset getopt lib */ 543 return ret; 544 } 545 546 /** 547 * It will be called as the callback for specified port after a LSI interrupt 548 * has been fully handled. This callback needs to be implemented carefully as 549 * it will be called in the interrupt host thread which is different from the 550 * application main thread. 551 * 552 * @param port_id 553 * Port id. 554 * @param type 555 * event type. 556 * @param param 557 * Pointer to(address of) the parameters. 558 * 559 * @return 560 * void. 561 */ 562 static void 563 lsi_event_callback(uint8_t port_id, enum rte_eth_event_type type, void *param) 564 { 565 struct rte_eth_link link; 566 567 RTE_SET_USED(param); 568 569 printf("\n\nIn registered callback...\n"); 570 printf("Event type: %s\n", type == RTE_ETH_EVENT_INTR_LSC ? "LSC interrupt" : "unknown event"); 571 rte_eth_link_get_nowait(port_id, &link); 572 if (link.link_status) { 573 printf("Port %d Link Up - speed %u Mbps - %s\n\n", 574 port_id, (unsigned)link.link_speed, 575 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ? 576 ("full-duplex") : ("half-duplex")); 577 } else 578 printf("Port %d Link Down\n\n", port_id); 579 } 580 581 /* Check the link status of all ports in up to 9s, and print them finally */ 582 static void 583 check_all_ports_link_status(uint8_t port_num, uint32_t port_mask) 584 { 585 #define CHECK_INTERVAL 100 /* 100ms */ 586 #define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */ 587 uint8_t portid, count, all_ports_up, print_flag = 0; 588 struct rte_eth_link link; 589 590 printf("\nChecking link status"); 591 fflush(stdout); 592 for (count = 0; count <= MAX_CHECK_TIME; count++) { 593 all_ports_up = 1; 594 for (portid = 0; portid < port_num; portid++) { 595 if ((port_mask & (1 << portid)) == 0) 596 continue; 597 memset(&link, 0, sizeof(link)); 598 rte_eth_link_get_nowait(portid, &link); 599 /* print link status if flag set */ 600 if (print_flag == 1) { 601 if (link.link_status) 602 printf("Port %d Link Up - speed %u " 603 "Mbps - %s\n", (uint8_t)portid, 604 (unsigned)link.link_speed, 605 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ? 606 ("full-duplex") : ("half-duplex\n")); 607 else 608 printf("Port %d Link Down\n", 609 (uint8_t)portid); 610 continue; 611 } 612 /* clear all_ports_up flag if any link down */ 613 if (link.link_status == 0) { 614 all_ports_up = 0; 615 break; 616 } 617 } 618 /* after finally printing all link status, get out */ 619 if (print_flag == 1) 620 break; 621 622 if (all_ports_up == 0) { 623 printf("."); 624 fflush(stdout); 625 rte_delay_ms(CHECK_INTERVAL); 626 } 627 628 /* set the print_flag if all ports up or timeout */ 629 if (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) { 630 print_flag = 1; 631 printf("done\n"); 632 } 633 } 634 } 635 636 int 637 MAIN(int argc, char **argv) 638 { 639 struct lcore_queue_conf *qconf; 640 struct rte_eth_dev_info dev_info; 641 int ret; 642 unsigned int nb_ports; 643 unsigned portid, portid_last = 0; 644 unsigned lcore_id, rx_lcore_id; 645 unsigned nb_ports_in_mask = 0; 646 647 /* init EAL */ 648 ret = rte_eal_init(argc, argv); 649 if (ret < 0) 650 rte_exit(EXIT_FAILURE, "rte_eal_init failed"); 651 argc -= ret; 652 argv += ret; 653 654 /* parse application arguments (after the EAL ones) */ 655 ret = lsi_parse_args(argc, argv); 656 if (ret < 0) 657 rte_exit(EXIT_FAILURE, "Invalid arguments"); 658 659 /* create the mbuf pool */ 660 lsi_pktmbuf_pool = 661 rte_mempool_create("mbuf_pool", NB_MBUF, 662 MBUF_SIZE, 32, 663 sizeof(struct rte_pktmbuf_pool_private), 664 rte_pktmbuf_pool_init, NULL, 665 rte_pktmbuf_init, NULL, 666 SOCKET0, 0); 667 if (lsi_pktmbuf_pool == NULL) 668 rte_panic("Cannot init mbuf pool\n"); 669 670 /* init driver(s) */ 671 if (rte_pmd_init_all() < 0) 672 rte_panic("Cannot init pmd\n"); 673 674 if (rte_eal_pci_probe() < 0) 675 rte_panic("Cannot probe PCI\n"); 676 677 nb_ports = rte_eth_dev_count(); 678 if (nb_ports == 0) 679 rte_panic("No Ethernet port - bye\n"); 680 681 if (nb_ports > LSI_MAX_PORTS) 682 nb_ports = LSI_MAX_PORTS; 683 684 /* 685 * Each logical core is assigned a dedicated TX queue on each port. 686 */ 687 for (portid = 0; portid < nb_ports; portid++) { 688 /* skip ports that are not enabled */ 689 if ((lsi_enabled_port_mask & (1 << portid)) == 0) 690 continue; 691 692 /* save the destination port id */ 693 if (nb_ports_in_mask % 2) { 694 lsi_dst_ports[portid] = portid_last; 695 lsi_dst_ports[portid_last] = portid; 696 } 697 else 698 portid_last = portid; 699 700 nb_ports_in_mask++; 701 702 rte_eth_dev_info_get((uint8_t) portid, &dev_info); 703 } 704 if (nb_ports_in_mask < 2 || nb_ports_in_mask % 2) 705 rte_exit(EXIT_FAILURE, "Current enabled port number is %u, " 706 "but it should be even and at least 2\n", 707 nb_ports_in_mask); 708 709 rx_lcore_id = 0; 710 qconf = &lcore_queue_conf[rx_lcore_id]; 711 712 /* Initialize the port/queue configuration of each logical core */ 713 for (portid = 0; portid < nb_ports; portid++) { 714 /* skip ports that are not enabled */ 715 if ((lsi_enabled_port_mask & (1 << portid)) == 0) 716 continue; 717 718 /* get the lcore_id for this port */ 719 while (rte_lcore_is_enabled(rx_lcore_id) == 0 || 720 lcore_queue_conf[rx_lcore_id].n_rx_port == 721 lsi_rx_queue_per_lcore) { 722 723 rx_lcore_id++; 724 if (rx_lcore_id >= RTE_MAX_LCORE) 725 rte_exit(EXIT_FAILURE, "Not enough cores\n"); 726 } 727 if (qconf != &lcore_queue_conf[rx_lcore_id]) 728 /* Assigned a new logical core in the loop above. */ 729 qconf = &lcore_queue_conf[rx_lcore_id]; 730 731 qconf->rx_port_list[qconf->n_rx_port] = portid; 732 qconf->n_rx_port++; 733 printf("Lcore %u: RX port %u\n",rx_lcore_id, portid); 734 } 735 736 /* Initialise each port */ 737 for (portid = 0; portid < nb_ports; portid++) { 738 /* skip ports that are not enabled */ 739 if ((lsi_enabled_port_mask & (1 << portid)) == 0) { 740 printf("Skipping disabled port %u\n", portid); 741 continue; 742 } 743 /* init port */ 744 printf("Initializing port %u... ", portid); 745 fflush(stdout); 746 ret = rte_eth_dev_configure((uint8_t) portid, 1, 1, &port_conf); 747 if (ret < 0) 748 rte_exit(EXIT_FAILURE, "Cannot configure device: err=%d, port=%u\n", 749 ret, portid); 750 751 /* register lsi interrupt callback, need to be after 752 * rte_eth_dev_configure(). if (intr_conf.lsc == 0), no 753 * lsc interrupt will be present, and below callback to 754 * be registered will never be called. 755 */ 756 rte_eth_dev_callback_register((uint8_t)portid, 757 RTE_ETH_EVENT_INTR_LSC, lsi_event_callback, NULL); 758 759 rte_eth_macaddr_get((uint8_t) portid, 760 &lsi_ports_eth_addr[portid]); 761 762 /* init one RX queue */ 763 fflush(stdout); 764 ret = rte_eth_rx_queue_setup((uint8_t) portid, 0, nb_rxd, 765 SOCKET0, &rx_conf, 766 lsi_pktmbuf_pool); 767 if (ret < 0) 768 rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d, port=%u\n", 769 ret, portid); 770 771 /* init one TX queue logical core on each port */ 772 fflush(stdout); 773 ret = rte_eth_tx_queue_setup((uint8_t) portid, 0, nb_txd, 774 SOCKET0, &tx_conf); 775 if (ret < 0) 776 rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d,port=%u\n", 777 ret, portid); 778 779 /* Start device */ 780 ret = rte_eth_dev_start((uint8_t) portid); 781 if (ret < 0) 782 rte_exit(EXIT_FAILURE, "rte_eth_dev_start: err=%d, port=%u\n", 783 ret, portid); 784 printf("done:\n"); 785 786 printf("Port %u, MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n\n", 787 portid, 788 lsi_ports_eth_addr[portid].addr_bytes[0], 789 lsi_ports_eth_addr[portid].addr_bytes[1], 790 lsi_ports_eth_addr[portid].addr_bytes[2], 791 lsi_ports_eth_addr[portid].addr_bytes[3], 792 lsi_ports_eth_addr[portid].addr_bytes[4], 793 lsi_ports_eth_addr[portid].addr_bytes[5]); 794 795 /* initialize port stats */ 796 memset(&port_statistics, 0, sizeof(port_statistics)); 797 } 798 799 check_all_ports_link_status((uint8_t)nb_ports, lsi_enabled_port_mask); 800 801 /* launch per-lcore init on every lcore */ 802 rte_eal_mp_remote_launch(lsi_launch_one_lcore, NULL, CALL_MASTER); 803 RTE_LCORE_FOREACH_SLAVE(lcore_id) { 804 if (rte_eal_wait_lcore(lcore_id) < 0) 805 return -1; 806 } 807 808 return 0; 809 } 810