1 /*- 2 * BSD LICENSE 3 * 4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Intel Corporation nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <stdio.h> 35 #include <stdlib.h> 36 #include <string.h> 37 #include <stdint.h> 38 #include <inttypes.h> 39 #include <sys/types.h> 40 #include <string.h> 41 #include <sys/queue.h> 42 #include <netinet/in.h> 43 #include <setjmp.h> 44 #include <stdarg.h> 45 #include <ctype.h> 46 #include <errno.h> 47 #include <getopt.h> 48 49 #include <rte_common.h> 50 #include <rte_log.h> 51 #include <rte_memory.h> 52 #include <rte_memcpy.h> 53 #include <rte_memzone.h> 54 #include <rte_tailq.h> 55 #include <rte_eal.h> 56 #include <rte_per_lcore.h> 57 #include <rte_launch.h> 58 #include <rte_atomic.h> 59 #include <rte_cycles.h> 60 #include <rte_prefetch.h> 61 #include <rte_lcore.h> 62 #include <rte_per_lcore.h> 63 #include <rte_branch_prediction.h> 64 #include <rte_interrupts.h> 65 #include <rte_pci.h> 66 #include <rte_random.h> 67 #include <rte_debug.h> 68 #include <rte_ether.h> 69 #include <rte_ethdev.h> 70 #include <rte_ring.h> 71 #include <rte_mempool.h> 72 #include <rte_mbuf.h> 73 74 #include "main.h" 75 76 #define RTE_LOGTYPE_LSI RTE_LOGTYPE_USER1 77 78 #define MBUF_SIZE (2048 + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM) 79 #define NB_MBUF 8192 80 81 /* 82 * RX and TX Prefetch, Host, and Write-back threshold values should be 83 * carefully set for optimal performance. Consult the network 84 * controller's datasheet and supporting DPDK documentation for guidance 85 * on how these parameters should be set. 86 */ 87 #define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */ 88 #define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */ 89 #define RX_WTHRESH 4 /**< Default values of RX write-back threshold reg. */ 90 91 /* 92 * These default values are optimized for use with the Intel(R) 82599 10 GbE 93 * Controller and the DPDK ixgbe PMD. Consider using other values for other 94 * network controllers and/or network drivers. 95 */ 96 #define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */ 97 #define TX_HTHRESH 0 /**< Default values of TX host threshold reg. */ 98 #define TX_WTHRESH 0 /**< Default values of TX write-back threshold reg. */ 99 100 #define MAX_PKT_BURST 32 101 #define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */ 102 103 /* 104 * Configurable number of RX/TX ring descriptors 105 */ 106 #define RTE_TEST_RX_DESC_DEFAULT 128 107 #define RTE_TEST_TX_DESC_DEFAULT 512 108 static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT; 109 static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT; 110 111 /* ethernet addresses of ports */ 112 static struct ether_addr lsi_ports_eth_addr[RTE_MAX_ETHPORTS]; 113 114 /* mask of enabled ports */ 115 static uint32_t lsi_enabled_port_mask = 0; 116 117 static unsigned int lsi_rx_queue_per_lcore = 1; 118 119 /* destination port for L2 forwarding */ 120 static unsigned lsi_dst_ports[RTE_MAX_ETHPORTS] = {0}; 121 122 #define MAX_PKT_BURST 32 123 struct mbuf_table { 124 unsigned len; 125 struct rte_mbuf *m_table[MAX_PKT_BURST]; 126 }; 127 128 #define MAX_RX_QUEUE_PER_LCORE 16 129 #define MAX_TX_QUEUE_PER_PORT 16 130 struct lcore_queue_conf { 131 unsigned n_rx_port; 132 unsigned rx_port_list[MAX_RX_QUEUE_PER_LCORE]; 133 unsigned tx_queue_id; 134 struct mbuf_table tx_mbufs[RTE_MAX_ETHPORTS]; 135 136 } __rte_cache_aligned; 137 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE]; 138 139 static const struct rte_eth_conf port_conf = { 140 .rxmode = { 141 .split_hdr_size = 0, 142 .header_split = 0, /**< Header Split disabled */ 143 .hw_ip_checksum = 0, /**< IP checksum offload disabled */ 144 .hw_vlan_filter = 0, /**< VLAN filtering disabled */ 145 .jumbo_frame = 0, /**< Jumbo Frame Support disabled */ 146 .hw_strip_crc = 0, /**< CRC stripped by hardware */ 147 }, 148 .txmode = { 149 .mq_mode = ETH_MQ_TX_NONE, 150 }, 151 .intr_conf = { 152 .lsc = 1, /**< lsc interrupt feature enabled */ 153 }, 154 }; 155 156 static const struct rte_eth_rxconf rx_conf = { 157 .rx_thresh = { 158 .pthresh = RX_PTHRESH, 159 .hthresh = RX_HTHRESH, 160 .wthresh = RX_WTHRESH, 161 }, 162 }; 163 164 static const struct rte_eth_txconf tx_conf = { 165 .tx_thresh = { 166 .pthresh = TX_PTHRESH, 167 .hthresh = TX_HTHRESH, 168 .wthresh = TX_WTHRESH, 169 }, 170 .tx_free_thresh = 0, /* Use PMD default values */ 171 .tx_rs_thresh = 0, /* Use PMD default values */ 172 }; 173 174 struct rte_mempool * lsi_pktmbuf_pool = NULL; 175 176 /* Per-port statistics struct */ 177 struct lsi_port_statistics { 178 uint64_t tx; 179 uint64_t rx; 180 uint64_t dropped; 181 } __rte_cache_aligned; 182 struct lsi_port_statistics port_statistics[RTE_MAX_ETHPORTS]; 183 184 /* A tsc-based timer responsible for triggering statistics printout */ 185 #define TIMER_MILLISECOND 2000000ULL /* around 1ms at 2 Ghz */ 186 #define MAX_TIMER_PERIOD 86400 /* 1 day max */ 187 static int64_t timer_period = 10 * TIMER_MILLISECOND * 1000; /* default period is 10 seconds */ 188 189 /* Print out statistics on packets dropped */ 190 static void 191 print_stats(void) 192 { 193 struct rte_eth_link link; 194 uint64_t total_packets_dropped, total_packets_tx, total_packets_rx; 195 unsigned portid; 196 197 total_packets_dropped = 0; 198 total_packets_tx = 0; 199 total_packets_rx = 0; 200 201 const char clr[] = { 27, '[', '2', 'J', '\0' }; 202 const char topLeft[] = { 27, '[', '1', ';', '1', 'H','\0' }; 203 204 /* Clear screen and move to top left */ 205 printf("%s%s", clr, topLeft); 206 207 printf("\nPort statistics ===================================="); 208 209 for (portid = 0; portid < RTE_MAX_ETHPORTS; portid++) { 210 /* skip ports that are not enabled */ 211 if ((lsi_enabled_port_mask & (1 << portid)) == 0) 212 continue; 213 214 memset(&link, 0, sizeof(link)); 215 rte_eth_link_get_nowait((uint8_t)portid, &link); 216 printf("\nStatistics for port %u ------------------------------" 217 "\nLink status: %25s" 218 "\nLink speed: %26u" 219 "\nLink duplex: %25s" 220 "\nPackets sent: %24"PRIu64 221 "\nPackets received: %20"PRIu64 222 "\nPackets dropped: %21"PRIu64, 223 portid, 224 (link.link_status ? "Link up" : "Link down"), 225 (unsigned)link.link_speed, 226 (link.link_duplex == ETH_LINK_FULL_DUPLEX ? \ 227 "full-duplex" : "half-duplex"), 228 port_statistics[portid].tx, 229 port_statistics[portid].rx, 230 port_statistics[portid].dropped); 231 232 total_packets_dropped += port_statistics[portid].dropped; 233 total_packets_tx += port_statistics[portid].tx; 234 total_packets_rx += port_statistics[portid].rx; 235 } 236 printf("\nAggregate statistics ===============================" 237 "\nTotal packets sent: %18"PRIu64 238 "\nTotal packets received: %14"PRIu64 239 "\nTotal packets dropped: %15"PRIu64, 240 total_packets_tx, 241 total_packets_rx, 242 total_packets_dropped); 243 printf("\n====================================================\n"); 244 } 245 246 /* Send the packet on an output interface */ 247 static int 248 lsi_send_burst(struct lcore_queue_conf *qconf, unsigned n, uint8_t port) 249 { 250 struct rte_mbuf **m_table; 251 unsigned ret; 252 unsigned queueid; 253 254 queueid = (uint16_t) qconf->tx_queue_id; 255 m_table = (struct rte_mbuf **)qconf->tx_mbufs[port].m_table; 256 257 ret = rte_eth_tx_burst(port, (uint16_t) queueid, m_table, (uint16_t) n); 258 port_statistics[port].tx += ret; 259 if (unlikely(ret < n)) { 260 port_statistics[port].dropped += (n - ret); 261 do { 262 rte_pktmbuf_free(m_table[ret]); 263 } while (++ret < n); 264 } 265 266 return 0; 267 } 268 269 /* Send the packet on an output interface */ 270 static int 271 lsi_send_packet(struct rte_mbuf *m, uint8_t port) 272 { 273 unsigned lcore_id, len; 274 struct lcore_queue_conf *qconf; 275 276 lcore_id = rte_lcore_id(); 277 278 qconf = &lcore_queue_conf[lcore_id]; 279 len = qconf->tx_mbufs[port].len; 280 qconf->tx_mbufs[port].m_table[len] = m; 281 len++; 282 283 /* enough pkts to be sent */ 284 if (unlikely(len == MAX_PKT_BURST)) { 285 lsi_send_burst(qconf, MAX_PKT_BURST, port); 286 len = 0; 287 } 288 289 qconf->tx_mbufs[port].len = len; 290 return 0; 291 } 292 293 static void 294 lsi_simple_forward(struct rte_mbuf *m, unsigned portid) 295 { 296 struct ether_hdr *eth; 297 void *tmp; 298 unsigned dst_port = lsi_dst_ports[portid]; 299 300 eth = rte_pktmbuf_mtod(m, struct ether_hdr *); 301 302 /* 02:00:00:00:00:xx */ 303 tmp = ð->d_addr.addr_bytes[0]; 304 *((uint64_t *)tmp) = 0x000000000002 + ((uint64_t)dst_port << 40); 305 306 /* src addr */ 307 ether_addr_copy(&lsi_ports_eth_addr[dst_port], ð->s_addr); 308 309 lsi_send_packet(m, (uint8_t) dst_port); 310 } 311 312 /* main processing loop */ 313 static void 314 lsi_main_loop(void) 315 { 316 struct rte_mbuf *pkts_burst[MAX_PKT_BURST]; 317 struct rte_mbuf *m; 318 unsigned lcore_id; 319 uint64_t prev_tsc, diff_tsc, cur_tsc, timer_tsc; 320 unsigned i, j, portid, nb_rx; 321 struct lcore_queue_conf *qconf; 322 const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US; 323 324 prev_tsc = 0; 325 timer_tsc = 0; 326 327 lcore_id = rte_lcore_id(); 328 qconf = &lcore_queue_conf[lcore_id]; 329 330 if (qconf->n_rx_port == 0) { 331 RTE_LOG(INFO, LSI, "lcore %u has nothing to do\n", lcore_id); 332 return; 333 } 334 335 RTE_LOG(INFO, LSI, "entering main loop on lcore %u\n", lcore_id); 336 337 for (i = 0; i < qconf->n_rx_port; i++) { 338 339 portid = qconf->rx_port_list[i]; 340 RTE_LOG(INFO, LSI, " -- lcoreid=%u portid=%u\n", lcore_id, 341 portid); 342 } 343 344 while (1) { 345 346 cur_tsc = rte_rdtsc(); 347 348 /* 349 * TX burst queue drain 350 */ 351 diff_tsc = cur_tsc - prev_tsc; 352 if (unlikely(diff_tsc > drain_tsc)) { 353 354 /* this could be optimized (use queueid instead of 355 * portid), but it is not called so often */ 356 for (portid = 0; portid < RTE_MAX_ETHPORTS; portid++) { 357 if (qconf->tx_mbufs[portid].len == 0) 358 continue; 359 lsi_send_burst(&lcore_queue_conf[lcore_id], 360 qconf->tx_mbufs[portid].len, 361 (uint8_t) portid); 362 qconf->tx_mbufs[portid].len = 0; 363 } 364 365 /* if timer is enabled */ 366 if (timer_period > 0) { 367 368 /* advance the timer */ 369 timer_tsc += diff_tsc; 370 371 /* if timer has reached its timeout */ 372 if (unlikely(timer_tsc >= (uint64_t) timer_period)) { 373 374 /* do this only on master core */ 375 if (lcore_id == rte_get_master_lcore()) { 376 print_stats(); 377 /* reset the timer */ 378 timer_tsc = 0; 379 } 380 } 381 } 382 383 prev_tsc = cur_tsc; 384 } 385 386 /* 387 * Read packet from RX queues 388 */ 389 for (i = 0; i < qconf->n_rx_port; i++) { 390 391 portid = qconf->rx_port_list[i]; 392 nb_rx = rte_eth_rx_burst((uint8_t) portid, 0, 393 pkts_burst, MAX_PKT_BURST); 394 395 port_statistics[portid].rx += nb_rx; 396 397 for (j = 0; j < nb_rx; j++) { 398 m = pkts_burst[j]; 399 rte_prefetch0(rte_pktmbuf_mtod(m, void *)); 400 lsi_simple_forward(m, portid); 401 } 402 } 403 } 404 } 405 406 static int 407 lsi_launch_one_lcore(__attribute__((unused)) void *dummy) 408 { 409 lsi_main_loop(); 410 return 0; 411 } 412 413 /* display usage */ 414 static void 415 lsi_usage(const char *prgname) 416 { 417 printf("%s [EAL options] -- -p PORTMASK [-q NQ]\n" 418 " -p PORTMASK: hexadecimal bitmask of ports to configure\n" 419 " -q NQ: number of queue (=ports) per lcore (default is 1)\n" 420 " -T PERIOD: statistics will be refreshed each PERIOD seconds (0 to disable, 10 default, 86400 maximum)\n", 421 prgname); 422 } 423 424 static int 425 lsi_parse_portmask(const char *portmask) 426 { 427 char *end = NULL; 428 unsigned long pm; 429 430 /* parse hexadecimal string */ 431 pm = strtoul(portmask, &end, 16); 432 if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 433 return -1; 434 435 if (pm == 0) 436 return -1; 437 438 return pm; 439 } 440 441 static unsigned int 442 lsi_parse_nqueue(const char *q_arg) 443 { 444 char *end = NULL; 445 unsigned long n; 446 447 /* parse hexadecimal string */ 448 n = strtoul(q_arg, &end, 10); 449 if ((q_arg[0] == '\0') || (end == NULL) || (*end != '\0')) 450 return 0; 451 if (n == 0) 452 return 0; 453 if (n >= MAX_RX_QUEUE_PER_LCORE) 454 return 0; 455 456 return n; 457 } 458 459 static int 460 lsi_parse_timer_period(const char *q_arg) 461 { 462 char *end = NULL; 463 int n; 464 465 /* parse number string */ 466 n = strtol(q_arg, &end, 10); 467 if ((q_arg[0] == '\0') || (end == NULL) || (*end != '\0')) 468 return -1; 469 if (n >= MAX_TIMER_PERIOD) 470 return -1; 471 472 return n; 473 } 474 475 /* Parse the argument given in the command line of the application */ 476 static int 477 lsi_parse_args(int argc, char **argv) 478 { 479 int opt, ret; 480 char **argvopt; 481 int option_index; 482 char *prgname = argv[0]; 483 static struct option lgopts[] = { 484 {NULL, 0, 0, 0} 485 }; 486 487 argvopt = argv; 488 489 while ((opt = getopt_long(argc, argvopt, "p:q:T:", 490 lgopts, &option_index)) != EOF) { 491 492 switch (opt) { 493 /* portmask */ 494 case 'p': 495 lsi_enabled_port_mask = lsi_parse_portmask(optarg); 496 if (lsi_enabled_port_mask == 0) { 497 printf("invalid portmask\n"); 498 lsi_usage(prgname); 499 return -1; 500 } 501 break; 502 503 /* nqueue */ 504 case 'q': 505 lsi_rx_queue_per_lcore = lsi_parse_nqueue(optarg); 506 if (lsi_rx_queue_per_lcore == 0) { 507 printf("invalid queue number\n"); 508 lsi_usage(prgname); 509 return -1; 510 } 511 break; 512 513 /* timer period */ 514 case 'T': 515 timer_period = lsi_parse_timer_period(optarg) * 1000 * TIMER_MILLISECOND; 516 if (timer_period < 0) { 517 printf("invalid timer period\n"); 518 lsi_usage(prgname); 519 return -1; 520 } 521 break; 522 523 /* long options */ 524 case 0: 525 lsi_usage(prgname); 526 return -1; 527 528 default: 529 lsi_usage(prgname); 530 return -1; 531 } 532 } 533 534 if (optind >= 0) 535 argv[optind-1] = prgname; 536 537 ret = optind-1; 538 optind = 0; /* reset getopt lib */ 539 return ret; 540 } 541 542 /** 543 * It will be called as the callback for specified port after a LSI interrupt 544 * has been fully handled. This callback needs to be implemented carefully as 545 * it will be called in the interrupt host thread which is different from the 546 * application main thread. 547 * 548 * @param port_id 549 * Port id. 550 * @param type 551 * event type. 552 * @param param 553 * Pointer to(address of) the parameters. 554 * 555 * @return 556 * void. 557 */ 558 static void 559 lsi_event_callback(uint8_t port_id, enum rte_eth_event_type type, void *param) 560 { 561 struct rte_eth_link link; 562 563 RTE_SET_USED(param); 564 565 printf("\n\nIn registered callback...\n"); 566 printf("Event type: %s\n", type == RTE_ETH_EVENT_INTR_LSC ? "LSC interrupt" : "unknown event"); 567 rte_eth_link_get_nowait(port_id, &link); 568 if (link.link_status) { 569 printf("Port %d Link Up - speed %u Mbps - %s\n\n", 570 port_id, (unsigned)link.link_speed, 571 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ? 572 ("full-duplex") : ("half-duplex")); 573 } else 574 printf("Port %d Link Down\n\n", port_id); 575 } 576 577 /* Check the link status of all ports in up to 9s, and print them finally */ 578 static void 579 check_all_ports_link_status(uint8_t port_num, uint32_t port_mask) 580 { 581 #define CHECK_INTERVAL 100 /* 100ms */ 582 #define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */ 583 uint8_t portid, count, all_ports_up, print_flag = 0; 584 struct rte_eth_link link; 585 586 printf("\nChecking link status"); 587 fflush(stdout); 588 for (count = 0; count <= MAX_CHECK_TIME; count++) { 589 all_ports_up = 1; 590 for (portid = 0; portid < port_num; portid++) { 591 if ((port_mask & (1 << portid)) == 0) 592 continue; 593 memset(&link, 0, sizeof(link)); 594 rte_eth_link_get_nowait(portid, &link); 595 /* print link status if flag set */ 596 if (print_flag == 1) { 597 if (link.link_status) 598 printf("Port %d Link Up - speed %u " 599 "Mbps - %s\n", (uint8_t)portid, 600 (unsigned)link.link_speed, 601 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ? 602 ("full-duplex") : ("half-duplex\n")); 603 else 604 printf("Port %d Link Down\n", 605 (uint8_t)portid); 606 continue; 607 } 608 /* clear all_ports_up flag if any link down */ 609 if (link.link_status == 0) { 610 all_ports_up = 0; 611 break; 612 } 613 } 614 /* after finally printing all link status, get out */ 615 if (print_flag == 1) 616 break; 617 618 if (all_ports_up == 0) { 619 printf("."); 620 fflush(stdout); 621 rte_delay_ms(CHECK_INTERVAL); 622 } 623 624 /* set the print_flag if all ports up or timeout */ 625 if (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) { 626 print_flag = 1; 627 printf("done\n"); 628 } 629 } 630 } 631 632 int 633 MAIN(int argc, char **argv) 634 { 635 struct lcore_queue_conf *qconf; 636 struct rte_eth_dev_info dev_info; 637 int ret; 638 uint8_t nb_ports; 639 uint8_t portid, portid_last = 0; 640 unsigned lcore_id, rx_lcore_id; 641 unsigned nb_ports_in_mask = 0; 642 643 /* init EAL */ 644 ret = rte_eal_init(argc, argv); 645 if (ret < 0) 646 rte_exit(EXIT_FAILURE, "rte_eal_init failed"); 647 argc -= ret; 648 argv += ret; 649 650 /* parse application arguments (after the EAL ones) */ 651 ret = lsi_parse_args(argc, argv); 652 if (ret < 0) 653 rte_exit(EXIT_FAILURE, "Invalid arguments"); 654 655 /* create the mbuf pool */ 656 lsi_pktmbuf_pool = 657 rte_mempool_create("mbuf_pool", NB_MBUF, 658 MBUF_SIZE, 32, 659 sizeof(struct rte_pktmbuf_pool_private), 660 rte_pktmbuf_pool_init, NULL, 661 rte_pktmbuf_init, NULL, 662 rte_socket_id(), 0); 663 if (lsi_pktmbuf_pool == NULL) 664 rte_panic("Cannot init mbuf pool\n"); 665 666 nb_ports = rte_eth_dev_count(); 667 if (nb_ports == 0) 668 rte_panic("No Ethernet port - bye\n"); 669 670 if (nb_ports > RTE_MAX_ETHPORTS) 671 nb_ports = RTE_MAX_ETHPORTS; 672 673 /* 674 * Each logical core is assigned a dedicated TX queue on each port. 675 */ 676 for (portid = 0; portid < nb_ports; portid++) { 677 /* skip ports that are not enabled */ 678 if ((lsi_enabled_port_mask & (1 << portid)) == 0) 679 continue; 680 681 /* save the destination port id */ 682 if (nb_ports_in_mask % 2) { 683 lsi_dst_ports[portid] = portid_last; 684 lsi_dst_ports[portid_last] = portid; 685 } 686 else 687 portid_last = portid; 688 689 nb_ports_in_mask++; 690 691 rte_eth_dev_info_get(portid, &dev_info); 692 } 693 if (nb_ports_in_mask < 2 || nb_ports_in_mask % 2) 694 rte_exit(EXIT_FAILURE, "Current enabled port number is %u, " 695 "but it should be even and at least 2\n", 696 nb_ports_in_mask); 697 698 rx_lcore_id = 0; 699 qconf = &lcore_queue_conf[rx_lcore_id]; 700 701 /* Initialize the port/queue configuration of each logical core */ 702 for (portid = 0; portid < nb_ports; portid++) { 703 /* skip ports that are not enabled */ 704 if ((lsi_enabled_port_mask & (1 << portid)) == 0) 705 continue; 706 707 /* get the lcore_id for this port */ 708 while (rte_lcore_is_enabled(rx_lcore_id) == 0 || 709 lcore_queue_conf[rx_lcore_id].n_rx_port == 710 lsi_rx_queue_per_lcore) { 711 712 rx_lcore_id++; 713 if (rx_lcore_id >= RTE_MAX_LCORE) 714 rte_exit(EXIT_FAILURE, "Not enough cores\n"); 715 } 716 if (qconf != &lcore_queue_conf[rx_lcore_id]) 717 /* Assigned a new logical core in the loop above. */ 718 qconf = &lcore_queue_conf[rx_lcore_id]; 719 720 qconf->rx_port_list[qconf->n_rx_port] = portid; 721 qconf->n_rx_port++; 722 printf("Lcore %u: RX port %u\n",rx_lcore_id, (unsigned) portid); 723 } 724 725 /* Initialise each port */ 726 for (portid = 0; portid < nb_ports; portid++) { 727 /* skip ports that are not enabled */ 728 if ((lsi_enabled_port_mask & (1 << portid)) == 0) { 729 printf("Skipping disabled port %u\n", (unsigned) portid); 730 continue; 731 } 732 /* init port */ 733 printf("Initializing port %u... ", (unsigned) portid); 734 fflush(stdout); 735 ret = rte_eth_dev_configure(portid, 1, 1, &port_conf); 736 if (ret < 0) 737 rte_exit(EXIT_FAILURE, "Cannot configure device: err=%d, port=%u\n", 738 ret, (unsigned) portid); 739 740 /* register lsi interrupt callback, need to be after 741 * rte_eth_dev_configure(). if (intr_conf.lsc == 0), no 742 * lsc interrupt will be present, and below callback to 743 * be registered will never be called. 744 */ 745 rte_eth_dev_callback_register(portid, 746 RTE_ETH_EVENT_INTR_LSC, lsi_event_callback, NULL); 747 748 rte_eth_macaddr_get(portid, 749 &lsi_ports_eth_addr[portid]); 750 751 /* init one RX queue */ 752 fflush(stdout); 753 ret = rte_eth_rx_queue_setup(portid, 0, nb_rxd, 754 rte_eth_dev_socket_id(portid), &rx_conf, 755 lsi_pktmbuf_pool); 756 if (ret < 0) 757 rte_exit(EXIT_FAILURE, "rte_eth_rx_queue_setup: err=%d, port=%u\n", 758 ret, (unsigned) portid); 759 760 /* init one TX queue logical core on each port */ 761 fflush(stdout); 762 ret = rte_eth_tx_queue_setup(portid, 0, nb_txd, 763 rte_eth_dev_socket_id(portid), &tx_conf); 764 if (ret < 0) 765 rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d,port=%u\n", 766 ret, (unsigned) portid); 767 768 /* Start device */ 769 ret = rte_eth_dev_start(portid); 770 if (ret < 0) 771 rte_exit(EXIT_FAILURE, "rte_eth_dev_start: err=%d, port=%u\n", 772 ret, (unsigned) portid); 773 printf("done:\n"); 774 775 printf("Port %u, MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n\n", 776 (unsigned) portid, 777 lsi_ports_eth_addr[portid].addr_bytes[0], 778 lsi_ports_eth_addr[portid].addr_bytes[1], 779 lsi_ports_eth_addr[portid].addr_bytes[2], 780 lsi_ports_eth_addr[portid].addr_bytes[3], 781 lsi_ports_eth_addr[portid].addr_bytes[4], 782 lsi_ports_eth_addr[portid].addr_bytes[5]); 783 784 /* initialize port stats */ 785 memset(&port_statistics, 0, sizeof(port_statistics)); 786 } 787 788 check_all_ports_link_status(nb_ports, lsi_enabled_port_mask); 789 790 /* launch per-lcore init on every lcore */ 791 rte_eal_mp_remote_launch(lsi_launch_one_lcore, NULL, CALL_MASTER); 792 RTE_LCORE_FOREACH_SLAVE(lcore_id) { 793 if (rte_eal_wait_lcore(lcore_id) < 0) 794 return -1; 795 } 796 797 return 0; 798 } 799