xref: /dpdk/examples/l3fwd-power/main.c (revision 98a1648109b8dbaa4e6b821c17d1f6bd86d33a9a)
1d7937e2eSIntel /*-
2d7937e2eSIntel  *   BSD LICENSE
3d7937e2eSIntel  *
4e9d48c00SBruce Richardson  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5d7937e2eSIntel  *   All rights reserved.
6d7937e2eSIntel  *
7d7937e2eSIntel  *   Redistribution and use in source and binary forms, with or without
8d7937e2eSIntel  *   modification, are permitted provided that the following conditions
9d7937e2eSIntel  *   are met:
10d7937e2eSIntel  *
11d7937e2eSIntel  *     * Redistributions of source code must retain the above copyright
12d7937e2eSIntel  *       notice, this list of conditions and the following disclaimer.
13d7937e2eSIntel  *     * Redistributions in binary form must reproduce the above copyright
14d7937e2eSIntel  *       notice, this list of conditions and the following disclaimer in
15d7937e2eSIntel  *       the documentation and/or other materials provided with the
16d7937e2eSIntel  *       distribution.
17d7937e2eSIntel  *     * Neither the name of Intel Corporation nor the names of its
18d7937e2eSIntel  *       contributors may be used to endorse or promote products derived
19d7937e2eSIntel  *       from this software without specific prior written permission.
20d7937e2eSIntel  *
21d7937e2eSIntel  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22d7937e2eSIntel  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23d7937e2eSIntel  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24d7937e2eSIntel  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25d7937e2eSIntel  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26d7937e2eSIntel  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27d7937e2eSIntel  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28d7937e2eSIntel  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29d7937e2eSIntel  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30d7937e2eSIntel  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31d7937e2eSIntel  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32d7937e2eSIntel  */
33d7937e2eSIntel 
34d7937e2eSIntel #include <stdio.h>
35d7937e2eSIntel #include <stdlib.h>
36d7937e2eSIntel #include <stdint.h>
37d7937e2eSIntel #include <inttypes.h>
38d7937e2eSIntel #include <sys/types.h>
39d7937e2eSIntel #include <string.h>
40d7937e2eSIntel #include <sys/queue.h>
41d7937e2eSIntel #include <stdarg.h>
42d7937e2eSIntel #include <errno.h>
43d7937e2eSIntel #include <getopt.h>
44d7937e2eSIntel #include <unistd.h>
45d7937e2eSIntel #include <signal.h>
46d7937e2eSIntel 
47d7937e2eSIntel #include <rte_common.h>
48d7937e2eSIntel #include <rte_byteorder.h>
49d7937e2eSIntel #include <rte_log.h>
50d7937e2eSIntel #include <rte_memory.h>
51d7937e2eSIntel #include <rte_memcpy.h>
52d7937e2eSIntel #include <rte_memzone.h>
53d7937e2eSIntel #include <rte_tailq.h>
54d7937e2eSIntel #include <rte_eal.h>
55d7937e2eSIntel #include <rte_per_lcore.h>
56d7937e2eSIntel #include <rte_launch.h>
57d7937e2eSIntel #include <rte_atomic.h>
58d7937e2eSIntel #include <rte_cycles.h>
59d7937e2eSIntel #include <rte_prefetch.h>
60d7937e2eSIntel #include <rte_lcore.h>
61d7937e2eSIntel #include <rte_per_lcore.h>
62d7937e2eSIntel #include <rte_branch_prediction.h>
63d7937e2eSIntel #include <rte_interrupts.h>
64d7937e2eSIntel #include <rte_pci.h>
65d7937e2eSIntel #include <rte_random.h>
66d7937e2eSIntel #include <rte_debug.h>
67d7937e2eSIntel #include <rte_ether.h>
68d7937e2eSIntel #include <rte_ethdev.h>
69d7937e2eSIntel #include <rte_ring.h>
70d7937e2eSIntel #include <rte_mempool.h>
71d7937e2eSIntel #include <rte_mbuf.h>
72d7937e2eSIntel #include <rte_ip.h>
73d7937e2eSIntel #include <rte_tcp.h>
74d7937e2eSIntel #include <rte_udp.h>
75d7937e2eSIntel #include <rte_string_fns.h>
76d7937e2eSIntel #include <rte_timer.h>
77d7937e2eSIntel #include <rte_power.h>
78d7937e2eSIntel 
79d7937e2eSIntel #define RTE_LOGTYPE_L3FWD_POWER RTE_LOGTYPE_USER1
80d7937e2eSIntel 
81d7937e2eSIntel #define MAX_PKT_BURST 32
82d7937e2eSIntel 
83d7937e2eSIntel #define MIN_ZERO_POLL_COUNT 5
84d7937e2eSIntel 
85d7937e2eSIntel /* around 100ms at 2 Ghz */
86d7937e2eSIntel #define TIMER_RESOLUTION_CYCLES           200000000ULL
87d7937e2eSIntel /* 100 ms interval */
88d7937e2eSIntel #define TIMER_NUMBER_PER_SECOND           10
89d7937e2eSIntel /* 100000 us */
90d7937e2eSIntel #define SCALING_PERIOD                    (1000000/TIMER_NUMBER_PER_SECOND)
91d7937e2eSIntel #define SCALING_DOWN_TIME_RATIO_THRESHOLD 0.25
92d7937e2eSIntel 
93d7937e2eSIntel #define APP_LOOKUP_EXACT_MATCH          0
94d7937e2eSIntel #define APP_LOOKUP_LPM                  1
95d7937e2eSIntel #define DO_RFC_1812_CHECKS
96d7937e2eSIntel 
97d7937e2eSIntel #ifndef APP_LOOKUP_METHOD
98d7937e2eSIntel #define APP_LOOKUP_METHOD             APP_LOOKUP_LPM
99d7937e2eSIntel #endif
100d7937e2eSIntel 
101d7937e2eSIntel #if (APP_LOOKUP_METHOD == APP_LOOKUP_EXACT_MATCH)
102d7937e2eSIntel #include <rte_hash.h>
103d7937e2eSIntel #elif (APP_LOOKUP_METHOD == APP_LOOKUP_LPM)
104d7937e2eSIntel #include <rte_lpm.h>
105d7937e2eSIntel #else
106d7937e2eSIntel #error "APP_LOOKUP_METHOD set to incorrect value"
107d7937e2eSIntel #endif
108d7937e2eSIntel 
109d7937e2eSIntel #ifndef IPv6_BYTES
110d7937e2eSIntel #define IPv6_BYTES_FMT "%02x%02x:%02x%02x:%02x%02x:%02x%02x:"\
111d7937e2eSIntel                        "%02x%02x:%02x%02x:%02x%02x:%02x%02x"
112d7937e2eSIntel #define IPv6_BYTES(addr) \
113d7937e2eSIntel 	addr[0],  addr[1], addr[2],  addr[3], \
114d7937e2eSIntel 	addr[4],  addr[5], addr[6],  addr[7], \
115d7937e2eSIntel 	addr[8],  addr[9], addr[10], addr[11],\
116d7937e2eSIntel 	addr[12], addr[13],addr[14], addr[15]
117d7937e2eSIntel #endif
118d7937e2eSIntel 
119d7937e2eSIntel #define MAX_JUMBO_PKT_LEN  9600
120d7937e2eSIntel 
121d7937e2eSIntel #define IPV6_ADDR_LEN 16
122d7937e2eSIntel 
123d7937e2eSIntel #define MEMPOOL_CACHE_SIZE 256
124d7937e2eSIntel 
125d7937e2eSIntel #define MBUF_SIZE (2048 + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM)
126d7937e2eSIntel 
127d7937e2eSIntel /*
128d7937e2eSIntel  * This expression is used to calculate the number of mbufs needed depending on
129d7937e2eSIntel  * user input, taking into account memory for rx and tx hardware rings, cache
130d7937e2eSIntel  * per lcore and mtable per port per lcore. RTE_MAX is used to ensure that
131d7937e2eSIntel  * NB_MBUF never goes below a minimum value of 8192.
132d7937e2eSIntel  */
133d7937e2eSIntel 
134d7937e2eSIntel #define NB_MBUF RTE_MAX	( \
135d7937e2eSIntel 	(nb_ports*nb_rx_queue*RTE_TEST_RX_DESC_DEFAULT + \
136d7937e2eSIntel 	nb_ports*nb_lcores*MAX_PKT_BURST + \
137d7937e2eSIntel 	nb_ports*n_tx_queue*RTE_TEST_TX_DESC_DEFAULT + \
138d7937e2eSIntel 	nb_lcores*MEMPOOL_CACHE_SIZE), \
139d7937e2eSIntel 	(unsigned)8192)
140d7937e2eSIntel 
141d7937e2eSIntel #define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
142d7937e2eSIntel 
143d7937e2eSIntel #define NB_SOCKETS 8
144d7937e2eSIntel 
145d7937e2eSIntel /* Configure how many packets ahead to prefetch, when reading packets */
146d7937e2eSIntel #define PREFETCH_OFFSET	3
147d7937e2eSIntel 
148d7937e2eSIntel /*
149d7937e2eSIntel  * Configurable number of RX/TX ring descriptors
150d7937e2eSIntel  */
151d7937e2eSIntel #define RTE_TEST_RX_DESC_DEFAULT 128
152d7937e2eSIntel #define RTE_TEST_TX_DESC_DEFAULT 512
153d7937e2eSIntel static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
154d7937e2eSIntel static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;
155d7937e2eSIntel 
156d7937e2eSIntel /* ethernet addresses of ports */
157d7937e2eSIntel static struct ether_addr ports_eth_addr[RTE_MAX_ETHPORTS];
158d7937e2eSIntel 
159d7937e2eSIntel /* mask of enabled ports */
160d7937e2eSIntel static uint32_t enabled_port_mask = 0;
161d7937e2eSIntel /* Ports set in promiscuous mode off by default. */
162d7937e2eSIntel static int promiscuous_on = 0;
163d7937e2eSIntel /* NUMA is enabled by default. */
164d7937e2eSIntel static int numa_on = 1;
165d7937e2eSIntel 
166d7937e2eSIntel enum freq_scale_hint_t
167d7937e2eSIntel {
168d7937e2eSIntel 	FREQ_LOWER    =      -1,
169d7937e2eSIntel 	FREQ_CURRENT  =       0,
170d7937e2eSIntel 	FREQ_HIGHER   =       1,
171d7937e2eSIntel 	FREQ_HIGHEST  =       2
172d7937e2eSIntel };
173d7937e2eSIntel 
174d7937e2eSIntel struct mbuf_table {
175d7937e2eSIntel 	uint16_t len;
176d7937e2eSIntel 	struct rte_mbuf *m_table[MAX_PKT_BURST];
177d7937e2eSIntel };
178d7937e2eSIntel 
179d7937e2eSIntel struct lcore_rx_queue {
180d7937e2eSIntel 	uint8_t port_id;
181d7937e2eSIntel 	uint8_t queue_id;
182d7937e2eSIntel 	enum freq_scale_hint_t freq_up_hint;
183d7937e2eSIntel 	uint32_t zero_rx_packet_count;
184d7937e2eSIntel 	uint32_t idle_hint;
185d7937e2eSIntel } __rte_cache_aligned;
186d7937e2eSIntel 
187d7937e2eSIntel #define MAX_RX_QUEUE_PER_LCORE 16
188d7937e2eSIntel #define MAX_TX_QUEUE_PER_PORT RTE_MAX_ETHPORTS
189d7937e2eSIntel #define MAX_RX_QUEUE_PER_PORT 128
190d7937e2eSIntel 
191d7937e2eSIntel #define MAX_LCORE_PARAMS 1024
192d7937e2eSIntel struct lcore_params {
193d7937e2eSIntel 	uint8_t port_id;
194d7937e2eSIntel 	uint8_t queue_id;
195d7937e2eSIntel 	uint8_t lcore_id;
196d7937e2eSIntel } __rte_cache_aligned;
197d7937e2eSIntel 
198d7937e2eSIntel static struct lcore_params lcore_params_array[MAX_LCORE_PARAMS];
199d7937e2eSIntel static struct lcore_params lcore_params_array_default[] = {
200d7937e2eSIntel 	{0, 0, 2},
201d7937e2eSIntel 	{0, 1, 2},
202d7937e2eSIntel 	{0, 2, 2},
203d7937e2eSIntel 	{1, 0, 2},
204d7937e2eSIntel 	{1, 1, 2},
205d7937e2eSIntel 	{1, 2, 2},
206d7937e2eSIntel 	{2, 0, 2},
207d7937e2eSIntel 	{3, 0, 3},
208d7937e2eSIntel 	{3, 1, 3},
209d7937e2eSIntel };
210d7937e2eSIntel 
211d7937e2eSIntel static struct lcore_params * lcore_params = lcore_params_array_default;
212d7937e2eSIntel static uint16_t nb_lcore_params = sizeof(lcore_params_array_default) /
213d7937e2eSIntel 				sizeof(lcore_params_array_default[0]);
214d7937e2eSIntel 
215d7937e2eSIntel static struct rte_eth_conf port_conf = {
216d7937e2eSIntel 	.rxmode = {
21713c4ebd6SBruce Richardson 		.mq_mode	= ETH_MQ_RX_RSS,
218d7937e2eSIntel 		.max_rx_pkt_len = ETHER_MAX_LEN,
219d7937e2eSIntel 		.split_hdr_size = 0,
220d7937e2eSIntel 		.header_split   = 0, /**< Header Split disabled */
221d7937e2eSIntel 		.hw_ip_checksum = 1, /**< IP checksum offload enabled */
222d7937e2eSIntel 		.hw_vlan_filter = 0, /**< VLAN filtering disabled */
223d7937e2eSIntel 		.jumbo_frame    = 0, /**< Jumbo Frame Support disabled */
224d7937e2eSIntel 		.hw_strip_crc   = 0, /**< CRC stripped by hardware */
225d7937e2eSIntel 	},
226d7937e2eSIntel 	.rx_adv_conf = {
227d7937e2eSIntel 		.rss_conf = {
228d7937e2eSIntel 			.rss_key = NULL,
2298a387fa8SHelin Zhang 			.rss_hf = ETH_RSS_IP,
230d7937e2eSIntel 		},
231d7937e2eSIntel 	},
232d7937e2eSIntel 	.txmode = {
233d7937e2eSIntel 		.mq_mode = ETH_DCB_NONE,
234d7937e2eSIntel 	},
235d7937e2eSIntel };
236d7937e2eSIntel 
237d7937e2eSIntel static struct rte_mempool * pktmbuf_pool[NB_SOCKETS];
238d7937e2eSIntel 
239d7937e2eSIntel 
240d7937e2eSIntel #if (APP_LOOKUP_METHOD == APP_LOOKUP_EXACT_MATCH)
241d7937e2eSIntel 
242d7937e2eSIntel #ifdef RTE_MACHINE_CPUFLAG_SSE4_2
243d7937e2eSIntel #include <rte_hash_crc.h>
244d7937e2eSIntel #define DEFAULT_HASH_FUNC       rte_hash_crc
245d7937e2eSIntel #else
246d7937e2eSIntel #include <rte_jhash.h>
247d7937e2eSIntel #define DEFAULT_HASH_FUNC       rte_jhash
248d7937e2eSIntel #endif
249d7937e2eSIntel 
250d7937e2eSIntel struct ipv4_5tuple {
251d7937e2eSIntel 	uint32_t ip_dst;
252d7937e2eSIntel 	uint32_t ip_src;
253d7937e2eSIntel 	uint16_t port_dst;
254d7937e2eSIntel 	uint16_t port_src;
255d7937e2eSIntel 	uint8_t  proto;
256d7937e2eSIntel } __attribute__((__packed__));
257d7937e2eSIntel 
258d7937e2eSIntel struct ipv6_5tuple {
259d7937e2eSIntel 	uint8_t  ip_dst[IPV6_ADDR_LEN];
260d7937e2eSIntel 	uint8_t  ip_src[IPV6_ADDR_LEN];
261d7937e2eSIntel 	uint16_t port_dst;
262d7937e2eSIntel 	uint16_t port_src;
263d7937e2eSIntel 	uint8_t  proto;
264d7937e2eSIntel } __attribute__((__packed__));
265d7937e2eSIntel 
266d7937e2eSIntel struct ipv4_l3fwd_route {
267d7937e2eSIntel 	struct ipv4_5tuple key;
268d7937e2eSIntel 	uint8_t if_out;
269d7937e2eSIntel };
270d7937e2eSIntel 
271d7937e2eSIntel struct ipv6_l3fwd_route {
272d7937e2eSIntel 	struct ipv6_5tuple key;
273d7937e2eSIntel 	uint8_t if_out;
274d7937e2eSIntel };
275d7937e2eSIntel 
276d7937e2eSIntel static struct ipv4_l3fwd_route ipv4_l3fwd_route_array[] = {
277d7937e2eSIntel 	{{IPv4(100,10,0,1), IPv4(200,10,0,1), 101, 11, IPPROTO_TCP}, 0},
278d7937e2eSIntel 	{{IPv4(100,20,0,2), IPv4(200,20,0,2), 102, 12, IPPROTO_TCP}, 1},
279d7937e2eSIntel 	{{IPv4(100,30,0,3), IPv4(200,30,0,3), 103, 13, IPPROTO_TCP}, 2},
280d7937e2eSIntel 	{{IPv4(100,40,0,4), IPv4(200,40,0,4), 104, 14, IPPROTO_TCP}, 3},
281d7937e2eSIntel };
282d7937e2eSIntel 
283d7937e2eSIntel static struct ipv6_l3fwd_route ipv6_l3fwd_route_array[] = {
284d7937e2eSIntel 	{
285d7937e2eSIntel 		{
286d7937e2eSIntel 			{0xfe, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
287d7937e2eSIntel 			 0x02, 0x1b, 0x21, 0xff, 0xfe, 0x91, 0x38, 0x05},
288d7937e2eSIntel 			{0xfe, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
289d7937e2eSIntel 			 0x02, 0x1e, 0x67, 0xff, 0xfe, 0x0d, 0xb6, 0x0a},
290d7937e2eSIntel 			 1, 10, IPPROTO_UDP
291d7937e2eSIntel 		}, 4
292d7937e2eSIntel 	},
293d7937e2eSIntel };
294d7937e2eSIntel 
295d7937e2eSIntel typedef struct rte_hash lookup_struct_t;
296d7937e2eSIntel static lookup_struct_t *ipv4_l3fwd_lookup_struct[NB_SOCKETS];
297d7937e2eSIntel static lookup_struct_t *ipv6_l3fwd_lookup_struct[NB_SOCKETS];
298d7937e2eSIntel 
299d7937e2eSIntel #define L3FWD_HASH_ENTRIES	1024
300d7937e2eSIntel 
301d7937e2eSIntel #define IPV4_L3FWD_NUM_ROUTES \
302d7937e2eSIntel 	(sizeof(ipv4_l3fwd_route_array) / sizeof(ipv4_l3fwd_route_array[0]))
303d7937e2eSIntel 
304d7937e2eSIntel #define IPV6_L3FWD_NUM_ROUTES \
305d7937e2eSIntel 	(sizeof(ipv6_l3fwd_route_array) / sizeof(ipv6_l3fwd_route_array[0]))
306d7937e2eSIntel 
307d7937e2eSIntel static uint8_t ipv4_l3fwd_out_if[L3FWD_HASH_ENTRIES] __rte_cache_aligned;
308d7937e2eSIntel static uint8_t ipv6_l3fwd_out_if[L3FWD_HASH_ENTRIES] __rte_cache_aligned;
309d7937e2eSIntel #endif
310d7937e2eSIntel 
311d7937e2eSIntel #if (APP_LOOKUP_METHOD == APP_LOOKUP_LPM)
312d7937e2eSIntel struct ipv4_l3fwd_route {
313d7937e2eSIntel 	uint32_t ip;
314d7937e2eSIntel 	uint8_t  depth;
315d7937e2eSIntel 	uint8_t  if_out;
316d7937e2eSIntel };
317d7937e2eSIntel 
318d7937e2eSIntel static struct ipv4_l3fwd_route ipv4_l3fwd_route_array[] = {
319d7937e2eSIntel 	{IPv4(1,1,1,0), 24, 0},
320d7937e2eSIntel 	{IPv4(2,1,1,0), 24, 1},
321d7937e2eSIntel 	{IPv4(3,1,1,0), 24, 2},
322d7937e2eSIntel 	{IPv4(4,1,1,0), 24, 3},
323d7937e2eSIntel 	{IPv4(5,1,1,0), 24, 4},
324d7937e2eSIntel 	{IPv4(6,1,1,0), 24, 5},
325d7937e2eSIntel 	{IPv4(7,1,1,0), 24, 6},
326d7937e2eSIntel 	{IPv4(8,1,1,0), 24, 7},
327d7937e2eSIntel };
328d7937e2eSIntel 
329d7937e2eSIntel #define IPV4_L3FWD_NUM_ROUTES \
330d7937e2eSIntel 	(sizeof(ipv4_l3fwd_route_array) / sizeof(ipv4_l3fwd_route_array[0]))
331d7937e2eSIntel 
332d7937e2eSIntel #define IPV4_L3FWD_LPM_MAX_RULES     1024
333d7937e2eSIntel 
334d7937e2eSIntel typedef struct rte_lpm lookup_struct_t;
335d7937e2eSIntel static lookup_struct_t *ipv4_l3fwd_lookup_struct[NB_SOCKETS];
336d7937e2eSIntel #endif
337d7937e2eSIntel 
338d7937e2eSIntel struct lcore_conf {
339d7937e2eSIntel 	uint16_t n_rx_queue;
340d7937e2eSIntel 	struct lcore_rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
341d7937e2eSIntel 	uint16_t tx_queue_id[RTE_MAX_ETHPORTS];
342d7937e2eSIntel 	struct mbuf_table tx_mbufs[RTE_MAX_ETHPORTS];
343d7937e2eSIntel 	lookup_struct_t * ipv4_lookup_struct;
344d7937e2eSIntel 	lookup_struct_t * ipv6_lookup_struct;
345d7937e2eSIntel } __rte_cache_aligned;
346d7937e2eSIntel 
347d7937e2eSIntel struct lcore_stats {
348d7937e2eSIntel 	/* total sleep time in ms since last frequency scaling down */
349d7937e2eSIntel 	uint32_t sleep_time;
350d7937e2eSIntel 	/* number of long sleep recently */
351d7937e2eSIntel 	uint32_t nb_long_sleep;
352d7937e2eSIntel 	/* freq. scaling up trend */
353d7937e2eSIntel 	uint32_t trend;
354d7937e2eSIntel 	/* total packet processed recently */
355d7937e2eSIntel 	uint64_t nb_rx_processed;
356d7937e2eSIntel 	/* total iterations looped recently */
357d7937e2eSIntel 	uint64_t nb_iteration_looped;
358d7937e2eSIntel 	uint32_t padding[9];
359d7937e2eSIntel } __rte_cache_aligned;
360d7937e2eSIntel 
361d7937e2eSIntel static struct lcore_conf lcore_conf[RTE_MAX_LCORE] __rte_cache_aligned;
362d7937e2eSIntel static struct lcore_stats stats[RTE_MAX_LCORE] __rte_cache_aligned;
363d7937e2eSIntel static struct rte_timer power_timers[RTE_MAX_LCORE];
364d7937e2eSIntel 
365d7937e2eSIntel static inline uint32_t power_idle_heuristic(uint32_t zero_rx_packet_count);
366d7937e2eSIntel static inline enum freq_scale_hint_t power_freq_scaleup_heuristic( \
367b451aa39SIntel 			unsigned lcore_id, uint8_t port_id, uint16_t queue_id);
368d7937e2eSIntel 
369d7937e2eSIntel /* exit signal handler */
370d7937e2eSIntel static void
371d7937e2eSIntel signal_exit_now(int sigtype)
372d7937e2eSIntel {
373d7937e2eSIntel 	unsigned lcore_id;
374d7937e2eSIntel 	int ret;
375d7937e2eSIntel 
376d7937e2eSIntel 	if (sigtype == SIGINT) {
377d7937e2eSIntel 		for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
378d7937e2eSIntel 			if (rte_lcore_is_enabled(lcore_id) == 0)
379d7937e2eSIntel 				continue;
380d7937e2eSIntel 
381d7937e2eSIntel 			/* init power management library */
382d7937e2eSIntel 			ret = rte_power_exit(lcore_id);
383d7937e2eSIntel 			if (ret)
384d7937e2eSIntel 				rte_exit(EXIT_FAILURE, "Power management "
385d7937e2eSIntel 					"library de-initialization failed on "
386d7937e2eSIntel 							"core%u\n", lcore_id);
387d7937e2eSIntel 		}
388d7937e2eSIntel 	}
389d7937e2eSIntel 
390d7937e2eSIntel 	rte_exit(EXIT_SUCCESS, "User forced exit\n");
391d7937e2eSIntel }
392d7937e2eSIntel 
393d7937e2eSIntel /*  Freqency scale down timer callback */
394d7937e2eSIntel static void
395d7937e2eSIntel power_timer_cb(__attribute__((unused)) struct rte_timer *tim,
396d7937e2eSIntel 			  __attribute__((unused)) void *arg)
397d7937e2eSIntel {
398d7937e2eSIntel 	uint64_t hz;
399d7937e2eSIntel 	float sleep_time_ratio;
400d7937e2eSIntel 	unsigned lcore_id = rte_lcore_id();
401d7937e2eSIntel 
402d7937e2eSIntel 	/* accumulate total execution time in us when callback is invoked */
403d7937e2eSIntel 	sleep_time_ratio = (float)(stats[lcore_id].sleep_time) /
404d7937e2eSIntel 					(float)SCALING_PERIOD;
405d7937e2eSIntel 
406d7937e2eSIntel 	/**
407d7937e2eSIntel 	 * check whether need to scale down frequency a step if it sleep a lot.
408d7937e2eSIntel 	 */
409d7937e2eSIntel 	if (sleep_time_ratio >= SCALING_DOWN_TIME_RATIO_THRESHOLD)
410d7937e2eSIntel 		rte_power_freq_down(lcore_id);
411d7937e2eSIntel 	else if ( (unsigned)(stats[lcore_id].nb_rx_processed /
412d7937e2eSIntel 		stats[lcore_id].nb_iteration_looped) < MAX_PKT_BURST)
413d7937e2eSIntel 		/**
414d7937e2eSIntel 		 * scale down a step if average packet per iteration less
415d7937e2eSIntel 		 * than expectation.
416d7937e2eSIntel 		 */
417d7937e2eSIntel 		rte_power_freq_down(lcore_id);
418d7937e2eSIntel 
419d7937e2eSIntel 	/**
420d7937e2eSIntel 	 * initialize another timer according to current frequency to ensure
421d7937e2eSIntel 	 * timer interval is relatively fixed.
422d7937e2eSIntel 	 */
423d7937e2eSIntel 	hz = rte_get_timer_hz();
424d7937e2eSIntel 	rte_timer_reset(&power_timers[lcore_id], hz/TIMER_NUMBER_PER_SECOND,
425d7937e2eSIntel 				SINGLE, lcore_id, power_timer_cb, NULL);
426d7937e2eSIntel 
427d7937e2eSIntel 	stats[lcore_id].nb_rx_processed = 0;
428d7937e2eSIntel 	stats[lcore_id].nb_iteration_looped = 0;
429d7937e2eSIntel 
430d7937e2eSIntel 	stats[lcore_id].sleep_time = 0;
431d7937e2eSIntel }
432d7937e2eSIntel 
433d7937e2eSIntel /* Send burst of packets on an output interface */
434d7937e2eSIntel static inline int
435d7937e2eSIntel send_burst(struct lcore_conf *qconf, uint16_t n, uint8_t port)
436d7937e2eSIntel {
437d7937e2eSIntel 	struct rte_mbuf **m_table;
438d7937e2eSIntel 	int ret;
439d7937e2eSIntel 	uint16_t queueid;
440d7937e2eSIntel 
441d7937e2eSIntel 	queueid = qconf->tx_queue_id[port];
442d7937e2eSIntel 	m_table = (struct rte_mbuf **)qconf->tx_mbufs[port].m_table;
443d7937e2eSIntel 
444d7937e2eSIntel 	ret = rte_eth_tx_burst(port, queueid, m_table, n);
445d7937e2eSIntel 	if (unlikely(ret < n)) {
446d7937e2eSIntel 		do {
447d7937e2eSIntel 			rte_pktmbuf_free(m_table[ret]);
448d7937e2eSIntel 		} while (++ret < n);
449d7937e2eSIntel 	}
450d7937e2eSIntel 
451d7937e2eSIntel 	return 0;
452d7937e2eSIntel }
453d7937e2eSIntel 
454d7937e2eSIntel /* Enqueue a single packet, and send burst if queue is filled */
455d7937e2eSIntel static inline int
456d7937e2eSIntel send_single_packet(struct rte_mbuf *m, uint8_t port)
457d7937e2eSIntel {
458d7937e2eSIntel 	uint32_t lcore_id;
459d7937e2eSIntel 	uint16_t len;
460d7937e2eSIntel 	struct lcore_conf *qconf;
461d7937e2eSIntel 
462d7937e2eSIntel 	lcore_id = rte_lcore_id();
463d7937e2eSIntel 
464d7937e2eSIntel 	qconf = &lcore_conf[lcore_id];
465d7937e2eSIntel 	len = qconf->tx_mbufs[port].len;
466d7937e2eSIntel 	qconf->tx_mbufs[port].m_table[len] = m;
467d7937e2eSIntel 	len++;
468d7937e2eSIntel 
469d7937e2eSIntel 	/* enough pkts to be sent */
470d7937e2eSIntel 	if (unlikely(len == MAX_PKT_BURST)) {
471d7937e2eSIntel 		send_burst(qconf, MAX_PKT_BURST, port);
472d7937e2eSIntel 		len = 0;
473d7937e2eSIntel 	}
474d7937e2eSIntel 
475d7937e2eSIntel 	qconf->tx_mbufs[port].len = len;
476d7937e2eSIntel 	return 0;
477d7937e2eSIntel }
478d7937e2eSIntel 
479d7937e2eSIntel #ifdef DO_RFC_1812_CHECKS
480d7937e2eSIntel static inline int
481d7937e2eSIntel is_valid_ipv4_pkt(struct ipv4_hdr *pkt, uint32_t link_len)
482d7937e2eSIntel {
483d7937e2eSIntel 	/* From http://www.rfc-editor.org/rfc/rfc1812.txt section 5.2.2 */
484d7937e2eSIntel 	/*
485d7937e2eSIntel 	 * 1. The packet length reported by the Link Layer must be large
486d7937e2eSIntel 	 * enough to hold the minimum length legal IP datagram (20 bytes).
487d7937e2eSIntel 	 */
488d7937e2eSIntel 	if (link_len < sizeof(struct ipv4_hdr))
489d7937e2eSIntel 		return -1;
490d7937e2eSIntel 
491d7937e2eSIntel 	/* 2. The IP checksum must be correct. */
492d7937e2eSIntel 	/* this is checked in H/W */
493d7937e2eSIntel 
494d7937e2eSIntel 	/*
495d7937e2eSIntel 	 * 3. The IP version number must be 4. If the version number is not 4
496d7937e2eSIntel 	 * then the packet may be another version of IP, such as IPng or
497d7937e2eSIntel 	 * ST-II.
498d7937e2eSIntel 	 */
499d7937e2eSIntel 	if (((pkt->version_ihl) >> 4) != 4)
500d7937e2eSIntel 		return -3;
501d7937e2eSIntel 	/*
502d7937e2eSIntel 	 * 4. The IP header length field must be large enough to hold the
503d7937e2eSIntel 	 * minimum length legal IP datagram (20 bytes = 5 words).
504d7937e2eSIntel 	 */
505d7937e2eSIntel 	if ((pkt->version_ihl & 0xf) < 5)
506d7937e2eSIntel 		return -4;
507d7937e2eSIntel 
508d7937e2eSIntel 	/*
509d7937e2eSIntel 	 * 5. The IP total length field must be large enough to hold the IP
510d7937e2eSIntel 	 * datagram header, whose length is specified in the IP header length
511d7937e2eSIntel 	 * field.
512d7937e2eSIntel 	 */
513d7937e2eSIntel 	if (rte_cpu_to_be_16(pkt->total_length) < sizeof(struct ipv4_hdr))
514d7937e2eSIntel 		return -5;
515d7937e2eSIntel 
516d7937e2eSIntel 	return 0;
517d7937e2eSIntel }
518d7937e2eSIntel #endif
519d7937e2eSIntel 
520d7937e2eSIntel #if (APP_LOOKUP_METHOD == APP_LOOKUP_EXACT_MATCH)
521d7937e2eSIntel static void
522d7937e2eSIntel print_ipv4_key(struct ipv4_5tuple key)
523d7937e2eSIntel {
524d7937e2eSIntel 	printf("IP dst = %08x, IP src = %08x, port dst = %d, port src = %d, "
525d7937e2eSIntel 		"proto = %d\n", (unsigned)key.ip_dst, (unsigned)key.ip_src,
526d7937e2eSIntel 				key.port_dst, key.port_src, key.proto);
527d7937e2eSIntel }
528d7937e2eSIntel static void
529d7937e2eSIntel print_ipv6_key(struct ipv6_5tuple key)
530d7937e2eSIntel {
531d7937e2eSIntel 	printf( "IP dst = " IPv6_BYTES_FMT ", IP src = " IPv6_BYTES_FMT ", "
532d7937e2eSIntel 	        "port dst = %d, port src = %d, proto = %d\n",
533d7937e2eSIntel 	        IPv6_BYTES(key.ip_dst), IPv6_BYTES(key.ip_src),
534d7937e2eSIntel 	        key.port_dst, key.port_src, key.proto);
535d7937e2eSIntel }
536d7937e2eSIntel 
537d7937e2eSIntel static inline uint8_t
538d7937e2eSIntel get_ipv4_dst_port(struct ipv4_hdr *ipv4_hdr, uint8_t portid,
539d7937e2eSIntel 		lookup_struct_t * ipv4_l3fwd_lookup_struct)
540d7937e2eSIntel {
541d7937e2eSIntel 	struct ipv4_5tuple key;
542d7937e2eSIntel 	struct tcp_hdr *tcp;
543d7937e2eSIntel 	struct udp_hdr *udp;
544d7937e2eSIntel 	int ret = 0;
545d7937e2eSIntel 
546d7937e2eSIntel 	key.ip_dst = rte_be_to_cpu_32(ipv4_hdr->dst_addr);
547d7937e2eSIntel 	key.ip_src = rte_be_to_cpu_32(ipv4_hdr->src_addr);
548d7937e2eSIntel 	key.proto = ipv4_hdr->next_proto_id;
549d7937e2eSIntel 
550d7937e2eSIntel 	switch (ipv4_hdr->next_proto_id) {
551d7937e2eSIntel 	case IPPROTO_TCP:
552d7937e2eSIntel 		tcp = (struct tcp_hdr *)((unsigned char *)ipv4_hdr +
553d7937e2eSIntel 					sizeof(struct ipv4_hdr));
554d7937e2eSIntel 		key.port_dst = rte_be_to_cpu_16(tcp->dst_port);
555d7937e2eSIntel 		key.port_src = rte_be_to_cpu_16(tcp->src_port);
556d7937e2eSIntel 		break;
557d7937e2eSIntel 
558d7937e2eSIntel 	case IPPROTO_UDP:
559d7937e2eSIntel 		udp = (struct udp_hdr *)((unsigned char *)ipv4_hdr +
560d7937e2eSIntel 					sizeof(struct ipv4_hdr));
561d7937e2eSIntel 		key.port_dst = rte_be_to_cpu_16(udp->dst_port);
562d7937e2eSIntel 		key.port_src = rte_be_to_cpu_16(udp->src_port);
563d7937e2eSIntel 		break;
564d7937e2eSIntel 
565d7937e2eSIntel 	default:
566d7937e2eSIntel 		key.port_dst = 0;
567d7937e2eSIntel 		key.port_src = 0;
568d7937e2eSIntel 		break;
569d7937e2eSIntel 	}
570d7937e2eSIntel 
571d7937e2eSIntel 	/* Find destination port */
572d7937e2eSIntel 	ret = rte_hash_lookup(ipv4_l3fwd_lookup_struct, (const void *)&key);
573d7937e2eSIntel 	return (uint8_t)((ret < 0)? portid : ipv4_l3fwd_out_if[ret]);
574d7937e2eSIntel }
575d7937e2eSIntel 
576d7937e2eSIntel static inline uint8_t
577d7937e2eSIntel get_ipv6_dst_port(struct ipv6_hdr *ipv6_hdr,  uint8_t portid,
578d7937e2eSIntel 			lookup_struct_t *ipv6_l3fwd_lookup_struct)
579d7937e2eSIntel {
580d7937e2eSIntel 	struct ipv6_5tuple key;
581d7937e2eSIntel 	struct tcp_hdr *tcp;
582d7937e2eSIntel 	struct udp_hdr *udp;
583d7937e2eSIntel 	int ret = 0;
584d7937e2eSIntel 
585d7937e2eSIntel 	memcpy(key.ip_dst, ipv6_hdr->dst_addr, IPV6_ADDR_LEN);
586d7937e2eSIntel 	memcpy(key.ip_src, ipv6_hdr->src_addr, IPV6_ADDR_LEN);
587d7937e2eSIntel 
588d7937e2eSIntel 	key.proto = ipv6_hdr->proto;
589d7937e2eSIntel 
590d7937e2eSIntel 	switch (ipv6_hdr->proto) {
591d7937e2eSIntel 	case IPPROTO_TCP:
592d7937e2eSIntel 		tcp = (struct tcp_hdr *)((unsigned char *) ipv6_hdr +
593d7937e2eSIntel 					sizeof(struct ipv6_hdr));
594d7937e2eSIntel 		key.port_dst = rte_be_to_cpu_16(tcp->dst_port);
595d7937e2eSIntel 		key.port_src = rte_be_to_cpu_16(tcp->src_port);
596d7937e2eSIntel 		break;
597d7937e2eSIntel 
598d7937e2eSIntel 	case IPPROTO_UDP:
599d7937e2eSIntel 		udp = (struct udp_hdr *)((unsigned char *) ipv6_hdr +
600d7937e2eSIntel 					sizeof(struct ipv6_hdr));
601d7937e2eSIntel 		key.port_dst = rte_be_to_cpu_16(udp->dst_port);
602d7937e2eSIntel 		key.port_src = rte_be_to_cpu_16(udp->src_port);
603d7937e2eSIntel 		break;
604d7937e2eSIntel 
605d7937e2eSIntel 	default:
606d7937e2eSIntel 		key.port_dst = 0;
607d7937e2eSIntel 		key.port_src = 0;
608d7937e2eSIntel 		break;
609d7937e2eSIntel 	}
610d7937e2eSIntel 
611d7937e2eSIntel 	/* Find destination port */
612d7937e2eSIntel 	ret = rte_hash_lookup(ipv6_l3fwd_lookup_struct, (const void *)&key);
613d7937e2eSIntel 	return (uint8_t)((ret < 0)? portid : ipv6_l3fwd_out_if[ret]);
614d7937e2eSIntel }
615d7937e2eSIntel #endif
616d7937e2eSIntel 
617d7937e2eSIntel #if (APP_LOOKUP_METHOD == APP_LOOKUP_LPM)
618d7937e2eSIntel static inline uint8_t
619d7937e2eSIntel get_ipv4_dst_port(struct ipv4_hdr *ipv4_hdr, uint8_t portid,
620d7937e2eSIntel 		lookup_struct_t *ipv4_l3fwd_lookup_struct)
621d7937e2eSIntel {
622d7937e2eSIntel 	uint8_t next_hop;
623d7937e2eSIntel 
624d7937e2eSIntel 	return (uint8_t) ((rte_lpm_lookup(ipv4_l3fwd_lookup_struct,
625d7937e2eSIntel 			rte_be_to_cpu_32(ipv4_hdr->dst_addr), &next_hop) == 0)?
626d7937e2eSIntel 			next_hop : portid);
627d7937e2eSIntel }
628d7937e2eSIntel #endif
629d7937e2eSIntel 
630d7937e2eSIntel static inline void
631d7937e2eSIntel l3fwd_simple_forward(struct rte_mbuf *m, uint8_t portid,
632d7937e2eSIntel 				struct lcore_conf *qconf)
633d7937e2eSIntel {
634d7937e2eSIntel 	struct ether_hdr *eth_hdr;
635d7937e2eSIntel 	struct ipv4_hdr *ipv4_hdr;
636d7937e2eSIntel 	void *d_addr_bytes;
637d7937e2eSIntel 	uint8_t dst_port;
638d7937e2eSIntel 
639d7937e2eSIntel 	eth_hdr = rte_pktmbuf_mtod(m, struct ether_hdr *);
640d7937e2eSIntel 
641d7937e2eSIntel 	if (m->ol_flags & PKT_RX_IPV4_HDR) {
642d7937e2eSIntel 		/* Handle IPv4 headers.*/
643d7937e2eSIntel 		ipv4_hdr =
644d7937e2eSIntel 			(struct ipv4_hdr *)(rte_pktmbuf_mtod(m, unsigned char*)
645d7937e2eSIntel 						+ sizeof(struct ether_hdr));
646d7937e2eSIntel 
647d7937e2eSIntel #ifdef DO_RFC_1812_CHECKS
648d7937e2eSIntel 		/* Check to make sure the packet is valid (RFC1812) */
649ea672a8bSOlivier Matz 		if (is_valid_ipv4_pkt(ipv4_hdr, m->pkt_len) < 0) {
650d7937e2eSIntel 			rte_pktmbuf_free(m);
651d7937e2eSIntel 			return;
652d7937e2eSIntel 		}
653d7937e2eSIntel #endif
654d7937e2eSIntel 
655d7937e2eSIntel 		dst_port = get_ipv4_dst_port(ipv4_hdr, portid,
656d7937e2eSIntel 					qconf->ipv4_lookup_struct);
657d7937e2eSIntel 		if (dst_port >= RTE_MAX_ETHPORTS ||
658d7937e2eSIntel 				(enabled_port_mask & 1 << dst_port) == 0)
659d7937e2eSIntel 			dst_port = portid;
660d7937e2eSIntel 
661d7937e2eSIntel 		/* 02:00:00:00:00:xx */
662d7937e2eSIntel 		d_addr_bytes = &eth_hdr->d_addr.addr_bytes[0];
663d7937e2eSIntel 		*((uint64_t *)d_addr_bytes) =
664d7937e2eSIntel 			0x000000000002 + ((uint64_t)dst_port << 40);
665d7937e2eSIntel 
666d7937e2eSIntel #ifdef DO_RFC_1812_CHECKS
667d7937e2eSIntel 		/* Update time to live and header checksum */
668d7937e2eSIntel 		--(ipv4_hdr->time_to_live);
669d7937e2eSIntel 		++(ipv4_hdr->hdr_checksum);
670d7937e2eSIntel #endif
671d7937e2eSIntel 
672d7937e2eSIntel 		/* src addr */
673d7937e2eSIntel 		ether_addr_copy(&ports_eth_addr[dst_port], &eth_hdr->s_addr);
674d7937e2eSIntel 
675d7937e2eSIntel 		send_single_packet(m, dst_port);
676d7937e2eSIntel 	}
677d7937e2eSIntel 	else {
678d7937e2eSIntel 		/* Handle IPv6 headers.*/
679d7937e2eSIntel #if (APP_LOOKUP_METHOD == APP_LOOKUP_EXACT_MATCH)
680d7937e2eSIntel 		struct ipv6_hdr *ipv6_hdr;
681d7937e2eSIntel 
682d7937e2eSIntel 		ipv6_hdr =
683d7937e2eSIntel 			(struct ipv6_hdr *)(rte_pktmbuf_mtod(m, unsigned char*)
684d7937e2eSIntel 						+ sizeof(struct ether_hdr));
685d7937e2eSIntel 
686d7937e2eSIntel 		dst_port = get_ipv6_dst_port(ipv6_hdr, portid,
687d7937e2eSIntel 					qconf->ipv6_lookup_struct);
688d7937e2eSIntel 
689d7937e2eSIntel 		if (dst_port >= RTE_MAX_ETHPORTS ||
690d7937e2eSIntel 				(enabled_port_mask & 1 << dst_port) == 0)
691d7937e2eSIntel 			dst_port = portid;
692d7937e2eSIntel 
693d7937e2eSIntel 		/* 02:00:00:00:00:xx */
694d7937e2eSIntel 		d_addr_bytes = &eth_hdr->d_addr.addr_bytes[0];
695d7937e2eSIntel 		*((uint64_t *)d_addr_bytes) =
696d7937e2eSIntel 			0x000000000002 + ((uint64_t)dst_port << 40);
697d7937e2eSIntel 
698d7937e2eSIntel 		/* src addr */
699d7937e2eSIntel 		ether_addr_copy(&ports_eth_addr[dst_port], &eth_hdr->s_addr);
700d7937e2eSIntel 
701d7937e2eSIntel 		send_single_packet(m, dst_port);
702d7937e2eSIntel #else
703d7937e2eSIntel 		/* We don't currently handle IPv6 packets in LPM mode. */
704d7937e2eSIntel 		rte_pktmbuf_free(m);
705d7937e2eSIntel #endif
706d7937e2eSIntel 	}
707d7937e2eSIntel 
708d7937e2eSIntel }
709d7937e2eSIntel 
710d7937e2eSIntel #define SLEEP_GEAR1_THRESHOLD            100
711d7937e2eSIntel #define SLEEP_GEAR2_THRESHOLD            1000
712d7937e2eSIntel 
713d7937e2eSIntel static inline uint32_t
714d7937e2eSIntel power_idle_heuristic(uint32_t zero_rx_packet_count)
715d7937e2eSIntel {
716d7937e2eSIntel 	/* If zero count is less than 100, use it as the sleep time in us */
717d7937e2eSIntel 	if (zero_rx_packet_count < SLEEP_GEAR1_THRESHOLD)
718d7937e2eSIntel 		return zero_rx_packet_count;
719d7937e2eSIntel 	/* If zero count is less than 1000, sleep time should be 100 us */
720d7937e2eSIntel 	else if ((zero_rx_packet_count >= SLEEP_GEAR1_THRESHOLD) &&
721d7937e2eSIntel 			(zero_rx_packet_count < SLEEP_GEAR2_THRESHOLD))
722d7937e2eSIntel 		return SLEEP_GEAR1_THRESHOLD;
723d7937e2eSIntel 	/* If zero count is greater than 1000, sleep time should be 1000 us */
724d7937e2eSIntel 	else if (zero_rx_packet_count >= SLEEP_GEAR2_THRESHOLD)
725d7937e2eSIntel 		return SLEEP_GEAR2_THRESHOLD;
726d7937e2eSIntel 
727d7937e2eSIntel 	return 0;
728d7937e2eSIntel }
729d7937e2eSIntel 
730d7937e2eSIntel static inline enum freq_scale_hint_t
731b451aa39SIntel power_freq_scaleup_heuristic(unsigned lcore_id,
732b451aa39SIntel 			     uint8_t port_id,
733b451aa39SIntel 			     uint16_t queue_id)
734d7937e2eSIntel {
735d7937e2eSIntel /**
736d7937e2eSIntel  * HW Rx queue size is 128 by default, Rx burst read at maximum 32 entries
737d7937e2eSIntel  * per iteration
738d7937e2eSIntel  */
739d7937e2eSIntel #define FREQ_GEAR1_RX_PACKET_THRESHOLD             MAX_PKT_BURST
740b451aa39SIntel #define FREQ_GEAR2_RX_PACKET_THRESHOLD             (MAX_PKT_BURST*2)
741b451aa39SIntel #define FREQ_GEAR3_RX_PACKET_THRESHOLD             (MAX_PKT_BURST*3)
742d7937e2eSIntel #define FREQ_UP_TREND1_ACC   1
743d7937e2eSIntel #define FREQ_UP_TREND2_ACC   100
744d7937e2eSIntel #define FREQ_UP_THRESHOLD    10000
745d7937e2eSIntel 
746b451aa39SIntel 	if (likely(rte_eth_rx_descriptor_done(port_id, queue_id,
747b451aa39SIntel 			FREQ_GEAR3_RX_PACKET_THRESHOLD) > 0)) {
748d7937e2eSIntel 		stats[lcore_id].trend = 0;
749d7937e2eSIntel 		return FREQ_HIGHEST;
750b451aa39SIntel 	} else if (likely(rte_eth_rx_descriptor_done(port_id, queue_id,
751b451aa39SIntel 			FREQ_GEAR2_RX_PACKET_THRESHOLD) > 0))
752d7937e2eSIntel 		stats[lcore_id].trend += FREQ_UP_TREND2_ACC;
753b451aa39SIntel 	else if (likely(rte_eth_rx_descriptor_done(port_id, queue_id,
754b451aa39SIntel 			FREQ_GEAR1_RX_PACKET_THRESHOLD) > 0))
755d7937e2eSIntel 		stats[lcore_id].trend += FREQ_UP_TREND1_ACC;
756d7937e2eSIntel 
757b451aa39SIntel 	if (likely(stats[lcore_id].trend > FREQ_UP_THRESHOLD)) {
758d7937e2eSIntel 		stats[lcore_id].trend = 0;
759d7937e2eSIntel 		return FREQ_HIGHER;
760d7937e2eSIntel 	}
761d7937e2eSIntel 
762d7937e2eSIntel 	return FREQ_CURRENT;
763d7937e2eSIntel }
764d7937e2eSIntel 
765d7937e2eSIntel /* main processing loop */
766d7937e2eSIntel static int
767d7937e2eSIntel main_loop(__attribute__((unused)) void *dummy)
768d7937e2eSIntel {
769d7937e2eSIntel 	struct rte_mbuf *pkts_burst[MAX_PKT_BURST];
770d7937e2eSIntel 	unsigned lcore_id;
771d7937e2eSIntel 	uint64_t prev_tsc, diff_tsc, cur_tsc;
772d7937e2eSIntel 	uint64_t prev_tsc_power = 0, cur_tsc_power, diff_tsc_power;
773d7937e2eSIntel 	int i, j, nb_rx;
774d7937e2eSIntel 	uint8_t portid, queueid;
775d7937e2eSIntel 	struct lcore_conf *qconf;
776d7937e2eSIntel 	struct lcore_rx_queue *rx_queue;
777d7937e2eSIntel 	enum freq_scale_hint_t lcore_scaleup_hint;
778d7937e2eSIntel 
779d7937e2eSIntel 	uint32_t lcore_rx_idle_count = 0;
780d7937e2eSIntel 	uint32_t lcore_idle_hint = 0;
781d7937e2eSIntel 
782d7937e2eSIntel 	const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US;
783d7937e2eSIntel 
784d7937e2eSIntel 	prev_tsc = 0;
785d7937e2eSIntel 
786d7937e2eSIntel 	lcore_id = rte_lcore_id();
787d7937e2eSIntel 	qconf = &lcore_conf[lcore_id];
788d7937e2eSIntel 
789d7937e2eSIntel 	if (qconf->n_rx_queue == 0) {
790d7937e2eSIntel 		RTE_LOG(INFO, L3FWD_POWER, "lcore %u has nothing to do\n", lcore_id);
791d7937e2eSIntel 		return 0;
792d7937e2eSIntel 	}
793d7937e2eSIntel 
794d7937e2eSIntel 	RTE_LOG(INFO, L3FWD_POWER, "entering main loop on lcore %u\n", lcore_id);
795d7937e2eSIntel 
796d7937e2eSIntel 	for (i = 0; i < qconf->n_rx_queue; i++) {
797d7937e2eSIntel 
798d7937e2eSIntel 		portid = qconf->rx_queue_list[i].port_id;
799d7937e2eSIntel 		queueid = qconf->rx_queue_list[i].queue_id;
800d7937e2eSIntel 		RTE_LOG(INFO, L3FWD_POWER, " -- lcoreid=%u portid=%hhu "
801d7937e2eSIntel 			"rxqueueid=%hhu\n", lcore_id, portid, queueid);
802d7937e2eSIntel 	}
803d7937e2eSIntel 
804d7937e2eSIntel 	while (1) {
805d7937e2eSIntel 		stats[lcore_id].nb_iteration_looped++;
806d7937e2eSIntel 
807d7937e2eSIntel 		cur_tsc = rte_rdtsc();
808d7937e2eSIntel 		cur_tsc_power = cur_tsc;
809d7937e2eSIntel 
810d7937e2eSIntel 		/*
811d7937e2eSIntel 		 * TX burst queue drain
812d7937e2eSIntel 		 */
813d7937e2eSIntel 		diff_tsc = cur_tsc - prev_tsc;
814d7937e2eSIntel 		if (unlikely(diff_tsc > drain_tsc)) {
815d7937e2eSIntel 
816d7937e2eSIntel 			/*
817d7937e2eSIntel 			 * This could be optimized (use queueid instead of
818d7937e2eSIntel 			 * portid), but it is not called so often
819d7937e2eSIntel 			 */
820d7937e2eSIntel 			for (portid = 0; portid < RTE_MAX_ETHPORTS; portid++) {
821d7937e2eSIntel 				if (qconf->tx_mbufs[portid].len == 0)
822d7937e2eSIntel 					continue;
823d7937e2eSIntel 				send_burst(&lcore_conf[lcore_id],
824d7937e2eSIntel 					qconf->tx_mbufs[portid].len,
825d7937e2eSIntel 					portid);
826d7937e2eSIntel 				qconf->tx_mbufs[portid].len = 0;
827d7937e2eSIntel 			}
828d7937e2eSIntel 
829d7937e2eSIntel 			prev_tsc = cur_tsc;
830d7937e2eSIntel 		}
831d7937e2eSIntel 
832d7937e2eSIntel 		diff_tsc_power = cur_tsc_power - prev_tsc_power;
833d7937e2eSIntel 		if (diff_tsc_power > TIMER_RESOLUTION_CYCLES) {
834d7937e2eSIntel 			rte_timer_manage();
835d7937e2eSIntel 			prev_tsc_power = cur_tsc_power;
836d7937e2eSIntel 		}
837d7937e2eSIntel 
838d7937e2eSIntel 		/*
839d7937e2eSIntel 		 * Read packet from RX queues
840d7937e2eSIntel 		 */
841d7937e2eSIntel 		lcore_scaleup_hint = FREQ_CURRENT;
842d7937e2eSIntel 		lcore_rx_idle_count = 0;
843d7937e2eSIntel 		for (i = 0; i < qconf->n_rx_queue; ++i) {
844d7937e2eSIntel 			rx_queue = &(qconf->rx_queue_list[i]);
845d7937e2eSIntel 			rx_queue->idle_hint = 0;
846d7937e2eSIntel 			portid = rx_queue->port_id;
847d7937e2eSIntel 			queueid = rx_queue->queue_id;
848d7937e2eSIntel 
849d7937e2eSIntel 			nb_rx = rte_eth_rx_burst(portid, queueid, pkts_burst,
850d7937e2eSIntel 								MAX_PKT_BURST);
851d7937e2eSIntel 			stats[lcore_id].nb_rx_processed += nb_rx;
852d7937e2eSIntel 			if (unlikely(nb_rx == 0)) {
853d7937e2eSIntel 				/**
854d7937e2eSIntel 				 * no packet received from rx queue, try to
855d7937e2eSIntel 				 * sleep for a while forcing CPU enter deeper
856d7937e2eSIntel 				 * C states.
857d7937e2eSIntel 				 */
858d7937e2eSIntel 				rx_queue->zero_rx_packet_count++;
859d7937e2eSIntel 
860d7937e2eSIntel 				if (rx_queue->zero_rx_packet_count <=
861d7937e2eSIntel 							MIN_ZERO_POLL_COUNT)
862d7937e2eSIntel 					continue;
863d7937e2eSIntel 
864d7937e2eSIntel 				rx_queue->idle_hint = power_idle_heuristic(\
865d7937e2eSIntel 					rx_queue->zero_rx_packet_count);
866d7937e2eSIntel 				lcore_rx_idle_count++;
867d7937e2eSIntel 			} else {
868d7937e2eSIntel 				rx_queue->zero_rx_packet_count = 0;
869d7937e2eSIntel 
870d7937e2eSIntel 				/**
871d7937e2eSIntel 				 * do not scale up frequency immediately as
872d7937e2eSIntel 				 * user to kernel space communication is costly
873d7937e2eSIntel 				 * which might impact packet I/O for received
874d7937e2eSIntel 				 * packets.
875d7937e2eSIntel 				 */
876d7937e2eSIntel 				rx_queue->freq_up_hint =
877d7937e2eSIntel 					power_freq_scaleup_heuristic(lcore_id,
878b451aa39SIntel 							portid, queueid);
879d7937e2eSIntel  			}
880d7937e2eSIntel 
881d7937e2eSIntel 			/* Prefetch first packets */
882d7937e2eSIntel 			for (j = 0; j < PREFETCH_OFFSET && j < nb_rx; j++) {
883d7937e2eSIntel 				rte_prefetch0(rte_pktmbuf_mtod(
884d7937e2eSIntel 						pkts_burst[j], void *));
885d7937e2eSIntel 			}
886d7937e2eSIntel 
887d7937e2eSIntel 			/* Prefetch and forward already prefetched packets */
888d7937e2eSIntel 			for (j = 0; j < (nb_rx - PREFETCH_OFFSET); j++) {
889d7937e2eSIntel 				rte_prefetch0(rte_pktmbuf_mtod(pkts_burst[
890d7937e2eSIntel 						j + PREFETCH_OFFSET], void *));
891d7937e2eSIntel 				l3fwd_simple_forward(pkts_burst[j], portid,
892d7937e2eSIntel 								qconf);
893d7937e2eSIntel 			}
894d7937e2eSIntel 
895d7937e2eSIntel 			/* Forward remaining prefetched packets */
896d7937e2eSIntel 			for (; j < nb_rx; j++) {
897d7937e2eSIntel 				l3fwd_simple_forward(pkts_burst[j], portid,
898d7937e2eSIntel 								qconf);
899d7937e2eSIntel 			}
900d7937e2eSIntel 		}
901d7937e2eSIntel 
902d7937e2eSIntel 		if (likely(lcore_rx_idle_count != qconf->n_rx_queue)) {
903d7937e2eSIntel 			for (i = 1, lcore_scaleup_hint =
904d7937e2eSIntel 				qconf->rx_queue_list[0].freq_up_hint;
905d7937e2eSIntel 					i < qconf->n_rx_queue; ++i) {
906d7937e2eSIntel 				rx_queue = &(qconf->rx_queue_list[i]);
907d7937e2eSIntel 				if (rx_queue->freq_up_hint >
908d7937e2eSIntel 						lcore_scaleup_hint)
909d7937e2eSIntel 					lcore_scaleup_hint =
910d7937e2eSIntel 						rx_queue->freq_up_hint;
911d7937e2eSIntel 			}
912d7937e2eSIntel 
913d7937e2eSIntel 			if (lcore_scaleup_hint == FREQ_HIGHEST)
914d7937e2eSIntel 				rte_power_freq_max(lcore_id);
915d7937e2eSIntel 			else if (lcore_scaleup_hint == FREQ_HIGHER)
916d7937e2eSIntel 				rte_power_freq_up(lcore_id);
917d7937e2eSIntel 		} else {
918d7937e2eSIntel 			/**
919d7937e2eSIntel 			 * All Rx queues empty in recent consecutive polls,
920d7937e2eSIntel 			 * sleep in a conservative manner, meaning sleep as
921d7937e2eSIntel  			 * less as possible.
922d7937e2eSIntel  			 */
923d7937e2eSIntel 			for (i = 1, lcore_idle_hint =
924d7937e2eSIntel 				qconf->rx_queue_list[0].idle_hint;
925d7937e2eSIntel 					i < qconf->n_rx_queue; ++i) {
926d7937e2eSIntel 				rx_queue = &(qconf->rx_queue_list[i]);
927d7937e2eSIntel 				if (rx_queue->idle_hint < lcore_idle_hint)
928d7937e2eSIntel 					lcore_idle_hint = rx_queue->idle_hint;
929d7937e2eSIntel 			}
930d7937e2eSIntel 
931d7937e2eSIntel 			if ( lcore_idle_hint < SLEEP_GEAR1_THRESHOLD)
932d7937e2eSIntel 				/**
933d7937e2eSIntel 				 * execute "pause" instruction to avoid context
934d7937e2eSIntel 				 * switch for short sleep.
935d7937e2eSIntel  				 */
936d7937e2eSIntel 				rte_delay_us(lcore_idle_hint);
937d7937e2eSIntel 			else
938d7937e2eSIntel 				/* long sleep force runing thread to suspend */
939d7937e2eSIntel 				usleep(lcore_idle_hint);
940d7937e2eSIntel 
941d7937e2eSIntel 			stats[lcore_id].sleep_time += lcore_idle_hint;
942d7937e2eSIntel 		}
943d7937e2eSIntel 	}
944d7937e2eSIntel }
945d7937e2eSIntel 
946d7937e2eSIntel static int
947d7937e2eSIntel check_lcore_params(void)
948d7937e2eSIntel {
949d7937e2eSIntel 	uint8_t queue, lcore;
950d7937e2eSIntel 	uint16_t i;
951d7937e2eSIntel 	int socketid;
952d7937e2eSIntel 
953d7937e2eSIntel 	for (i = 0; i < nb_lcore_params; ++i) {
954d7937e2eSIntel 		queue = lcore_params[i].queue_id;
955d7937e2eSIntel 		if (queue >= MAX_RX_QUEUE_PER_PORT) {
956d7937e2eSIntel 			printf("invalid queue number: %hhu\n", queue);
957d7937e2eSIntel 			return -1;
958d7937e2eSIntel 		}
959d7937e2eSIntel 		lcore = lcore_params[i].lcore_id;
960d7937e2eSIntel 		if (!rte_lcore_is_enabled(lcore)) {
961d7937e2eSIntel 			printf("error: lcore %hhu is not enabled in lcore "
962d7937e2eSIntel 							"mask\n", lcore);
963d7937e2eSIntel 			return -1;
964d7937e2eSIntel 		}
965d7937e2eSIntel 		if ((socketid = rte_lcore_to_socket_id(lcore) != 0) &&
966d7937e2eSIntel 							(numa_on == 0)) {
967d7937e2eSIntel 			printf("warning: lcore %hhu is on socket %d with numa "
968d7937e2eSIntel 						"off\n", lcore, socketid);
969d7937e2eSIntel 		}
970d7937e2eSIntel 	}
971d7937e2eSIntel 	return 0;
972d7937e2eSIntel }
973d7937e2eSIntel 
974d7937e2eSIntel static int
975d7937e2eSIntel check_port_config(const unsigned nb_ports)
976d7937e2eSIntel {
977d7937e2eSIntel 	unsigned portid;
978d7937e2eSIntel 	uint16_t i;
979d7937e2eSIntel 
980d7937e2eSIntel 	for (i = 0; i < nb_lcore_params; ++i) {
981d7937e2eSIntel 		portid = lcore_params[i].port_id;
982d7937e2eSIntel 		if ((enabled_port_mask & (1 << portid)) == 0) {
983d7937e2eSIntel 			printf("port %u is not enabled in port mask\n",
984d7937e2eSIntel 								portid);
985d7937e2eSIntel 			return -1;
986d7937e2eSIntel 		}
987d7937e2eSIntel 		if (portid >= nb_ports) {
988d7937e2eSIntel 			printf("port %u is not present on the board\n",
989d7937e2eSIntel 								portid);
990d7937e2eSIntel 			return -1;
991d7937e2eSIntel 		}
992d7937e2eSIntel 	}
993d7937e2eSIntel 	return 0;
994d7937e2eSIntel }
995d7937e2eSIntel 
996d7937e2eSIntel static uint8_t
997d7937e2eSIntel get_port_n_rx_queues(const uint8_t port)
998d7937e2eSIntel {
999d7937e2eSIntel 	int queue = -1;
1000d7937e2eSIntel 	uint16_t i;
1001d7937e2eSIntel 
1002d7937e2eSIntel 	for (i = 0; i < nb_lcore_params; ++i) {
1003d7937e2eSIntel 		if (lcore_params[i].port_id == port &&
1004d7937e2eSIntel 				lcore_params[i].queue_id > queue)
1005d7937e2eSIntel 			queue = lcore_params[i].queue_id;
1006d7937e2eSIntel 	}
1007d7937e2eSIntel 	return (uint8_t)(++queue);
1008d7937e2eSIntel }
1009d7937e2eSIntel 
1010d7937e2eSIntel static int
1011d7937e2eSIntel init_lcore_rx_queues(void)
1012d7937e2eSIntel {
1013d7937e2eSIntel 	uint16_t i, nb_rx_queue;
1014d7937e2eSIntel 	uint8_t lcore;
1015d7937e2eSIntel 
1016d7937e2eSIntel 	for (i = 0; i < nb_lcore_params; ++i) {
1017d7937e2eSIntel 		lcore = lcore_params[i].lcore_id;
1018d7937e2eSIntel 		nb_rx_queue = lcore_conf[lcore].n_rx_queue;
1019d7937e2eSIntel 		if (nb_rx_queue >= MAX_RX_QUEUE_PER_LCORE) {
1020d7937e2eSIntel 			printf("error: too many queues (%u) for lcore: %u\n",
1021d7937e2eSIntel 				(unsigned)nb_rx_queue + 1, (unsigned)lcore);
1022d7937e2eSIntel 			return -1;
1023d7937e2eSIntel 		} else {
1024d7937e2eSIntel 			lcore_conf[lcore].rx_queue_list[nb_rx_queue].port_id =
1025d7937e2eSIntel 				lcore_params[i].port_id;
1026d7937e2eSIntel 			lcore_conf[lcore].rx_queue_list[nb_rx_queue].queue_id =
1027d7937e2eSIntel 				lcore_params[i].queue_id;
1028d7937e2eSIntel 			lcore_conf[lcore].n_rx_queue++;
1029d7937e2eSIntel 		}
1030d7937e2eSIntel 	}
1031d7937e2eSIntel 	return 0;
1032d7937e2eSIntel }
1033d7937e2eSIntel 
1034d7937e2eSIntel /* display usage */
1035d7937e2eSIntel static void
1036d7937e2eSIntel print_usage(const char *prgname)
1037d7937e2eSIntel {
1038d7937e2eSIntel 	printf ("%s [EAL options] -- -p PORTMASK -P"
1039d7937e2eSIntel 		"  [--config (port,queue,lcore)[,(port,queue,lcore]]"
1040d7937e2eSIntel 		"  [--enable-jumbo [--max-pkt-len PKTLEN]]\n"
1041d7937e2eSIntel 		"  -p PORTMASK: hexadecimal bitmask of ports to configure\n"
1042d7937e2eSIntel 		"  -P : enable promiscuous mode\n"
1043d7937e2eSIntel 		"  --config (port,queue,lcore): rx queues configuration\n"
1044d7937e2eSIntel 		"  --no-numa: optional, disable numa awareness\n"
1045d7937e2eSIntel 		"  --enable-jumbo: enable jumbo frame"
1046d7937e2eSIntel 		" which max packet len is PKTLEN in decimal (64-9600)\n",
1047d7937e2eSIntel 		prgname);
1048d7937e2eSIntel }
1049d7937e2eSIntel 
1050d7937e2eSIntel static int parse_max_pkt_len(const char *pktlen)
1051d7937e2eSIntel {
1052d7937e2eSIntel 	char *end = NULL;
1053d7937e2eSIntel 	unsigned long len;
1054d7937e2eSIntel 
1055d7937e2eSIntel 	/* parse decimal string */
1056d7937e2eSIntel 	len = strtoul(pktlen, &end, 10);
1057d7937e2eSIntel 	if ((pktlen[0] == '\0') || (end == NULL) || (*end != '\0'))
1058d7937e2eSIntel 		return -1;
1059d7937e2eSIntel 
1060d7937e2eSIntel 	if (len == 0)
1061d7937e2eSIntel 		return -1;
1062d7937e2eSIntel 
1063d7937e2eSIntel 	return len;
1064d7937e2eSIntel }
1065d7937e2eSIntel 
1066d7937e2eSIntel static int
1067d7937e2eSIntel parse_portmask(const char *portmask)
1068d7937e2eSIntel {
1069d7937e2eSIntel 	char *end = NULL;
1070d7937e2eSIntel 	unsigned long pm;
1071d7937e2eSIntel 
1072d7937e2eSIntel 	/* parse hexadecimal string */
1073d7937e2eSIntel 	pm = strtoul(portmask, &end, 16);
1074d7937e2eSIntel 	if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0'))
1075d7937e2eSIntel 		return -1;
1076d7937e2eSIntel 
1077d7937e2eSIntel 	if (pm == 0)
1078d7937e2eSIntel 		return -1;
1079d7937e2eSIntel 
1080d7937e2eSIntel 	return pm;
1081d7937e2eSIntel }
1082d7937e2eSIntel 
1083d7937e2eSIntel static int
1084d7937e2eSIntel parse_config(const char *q_arg)
1085d7937e2eSIntel {
1086d7937e2eSIntel 	char s[256];
1087d7937e2eSIntel 	const char *p, *p0 = q_arg;
1088d7937e2eSIntel 	char *end;
1089d7937e2eSIntel 	enum fieldnames {
1090d7937e2eSIntel 		FLD_PORT = 0,
1091d7937e2eSIntel 		FLD_QUEUE,
1092d7937e2eSIntel 		FLD_LCORE,
1093d7937e2eSIntel 		_NUM_FLD
1094d7937e2eSIntel 	};
1095d7937e2eSIntel 	unsigned long int_fld[_NUM_FLD];
1096d7937e2eSIntel 	char *str_fld[_NUM_FLD];
1097d7937e2eSIntel 	int i;
1098d7937e2eSIntel 	unsigned size;
1099d7937e2eSIntel 
1100d7937e2eSIntel 	nb_lcore_params = 0;
1101d7937e2eSIntel 
1102d7937e2eSIntel 	while ((p = strchr(p0,'(')) != NULL) {
1103d7937e2eSIntel 		++p;
1104d7937e2eSIntel 		if((p0 = strchr(p,')')) == NULL)
1105d7937e2eSIntel 			return -1;
1106d7937e2eSIntel 
1107d7937e2eSIntel 		size = p0 - p;
1108d7937e2eSIntel 		if(size >= sizeof(s))
1109d7937e2eSIntel 			return -1;
1110d7937e2eSIntel 
11116f41fe75SStephen Hemminger 		snprintf(s, sizeof(s), "%.*s", size, p);
1112d7937e2eSIntel 		if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') !=
1113d7937e2eSIntel 								_NUM_FLD)
1114d7937e2eSIntel 			return -1;
1115d7937e2eSIntel 		for (i = 0; i < _NUM_FLD; i++){
1116d7937e2eSIntel 			errno = 0;
1117d7937e2eSIntel 			int_fld[i] = strtoul(str_fld[i], &end, 0);
1118d7937e2eSIntel 			if (errno != 0 || end == str_fld[i] || int_fld[i] >
1119d7937e2eSIntel 									255)
1120d7937e2eSIntel 				return -1;
1121d7937e2eSIntel 		}
1122d7937e2eSIntel 		if (nb_lcore_params >= MAX_LCORE_PARAMS) {
1123d7937e2eSIntel 			printf("exceeded max number of lcore params: %hu\n",
1124d7937e2eSIntel 				nb_lcore_params);
1125d7937e2eSIntel 			return -1;
1126d7937e2eSIntel 		}
1127d7937e2eSIntel 		lcore_params_array[nb_lcore_params].port_id =
1128d7937e2eSIntel 				(uint8_t)int_fld[FLD_PORT];
1129d7937e2eSIntel 		lcore_params_array[nb_lcore_params].queue_id =
1130d7937e2eSIntel 				(uint8_t)int_fld[FLD_QUEUE];
1131d7937e2eSIntel 		lcore_params_array[nb_lcore_params].lcore_id =
1132d7937e2eSIntel 				(uint8_t)int_fld[FLD_LCORE];
1133d7937e2eSIntel 		++nb_lcore_params;
1134d7937e2eSIntel 	}
1135d7937e2eSIntel 	lcore_params = lcore_params_array;
1136d7937e2eSIntel 
1137d7937e2eSIntel 	return 0;
1138d7937e2eSIntel }
1139d7937e2eSIntel 
1140d7937e2eSIntel /* Parse the argument given in the command line of the application */
1141d7937e2eSIntel static int
1142d7937e2eSIntel parse_args(int argc, char **argv)
1143d7937e2eSIntel {
1144d7937e2eSIntel 	int opt, ret;
1145d7937e2eSIntel 	char **argvopt;
1146d7937e2eSIntel 	int option_index;
1147d7937e2eSIntel 	char *prgname = argv[0];
1148d7937e2eSIntel 	static struct option lgopts[] = {
1149d7937e2eSIntel 		{"config", 1, 0, 0},
1150d7937e2eSIntel 		{"no-numa", 0, 0, 0},
1151d7937e2eSIntel 		{"enable-jumbo", 0, 0, 0},
1152d7937e2eSIntel 		{NULL, 0, 0, 0}
1153d7937e2eSIntel 	};
1154d7937e2eSIntel 
1155d7937e2eSIntel 	argvopt = argv;
1156d7937e2eSIntel 
1157d7937e2eSIntel 	while ((opt = getopt_long(argc, argvopt, "p:P",
1158d7937e2eSIntel 				lgopts, &option_index)) != EOF) {
1159d7937e2eSIntel 
1160d7937e2eSIntel 		switch (opt) {
1161d7937e2eSIntel 		/* portmask */
1162d7937e2eSIntel 		case 'p':
1163d7937e2eSIntel 			enabled_port_mask = parse_portmask(optarg);
1164d7937e2eSIntel 			if (enabled_port_mask == 0) {
1165d7937e2eSIntel 				printf("invalid portmask\n");
1166d7937e2eSIntel 				print_usage(prgname);
1167d7937e2eSIntel 				return -1;
1168d7937e2eSIntel 			}
1169d7937e2eSIntel 			break;
1170d7937e2eSIntel 		case 'P':
1171d7937e2eSIntel 			printf("Promiscuous mode selected\n");
1172d7937e2eSIntel 			promiscuous_on = 1;
1173d7937e2eSIntel 			break;
1174d7937e2eSIntel 
1175d7937e2eSIntel 		/* long options */
1176d7937e2eSIntel 		case 0:
1177d7937e2eSIntel 			if (!strncmp(lgopts[option_index].name, "config", 6)) {
1178d7937e2eSIntel 				ret = parse_config(optarg);
1179d7937e2eSIntel 				if (ret) {
1180d7937e2eSIntel 					printf("invalid config\n");
1181d7937e2eSIntel 					print_usage(prgname);
1182d7937e2eSIntel 					return -1;
1183d7937e2eSIntel 				}
1184d7937e2eSIntel 			}
1185d7937e2eSIntel 
1186d7937e2eSIntel 			if (!strncmp(lgopts[option_index].name,
1187d7937e2eSIntel 						"no-numa", 7)) {
1188d7937e2eSIntel 				printf("numa is disabled \n");
1189d7937e2eSIntel 				numa_on = 0;
1190d7937e2eSIntel 			}
1191d7937e2eSIntel 
1192d7937e2eSIntel 			if (!strncmp(lgopts[option_index].name,
1193d7937e2eSIntel 					"enable-jumbo", 12)) {
1194d7937e2eSIntel 				struct option lenopts =
1195d7937e2eSIntel 					{"max-pkt-len", required_argument, \
1196d7937e2eSIntel 									0, 0};
1197d7937e2eSIntel 
1198d7937e2eSIntel 				printf("jumbo frame is enabled \n");
1199d7937e2eSIntel 				port_conf.rxmode.jumbo_frame = 1;
1200d7937e2eSIntel 
1201d7937e2eSIntel 				/**
1202d7937e2eSIntel 				 * if no max-pkt-len set, use the default value
1203d7937e2eSIntel 				 * ETHER_MAX_LEN
1204d7937e2eSIntel 				 */
1205d7937e2eSIntel 				if (0 == getopt_long(argc, argvopt, "",
1206d7937e2eSIntel 						&lenopts, &option_index)) {
1207d7937e2eSIntel 					ret = parse_max_pkt_len(optarg);
1208d7937e2eSIntel 					if ((ret < 64) ||
1209d7937e2eSIntel 						(ret > MAX_JUMBO_PKT_LEN)){
1210d7937e2eSIntel 						printf("invalid packet "
1211d7937e2eSIntel 								"length\n");
1212d7937e2eSIntel 						print_usage(prgname);
1213d7937e2eSIntel 						return -1;
1214d7937e2eSIntel 					}
1215d7937e2eSIntel 					port_conf.rxmode.max_rx_pkt_len = ret;
1216d7937e2eSIntel 				}
1217d7937e2eSIntel 				printf("set jumbo frame "
1218d7937e2eSIntel 					"max packet length to %u\n",
1219d7937e2eSIntel 				(unsigned int)port_conf.rxmode.max_rx_pkt_len);
1220d7937e2eSIntel 			}
1221d7937e2eSIntel 
1222d7937e2eSIntel 			break;
1223d7937e2eSIntel 
1224d7937e2eSIntel 		default:
1225d7937e2eSIntel 			print_usage(prgname);
1226d7937e2eSIntel 			return -1;
1227d7937e2eSIntel 		}
1228d7937e2eSIntel 	}
1229d7937e2eSIntel 
1230d7937e2eSIntel 	if (optind >= 0)
1231d7937e2eSIntel 		argv[optind-1] = prgname;
1232d7937e2eSIntel 
1233d7937e2eSIntel 	ret = optind-1;
1234d7937e2eSIntel 	optind = 0; /* reset getopt lib */
1235d7937e2eSIntel 	return ret;
1236d7937e2eSIntel }
1237d7937e2eSIntel 
1238d7937e2eSIntel static void
1239d7937e2eSIntel print_ethaddr(const char *name, const struct ether_addr *eth_addr)
1240d7937e2eSIntel {
1241ec3d82dbSCunming Liang 	char buf[ETHER_ADDR_FMT_SIZE];
1242ec3d82dbSCunming Liang 	ether_format_addr(buf, ETHER_ADDR_FMT_SIZE, eth_addr);
1243ec3d82dbSCunming Liang 	printf("%s%s", name, buf);
1244d7937e2eSIntel }
1245d7937e2eSIntel 
1246d7937e2eSIntel #if (APP_LOOKUP_METHOD == APP_LOOKUP_EXACT_MATCH)
1247d7937e2eSIntel static void
1248d7937e2eSIntel setup_hash(int socketid)
1249d7937e2eSIntel {
1250d7937e2eSIntel 	struct rte_hash_parameters ipv4_l3fwd_hash_params = {
1251d7937e2eSIntel 		.name = NULL,
1252d7937e2eSIntel 		.entries = L3FWD_HASH_ENTRIES,
1253d7937e2eSIntel 		.bucket_entries = 4,
1254d7937e2eSIntel 		.key_len = sizeof(struct ipv4_5tuple),
1255d7937e2eSIntel 		.hash_func = DEFAULT_HASH_FUNC,
1256d7937e2eSIntel 		.hash_func_init_val = 0,
1257d7937e2eSIntel 	};
1258d7937e2eSIntel 
1259d7937e2eSIntel 	struct rte_hash_parameters ipv6_l3fwd_hash_params = {
1260d7937e2eSIntel 		.name = NULL,
1261d7937e2eSIntel 		.entries = L3FWD_HASH_ENTRIES,
1262d7937e2eSIntel 		.bucket_entries = 4,
1263d7937e2eSIntel 		.key_len = sizeof(struct ipv6_5tuple),
1264d7937e2eSIntel 		.hash_func = DEFAULT_HASH_FUNC,
1265d7937e2eSIntel 		.hash_func_init_val = 0,
1266d7937e2eSIntel 	};
1267d7937e2eSIntel 
1268d7937e2eSIntel 	unsigned i;
1269d7937e2eSIntel 	int ret;
1270d7937e2eSIntel 	char s[64];
1271d7937e2eSIntel 
1272d7937e2eSIntel 	/* create ipv4 hash */
12736f41fe75SStephen Hemminger 	snprintf(s, sizeof(s), "ipv4_l3fwd_hash_%d", socketid);
1274d7937e2eSIntel 	ipv4_l3fwd_hash_params.name = s;
1275d7937e2eSIntel 	ipv4_l3fwd_hash_params.socket_id = socketid;
1276d7937e2eSIntel 	ipv4_l3fwd_lookup_struct[socketid] =
1277d7937e2eSIntel 		rte_hash_create(&ipv4_l3fwd_hash_params);
1278d7937e2eSIntel 	if (ipv4_l3fwd_lookup_struct[socketid] == NULL)
1279d7937e2eSIntel 		rte_exit(EXIT_FAILURE, "Unable to create the l3fwd hash on "
1280d7937e2eSIntel 				"socket %d\n", socketid);
1281d7937e2eSIntel 
1282d7937e2eSIntel 	/* create ipv6 hash */
12836f41fe75SStephen Hemminger 	snprintf(s, sizeof(s), "ipv6_l3fwd_hash_%d", socketid);
1284d7937e2eSIntel 	ipv6_l3fwd_hash_params.name = s;
1285d7937e2eSIntel 	ipv6_l3fwd_hash_params.socket_id = socketid;
1286d7937e2eSIntel 	ipv6_l3fwd_lookup_struct[socketid] =
1287d7937e2eSIntel 		rte_hash_create(&ipv6_l3fwd_hash_params);
1288d7937e2eSIntel 	if (ipv6_l3fwd_lookup_struct[socketid] == NULL)
1289d7937e2eSIntel 		rte_exit(EXIT_FAILURE, "Unable to create the l3fwd hash on "
1290d7937e2eSIntel 				"socket %d\n", socketid);
1291d7937e2eSIntel 
1292d7937e2eSIntel 
1293d7937e2eSIntel 	/* populate the ipv4 hash */
1294d7937e2eSIntel 	for (i = 0; i < IPV4_L3FWD_NUM_ROUTES; i++) {
1295d7937e2eSIntel 		ret = rte_hash_add_key (ipv4_l3fwd_lookup_struct[socketid],
1296d7937e2eSIntel 				(void *) &ipv4_l3fwd_route_array[i].key);
1297d7937e2eSIntel 		if (ret < 0) {
1298d7937e2eSIntel 			rte_exit(EXIT_FAILURE, "Unable to add entry %u to the"
1299d7937e2eSIntel 				"l3fwd hash on socket %d\n", i, socketid);
1300d7937e2eSIntel 		}
1301d7937e2eSIntel 		ipv4_l3fwd_out_if[ret] = ipv4_l3fwd_route_array[i].if_out;
1302d7937e2eSIntel 		printf("Hash: Adding key\n");
1303d7937e2eSIntel 		print_ipv4_key(ipv4_l3fwd_route_array[i].key);
1304d7937e2eSIntel 	}
1305d7937e2eSIntel 
1306d7937e2eSIntel 	/* populate the ipv6 hash */
1307d7937e2eSIntel 	for (i = 0; i < IPV6_L3FWD_NUM_ROUTES; i++) {
1308d7937e2eSIntel 		ret = rte_hash_add_key (ipv6_l3fwd_lookup_struct[socketid],
1309d7937e2eSIntel 				(void *) &ipv6_l3fwd_route_array[i].key);
1310d7937e2eSIntel 		if (ret < 0) {
1311d7937e2eSIntel 			rte_exit(EXIT_FAILURE, "Unable to add entry %u to the"
1312d7937e2eSIntel 				"l3fwd hash on socket %d\n", i, socketid);
1313d7937e2eSIntel 		}
1314d7937e2eSIntel 		ipv6_l3fwd_out_if[ret] = ipv6_l3fwd_route_array[i].if_out;
1315d7937e2eSIntel 		printf("Hash: Adding key\n");
1316d7937e2eSIntel 		print_ipv6_key(ipv6_l3fwd_route_array[i].key);
1317d7937e2eSIntel 	}
1318d7937e2eSIntel }
1319d7937e2eSIntel #endif
1320d7937e2eSIntel 
1321d7937e2eSIntel #if (APP_LOOKUP_METHOD == APP_LOOKUP_LPM)
1322d7937e2eSIntel static void
1323d7937e2eSIntel setup_lpm(int socketid)
1324d7937e2eSIntel {
1325d7937e2eSIntel 	unsigned i;
1326d7937e2eSIntel 	int ret;
1327d7937e2eSIntel 	char s[64];
1328d7937e2eSIntel 
1329d7937e2eSIntel 	/* create the LPM table */
13306f41fe75SStephen Hemminger 	snprintf(s, sizeof(s), "IPV4_L3FWD_LPM_%d", socketid);
1331d7937e2eSIntel 	ipv4_l3fwd_lookup_struct[socketid] = rte_lpm_create(s, socketid,
1332d7937e2eSIntel 				IPV4_L3FWD_LPM_MAX_RULES, 0);
1333d7937e2eSIntel 	if (ipv4_l3fwd_lookup_struct[socketid] == NULL)
1334d7937e2eSIntel 		rte_exit(EXIT_FAILURE, "Unable to create the l3fwd LPM table"
1335d7937e2eSIntel 				" on socket %d\n", socketid);
1336d7937e2eSIntel 
1337d7937e2eSIntel 	/* populate the LPM table */
1338d7937e2eSIntel 	for (i = 0; i < IPV4_L3FWD_NUM_ROUTES; i++) {
1339d7937e2eSIntel 		ret = rte_lpm_add(ipv4_l3fwd_lookup_struct[socketid],
1340d7937e2eSIntel 			ipv4_l3fwd_route_array[i].ip,
1341d7937e2eSIntel 			ipv4_l3fwd_route_array[i].depth,
1342d7937e2eSIntel 			ipv4_l3fwd_route_array[i].if_out);
1343d7937e2eSIntel 
1344d7937e2eSIntel 		if (ret < 0) {
1345d7937e2eSIntel 			rte_exit(EXIT_FAILURE, "Unable to add entry %u to the "
1346d7937e2eSIntel 				"l3fwd LPM table on socket %d\n",
1347d7937e2eSIntel 				i, socketid);
1348d7937e2eSIntel 		}
1349d7937e2eSIntel 
1350d7937e2eSIntel 		printf("LPM: Adding route 0x%08x / %d (%d)\n",
1351d7937e2eSIntel 			(unsigned)ipv4_l3fwd_route_array[i].ip,
1352d7937e2eSIntel 			ipv4_l3fwd_route_array[i].depth,
1353d7937e2eSIntel 			ipv4_l3fwd_route_array[i].if_out);
1354d7937e2eSIntel 	}
1355d7937e2eSIntel }
1356d7937e2eSIntel #endif
1357d7937e2eSIntel 
1358d7937e2eSIntel static int
1359d7937e2eSIntel init_mem(unsigned nb_mbuf)
1360d7937e2eSIntel {
1361d7937e2eSIntel 	struct lcore_conf *qconf;
1362d7937e2eSIntel 	int socketid;
1363d7937e2eSIntel 	unsigned lcore_id;
1364d7937e2eSIntel 	char s[64];
1365d7937e2eSIntel 
1366d7937e2eSIntel 	for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
1367d7937e2eSIntel 		if (rte_lcore_is_enabled(lcore_id) == 0)
1368d7937e2eSIntel 			continue;
1369d7937e2eSIntel 
1370d7937e2eSIntel 		if (numa_on)
1371d7937e2eSIntel 			socketid = rte_lcore_to_socket_id(lcore_id);
1372d7937e2eSIntel 		else
1373d7937e2eSIntel 			socketid = 0;
1374d7937e2eSIntel 
1375d7937e2eSIntel 		if (socketid >= NB_SOCKETS) {
1376d7937e2eSIntel 			rte_exit(EXIT_FAILURE, "Socket %d of lcore %u is "
1377d7937e2eSIntel 					"out of range %d\n", socketid,
1378d7937e2eSIntel 						lcore_id, NB_SOCKETS);
1379d7937e2eSIntel 		}
1380d7937e2eSIntel 		if (pktmbuf_pool[socketid] == NULL) {
13816f41fe75SStephen Hemminger 			snprintf(s, sizeof(s), "mbuf_pool_%d", socketid);
1382d7937e2eSIntel 			pktmbuf_pool[socketid] =
1383d7937e2eSIntel 				rte_mempool_create(s, nb_mbuf,
1384d7937e2eSIntel 					MBUF_SIZE, MEMPOOL_CACHE_SIZE,
1385d7937e2eSIntel 					sizeof(struct rte_pktmbuf_pool_private),
1386d7937e2eSIntel 					rte_pktmbuf_pool_init, NULL,
1387d7937e2eSIntel 					rte_pktmbuf_init, NULL,
1388d7937e2eSIntel 					socketid, 0);
1389d7937e2eSIntel 			if (pktmbuf_pool[socketid] == NULL)
1390d7937e2eSIntel 				rte_exit(EXIT_FAILURE,
1391d7937e2eSIntel 					"Cannot init mbuf pool on socket %d\n",
1392d7937e2eSIntel 								socketid);
1393d7937e2eSIntel 			else
1394d7937e2eSIntel 				printf("Allocated mbuf pool on socket %d\n",
1395d7937e2eSIntel 								socketid);
1396d7937e2eSIntel 
1397d7937e2eSIntel #if (APP_LOOKUP_METHOD == APP_LOOKUP_LPM)
1398d7937e2eSIntel 			setup_lpm(socketid);
1399d7937e2eSIntel #else
1400d7937e2eSIntel 			setup_hash(socketid);
1401d7937e2eSIntel #endif
1402d7937e2eSIntel 		}
1403d7937e2eSIntel 		qconf = &lcore_conf[lcore_id];
1404d7937e2eSIntel 		qconf->ipv4_lookup_struct = ipv4_l3fwd_lookup_struct[socketid];
1405d7937e2eSIntel #if (APP_LOOKUP_METHOD == APP_LOOKUP_EXACT_MATCH)
1406d7937e2eSIntel 		qconf->ipv6_lookup_struct = ipv6_l3fwd_lookup_struct[socketid];
1407d7937e2eSIntel #endif
1408d7937e2eSIntel 	}
1409d7937e2eSIntel 	return 0;
1410d7937e2eSIntel }
1411d7937e2eSIntel 
1412d7937e2eSIntel /* Check the link status of all ports in up to 9s, and print them finally */
1413d7937e2eSIntel static void
1414d7937e2eSIntel check_all_ports_link_status(uint8_t port_num, uint32_t port_mask)
1415d7937e2eSIntel {
1416d7937e2eSIntel #define CHECK_INTERVAL 100 /* 100ms */
1417d7937e2eSIntel #define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */
1418d7937e2eSIntel 	uint8_t portid, count, all_ports_up, print_flag = 0;
1419d7937e2eSIntel 	struct rte_eth_link link;
1420d7937e2eSIntel 
1421d7937e2eSIntel 	printf("\nChecking link status");
1422d7937e2eSIntel 	fflush(stdout);
1423d7937e2eSIntel 	for (count = 0; count <= MAX_CHECK_TIME; count++) {
1424d7937e2eSIntel 		all_ports_up = 1;
1425d7937e2eSIntel 		for (portid = 0; portid < port_num; portid++) {
1426d7937e2eSIntel 			if ((port_mask & (1 << portid)) == 0)
1427d7937e2eSIntel 				continue;
1428d7937e2eSIntel 			memset(&link, 0, sizeof(link));
1429d7937e2eSIntel 			rte_eth_link_get_nowait(portid, &link);
1430d7937e2eSIntel 			/* print link status if flag set */
1431d7937e2eSIntel 			if (print_flag == 1) {
1432d7937e2eSIntel 				if (link.link_status)
1433d7937e2eSIntel 					printf("Port %d Link Up - speed %u "
1434d7937e2eSIntel 						"Mbps - %s\n", (uint8_t)portid,
1435d7937e2eSIntel 						(unsigned)link.link_speed,
1436d7937e2eSIntel 				(link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
1437d7937e2eSIntel 					("full-duplex") : ("half-duplex\n"));
1438d7937e2eSIntel 				else
1439d7937e2eSIntel 					printf("Port %d Link Down\n",
1440d7937e2eSIntel 						(uint8_t)portid);
1441d7937e2eSIntel 				continue;
1442d7937e2eSIntel 			}
1443d7937e2eSIntel 			/* clear all_ports_up flag if any link down */
1444d7937e2eSIntel 			if (link.link_status == 0) {
1445d7937e2eSIntel 				all_ports_up = 0;
1446d7937e2eSIntel 				break;
1447d7937e2eSIntel 			}
1448d7937e2eSIntel 		}
1449d7937e2eSIntel 		/* after finally printing all link status, get out */
1450d7937e2eSIntel 		if (print_flag == 1)
1451d7937e2eSIntel 			break;
1452d7937e2eSIntel 
1453d7937e2eSIntel 		if (all_ports_up == 0) {
1454d7937e2eSIntel 			printf(".");
1455d7937e2eSIntel 			fflush(stdout);
1456d7937e2eSIntel 			rte_delay_ms(CHECK_INTERVAL);
1457d7937e2eSIntel 		}
1458d7937e2eSIntel 
1459d7937e2eSIntel 		/* set the print_flag if all ports up or timeout */
1460d7937e2eSIntel 		if (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) {
1461d7937e2eSIntel 			print_flag = 1;
1462d7937e2eSIntel 			printf("done\n");
1463d7937e2eSIntel 		}
1464d7937e2eSIntel 	}
1465d7937e2eSIntel }
1466d7937e2eSIntel 
1467d7937e2eSIntel int
1468*98a16481SDavid Marchand main(int argc, char **argv)
1469d7937e2eSIntel {
1470d7937e2eSIntel 	struct lcore_conf *qconf;
147181f7ecd9SPablo de Lara 	struct rte_eth_dev_info dev_info;
147281f7ecd9SPablo de Lara 	struct rte_eth_txconf *txconf;
1473d7937e2eSIntel 	int ret;
1474d7937e2eSIntel 	unsigned nb_ports;
1475d7937e2eSIntel 	uint16_t queueid;
1476d7937e2eSIntel 	unsigned lcore_id;
1477d7937e2eSIntel 	uint64_t hz;
1478d7937e2eSIntel 	uint32_t n_tx_queue, nb_lcores;
1479d7937e2eSIntel 	uint8_t portid, nb_rx_queue, queue, socketid;
1480d7937e2eSIntel 
1481d7937e2eSIntel 	/* catch SIGINT and restore cpufreq governor to ondemand */
1482d7937e2eSIntel 	signal(SIGINT, signal_exit_now);
1483d7937e2eSIntel 
1484d7937e2eSIntel 	/* init EAL */
1485d7937e2eSIntel 	ret = rte_eal_init(argc, argv);
1486d7937e2eSIntel 	if (ret < 0)
1487d7937e2eSIntel 		rte_exit(EXIT_FAILURE, "Invalid EAL parameters\n");
1488d7937e2eSIntel 	argc -= ret;
1489d7937e2eSIntel 	argv += ret;
1490d7937e2eSIntel 
1491d7937e2eSIntel 	/* init RTE timer library to be used late */
1492d7937e2eSIntel 	rte_timer_subsystem_init();
1493d7937e2eSIntel 
1494d7937e2eSIntel 	/* parse application arguments (after the EAL ones) */
1495d7937e2eSIntel 	ret = parse_args(argc, argv);
1496d7937e2eSIntel 	if (ret < 0)
1497d7937e2eSIntel 		rte_exit(EXIT_FAILURE, "Invalid L3FWD parameters\n");
1498d7937e2eSIntel 
1499d7937e2eSIntel 	if (check_lcore_params() < 0)
1500d7937e2eSIntel 		rte_exit(EXIT_FAILURE, "check_lcore_params failed\n");
1501d7937e2eSIntel 
1502d7937e2eSIntel 	ret = init_lcore_rx_queues();
1503d7937e2eSIntel 	if (ret < 0)
1504d7937e2eSIntel 		rte_exit(EXIT_FAILURE, "init_lcore_rx_queues failed\n");
1505d7937e2eSIntel 
1506d7937e2eSIntel 
1507d7937e2eSIntel 	nb_ports = rte_eth_dev_count();
1508d7937e2eSIntel 	if (nb_ports > RTE_MAX_ETHPORTS)
1509d7937e2eSIntel 		nb_ports = RTE_MAX_ETHPORTS;
1510d7937e2eSIntel 
1511d7937e2eSIntel 	if (check_port_config(nb_ports) < 0)
1512d7937e2eSIntel 		rte_exit(EXIT_FAILURE, "check_port_config failed\n");
1513d7937e2eSIntel 
1514d7937e2eSIntel 	nb_lcores = rte_lcore_count();
1515d7937e2eSIntel 
1516d7937e2eSIntel 	/* initialize all ports */
1517d7937e2eSIntel 	for (portid = 0; portid < nb_ports; portid++) {
1518d7937e2eSIntel 		/* skip ports that are not enabled */
1519d7937e2eSIntel 		if ((enabled_port_mask & (1 << portid)) == 0) {
1520d7937e2eSIntel 			printf("\nSkipping disabled port %d\n", portid);
1521d7937e2eSIntel 			continue;
1522d7937e2eSIntel 		}
1523d7937e2eSIntel 
1524d7937e2eSIntel 		/* init port */
1525d7937e2eSIntel 		printf("Initializing port %d ... ", portid );
1526d7937e2eSIntel 		fflush(stdout);
1527d7937e2eSIntel 
1528d7937e2eSIntel 		nb_rx_queue = get_port_n_rx_queues(portid);
1529d7937e2eSIntel 		n_tx_queue = nb_lcores;
1530d7937e2eSIntel 		if (n_tx_queue > MAX_TX_QUEUE_PER_PORT)
1531d7937e2eSIntel 			n_tx_queue = MAX_TX_QUEUE_PER_PORT;
1532d7937e2eSIntel 		printf("Creating queues: nb_rxq=%d nb_txq=%u... ",
1533d7937e2eSIntel 			nb_rx_queue, (unsigned)n_tx_queue );
1534d7937e2eSIntel 		ret = rte_eth_dev_configure(portid, nb_rx_queue,
1535d7937e2eSIntel 					(uint16_t)n_tx_queue, &port_conf);
1536d7937e2eSIntel 		if (ret < 0)
1537d7937e2eSIntel 			rte_exit(EXIT_FAILURE, "Cannot configure device: "
1538d7937e2eSIntel 					"err=%d, port=%d\n", ret, portid);
1539d7937e2eSIntel 
1540d7937e2eSIntel 		rte_eth_macaddr_get(portid, &ports_eth_addr[portid]);
1541d7937e2eSIntel 		print_ethaddr(" Address:", &ports_eth_addr[portid]);
1542d7937e2eSIntel 		printf(", ");
1543d7937e2eSIntel 
1544d7937e2eSIntel 		/* init memory */
1545d7937e2eSIntel 		ret = init_mem(NB_MBUF);
1546d7937e2eSIntel 		if (ret < 0)
1547d7937e2eSIntel 			rte_exit(EXIT_FAILURE, "init_mem failed\n");
1548d7937e2eSIntel 
1549d7937e2eSIntel 		/* init one TX queue per couple (lcore,port) */
1550d7937e2eSIntel 		queueid = 0;
1551d7937e2eSIntel 		for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
1552d7937e2eSIntel 			if (rte_lcore_is_enabled(lcore_id) == 0)
1553d7937e2eSIntel 				continue;
1554d7937e2eSIntel 
1555d7937e2eSIntel 			if (numa_on)
1556d7937e2eSIntel 				socketid = \
1557d7937e2eSIntel 				(uint8_t)rte_lcore_to_socket_id(lcore_id);
1558d7937e2eSIntel 			else
1559d7937e2eSIntel 				socketid = 0;
1560d7937e2eSIntel 
1561d7937e2eSIntel 			printf("txq=%u,%d,%d ", lcore_id, queueid, socketid);
1562d7937e2eSIntel 			fflush(stdout);
156381f7ecd9SPablo de Lara 
156481f7ecd9SPablo de Lara 			rte_eth_dev_info_get(portid, &dev_info);
156581f7ecd9SPablo de Lara 			txconf = &dev_info.default_txconf;
156681f7ecd9SPablo de Lara 			if (port_conf.rxmode.jumbo_frame)
156781f7ecd9SPablo de Lara 				txconf->txq_flags = 0;
1568d7937e2eSIntel 			ret = rte_eth_tx_queue_setup(portid, queueid, nb_txd,
156981f7ecd9SPablo de Lara 						     socketid, txconf);
1570d7937e2eSIntel 			if (ret < 0)
1571d7937e2eSIntel 				rte_exit(EXIT_FAILURE,
1572d7937e2eSIntel 					"rte_eth_tx_queue_setup: err=%d, "
1573d7937e2eSIntel 						"port=%d\n", ret, portid);
1574d7937e2eSIntel 
1575d7937e2eSIntel 			qconf = &lcore_conf[lcore_id];
1576d7937e2eSIntel 			qconf->tx_queue_id[portid] = queueid;
1577d7937e2eSIntel 			queueid++;
1578d7937e2eSIntel 		}
1579d7937e2eSIntel 		printf("\n");
1580d7937e2eSIntel 	}
1581d7937e2eSIntel 
1582d7937e2eSIntel 	for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
1583d7937e2eSIntel 		if (rte_lcore_is_enabled(lcore_id) == 0)
1584d7937e2eSIntel 			continue;
1585d7937e2eSIntel 
1586d7937e2eSIntel 		/* init power management library */
1587d7937e2eSIntel 		ret = rte_power_init(lcore_id);
1588d7937e2eSIntel 		if (ret)
1589d7937e2eSIntel 			rte_exit(EXIT_FAILURE, "Power management library "
1590d7937e2eSIntel 				"initialization failed on core%u\n", lcore_id);
1591d7937e2eSIntel 
1592d7937e2eSIntel 		/* init timer structures for each enabled lcore */
1593d7937e2eSIntel 		rte_timer_init(&power_timers[lcore_id]);
1594d7937e2eSIntel 		hz = rte_get_timer_hz();
1595d7937e2eSIntel 		rte_timer_reset(&power_timers[lcore_id],
1596d7937e2eSIntel 			hz/TIMER_NUMBER_PER_SECOND, SINGLE, lcore_id,
1597d7937e2eSIntel 						power_timer_cb, NULL);
1598d7937e2eSIntel 
1599d7937e2eSIntel 		qconf = &lcore_conf[lcore_id];
1600d7937e2eSIntel 		printf("\nInitializing rx queues on lcore %u ... ", lcore_id );
1601d7937e2eSIntel 		fflush(stdout);
1602d7937e2eSIntel 		/* init RX queues */
1603d7937e2eSIntel 		for(queue = 0; queue < qconf->n_rx_queue; ++queue) {
1604d7937e2eSIntel 			portid = qconf->rx_queue_list[queue].port_id;
1605d7937e2eSIntel 			queueid = qconf->rx_queue_list[queue].queue_id;
1606d7937e2eSIntel 
1607d7937e2eSIntel 			if (numa_on)
1608d7937e2eSIntel 				socketid = \
1609d7937e2eSIntel 				(uint8_t)rte_lcore_to_socket_id(lcore_id);
1610d7937e2eSIntel 			else
1611d7937e2eSIntel 				socketid = 0;
1612d7937e2eSIntel 
1613d7937e2eSIntel 			printf("rxq=%d,%d,%d ", portid, queueid, socketid);
1614d7937e2eSIntel 			fflush(stdout);
1615d7937e2eSIntel 
1616d7937e2eSIntel 			ret = rte_eth_rx_queue_setup(portid, queueid, nb_rxd,
161781f7ecd9SPablo de Lara 				socketid, NULL,
161881f7ecd9SPablo de Lara 				pktmbuf_pool[socketid]);
1619d7937e2eSIntel 			if (ret < 0)
1620d7937e2eSIntel 				rte_exit(EXIT_FAILURE,
1621d7937e2eSIntel 					"rte_eth_rx_queue_setup: err=%d, "
1622d7937e2eSIntel 						"port=%d\n", ret, portid);
1623d7937e2eSIntel 		}
1624d7937e2eSIntel 	}
1625d7937e2eSIntel 
1626d7937e2eSIntel 	printf("\n");
1627d7937e2eSIntel 
1628d7937e2eSIntel 	/* start ports */
1629d7937e2eSIntel 	for (portid = 0; portid < nb_ports; portid++) {
1630d7937e2eSIntel 		if ((enabled_port_mask & (1 << portid)) == 0) {
1631d7937e2eSIntel 			continue;
1632d7937e2eSIntel 		}
1633d7937e2eSIntel 		/* Start device */
1634d7937e2eSIntel 		ret = rte_eth_dev_start(portid);
1635d7937e2eSIntel 		if (ret < 0)
1636d7937e2eSIntel 			rte_exit(EXIT_FAILURE, "rte_eth_dev_start: err=%d, "
1637d7937e2eSIntel 						"port=%d\n", ret, portid);
1638d7937e2eSIntel 
1639d7937e2eSIntel 		/*
1640d7937e2eSIntel 		 * If enabled, put device in promiscuous mode.
1641d7937e2eSIntel 		 * This allows IO forwarding mode to forward packets
1642d7937e2eSIntel 		 * to itself through 2 cross-connected  ports of the
1643d7937e2eSIntel 		 * target machine.
1644d7937e2eSIntel 		 */
1645d7937e2eSIntel 		if (promiscuous_on)
1646d7937e2eSIntel 			rte_eth_promiscuous_enable(portid);
1647d7937e2eSIntel 	}
1648d7937e2eSIntel 
1649d7937e2eSIntel 	check_all_ports_link_status((uint8_t)nb_ports, enabled_port_mask);
1650d7937e2eSIntel 
1651d7937e2eSIntel 	/* launch per-lcore init on every lcore */
1652d7937e2eSIntel 	rte_eal_mp_remote_launch(main_loop, NULL, CALL_MASTER);
1653d7937e2eSIntel 	RTE_LCORE_FOREACH_SLAVE(lcore_id) {
1654d7937e2eSIntel 		if (rte_eal_wait_lcore(lcore_id) < 0)
1655d7937e2eSIntel 			return -1;
1656d7937e2eSIntel 	}
1657d7937e2eSIntel 
1658d7937e2eSIntel 	return 0;
1659d7937e2eSIntel }
1660