xref: /dpdk/examples/ip_reassembly/main.c (revision ec3d82db2dc13d3b96b7d97801d85dcbaaa1d1cb)
1cc8f4d02SIntel /*-
2cc8f4d02SIntel  *   BSD LICENSE
3cc8f4d02SIntel  *
4e9d48c00SBruce Richardson  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5cc8f4d02SIntel  *   All rights reserved.
6cc8f4d02SIntel  *
7cc8f4d02SIntel  *   Redistribution and use in source and binary forms, with or without
8cc8f4d02SIntel  *   modification, are permitted provided that the following conditions
9cc8f4d02SIntel  *   are met:
10cc8f4d02SIntel  *
11cc8f4d02SIntel  *     * Redistributions of source code must retain the above copyright
12cc8f4d02SIntel  *       notice, this list of conditions and the following disclaimer.
13cc8f4d02SIntel  *     * Redistributions in binary form must reproduce the above copyright
14cc8f4d02SIntel  *       notice, this list of conditions and the following disclaimer in
15cc8f4d02SIntel  *       the documentation and/or other materials provided with the
16cc8f4d02SIntel  *       distribution.
17cc8f4d02SIntel  *     * Neither the name of Intel Corporation nor the names of its
18cc8f4d02SIntel  *       contributors may be used to endorse or promote products derived
19cc8f4d02SIntel  *       from this software without specific prior written permission.
20cc8f4d02SIntel  *
21cc8f4d02SIntel  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22cc8f4d02SIntel  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23cc8f4d02SIntel  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24cc8f4d02SIntel  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25cc8f4d02SIntel  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26cc8f4d02SIntel  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27cc8f4d02SIntel  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28cc8f4d02SIntel  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29cc8f4d02SIntel  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30cc8f4d02SIntel  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31cc8f4d02SIntel  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32cc8f4d02SIntel  */
33cc8f4d02SIntel 
34cc8f4d02SIntel #include <stdio.h>
35cc8f4d02SIntel #include <stdlib.h>
36cc8f4d02SIntel #include <stdint.h>
37cc8f4d02SIntel #include <inttypes.h>
38cc8f4d02SIntel #include <sys/types.h>
39cc8f4d02SIntel #include <string.h>
40cc8f4d02SIntel #include <sys/queue.h>
41cc8f4d02SIntel #include <stdarg.h>
42cc8f4d02SIntel #include <errno.h>
43cc8f4d02SIntel #include <getopt.h>
44cc8f4d02SIntel #include <signal.h>
45b84fb4cbSAnatoly Burakov #include <sys/param.h>
46cc8f4d02SIntel 
47cc8f4d02SIntel #include <rte_common.h>
48cc8f4d02SIntel #include <rte_byteorder.h>
49cc8f4d02SIntel #include <rte_log.h>
50cc8f4d02SIntel #include <rte_memory.h>
51cc8f4d02SIntel #include <rte_memcpy.h>
52cc8f4d02SIntel #include <rte_memzone.h>
53cc8f4d02SIntel #include <rte_tailq.h>
54cc8f4d02SIntel #include <rte_eal.h>
55cc8f4d02SIntel #include <rte_per_lcore.h>
56cc8f4d02SIntel #include <rte_launch.h>
57cc8f4d02SIntel #include <rte_atomic.h>
58cc8f4d02SIntel #include <rte_cycles.h>
59cc8f4d02SIntel #include <rte_prefetch.h>
60cc8f4d02SIntel #include <rte_lcore.h>
61cc8f4d02SIntel #include <rte_per_lcore.h>
62cc8f4d02SIntel #include <rte_branch_prediction.h>
63cc8f4d02SIntel #include <rte_interrupts.h>
64cc8f4d02SIntel #include <rte_pci.h>
65cc8f4d02SIntel #include <rte_random.h>
66cc8f4d02SIntel #include <rte_debug.h>
67cc8f4d02SIntel #include <rte_ether.h>
68cc8f4d02SIntel #include <rte_ethdev.h>
69cc8f4d02SIntel #include <rte_ring.h>
70cc8f4d02SIntel #include <rte_mempool.h>
71cc8f4d02SIntel #include <rte_mbuf.h>
72cc8f4d02SIntel #include <rte_malloc.h>
73cc8f4d02SIntel #include <rte_ip.h>
74cc8f4d02SIntel #include <rte_tcp.h>
75cc8f4d02SIntel #include <rte_udp.h>
76cc8f4d02SIntel #include <rte_string_fns.h>
77cc8f4d02SIntel #include <rte_lpm.h>
78cc8f4d02SIntel #include <rte_lpm6.h>
79b84fb4cbSAnatoly Burakov 
80b84fb4cbSAnatoly Burakov #include <rte_ip_frag.h>
81b84fb4cbSAnatoly Burakov 
82b84fb4cbSAnatoly Burakov #include "main.h"
83cc8f4d02SIntel 
84595ea7dcSIntel #define MAX_PKT_BURST 32
85595ea7dcSIntel 
86595ea7dcSIntel 
87b84fb4cbSAnatoly Burakov #define RTE_LOGTYPE_IP_RSMBL RTE_LOGTYPE_USER1
88cc8f4d02SIntel 
89cc8f4d02SIntel #define MAX_JUMBO_PKT_LEN  9600
90cc8f4d02SIntel 
91cc8f4d02SIntel #define	BUF_SIZE	2048
92cc8f4d02SIntel #define MBUF_SIZE	\
93cc8f4d02SIntel 	(BUF_SIZE + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM)
94cc8f4d02SIntel 
95b84fb4cbSAnatoly Burakov #define NB_MBUF 8192
96b84fb4cbSAnatoly Burakov 
97b84fb4cbSAnatoly Burakov /* allow max jumbo frame 9.5 KB */
98b84fb4cbSAnatoly Burakov #define JUMBO_FRAME_MAX_SIZE	0x2600
99b84fb4cbSAnatoly Burakov 
100cc8f4d02SIntel #define	MAX_FLOW_NUM	UINT16_MAX
101cc8f4d02SIntel #define	MIN_FLOW_NUM	1
102cc8f4d02SIntel #define	DEF_FLOW_NUM	0x1000
103cc8f4d02SIntel 
104cc8f4d02SIntel /* TTL numbers are in ms. */
105cc8f4d02SIntel #define	MAX_FLOW_TTL	(3600 * MS_PER_S)
106cc8f4d02SIntel #define	MIN_FLOW_TTL	1
107cc8f4d02SIntel #define	DEF_FLOW_TTL	MS_PER_S
108cc8f4d02SIntel 
109b84fb4cbSAnatoly Burakov #define MAX_FRAG_NUM RTE_LIBRTE_IP_FRAG_MAX_FRAG
110cc8f4d02SIntel 
111cc8f4d02SIntel /* Should be power of two. */
112b84fb4cbSAnatoly Burakov #define	IP_FRAG_TBL_BUCKET_ENTRIES	16
113cc8f4d02SIntel 
114cc8f4d02SIntel static uint32_t max_flow_num = DEF_FLOW_NUM;
115cc8f4d02SIntel static uint32_t max_flow_ttl = DEF_FLOW_TTL;
116cc8f4d02SIntel 
117cc8f4d02SIntel #define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
118cc8f4d02SIntel 
119cc8f4d02SIntel #define NB_SOCKETS 8
120cc8f4d02SIntel 
121cc8f4d02SIntel /* Configure how many packets ahead to prefetch, when reading packets */
122cc8f4d02SIntel #define PREFETCH_OFFSET	3
123cc8f4d02SIntel 
124cc8f4d02SIntel /*
125cc8f4d02SIntel  * Configurable number of RX/TX ring descriptors
126cc8f4d02SIntel  */
127cc8f4d02SIntel #define RTE_TEST_RX_DESC_DEFAULT 128
128cc8f4d02SIntel #define RTE_TEST_TX_DESC_DEFAULT 512
129595ea7dcSIntel 
130cc8f4d02SIntel static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
131cc8f4d02SIntel static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;
132cc8f4d02SIntel 
133cc8f4d02SIntel /* ethernet addresses of ports */
134b84fb4cbSAnatoly Burakov static struct ether_addr ports_eth_addr[RTE_MAX_ETHPORTS];
135b84fb4cbSAnatoly Burakov 
136b84fb4cbSAnatoly Burakov #ifndef IPv4_BYTES
137b84fb4cbSAnatoly Burakov #define IPv4_BYTES_FMT "%" PRIu8 ".%" PRIu8 ".%" PRIu8 ".%" PRIu8
138b84fb4cbSAnatoly Burakov #define IPv4_BYTES(addr) \
139b84fb4cbSAnatoly Burakov 		(uint8_t) (((addr) >> 24) & 0xFF),\
140b84fb4cbSAnatoly Burakov 		(uint8_t) (((addr) >> 16) & 0xFF),\
141b84fb4cbSAnatoly Burakov 		(uint8_t) (((addr) >> 8) & 0xFF),\
142b84fb4cbSAnatoly Burakov 		(uint8_t) ((addr) & 0xFF)
143b84fb4cbSAnatoly Burakov #endif
144b84fb4cbSAnatoly Burakov 
145b84fb4cbSAnatoly Burakov #ifndef IPv6_BYTES
146b84fb4cbSAnatoly Burakov #define IPv6_BYTES_FMT "%02x%02x:%02x%02x:%02x%02x:%02x%02x:"\
147b84fb4cbSAnatoly Burakov                        "%02x%02x:%02x%02x:%02x%02x:%02x%02x"
148b84fb4cbSAnatoly Burakov #define IPv6_BYTES(addr) \
149b84fb4cbSAnatoly Burakov 	addr[0],  addr[1], addr[2],  addr[3], \
150b84fb4cbSAnatoly Burakov 	addr[4],  addr[5], addr[6],  addr[7], \
151b84fb4cbSAnatoly Burakov 	addr[8],  addr[9], addr[10], addr[11],\
152b84fb4cbSAnatoly Burakov 	addr[12], addr[13],addr[14], addr[15]
153b84fb4cbSAnatoly Burakov #endif
154b84fb4cbSAnatoly Burakov 
155b84fb4cbSAnatoly Burakov #define IPV6_ADDR_LEN 16
156cc8f4d02SIntel 
157cc8f4d02SIntel /* mask of enabled ports */
158cc8f4d02SIntel static uint32_t enabled_port_mask = 0;
159b84fb4cbSAnatoly Burakov 
160b84fb4cbSAnatoly Burakov static int rx_queue_per_lcore = 1;
161cc8f4d02SIntel 
162cc8f4d02SIntel struct mbuf_table {
163595ea7dcSIntel 	uint32_t len;
164595ea7dcSIntel 	uint32_t head;
165595ea7dcSIntel 	uint32_t tail;
166595ea7dcSIntel 	struct rte_mbuf *m_table[0];
167cc8f4d02SIntel };
168cc8f4d02SIntel 
169b84fb4cbSAnatoly Burakov struct rx_queue {
170b84fb4cbSAnatoly Burakov 	struct rte_ip_frag_tbl *frag_tbl;
171b84fb4cbSAnatoly Burakov 	struct rte_mempool *pool;
172b84fb4cbSAnatoly Burakov 	struct rte_lpm *lpm;
173b84fb4cbSAnatoly Burakov 	struct rte_lpm6 *lpm6;
174b84fb4cbSAnatoly Burakov 	uint8_t portid;
175cc8f4d02SIntel };
176cc8f4d02SIntel 
177b84fb4cbSAnatoly Burakov struct tx_lcore_stat {
178b84fb4cbSAnatoly Burakov 	uint64_t call;
179b84fb4cbSAnatoly Burakov 	uint64_t drop;
180b84fb4cbSAnatoly Burakov 	uint64_t queue;
181b84fb4cbSAnatoly Burakov 	uint64_t send;
182b84fb4cbSAnatoly Burakov };
183b84fb4cbSAnatoly Burakov 
184b84fb4cbSAnatoly Burakov #define MAX_RX_QUEUE_PER_LCORE 16
185b84fb4cbSAnatoly Burakov #define MAX_TX_QUEUE_PER_PORT 16
186b84fb4cbSAnatoly Burakov #define MAX_RX_QUEUE_PER_PORT 128
187b84fb4cbSAnatoly Burakov 
188b84fb4cbSAnatoly Burakov struct lcore_queue_conf {
189b84fb4cbSAnatoly Burakov 	uint16_t n_rx_queue;
190b84fb4cbSAnatoly Burakov 	struct rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
191b84fb4cbSAnatoly Burakov 	uint16_t tx_queue_id[RTE_MAX_ETHPORTS];
192b84fb4cbSAnatoly Burakov 	struct rte_ip_frag_death_row death_row;
193b84fb4cbSAnatoly Burakov 	struct mbuf_table *tx_mbufs[RTE_MAX_ETHPORTS];
194b84fb4cbSAnatoly Burakov 	struct tx_lcore_stat tx_stat;
195b84fb4cbSAnatoly Burakov } __rte_cache_aligned;
196b84fb4cbSAnatoly Burakov static struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
197cc8f4d02SIntel 
198cc8f4d02SIntel static struct rte_eth_conf port_conf = {
199cc8f4d02SIntel 	.rxmode = {
20013c4ebd6SBruce Richardson 		.mq_mode        = ETH_MQ_RX_RSS,
201b84fb4cbSAnatoly Burakov 		.max_rx_pkt_len = JUMBO_FRAME_MAX_SIZE,
202cc8f4d02SIntel 		.split_hdr_size = 0,
203cc8f4d02SIntel 		.header_split   = 0, /**< Header Split disabled */
204cc8f4d02SIntel 		.hw_ip_checksum = 1, /**< IP checksum offload enabled */
205cc8f4d02SIntel 		.hw_vlan_filter = 0, /**< VLAN filtering disabled */
206b84fb4cbSAnatoly Burakov 		.jumbo_frame    = 1, /**< Jumbo Frame Support disabled */
207cc8f4d02SIntel 		.hw_strip_crc   = 0, /**< CRC stripped by hardware */
208cc8f4d02SIntel 	},
209cc8f4d02SIntel 	.rx_adv_conf = {
210cc8f4d02SIntel 			.rss_conf = {
211cc8f4d02SIntel 				.rss_key = NULL,
2128a387fa8SHelin Zhang 				.rss_hf = ETH_RSS_IP,
213cc8f4d02SIntel 		},
214cc8f4d02SIntel 	},
215cc8f4d02SIntel 	.txmode = {
216cc8f4d02SIntel 		.mq_mode = ETH_MQ_TX_NONE,
217cc8f4d02SIntel 	},
218cc8f4d02SIntel };
219cc8f4d02SIntel 
220b84fb4cbSAnatoly Burakov /*
221b84fb4cbSAnatoly Burakov  * IPv4 forwarding table
222b84fb4cbSAnatoly Burakov  */
223b84fb4cbSAnatoly Burakov struct l3fwd_ipv4_route {
224cc8f4d02SIntel 	uint32_t ip;
225cc8f4d02SIntel 	uint8_t  depth;
226cc8f4d02SIntel 	uint8_t  if_out;
227cc8f4d02SIntel };
228cc8f4d02SIntel 
229b84fb4cbSAnatoly Burakov struct l3fwd_ipv4_route l3fwd_ipv4_route_array[] = {
230b84fb4cbSAnatoly Burakov 		{IPv4(100,10,0,0), 16, 0},
231b84fb4cbSAnatoly Burakov 		{IPv4(100,20,0,0), 16, 1},
232b84fb4cbSAnatoly Burakov 		{IPv4(100,30,0,0), 16, 2},
233b84fb4cbSAnatoly Burakov 		{IPv4(100,40,0,0), 16, 3},
234b84fb4cbSAnatoly Burakov 		{IPv4(100,50,0,0), 16, 4},
235b84fb4cbSAnatoly Burakov 		{IPv4(100,60,0,0), 16, 5},
236b84fb4cbSAnatoly Burakov 		{IPv4(100,70,0,0), 16, 6},
237b84fb4cbSAnatoly Burakov 		{IPv4(100,80,0,0), 16, 7},
238b84fb4cbSAnatoly Burakov };
239b84fb4cbSAnatoly Burakov 
240b84fb4cbSAnatoly Burakov /*
241b84fb4cbSAnatoly Burakov  * IPv6 forwarding table
242b84fb4cbSAnatoly Burakov  */
243b84fb4cbSAnatoly Burakov 
244b84fb4cbSAnatoly Burakov struct l3fwd_ipv6_route {
245b84fb4cbSAnatoly Burakov 	uint8_t ip[IPV6_ADDR_LEN];
246cc8f4d02SIntel 	uint8_t depth;
247cc8f4d02SIntel 	uint8_t if_out;
248cc8f4d02SIntel };
249cc8f4d02SIntel 
250b84fb4cbSAnatoly Burakov static struct l3fwd_ipv6_route l3fwd_ipv6_route_array[] = {
251cc8f4d02SIntel 	{{1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 0},
252cc8f4d02SIntel 	{{2,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 1},
253cc8f4d02SIntel 	{{3,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 2},
254cc8f4d02SIntel 	{{4,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 3},
255cc8f4d02SIntel 	{{5,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 4},
256cc8f4d02SIntel 	{{6,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 5},
257cc8f4d02SIntel 	{{7,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 6},
258cc8f4d02SIntel 	{{8,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 7},
259cc8f4d02SIntel };
260cc8f4d02SIntel 
261b84fb4cbSAnatoly Burakov #define LPM_MAX_RULES         1024
262b84fb4cbSAnatoly Burakov #define LPM6_MAX_RULES         1024
263b84fb4cbSAnatoly Burakov #define LPM6_NUMBER_TBL8S (1 << 16)
264cc8f4d02SIntel 
265b84fb4cbSAnatoly Burakov struct rte_lpm6_config lpm6_config = {
266b84fb4cbSAnatoly Burakov 		.max_rules = LPM6_MAX_RULES,
267b84fb4cbSAnatoly Burakov 		.number_tbl8s = LPM6_NUMBER_TBL8S,
268b84fb4cbSAnatoly Burakov 		.flags = 0
269595ea7dcSIntel };
270595ea7dcSIntel 
271b84fb4cbSAnatoly Burakov static struct rte_lpm *socket_lpm[RTE_MAX_NUMA_NODES];
272b84fb4cbSAnatoly Burakov static struct rte_lpm6 *socket_lpm6[RTE_MAX_NUMA_NODES];
273b84fb4cbSAnatoly Burakov 
274240952a9SAnatoly Burakov #ifdef RTE_LIBRTE_IP_FRAG_TBL_STAT
275595ea7dcSIntel #define TX_LCORE_STAT_UPDATE(s, f, v)   ((s)->f += (v))
276595ea7dcSIntel #else
277595ea7dcSIntel #define TX_LCORE_STAT_UPDATE(s, f, v)   do {} while (0)
278240952a9SAnatoly Burakov #endif /* RTE_LIBRTE_IP_FRAG_TBL_STAT */
279cc8f4d02SIntel 
280595ea7dcSIntel /*
281595ea7dcSIntel  * If number of queued packets reached given threahold, then
282595ea7dcSIntel  * send burst of packets on an output interface.
283595ea7dcSIntel  */
284595ea7dcSIntel static inline uint32_t
285b84fb4cbSAnatoly Burakov send_burst(struct lcore_queue_conf *qconf, uint32_t thresh, uint8_t port)
286cc8f4d02SIntel {
287595ea7dcSIntel 	uint32_t fill, len, k, n;
288595ea7dcSIntel 	struct mbuf_table *txmb;
289cc8f4d02SIntel 
290595ea7dcSIntel 	txmb = qconf->tx_mbufs[port];
291595ea7dcSIntel 	len = txmb->len;
292cc8f4d02SIntel 
293595ea7dcSIntel 	if ((int32_t)(fill = txmb->head - txmb->tail) < 0)
294595ea7dcSIntel 		fill += len;
295595ea7dcSIntel 
296595ea7dcSIntel 	if (fill >= thresh) {
297595ea7dcSIntel 		n = RTE_MIN(len - txmb->tail, fill);
298595ea7dcSIntel 
299595ea7dcSIntel 		k = rte_eth_tx_burst(port, qconf->tx_queue_id[port],
300595ea7dcSIntel 			txmb->m_table + txmb->tail, (uint16_t)n);
301595ea7dcSIntel 
302595ea7dcSIntel 		TX_LCORE_STAT_UPDATE(&qconf->tx_stat, call, 1);
303595ea7dcSIntel 		TX_LCORE_STAT_UPDATE(&qconf->tx_stat, send, k);
304595ea7dcSIntel 
305595ea7dcSIntel 		fill -= k;
306595ea7dcSIntel 		if ((txmb->tail += k) == len)
307595ea7dcSIntel 			txmb->tail = 0;
308cc8f4d02SIntel 	}
309cc8f4d02SIntel 
310595ea7dcSIntel 	return (fill);
311cc8f4d02SIntel }
312cc8f4d02SIntel 
313cc8f4d02SIntel /* Enqueue a single packet, and send burst if queue is filled */
314cc8f4d02SIntel static inline int
315cc8f4d02SIntel send_single_packet(struct rte_mbuf *m, uint8_t port)
316cc8f4d02SIntel {
317595ea7dcSIntel 	uint32_t fill, lcore_id, len;
318b84fb4cbSAnatoly Burakov 	struct lcore_queue_conf *qconf;
319595ea7dcSIntel 	struct mbuf_table *txmb;
320cc8f4d02SIntel 
321cc8f4d02SIntel 	lcore_id = rte_lcore_id();
322b84fb4cbSAnatoly Burakov 	qconf = &lcore_queue_conf[lcore_id];
323cc8f4d02SIntel 
324595ea7dcSIntel 	txmb = qconf->tx_mbufs[port];
325595ea7dcSIntel 	len = txmb->len;
326595ea7dcSIntel 
327595ea7dcSIntel 	fill = send_burst(qconf, MAX_PKT_BURST, port);
328595ea7dcSIntel 
329595ea7dcSIntel 	if (fill == len - 1) {
330595ea7dcSIntel 		TX_LCORE_STAT_UPDATE(&qconf->tx_stat, drop, 1);
331595ea7dcSIntel 		rte_pktmbuf_free(txmb->m_table[txmb->tail]);
332595ea7dcSIntel 		if (++txmb->tail == len)
333595ea7dcSIntel 			txmb->tail = 0;
334cc8f4d02SIntel 	}
335cc8f4d02SIntel 
336595ea7dcSIntel 	TX_LCORE_STAT_UPDATE(&qconf->tx_stat, queue, 1);
337595ea7dcSIntel 	txmb->m_table[txmb->head] = m;
338595ea7dcSIntel 	if(++txmb->head == len)
339595ea7dcSIntel 		txmb->head = 0;
340595ea7dcSIntel 
341595ea7dcSIntel 	return (0);
342cc8f4d02SIntel }
343cc8f4d02SIntel 
344cc8f4d02SIntel static inline void
345b84fb4cbSAnatoly Burakov reassemble(struct rte_mbuf *m, uint8_t portid, uint32_t queue,
346b84fb4cbSAnatoly Burakov 	struct lcore_queue_conf *qconf, uint64_t tms)
347cc8f4d02SIntel {
348cc8f4d02SIntel 	struct ether_hdr *eth_hdr;
349b84fb4cbSAnatoly Burakov 	struct rte_ip_frag_tbl *tbl;
350b84fb4cbSAnatoly Burakov 	struct rte_ip_frag_death_row *dr;
351b84fb4cbSAnatoly Burakov 	struct rx_queue *rxq;
352cc8f4d02SIntel 	void *d_addr_bytes;
353b84fb4cbSAnatoly Burakov 	uint8_t next_hop, dst_port;
354b84fb4cbSAnatoly Burakov 
355b84fb4cbSAnatoly Burakov 	rxq = &qconf->rx_queue_list[queue];
356cc8f4d02SIntel 
357cc8f4d02SIntel 	eth_hdr = rte_pktmbuf_mtod(m, struct ether_hdr *);
358cc8f4d02SIntel 
359b84fb4cbSAnatoly Burakov 	dst_port = portid;
360cc8f4d02SIntel 
361b84fb4cbSAnatoly Burakov 	/* if packet is IPv4 */
362b84fb4cbSAnatoly Burakov 	if (m->ol_flags & (PKT_RX_IPV4_HDR)) {
363b84fb4cbSAnatoly Burakov 		struct ipv4_hdr *ip_hdr;
364b84fb4cbSAnatoly Burakov 		uint32_t ip_dst;
365cc8f4d02SIntel 
366b84fb4cbSAnatoly Burakov 		ip_hdr = (struct ipv4_hdr *)(eth_hdr + 1);
367cc8f4d02SIntel 
368cc8f4d02SIntel 		 /* if it is a fragmented packet, then try to reassemble. */
369b84fb4cbSAnatoly Burakov 		if (rte_ipv4_frag_pkt_is_fragmented(ip_hdr)) {
370cc8f4d02SIntel 			struct rte_mbuf *mo;
371cc8f4d02SIntel 
372b84fb4cbSAnatoly Burakov 			tbl = rxq->frag_tbl;
373595ea7dcSIntel 			dr = &qconf->death_row;
374cc8f4d02SIntel 
375cc8f4d02SIntel 			/* prepare mbuf: setup l2_len/l3_len. */
3767869536fSBruce Richardson 			m->l2_len = sizeof(*eth_hdr);
3777869536fSBruce Richardson 			m->l3_len = sizeof(*ip_hdr);
378cc8f4d02SIntel 
379cc8f4d02SIntel 			/* process this fragment. */
380b84fb4cbSAnatoly Burakov 			mo = rte_ipv4_frag_reassemble_packet(tbl, dr, m, tms, ip_hdr);
381b84fb4cbSAnatoly Burakov 			if (mo == NULL)
382cc8f4d02SIntel 				/* no packet to send out. */
383cc8f4d02SIntel 				return;
384cc8f4d02SIntel 
385cc8f4d02SIntel 			/* we have our packet reassembled. */
386cc8f4d02SIntel 			if (mo != m) {
387cc8f4d02SIntel 				m = mo;
388cc8f4d02SIntel 				eth_hdr = rte_pktmbuf_mtod(m,
389cc8f4d02SIntel 					struct ether_hdr *);
390b84fb4cbSAnatoly Burakov 				ip_hdr = (struct ipv4_hdr *)(eth_hdr + 1);
391b84fb4cbSAnatoly Burakov 			}
392b84fb4cbSAnatoly Burakov 		}
393b84fb4cbSAnatoly Burakov 		ip_dst = rte_be_to_cpu_32(ip_hdr->dst_addr);
394b84fb4cbSAnatoly Burakov 
395b84fb4cbSAnatoly Burakov 		/* Find destination port */
396b84fb4cbSAnatoly Burakov 		if (rte_lpm_lookup(rxq->lpm, ip_dst, &next_hop) == 0 &&
397b84fb4cbSAnatoly Burakov 				(enabled_port_mask & 1 << next_hop) != 0) {
398b84fb4cbSAnatoly Burakov 			dst_port = next_hop;
399b84fb4cbSAnatoly Burakov 		}
400b84fb4cbSAnatoly Burakov 
401b84fb4cbSAnatoly Burakov 		eth_hdr->ether_type = rte_be_to_cpu_16(ETHER_TYPE_IPv4);
402b84fb4cbSAnatoly Burakov 	}
403b84fb4cbSAnatoly Burakov 	/* if packet is IPv6 */
404b84fb4cbSAnatoly Burakov 	else if (m->ol_flags & (PKT_RX_IPV6_HDR | PKT_RX_IPV6_HDR_EXT)) {
405b84fb4cbSAnatoly Burakov 		struct ipv6_extension_fragment *frag_hdr;
406b84fb4cbSAnatoly Burakov 		struct ipv6_hdr *ip_hdr;
407b84fb4cbSAnatoly Burakov 
408b84fb4cbSAnatoly Burakov 		ip_hdr = (struct ipv6_hdr *)(eth_hdr + 1);
409b84fb4cbSAnatoly Burakov 
410b84fb4cbSAnatoly Burakov 		frag_hdr = rte_ipv6_frag_get_ipv6_fragment_header(ip_hdr);
411b84fb4cbSAnatoly Burakov 
412b84fb4cbSAnatoly Burakov 		if (frag_hdr != NULL) {
413b84fb4cbSAnatoly Burakov 			struct rte_mbuf *mo;
414b84fb4cbSAnatoly Burakov 
415b84fb4cbSAnatoly Burakov 			tbl = rxq->frag_tbl;
416b84fb4cbSAnatoly Burakov 			dr  = &qconf->death_row;
417b84fb4cbSAnatoly Burakov 
418b84fb4cbSAnatoly Burakov 			/* prepare mbuf: setup l2_len/l3_len. */
4197869536fSBruce Richardson 			m->l2_len = sizeof(*eth_hdr);
4207869536fSBruce Richardson 			m->l3_len = sizeof(*ip_hdr) + sizeof(*frag_hdr);
421b84fb4cbSAnatoly Burakov 
422b84fb4cbSAnatoly Burakov 			mo = rte_ipv6_frag_reassemble_packet(tbl, dr, m, tms, ip_hdr, frag_hdr);
423b84fb4cbSAnatoly Burakov 			if (mo == NULL)
424b84fb4cbSAnatoly Burakov 				return;
425b84fb4cbSAnatoly Burakov 
426b84fb4cbSAnatoly Burakov 			if (mo != m) {
427b84fb4cbSAnatoly Burakov 				m = mo;
428b84fb4cbSAnatoly Burakov 				eth_hdr = rte_pktmbuf_mtod(m, struct ether_hdr *);
429b84fb4cbSAnatoly Burakov 				ip_hdr = (struct ipv6_hdr *)(eth_hdr + 1);
430cc8f4d02SIntel 			}
431cc8f4d02SIntel 		}
432cc8f4d02SIntel 
433b84fb4cbSAnatoly Burakov 		/* Find destination port */
434b84fb4cbSAnatoly Burakov 		if (rte_lpm6_lookup(rxq->lpm6, ip_hdr->dst_addr, &next_hop) == 0 &&
435b84fb4cbSAnatoly Burakov 				(enabled_port_mask & 1 << next_hop) != 0) {
436b84fb4cbSAnatoly Burakov 			dst_port = next_hop;
437b84fb4cbSAnatoly Burakov 		}
438b84fb4cbSAnatoly Burakov 
439b84fb4cbSAnatoly Burakov 		eth_hdr->ether_type = rte_be_to_cpu_16(ETHER_TYPE_IPv6);
440b84fb4cbSAnatoly Burakov 	}
441b84fb4cbSAnatoly Burakov 	/* if packet wasn't IPv4 or IPv6, it's forwarded to the port it came from */
442cc8f4d02SIntel 
443cc8f4d02SIntel 	/* 02:00:00:00:00:xx */
444cc8f4d02SIntel 	d_addr_bytes = &eth_hdr->d_addr.addr_bytes[0];
445cc8f4d02SIntel 	*((uint64_t *)d_addr_bytes) = 0x000000000002 + ((uint64_t)dst_port << 40);
446cc8f4d02SIntel 
447cc8f4d02SIntel 	/* src addr */
448cc8f4d02SIntel 	ether_addr_copy(&ports_eth_addr[dst_port], &eth_hdr->s_addr);
449cc8f4d02SIntel 
450cc8f4d02SIntel 	send_single_packet(m, dst_port);
451cc8f4d02SIntel }
452cc8f4d02SIntel 
453cc8f4d02SIntel /* main processing loop */
454cc8f4d02SIntel static int
455cc8f4d02SIntel main_loop(__attribute__((unused)) void *dummy)
456cc8f4d02SIntel {
457cc8f4d02SIntel 	struct rte_mbuf *pkts_burst[MAX_PKT_BURST];
458cc8f4d02SIntel 	unsigned lcore_id;
459cc8f4d02SIntel 	uint64_t diff_tsc, cur_tsc, prev_tsc;
460cc8f4d02SIntel 	int i, j, nb_rx;
461b84fb4cbSAnatoly Burakov 	uint8_t portid;
462b84fb4cbSAnatoly Burakov 	struct lcore_queue_conf *qconf;
463cc8f4d02SIntel 	const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US;
464cc8f4d02SIntel 
465cc8f4d02SIntel 	prev_tsc = 0;
466cc8f4d02SIntel 
467cc8f4d02SIntel 	lcore_id = rte_lcore_id();
468b84fb4cbSAnatoly Burakov 	qconf = &lcore_queue_conf[lcore_id];
469cc8f4d02SIntel 
470cc8f4d02SIntel 	if (qconf->n_rx_queue == 0) {
471b84fb4cbSAnatoly Burakov 		RTE_LOG(INFO, IP_RSMBL, "lcore %u has nothing to do\n", lcore_id);
472cc8f4d02SIntel 		return 0;
473cc8f4d02SIntel 	}
474cc8f4d02SIntel 
475b84fb4cbSAnatoly Burakov 	RTE_LOG(INFO, IP_RSMBL, "entering main loop on lcore %u\n", lcore_id);
476cc8f4d02SIntel 
477cc8f4d02SIntel 	for (i = 0; i < qconf->n_rx_queue; i++) {
478cc8f4d02SIntel 
479b84fb4cbSAnatoly Burakov 		portid = qconf->rx_queue_list[i].portid;
480b84fb4cbSAnatoly Burakov 		RTE_LOG(INFO, IP_RSMBL, " -- lcoreid=%u portid=%hhu\n", lcore_id,
481b84fb4cbSAnatoly Burakov 			portid);
482cc8f4d02SIntel 	}
483cc8f4d02SIntel 
484cc8f4d02SIntel 	while (1) {
485cc8f4d02SIntel 
486cc8f4d02SIntel 		cur_tsc = rte_rdtsc();
487cc8f4d02SIntel 
488cc8f4d02SIntel 		/*
489cc8f4d02SIntel 		 * TX burst queue drain
490cc8f4d02SIntel 		 */
491cc8f4d02SIntel 		diff_tsc = cur_tsc - prev_tsc;
492cc8f4d02SIntel 		if (unlikely(diff_tsc > drain_tsc)) {
493cc8f4d02SIntel 
494cc8f4d02SIntel 			/*
495cc8f4d02SIntel 			 * This could be optimized (use queueid instead of
496cc8f4d02SIntel 			 * portid), but it is not called so often
497cc8f4d02SIntel 			 */
498b84fb4cbSAnatoly Burakov 			for (portid = 0; portid < RTE_MAX_ETHPORTS; portid++) {
499595ea7dcSIntel 				if ((enabled_port_mask & (1 << portid)) != 0)
500595ea7dcSIntel 					send_burst(qconf, 1, portid);
501cc8f4d02SIntel 			}
502cc8f4d02SIntel 
503cc8f4d02SIntel 			prev_tsc = cur_tsc;
504cc8f4d02SIntel 		}
505cc8f4d02SIntel 
506cc8f4d02SIntel 		/*
507cc8f4d02SIntel 		 * Read packet from RX queues
508cc8f4d02SIntel 		 */
509cc8f4d02SIntel 		for (i = 0; i < qconf->n_rx_queue; ++i) {
510cc8f4d02SIntel 
511b84fb4cbSAnatoly Burakov 			portid = qconf->rx_queue_list[i].portid;
512cc8f4d02SIntel 
513b84fb4cbSAnatoly Burakov 			nb_rx = rte_eth_rx_burst(portid, 0, pkts_burst,
514cc8f4d02SIntel 				MAX_PKT_BURST);
515cc8f4d02SIntel 
516cc8f4d02SIntel 			/* Prefetch first packets */
517cc8f4d02SIntel 			for (j = 0; j < PREFETCH_OFFSET && j < nb_rx; j++) {
518cc8f4d02SIntel 				rte_prefetch0(rte_pktmbuf_mtod(
519cc8f4d02SIntel 						pkts_burst[j], void *));
520cc8f4d02SIntel 			}
521cc8f4d02SIntel 
522cc8f4d02SIntel 			/* Prefetch and forward already prefetched packets */
523cc8f4d02SIntel 			for (j = 0; j < (nb_rx - PREFETCH_OFFSET); j++) {
524cc8f4d02SIntel 				rte_prefetch0(rte_pktmbuf_mtod(pkts_burst[
525cc8f4d02SIntel 					j + PREFETCH_OFFSET], void *));
526b84fb4cbSAnatoly Burakov 				reassemble(pkts_burst[j], portid,
527cc8f4d02SIntel 					i, qconf, cur_tsc);
528cc8f4d02SIntel 			}
529cc8f4d02SIntel 
530cc8f4d02SIntel 			/* Forward remaining prefetched packets */
531cc8f4d02SIntel 			for (; j < nb_rx; j++) {
532b84fb4cbSAnatoly Burakov 				reassemble(pkts_burst[j], portid,
533cc8f4d02SIntel 					i, qconf, cur_tsc);
534cc8f4d02SIntel 			}
535595ea7dcSIntel 
53663ec0b58SAnatoly Burakov 			rte_ip_frag_free_death_row(&qconf->death_row,
537595ea7dcSIntel 				PREFETCH_OFFSET);
538cc8f4d02SIntel 		}
539cc8f4d02SIntel 	}
540cc8f4d02SIntel }
541cc8f4d02SIntel 
542cc8f4d02SIntel /* display usage */
543cc8f4d02SIntel static void
544cc8f4d02SIntel print_usage(const char *prgname)
545cc8f4d02SIntel {
546b84fb4cbSAnatoly Burakov 	printf("%s [EAL options] -- -p PORTMASK [-q NQ]"
547b84fb4cbSAnatoly Burakov 		"  [--max-pkt-len PKTLEN]"
548cc8f4d02SIntel 		"  [--maxflows=<flows>]  [--flowttl=<ttl>[(s|ms)]]\n"
549cc8f4d02SIntel 		"  -p PORTMASK: hexadecimal bitmask of ports to configure\n"
550b84fb4cbSAnatoly Burakov 		"  -q NQ: number of RX queues per lcore\n"
551cc8f4d02SIntel 		"  --maxflows=<flows>: optional, maximum number of flows "
552cc8f4d02SIntel 		"supported\n"
553cc8f4d02SIntel 		"  --flowttl=<ttl>[(s|ms)]: optional, maximum TTL for each "
554cc8f4d02SIntel 		"flow\n",
555cc8f4d02SIntel 		prgname);
556cc8f4d02SIntel }
557cc8f4d02SIntel 
558cc8f4d02SIntel static uint32_t
559cc8f4d02SIntel parse_flow_num(const char *str, uint32_t min, uint32_t max, uint32_t *val)
560cc8f4d02SIntel {
561cc8f4d02SIntel 	char *end;
562cc8f4d02SIntel 	uint64_t v;
563cc8f4d02SIntel 
564cc8f4d02SIntel 	/* parse decimal string */
565cc8f4d02SIntel 	errno = 0;
566cc8f4d02SIntel 	v = strtoul(str, &end, 10);
567cc8f4d02SIntel 	if (errno != 0 || *end != '\0')
568cc8f4d02SIntel 		return (-EINVAL);
569cc8f4d02SIntel 
570cc8f4d02SIntel 	if (v < min || v > max)
571cc8f4d02SIntel 		return (-EINVAL);
572cc8f4d02SIntel 
573cc8f4d02SIntel 	*val = (uint32_t)v;
574cc8f4d02SIntel 	return (0);
575cc8f4d02SIntel }
576cc8f4d02SIntel 
577cc8f4d02SIntel static int
578cc8f4d02SIntel parse_flow_ttl(const char *str, uint32_t min, uint32_t max, uint32_t *val)
579cc8f4d02SIntel {
580cc8f4d02SIntel 	char *end;
581cc8f4d02SIntel 	uint64_t v;
582cc8f4d02SIntel 
583cc8f4d02SIntel 	static const char frmt_sec[] = "s";
584cc8f4d02SIntel 	static const char frmt_msec[] = "ms";
585cc8f4d02SIntel 
586cc8f4d02SIntel 	/* parse decimal string */
587cc8f4d02SIntel 	errno = 0;
588cc8f4d02SIntel 	v = strtoul(str, &end, 10);
589cc8f4d02SIntel 	if (errno != 0)
590cc8f4d02SIntel 		return (-EINVAL);
591cc8f4d02SIntel 
592cc8f4d02SIntel 	if (*end != '\0') {
593cc8f4d02SIntel 		if (strncmp(frmt_sec, end, sizeof(frmt_sec)) == 0)
594cc8f4d02SIntel 			v *= MS_PER_S;
595cc8f4d02SIntel 		else if (strncmp(frmt_msec, end, sizeof (frmt_msec)) != 0)
596cc8f4d02SIntel 			return (-EINVAL);
597cc8f4d02SIntel 	}
598cc8f4d02SIntel 
599cc8f4d02SIntel 	if (v < min || v > max)
600cc8f4d02SIntel 		return (-EINVAL);
601cc8f4d02SIntel 
602cc8f4d02SIntel 	*val = (uint32_t)v;
603cc8f4d02SIntel 	return (0);
604cc8f4d02SIntel }
605cc8f4d02SIntel 
606cc8f4d02SIntel static int
607cc8f4d02SIntel parse_portmask(const char *portmask)
608cc8f4d02SIntel {
609cc8f4d02SIntel 	char *end = NULL;
610cc8f4d02SIntel 	unsigned long pm;
611cc8f4d02SIntel 
612cc8f4d02SIntel 	/* parse hexadecimal string */
613cc8f4d02SIntel 	pm = strtoul(portmask, &end, 16);
614cc8f4d02SIntel 	if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0'))
615cc8f4d02SIntel 		return -1;
616cc8f4d02SIntel 
617cc8f4d02SIntel 	if (pm == 0)
618cc8f4d02SIntel 		return -1;
619cc8f4d02SIntel 
620cc8f4d02SIntel 	return pm;
621cc8f4d02SIntel }
622cc8f4d02SIntel 
623cc8f4d02SIntel static int
624b84fb4cbSAnatoly Burakov parse_nqueue(const char *q_arg)
625cc8f4d02SIntel {
626b84fb4cbSAnatoly Burakov 	char *end = NULL;
627b84fb4cbSAnatoly Burakov 	unsigned long n;
628cc8f4d02SIntel 
629b84fb4cbSAnatoly Burakov 	printf("%p\n", q_arg);
630cc8f4d02SIntel 
631b84fb4cbSAnatoly Burakov 	/* parse hexadecimal string */
632b84fb4cbSAnatoly Burakov 	n = strtoul(q_arg, &end, 10);
633b84fb4cbSAnatoly Burakov 	if ((q_arg[0] == '\0') || (end == NULL) || (*end != '\0'))
634b84fb4cbSAnatoly Burakov 		return -1;
635b84fb4cbSAnatoly Burakov 	if (n == 0)
636b84fb4cbSAnatoly Burakov 		return -1;
637b84fb4cbSAnatoly Burakov 	if (n >= MAX_RX_QUEUE_PER_LCORE)
638cc8f4d02SIntel 		return -1;
639cc8f4d02SIntel 
640b84fb4cbSAnatoly Burakov 	return n;
641cc8f4d02SIntel }
642cc8f4d02SIntel 
643cc8f4d02SIntel /* Parse the argument given in the command line of the application */
644cc8f4d02SIntel static int
645cc8f4d02SIntel parse_args(int argc, char **argv)
646cc8f4d02SIntel {
647cc8f4d02SIntel 	int opt, ret;
648cc8f4d02SIntel 	char **argvopt;
649cc8f4d02SIntel 	int option_index;
650cc8f4d02SIntel 	char *prgname = argv[0];
651cc8f4d02SIntel 	static struct option lgopts[] = {
652b84fb4cbSAnatoly Burakov 		{"max-pkt-len", 1, 0, 0},
653cc8f4d02SIntel 		{"maxflows", 1, 0, 0},
654cc8f4d02SIntel 		{"flowttl", 1, 0, 0},
655cc8f4d02SIntel 		{NULL, 0, 0, 0}
656cc8f4d02SIntel 	};
657cc8f4d02SIntel 
658cc8f4d02SIntel 	argvopt = argv;
659cc8f4d02SIntel 
660b84fb4cbSAnatoly Burakov 	while ((opt = getopt_long(argc, argvopt, "p:q:",
661cc8f4d02SIntel 				lgopts, &option_index)) != EOF) {
662cc8f4d02SIntel 
663cc8f4d02SIntel 		switch (opt) {
664cc8f4d02SIntel 		/* portmask */
665cc8f4d02SIntel 		case 'p':
666cc8f4d02SIntel 			enabled_port_mask = parse_portmask(optarg);
667cc8f4d02SIntel 			if (enabled_port_mask == 0) {
668cc8f4d02SIntel 				printf("invalid portmask\n");
669cc8f4d02SIntel 				print_usage(prgname);
670cc8f4d02SIntel 				return -1;
671cc8f4d02SIntel 			}
672cc8f4d02SIntel 			break;
673b84fb4cbSAnatoly Burakov 
674b84fb4cbSAnatoly Burakov 		/* nqueue */
675b84fb4cbSAnatoly Burakov 		case 'q':
676b84fb4cbSAnatoly Burakov 			rx_queue_per_lcore = parse_nqueue(optarg);
677b84fb4cbSAnatoly Burakov 			if (rx_queue_per_lcore < 0) {
678b84fb4cbSAnatoly Burakov 				printf("invalid queue number\n");
679b84fb4cbSAnatoly Burakov 				print_usage(prgname);
680b84fb4cbSAnatoly Burakov 				return -1;
681b84fb4cbSAnatoly Burakov 			}
682cc8f4d02SIntel 			break;
683cc8f4d02SIntel 
684cc8f4d02SIntel 		/* long options */
685cc8f4d02SIntel 		case 0:
686cc8f4d02SIntel 			if (!strncmp(lgopts[option_index].name,
687cc8f4d02SIntel 					"maxflows", 8)) {
688cc8f4d02SIntel 				if ((ret = parse_flow_num(optarg, MIN_FLOW_NUM,
689cc8f4d02SIntel 						MAX_FLOW_NUM,
690cc8f4d02SIntel 						&max_flow_num)) != 0) {
691cc8f4d02SIntel 					printf("invalid value: \"%s\" for "
692cc8f4d02SIntel 						"parameter %s\n",
693cc8f4d02SIntel 						optarg,
694cc8f4d02SIntel 						lgopts[option_index].name);
695cc8f4d02SIntel 					print_usage(prgname);
696cc8f4d02SIntel 					return (ret);
697cc8f4d02SIntel 				}
698cc8f4d02SIntel 			}
699cc8f4d02SIntel 
700cc8f4d02SIntel 			if (!strncmp(lgopts[option_index].name, "flowttl", 7)) {
701cc8f4d02SIntel 				if ((ret = parse_flow_ttl(optarg, MIN_FLOW_TTL,
702cc8f4d02SIntel 						MAX_FLOW_TTL,
703cc8f4d02SIntel 						&max_flow_ttl)) != 0) {
704cc8f4d02SIntel 					printf("invalid value: \"%s\" for "
705cc8f4d02SIntel 						"parameter %s\n",
706cc8f4d02SIntel 						optarg,
707cc8f4d02SIntel 						lgopts[option_index].name);
708cc8f4d02SIntel 					print_usage(prgname);
709cc8f4d02SIntel 					return (ret);
710cc8f4d02SIntel 				}
711cc8f4d02SIntel 			}
712cc8f4d02SIntel 
713cc8f4d02SIntel 			break;
714cc8f4d02SIntel 
715cc8f4d02SIntel 		default:
716cc8f4d02SIntel 			print_usage(prgname);
717cc8f4d02SIntel 			return -1;
718cc8f4d02SIntel 		}
719cc8f4d02SIntel 	}
720cc8f4d02SIntel 
721cc8f4d02SIntel 	if (optind >= 0)
722cc8f4d02SIntel 		argv[optind-1] = prgname;
723cc8f4d02SIntel 
724cc8f4d02SIntel 	ret = optind-1;
725cc8f4d02SIntel 	optind = 0; /* reset getopt lib */
726cc8f4d02SIntel 	return ret;
727cc8f4d02SIntel }
728cc8f4d02SIntel 
729cc8f4d02SIntel static void
730cc8f4d02SIntel print_ethaddr(const char *name, const struct ether_addr *eth_addr)
731cc8f4d02SIntel {
732*ec3d82dbSCunming Liang 	char buf[ETHER_ADDR_FMT_SIZE];
733*ec3d82dbSCunming Liang 	ether_format_addr(buf, ETHER_ADDR_FMT_SIZE, eth_addr);
734*ec3d82dbSCunming Liang 	printf("%s%s", name, buf);
735cc8f4d02SIntel }
736cc8f4d02SIntel 
737cc8f4d02SIntel /* Check the link status of all ports in up to 9s, and print them finally */
738cc8f4d02SIntel static void
739cc8f4d02SIntel check_all_ports_link_status(uint8_t port_num, uint32_t port_mask)
740cc8f4d02SIntel {
741cc8f4d02SIntel #define CHECK_INTERVAL 100 /* 100ms */
742cc8f4d02SIntel #define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */
743cc8f4d02SIntel 	uint8_t portid, count, all_ports_up, print_flag = 0;
744cc8f4d02SIntel 	struct rte_eth_link link;
745cc8f4d02SIntel 
746cc8f4d02SIntel 	printf("\nChecking link status");
747cc8f4d02SIntel 	fflush(stdout);
748cc8f4d02SIntel 	for (count = 0; count <= MAX_CHECK_TIME; count++) {
749cc8f4d02SIntel 		all_ports_up = 1;
750cc8f4d02SIntel 		for (portid = 0; portid < port_num; portid++) {
751cc8f4d02SIntel 			if ((port_mask & (1 << portid)) == 0)
752cc8f4d02SIntel 				continue;
753cc8f4d02SIntel 			memset(&link, 0, sizeof(link));
754cc8f4d02SIntel 			rte_eth_link_get_nowait(portid, &link);
755cc8f4d02SIntel 			/* print link status if flag set */
756cc8f4d02SIntel 			if (print_flag == 1) {
757cc8f4d02SIntel 				if (link.link_status)
758cc8f4d02SIntel 					printf("Port %d Link Up - speed %u "
759cc8f4d02SIntel 						"Mbps - %s\n", (uint8_t)portid,
760cc8f4d02SIntel 						(unsigned)link.link_speed,
761cc8f4d02SIntel 				(link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
762cc8f4d02SIntel 					("full-duplex") : ("half-duplex\n"));
763cc8f4d02SIntel 				else
764cc8f4d02SIntel 					printf("Port %d Link Down\n",
765cc8f4d02SIntel 						(uint8_t)portid);
766cc8f4d02SIntel 				continue;
767cc8f4d02SIntel 			}
768cc8f4d02SIntel 			/* clear all_ports_up flag if any link down */
769cc8f4d02SIntel 			if (link.link_status == 0) {
770cc8f4d02SIntel 				all_ports_up = 0;
771cc8f4d02SIntel 				break;
772cc8f4d02SIntel 			}
773cc8f4d02SIntel 		}
774cc8f4d02SIntel 		/* after finally printing all link status, get out */
775cc8f4d02SIntel 		if (print_flag == 1)
776cc8f4d02SIntel 			break;
777cc8f4d02SIntel 
778cc8f4d02SIntel 		if (all_ports_up == 0) {
779cc8f4d02SIntel 			printf(".");
780cc8f4d02SIntel 			fflush(stdout);
781cc8f4d02SIntel 			rte_delay_ms(CHECK_INTERVAL);
782cc8f4d02SIntel 		}
783cc8f4d02SIntel 
784cc8f4d02SIntel 		/* set the print_flag if all ports up or timeout */
785cc8f4d02SIntel 		if (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) {
786cc8f4d02SIntel 			print_flag = 1;
787b84fb4cbSAnatoly Burakov 			printf("\ndone\n");
788cc8f4d02SIntel 		}
789cc8f4d02SIntel 	}
790cc8f4d02SIntel }
791b84fb4cbSAnatoly Burakov 
792b84fb4cbSAnatoly Burakov static int
793b84fb4cbSAnatoly Burakov init_routing_table(void)
794b84fb4cbSAnatoly Burakov {
795b84fb4cbSAnatoly Burakov 	struct rte_lpm *lpm;
796b84fb4cbSAnatoly Burakov 	struct rte_lpm6 *lpm6;
797b84fb4cbSAnatoly Burakov 	int socket, ret;
798b84fb4cbSAnatoly Burakov 	unsigned i;
799b84fb4cbSAnatoly Burakov 
800b84fb4cbSAnatoly Burakov 	for (socket = 0; socket < RTE_MAX_NUMA_NODES; socket++) {
801b84fb4cbSAnatoly Burakov 		if (socket_lpm[socket]) {
802b84fb4cbSAnatoly Burakov 			lpm = socket_lpm[socket];
803b84fb4cbSAnatoly Burakov 			/* populate the LPM table */
804b84fb4cbSAnatoly Burakov 			for (i = 0; i < RTE_DIM(l3fwd_ipv4_route_array); i++) {
805b84fb4cbSAnatoly Burakov 				ret = rte_lpm_add(lpm,
806b84fb4cbSAnatoly Burakov 					l3fwd_ipv4_route_array[i].ip,
807b84fb4cbSAnatoly Burakov 					l3fwd_ipv4_route_array[i].depth,
808b84fb4cbSAnatoly Burakov 					l3fwd_ipv4_route_array[i].if_out);
809b84fb4cbSAnatoly Burakov 
810b84fb4cbSAnatoly Burakov 				if (ret < 0) {
811b84fb4cbSAnatoly Burakov 					RTE_LOG(ERR, IP_RSMBL, "Unable to add entry %i to the l3fwd "
812b84fb4cbSAnatoly Burakov 						"LPM table\n", i);
813b84fb4cbSAnatoly Burakov 					return -1;
814b84fb4cbSAnatoly Burakov 				}
815b84fb4cbSAnatoly Burakov 
816b84fb4cbSAnatoly Burakov 				RTE_LOG(INFO, IP_RSMBL, "Socket %i: adding route " IPv4_BYTES_FMT
817b84fb4cbSAnatoly Burakov 						"/%d (port %d)\n",
818b84fb4cbSAnatoly Burakov 					socket,
819b84fb4cbSAnatoly Burakov 					IPv4_BYTES(l3fwd_ipv4_route_array[i].ip),
820b84fb4cbSAnatoly Burakov 					l3fwd_ipv4_route_array[i].depth,
821b84fb4cbSAnatoly Burakov 					l3fwd_ipv4_route_array[i].if_out);
822b84fb4cbSAnatoly Burakov 			}
823b84fb4cbSAnatoly Burakov 		}
824b84fb4cbSAnatoly Burakov 
825b84fb4cbSAnatoly Burakov 		if (socket_lpm6[socket]) {
826b84fb4cbSAnatoly Burakov 			lpm6 = socket_lpm6[socket];
827b84fb4cbSAnatoly Burakov 			/* populate the LPM6 table */
828b84fb4cbSAnatoly Burakov 			for (i = 0; i < RTE_DIM(l3fwd_ipv6_route_array); i++) {
829b84fb4cbSAnatoly Burakov 				ret = rte_lpm6_add(lpm6,
830b84fb4cbSAnatoly Burakov 					l3fwd_ipv6_route_array[i].ip,
831b84fb4cbSAnatoly Burakov 					l3fwd_ipv6_route_array[i].depth,
832b84fb4cbSAnatoly Burakov 					l3fwd_ipv6_route_array[i].if_out);
833b84fb4cbSAnatoly Burakov 
834b84fb4cbSAnatoly Burakov 				if (ret < 0) {
835b84fb4cbSAnatoly Burakov 					RTE_LOG(ERR, IP_RSMBL, "Unable to add entry %i to the l3fwd "
836b84fb4cbSAnatoly Burakov 						"LPM6 table\n", i);
837b84fb4cbSAnatoly Burakov 					return -1;
838b84fb4cbSAnatoly Burakov 				}
839b84fb4cbSAnatoly Burakov 
840b84fb4cbSAnatoly Burakov 				RTE_LOG(INFO, IP_RSMBL, "Socket %i: adding route " IPv6_BYTES_FMT
841b84fb4cbSAnatoly Burakov 						"/%d (port %d)\n",
842b84fb4cbSAnatoly Burakov 					socket,
843b84fb4cbSAnatoly Burakov 					IPv6_BYTES(l3fwd_ipv6_route_array[i].ip),
844b84fb4cbSAnatoly Burakov 					l3fwd_ipv6_route_array[i].depth,
845b84fb4cbSAnatoly Burakov 					l3fwd_ipv6_route_array[i].if_out);
846b84fb4cbSAnatoly Burakov 			}
847b84fb4cbSAnatoly Burakov 		}
848b84fb4cbSAnatoly Burakov 	}
849b84fb4cbSAnatoly Burakov 	return 0;
850b84fb4cbSAnatoly Burakov }
851b84fb4cbSAnatoly Burakov 
852b84fb4cbSAnatoly Burakov static int
853b84fb4cbSAnatoly Burakov setup_port_tbl(struct lcore_queue_conf *qconf, uint32_t lcore, int socket,
854595ea7dcSIntel 	uint32_t port)
855595ea7dcSIntel {
856595ea7dcSIntel 	struct mbuf_table *mtb;
857595ea7dcSIntel 	uint32_t n;
858595ea7dcSIntel 	size_t sz;
859595ea7dcSIntel 
860595ea7dcSIntel 	n = RTE_MAX(max_flow_num, 2UL * MAX_PKT_BURST);
861595ea7dcSIntel 	sz = sizeof (*mtb) + sizeof (mtb->m_table[0]) *  n;
862595ea7dcSIntel 
863595ea7dcSIntel 	if ((mtb = rte_zmalloc_socket(__func__, sz, CACHE_LINE_SIZE,
864b84fb4cbSAnatoly Burakov 			socket)) == NULL) {
865b84fb4cbSAnatoly Burakov 		RTE_LOG(ERR, IP_RSMBL, "%s() for lcore: %u, port: %u "
866595ea7dcSIntel 			"failed to allocate %zu bytes\n",
867595ea7dcSIntel 			__func__, lcore, port, sz);
868b84fb4cbSAnatoly Burakov 		return -1;
869b84fb4cbSAnatoly Burakov 	}
870595ea7dcSIntel 
871595ea7dcSIntel 	mtb->len = n;
872595ea7dcSIntel 	qconf->tx_mbufs[port] = mtb;
873b84fb4cbSAnatoly Burakov 
874b84fb4cbSAnatoly Burakov 	return 0;
875595ea7dcSIntel }
876cc8f4d02SIntel 
877b84fb4cbSAnatoly Burakov static int
878b84fb4cbSAnatoly Burakov setup_queue_tbl(struct rx_queue *rxq, uint32_t lcore, uint32_t queue)
879cc8f4d02SIntel {
880b84fb4cbSAnatoly Burakov 	int socket;
881cc8f4d02SIntel 	uint32_t nb_mbuf;
882cc8f4d02SIntel 	uint64_t frag_cycles;
883cc8f4d02SIntel 	char buf[RTE_MEMPOOL_NAMESIZE];
884cc8f4d02SIntel 
885b84fb4cbSAnatoly Burakov 	socket = rte_lcore_to_socket_id(lcore);
886b84fb4cbSAnatoly Burakov 	if (socket == SOCKET_ID_ANY)
887b84fb4cbSAnatoly Burakov 		socket = 0;
888b84fb4cbSAnatoly Burakov 
889cc8f4d02SIntel 	frag_cycles = (rte_get_tsc_hz() + MS_PER_S - 1) / MS_PER_S *
890cc8f4d02SIntel 		max_flow_ttl;
891cc8f4d02SIntel 
892b84fb4cbSAnatoly Burakov 	if ((rxq->frag_tbl = rte_ip_frag_table_create(max_flow_num,
893b84fb4cbSAnatoly Burakov 			IP_FRAG_TBL_BUCKET_ENTRIES, max_flow_num, frag_cycles,
894b84fb4cbSAnatoly Burakov 			socket)) == NULL) {
895b84fb4cbSAnatoly Burakov 		RTE_LOG(ERR, IP_RSMBL, "ip_frag_tbl_create(%u) on "
896cc8f4d02SIntel 			"lcore: %u for queue: %u failed\n",
897cc8f4d02SIntel 			max_flow_num, lcore, queue);
898b84fb4cbSAnatoly Burakov 		return -1;
899b84fb4cbSAnatoly Burakov 	}
900cc8f4d02SIntel 
901595ea7dcSIntel 	/*
902d47bd10cSAnatoly Burakov 	 * At any given moment up to <max_flow_num * (MAX_FRAG_NUM)>
903595ea7dcSIntel 	 * mbufs could be stored int the fragment table.
904595ea7dcSIntel 	 * Plus, each TX queue can hold up to <max_flow_num> packets.
905595ea7dcSIntel 	 */
906595ea7dcSIntel 
907d47bd10cSAnatoly Burakov 	nb_mbuf = RTE_MAX(max_flow_num, 2UL * MAX_PKT_BURST) * MAX_FRAG_NUM;
908cc8f4d02SIntel 	nb_mbuf *= (port_conf.rxmode.max_rx_pkt_len + BUF_SIZE - 1) / BUF_SIZE;
909b84fb4cbSAnatoly Burakov 	nb_mbuf *= 2; /* ipv4 and ipv6 */
910d47bd10cSAnatoly Burakov 	nb_mbuf += RTE_TEST_RX_DESC_DEFAULT + RTE_TEST_TX_DESC_DEFAULT;
911595ea7dcSIntel 
912b84fb4cbSAnatoly Burakov 	nb_mbuf = RTE_MAX(nb_mbuf, (uint32_t)NB_MBUF);
913cc8f4d02SIntel 
9146f41fe75SStephen Hemminger 	snprintf(buf, sizeof(buf), "mbuf_pool_%u_%u", lcore, queue);
915cc8f4d02SIntel 
916b84fb4cbSAnatoly Burakov 	if ((rxq->pool = rte_mempool_create(buf, nb_mbuf, MBUF_SIZE, 0,
917cc8f4d02SIntel 			sizeof(struct rte_pktmbuf_pool_private),
918cc8f4d02SIntel 			rte_pktmbuf_pool_init, NULL, rte_pktmbuf_init, NULL,
919b84fb4cbSAnatoly Burakov 			socket, MEMPOOL_F_SP_PUT | MEMPOOL_F_SC_GET)) == NULL) {
920b84fb4cbSAnatoly Burakov 		RTE_LOG(ERR, IP_RSMBL, "mempool_create(%s) failed", buf);
921b84fb4cbSAnatoly Burakov 		return -1;
922b84fb4cbSAnatoly Burakov 	}
923b84fb4cbSAnatoly Burakov 
924b84fb4cbSAnatoly Burakov 	return 0;
925b84fb4cbSAnatoly Burakov }
926b84fb4cbSAnatoly Burakov 
927b84fb4cbSAnatoly Burakov static int
928b84fb4cbSAnatoly Burakov init_mem(void)
929b84fb4cbSAnatoly Burakov {
930b84fb4cbSAnatoly Burakov 	char buf[PATH_MAX];
931b84fb4cbSAnatoly Burakov 	struct rte_lpm *lpm;
932b84fb4cbSAnatoly Burakov 	struct rte_lpm6 *lpm6;
933b84fb4cbSAnatoly Burakov 	int socket;
934b84fb4cbSAnatoly Burakov 	unsigned lcore_id;
935b84fb4cbSAnatoly Burakov 
936b84fb4cbSAnatoly Burakov 	/* traverse through lcores and initialize structures on each socket */
937b84fb4cbSAnatoly Burakov 
938b84fb4cbSAnatoly Burakov 	for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
939b84fb4cbSAnatoly Burakov 
940b84fb4cbSAnatoly Burakov 		if (rte_lcore_is_enabled(lcore_id) == 0)
941b84fb4cbSAnatoly Burakov 			continue;
942b84fb4cbSAnatoly Burakov 
943b84fb4cbSAnatoly Burakov 		socket = rte_lcore_to_socket_id(lcore_id);
944b84fb4cbSAnatoly Burakov 
945b84fb4cbSAnatoly Burakov 		if (socket == SOCKET_ID_ANY)
946b84fb4cbSAnatoly Burakov 			socket = 0;
947b84fb4cbSAnatoly Burakov 
948b84fb4cbSAnatoly Burakov 		if (socket_lpm[socket] == NULL) {
949b84fb4cbSAnatoly Burakov 			RTE_LOG(INFO, IP_RSMBL, "Creating LPM table on socket %i\n", socket);
9506f41fe75SStephen Hemminger 			snprintf(buf, sizeof(buf), "IP_RSMBL_LPM_%i", socket);
951b84fb4cbSAnatoly Burakov 
952b84fb4cbSAnatoly Burakov 			lpm = rte_lpm_create(buf, socket, LPM_MAX_RULES, 0);
953b84fb4cbSAnatoly Burakov 			if (lpm == NULL) {
954b84fb4cbSAnatoly Burakov 				RTE_LOG(ERR, IP_RSMBL, "Cannot create LPM table\n");
955b84fb4cbSAnatoly Burakov 				return -1;
956b84fb4cbSAnatoly Burakov 			}
957b84fb4cbSAnatoly Burakov 			socket_lpm[socket] = lpm;
958b84fb4cbSAnatoly Burakov 		}
959b84fb4cbSAnatoly Burakov 
960b84fb4cbSAnatoly Burakov 		if (socket_lpm6[socket] == NULL) {
961b84fb4cbSAnatoly Burakov 			RTE_LOG(INFO, IP_RSMBL, "Creating LPM6 table on socket %i\n", socket);
9626f41fe75SStephen Hemminger 			snprintf(buf, sizeof(buf), "IP_RSMBL_LPM_%i", socket);
963b84fb4cbSAnatoly Burakov 
964b84fb4cbSAnatoly Burakov 			lpm6 = rte_lpm6_create("IP_RSMBL_LPM6", socket, &lpm6_config);
965b84fb4cbSAnatoly Burakov 			if (lpm6 == NULL) {
966b84fb4cbSAnatoly Burakov 				RTE_LOG(ERR, IP_RSMBL, "Cannot create LPM table\n");
967b84fb4cbSAnatoly Burakov 				return -1;
968b84fb4cbSAnatoly Burakov 			}
969b84fb4cbSAnatoly Burakov 			socket_lpm6[socket] = lpm6;
970b84fb4cbSAnatoly Burakov 		}
971b84fb4cbSAnatoly Burakov 	}
972b84fb4cbSAnatoly Burakov 
973b84fb4cbSAnatoly Burakov 	return 0;
974cc8f4d02SIntel }
975cc8f4d02SIntel 
976cc8f4d02SIntel static void
977595ea7dcSIntel queue_dump_stat(void)
978cc8f4d02SIntel {
979cc8f4d02SIntel 	uint32_t i, lcore;
980b84fb4cbSAnatoly Burakov 	const struct lcore_queue_conf *qconf;
981cc8f4d02SIntel 
982cc8f4d02SIntel 	for (lcore = 0; lcore < RTE_MAX_LCORE; lcore++) {
983cc8f4d02SIntel 		if (rte_lcore_is_enabled(lcore) == 0)
984cc8f4d02SIntel 			continue;
985cc8f4d02SIntel 
986b84fb4cbSAnatoly Burakov 		qconf = &lcore_queue_conf[lcore];
987cc8f4d02SIntel 		for (i = 0; i < qconf->n_rx_queue; i++) {
988cc8f4d02SIntel 
989cc8f4d02SIntel 			fprintf(stdout, " -- lcoreid=%u portid=%hhu "
990b84fb4cbSAnatoly Burakov 				"frag tbl stat:\n",
991b84fb4cbSAnatoly Burakov 				lcore,  qconf->rx_queue_list[i].portid);
992b84fb4cbSAnatoly Burakov 			rte_ip_frag_table_statistics_dump(stdout,
993b84fb4cbSAnatoly Burakov 					qconf->rx_queue_list[i].frag_tbl);
994595ea7dcSIntel 			fprintf(stdout, "TX bursts:\t%" PRIu64 "\n"
995595ea7dcSIntel 				"TX packets _queued:\t%" PRIu64 "\n"
996595ea7dcSIntel 				"TX packets dropped:\t%" PRIu64 "\n"
997595ea7dcSIntel 				"TX packets send:\t%" PRIu64 "\n",
998595ea7dcSIntel 				qconf->tx_stat.call,
999595ea7dcSIntel 				qconf->tx_stat.queue,
1000595ea7dcSIntel 				qconf->tx_stat.drop,
1001595ea7dcSIntel 				qconf->tx_stat.send);
1002cc8f4d02SIntel 		}
1003cc8f4d02SIntel 	}
1004cc8f4d02SIntel }
1005cc8f4d02SIntel 
1006cc8f4d02SIntel static void
1007cc8f4d02SIntel signal_handler(int signum)
1008cc8f4d02SIntel {
1009595ea7dcSIntel 	queue_dump_stat();
1010cc8f4d02SIntel 	if (signum != SIGUSR1)
1011cc8f4d02SIntel 		rte_exit(0, "received signal: %d, exiting\n", signum);
1012cc8f4d02SIntel }
1013cc8f4d02SIntel 
1014cc8f4d02SIntel int
1015cc8f4d02SIntel MAIN(int argc, char **argv)
1016cc8f4d02SIntel {
1017b84fb4cbSAnatoly Burakov 	struct lcore_queue_conf *qconf;
101881f7ecd9SPablo de Lara 	struct rte_eth_dev_info dev_info;
101981f7ecd9SPablo de Lara 	struct rte_eth_txconf *txconf;
1020b84fb4cbSAnatoly Burakov 	struct rx_queue *rxq;
1021b84fb4cbSAnatoly Burakov 	int ret, socket;
1022cc8f4d02SIntel 	unsigned nb_ports;
1023cc8f4d02SIntel 	uint16_t queueid;
1024b84fb4cbSAnatoly Burakov 	unsigned lcore_id = 0, rx_lcore_id = 0;
1025cc8f4d02SIntel 	uint32_t n_tx_queue, nb_lcores;
1026b84fb4cbSAnatoly Burakov 	uint8_t portid;
1027cc8f4d02SIntel 
1028cc8f4d02SIntel 	/* init EAL */
1029cc8f4d02SIntel 	ret = rte_eal_init(argc, argv);
1030cc8f4d02SIntel 	if (ret < 0)
1031cc8f4d02SIntel 		rte_exit(EXIT_FAILURE, "Invalid EAL parameters\n");
1032cc8f4d02SIntel 	argc -= ret;
1033cc8f4d02SIntel 	argv += ret;
1034cc8f4d02SIntel 
1035cc8f4d02SIntel 	/* parse application arguments (after the EAL ones) */
1036cc8f4d02SIntel 	ret = parse_args(argc, argv);
1037cc8f4d02SIntel 	if (ret < 0)
1038b84fb4cbSAnatoly Burakov 		rte_exit(EXIT_FAILURE, "Invalid IP reassembly parameters\n");
1039cc8f4d02SIntel 
1040cc8f4d02SIntel 	nb_ports = rte_eth_dev_count();
1041b84fb4cbSAnatoly Burakov 	if (nb_ports > RTE_MAX_ETHPORTS)
1042b84fb4cbSAnatoly Burakov 		nb_ports = RTE_MAX_ETHPORTS;
1043b84fb4cbSAnatoly Burakov 	else if (nb_ports == 0)
1044b84fb4cbSAnatoly Burakov 		rte_exit(EXIT_FAILURE, "No ports found!\n");
1045cc8f4d02SIntel 
1046cc8f4d02SIntel 	nb_lcores = rte_lcore_count();
1047cc8f4d02SIntel 
1048b84fb4cbSAnatoly Burakov 	/* initialize structures (mempools, lpm etc.) */
1049b84fb4cbSAnatoly Burakov 	if (init_mem() < 0)
1050b84fb4cbSAnatoly Burakov 		rte_panic("Cannot initialize memory structures!\n");
1051b84fb4cbSAnatoly Burakov 
1052eaa8d3bfSAnatoly Burakov 	/* check if portmask has non-existent ports */
1053eaa8d3bfSAnatoly Burakov 	if (enabled_port_mask & ~(RTE_LEN2MASK(nb_ports, unsigned)))
1054eaa8d3bfSAnatoly Burakov 		rte_exit(EXIT_FAILURE, "Non-existent ports in portmask!\n");
1055eaa8d3bfSAnatoly Burakov 
1056cc8f4d02SIntel 	/* initialize all ports */
1057cc8f4d02SIntel 	for (portid = 0; portid < nb_ports; portid++) {
1058cc8f4d02SIntel 		/* skip ports that are not enabled */
1059cc8f4d02SIntel 		if ((enabled_port_mask & (1 << portid)) == 0) {
1060cc8f4d02SIntel 			printf("\nSkipping disabled port %d\n", portid);
1061cc8f4d02SIntel 			continue;
1062cc8f4d02SIntel 		}
1063cc8f4d02SIntel 
1064b84fb4cbSAnatoly Burakov 		qconf = &lcore_queue_conf[rx_lcore_id];
1065b84fb4cbSAnatoly Burakov 
1066b84fb4cbSAnatoly Burakov 		/* get the lcore_id for this port */
1067b84fb4cbSAnatoly Burakov 		while (rte_lcore_is_enabled(rx_lcore_id) == 0 ||
1068b84fb4cbSAnatoly Burakov 			   qconf->n_rx_queue == (unsigned)rx_queue_per_lcore) {
1069b84fb4cbSAnatoly Burakov 
1070b84fb4cbSAnatoly Burakov 			rx_lcore_id++;
1071b84fb4cbSAnatoly Burakov 			if (rx_lcore_id >= RTE_MAX_LCORE)
1072b84fb4cbSAnatoly Burakov 				rte_exit(EXIT_FAILURE, "Not enough cores\n");
1073b84fb4cbSAnatoly Burakov 
1074b84fb4cbSAnatoly Burakov 			qconf = &lcore_queue_conf[rx_lcore_id];
1075b84fb4cbSAnatoly Burakov 		}
1076b84fb4cbSAnatoly Burakov 
1077324bcf45SAnatoly Burakov 		socket = rte_lcore_to_socket_id(portid);
1078b84fb4cbSAnatoly Burakov 		if (socket == SOCKET_ID_ANY)
1079b84fb4cbSAnatoly Burakov 			socket = 0;
1080b84fb4cbSAnatoly Burakov 
1081b84fb4cbSAnatoly Burakov 		queueid = qconf->n_rx_queue;
1082b84fb4cbSAnatoly Burakov 		rxq = &qconf->rx_queue_list[queueid];
1083b84fb4cbSAnatoly Burakov 		rxq->portid = portid;
1084b84fb4cbSAnatoly Burakov 		rxq->lpm = socket_lpm[socket];
1085b84fb4cbSAnatoly Burakov 		rxq->lpm6 = socket_lpm6[socket];
1086b84fb4cbSAnatoly Burakov 		if (setup_queue_tbl(rxq, rx_lcore_id, queueid) < 0)
1087b84fb4cbSAnatoly Burakov 			rte_exit(EXIT_FAILURE, "Failed to set up queue table\n");
1088b84fb4cbSAnatoly Burakov 		qconf->n_rx_queue++;
1089b84fb4cbSAnatoly Burakov 
1090cc8f4d02SIntel 		/* init port */
1091cc8f4d02SIntel 		printf("Initializing port %d ... ", portid );
1092cc8f4d02SIntel 		fflush(stdout);
1093cc8f4d02SIntel 
1094cc8f4d02SIntel 		n_tx_queue = nb_lcores;
1095cc8f4d02SIntel 		if (n_tx_queue > MAX_TX_QUEUE_PER_PORT)
1096cc8f4d02SIntel 			n_tx_queue = MAX_TX_QUEUE_PER_PORT;
1097b84fb4cbSAnatoly Burakov 		ret = rte_eth_dev_configure(portid, 1, (uint16_t)n_tx_queue,
1098b84fb4cbSAnatoly Burakov 					    &port_conf);
1099b84fb4cbSAnatoly Burakov 		if (ret < 0) {
1100b84fb4cbSAnatoly Burakov 			printf("\n");
1101b84fb4cbSAnatoly Burakov 			rte_exit(EXIT_FAILURE, "Cannot configure device: "
1102b84fb4cbSAnatoly Burakov 				"err=%d, port=%d\n",
1103cc8f4d02SIntel 				ret, portid);
1104b84fb4cbSAnatoly Burakov 		}
1105b84fb4cbSAnatoly Burakov 
1106b84fb4cbSAnatoly Burakov 		/* init one RX queue */
1107b84fb4cbSAnatoly Burakov 		ret = rte_eth_rx_queue_setup(portid, 0, nb_rxd,
110881f7ecd9SPablo de Lara 					     socket, NULL,
1109b84fb4cbSAnatoly Burakov 					     rxq->pool);
1110b84fb4cbSAnatoly Burakov 		if (ret < 0) {
1111b84fb4cbSAnatoly Burakov 			printf("\n");
1112b84fb4cbSAnatoly Burakov 			rte_exit(EXIT_FAILURE, "rte_eth_rx_queue_setup: "
1113b84fb4cbSAnatoly Burakov 				"err=%d, port=%d\n",
1114b84fb4cbSAnatoly Burakov 				ret, portid);
1115b84fb4cbSAnatoly Burakov 		}
1116cc8f4d02SIntel 
1117cc8f4d02SIntel 		rte_eth_macaddr_get(portid, &ports_eth_addr[portid]);
1118cc8f4d02SIntel 		print_ethaddr(" Address:", &ports_eth_addr[portid]);
1119b84fb4cbSAnatoly Burakov 		printf("\n");
1120cc8f4d02SIntel 
1121cc8f4d02SIntel 		/* init one TX queue per couple (lcore,port) */
1122cc8f4d02SIntel 		queueid = 0;
1123cc8f4d02SIntel 		for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
1124cc8f4d02SIntel 			if (rte_lcore_is_enabled(lcore_id) == 0)
1125cc8f4d02SIntel 				continue;
1126cc8f4d02SIntel 
1127b84fb4cbSAnatoly Burakov 			socket = (int) rte_lcore_to_socket_id(lcore_id);
1128cc8f4d02SIntel 
1129b84fb4cbSAnatoly Burakov 			printf("txq=%u,%d,%d ", lcore_id, queueid, socket);
1130cc8f4d02SIntel 			fflush(stdout);
113181f7ecd9SPablo de Lara 
113281f7ecd9SPablo de Lara 			rte_eth_dev_info_get(portid, &dev_info);
113381f7ecd9SPablo de Lara 			txconf = &dev_info.default_txconf;
113481f7ecd9SPablo de Lara 			txconf->txq_flags = 0;
113581f7ecd9SPablo de Lara 
1136cc8f4d02SIntel 			ret = rte_eth_tx_queue_setup(portid, queueid, nb_txd,
113781f7ecd9SPablo de Lara 					socket, txconf);
1138cc8f4d02SIntel 			if (ret < 0)
1139cc8f4d02SIntel 				rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d, "
1140cc8f4d02SIntel 					"port=%d\n", ret, portid);
1141cc8f4d02SIntel 
1142b84fb4cbSAnatoly Burakov 			qconf = &lcore_queue_conf[lcore_id];
1143cc8f4d02SIntel 			qconf->tx_queue_id[portid] = queueid;
1144b84fb4cbSAnatoly Burakov 			setup_port_tbl(qconf, lcore_id, socket, portid);
1145cc8f4d02SIntel 			queueid++;
1146cc8f4d02SIntel 		}
1147cc8f4d02SIntel 		printf("\n");
1148cc8f4d02SIntel 	}
1149cc8f4d02SIntel 
1150cc8f4d02SIntel 	printf("\n");
1151cc8f4d02SIntel 
1152cc8f4d02SIntel 	/* start ports */
1153cc8f4d02SIntel 	for (portid = 0; portid < nb_ports; portid++) {
1154cc8f4d02SIntel 		if ((enabled_port_mask & (1 << portid)) == 0) {
1155cc8f4d02SIntel 			continue;
1156cc8f4d02SIntel 		}
1157cc8f4d02SIntel 		/* Start device */
1158cc8f4d02SIntel 		ret = rte_eth_dev_start(portid);
1159cc8f4d02SIntel 		if (ret < 0)
1160cc8f4d02SIntel 			rte_exit(EXIT_FAILURE, "rte_eth_dev_start: err=%d, port=%d\n",
1161cc8f4d02SIntel 				ret, portid);
1162cc8f4d02SIntel 
1163cc8f4d02SIntel 		rte_eth_promiscuous_enable(portid);
1164cc8f4d02SIntel 	}
1165cc8f4d02SIntel 
1166b84fb4cbSAnatoly Burakov 	if (init_routing_table() < 0)
1167b84fb4cbSAnatoly Burakov 		rte_exit(EXIT_FAILURE, "Cannot init routing table\n");
1168b84fb4cbSAnatoly Burakov 
1169cc8f4d02SIntel 	check_all_ports_link_status((uint8_t)nb_ports, enabled_port_mask);
1170cc8f4d02SIntel 
1171cc8f4d02SIntel 	signal(SIGUSR1, signal_handler);
1172cc8f4d02SIntel 	signal(SIGTERM, signal_handler);
1173cc8f4d02SIntel 	signal(SIGINT, signal_handler);
1174cc8f4d02SIntel 
1175cc8f4d02SIntel 	/* launch per-lcore init on every lcore */
1176cc8f4d02SIntel 	rte_eal_mp_remote_launch(main_loop, NULL, CALL_MASTER);
1177cc8f4d02SIntel 	RTE_LCORE_FOREACH_SLAVE(lcore_id) {
1178cc8f4d02SIntel 		if (rte_eal_wait_lcore(lcore_id) < 0)
1179cc8f4d02SIntel 			return -1;
1180cc8f4d02SIntel 	}
1181cc8f4d02SIntel 
1182cc8f4d02SIntel 	return 0;
1183cc8f4d02SIntel }
1184