xref: /dpdk/examples/ip_reassembly/main.c (revision 98a1648109b8dbaa4e6b821c17d1f6bd86d33a9a)
1cc8f4d02SIntel /*-
2cc8f4d02SIntel  *   BSD LICENSE
3cc8f4d02SIntel  *
4e9d48c00SBruce Richardson  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5cc8f4d02SIntel  *   All rights reserved.
6cc8f4d02SIntel  *
7cc8f4d02SIntel  *   Redistribution and use in source and binary forms, with or without
8cc8f4d02SIntel  *   modification, are permitted provided that the following conditions
9cc8f4d02SIntel  *   are met:
10cc8f4d02SIntel  *
11cc8f4d02SIntel  *     * Redistributions of source code must retain the above copyright
12cc8f4d02SIntel  *       notice, this list of conditions and the following disclaimer.
13cc8f4d02SIntel  *     * Redistributions in binary form must reproduce the above copyright
14cc8f4d02SIntel  *       notice, this list of conditions and the following disclaimer in
15cc8f4d02SIntel  *       the documentation and/or other materials provided with the
16cc8f4d02SIntel  *       distribution.
17cc8f4d02SIntel  *     * Neither the name of Intel Corporation nor the names of its
18cc8f4d02SIntel  *       contributors may be used to endorse or promote products derived
19cc8f4d02SIntel  *       from this software without specific prior written permission.
20cc8f4d02SIntel  *
21cc8f4d02SIntel  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22cc8f4d02SIntel  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23cc8f4d02SIntel  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24cc8f4d02SIntel  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25cc8f4d02SIntel  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26cc8f4d02SIntel  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27cc8f4d02SIntel  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28cc8f4d02SIntel  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29cc8f4d02SIntel  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30cc8f4d02SIntel  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31cc8f4d02SIntel  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32cc8f4d02SIntel  */
33cc8f4d02SIntel 
34cc8f4d02SIntel #include <stdio.h>
35cc8f4d02SIntel #include <stdlib.h>
36cc8f4d02SIntel #include <stdint.h>
37cc8f4d02SIntel #include <inttypes.h>
38cc8f4d02SIntel #include <sys/types.h>
39cc8f4d02SIntel #include <string.h>
40cc8f4d02SIntel #include <sys/queue.h>
41cc8f4d02SIntel #include <stdarg.h>
42cc8f4d02SIntel #include <errno.h>
43cc8f4d02SIntel #include <getopt.h>
44cc8f4d02SIntel #include <signal.h>
45b84fb4cbSAnatoly Burakov #include <sys/param.h>
46cc8f4d02SIntel 
47cc8f4d02SIntel #include <rte_common.h>
48cc8f4d02SIntel #include <rte_byteorder.h>
49cc8f4d02SIntel #include <rte_log.h>
50cc8f4d02SIntel #include <rte_memory.h>
51cc8f4d02SIntel #include <rte_memcpy.h>
52cc8f4d02SIntel #include <rte_memzone.h>
53cc8f4d02SIntel #include <rte_tailq.h>
54cc8f4d02SIntel #include <rte_eal.h>
55cc8f4d02SIntel #include <rte_per_lcore.h>
56cc8f4d02SIntel #include <rte_launch.h>
57cc8f4d02SIntel #include <rte_atomic.h>
58cc8f4d02SIntel #include <rte_cycles.h>
59cc8f4d02SIntel #include <rte_prefetch.h>
60cc8f4d02SIntel #include <rte_lcore.h>
61cc8f4d02SIntel #include <rte_per_lcore.h>
62cc8f4d02SIntel #include <rte_branch_prediction.h>
63cc8f4d02SIntel #include <rte_interrupts.h>
64cc8f4d02SIntel #include <rte_pci.h>
65cc8f4d02SIntel #include <rte_random.h>
66cc8f4d02SIntel #include <rte_debug.h>
67cc8f4d02SIntel #include <rte_ether.h>
68cc8f4d02SIntel #include <rte_ethdev.h>
69cc8f4d02SIntel #include <rte_ring.h>
70cc8f4d02SIntel #include <rte_mempool.h>
71cc8f4d02SIntel #include <rte_mbuf.h>
72cc8f4d02SIntel #include <rte_malloc.h>
73cc8f4d02SIntel #include <rte_ip.h>
74cc8f4d02SIntel #include <rte_tcp.h>
75cc8f4d02SIntel #include <rte_udp.h>
76cc8f4d02SIntel #include <rte_string_fns.h>
77cc8f4d02SIntel #include <rte_lpm.h>
78cc8f4d02SIntel #include <rte_lpm6.h>
79b84fb4cbSAnatoly Burakov 
80b84fb4cbSAnatoly Burakov #include <rte_ip_frag.h>
81b84fb4cbSAnatoly Burakov 
82595ea7dcSIntel #define MAX_PKT_BURST 32
83595ea7dcSIntel 
84595ea7dcSIntel 
85b84fb4cbSAnatoly Burakov #define RTE_LOGTYPE_IP_RSMBL RTE_LOGTYPE_USER1
86cc8f4d02SIntel 
87cc8f4d02SIntel #define MAX_JUMBO_PKT_LEN  9600
88cc8f4d02SIntel 
89cc8f4d02SIntel #define	BUF_SIZE	2048
90cc8f4d02SIntel #define MBUF_SIZE	\
91cc8f4d02SIntel 	(BUF_SIZE + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM)
92cc8f4d02SIntel 
93b84fb4cbSAnatoly Burakov #define NB_MBUF 8192
94b84fb4cbSAnatoly Burakov 
95b84fb4cbSAnatoly Burakov /* allow max jumbo frame 9.5 KB */
96b84fb4cbSAnatoly Burakov #define JUMBO_FRAME_MAX_SIZE	0x2600
97b84fb4cbSAnatoly Burakov 
98cc8f4d02SIntel #define	MAX_FLOW_NUM	UINT16_MAX
99cc8f4d02SIntel #define	MIN_FLOW_NUM	1
100cc8f4d02SIntel #define	DEF_FLOW_NUM	0x1000
101cc8f4d02SIntel 
102cc8f4d02SIntel /* TTL numbers are in ms. */
103cc8f4d02SIntel #define	MAX_FLOW_TTL	(3600 * MS_PER_S)
104cc8f4d02SIntel #define	MIN_FLOW_TTL	1
105cc8f4d02SIntel #define	DEF_FLOW_TTL	MS_PER_S
106cc8f4d02SIntel 
107b84fb4cbSAnatoly Burakov #define MAX_FRAG_NUM RTE_LIBRTE_IP_FRAG_MAX_FRAG
108cc8f4d02SIntel 
109cc8f4d02SIntel /* Should be power of two. */
110b84fb4cbSAnatoly Burakov #define	IP_FRAG_TBL_BUCKET_ENTRIES	16
111cc8f4d02SIntel 
112cc8f4d02SIntel static uint32_t max_flow_num = DEF_FLOW_NUM;
113cc8f4d02SIntel static uint32_t max_flow_ttl = DEF_FLOW_TTL;
114cc8f4d02SIntel 
115cc8f4d02SIntel #define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
116cc8f4d02SIntel 
117cc8f4d02SIntel #define NB_SOCKETS 8
118cc8f4d02SIntel 
119cc8f4d02SIntel /* Configure how many packets ahead to prefetch, when reading packets */
120cc8f4d02SIntel #define PREFETCH_OFFSET	3
121cc8f4d02SIntel 
122cc8f4d02SIntel /*
123cc8f4d02SIntel  * Configurable number of RX/TX ring descriptors
124cc8f4d02SIntel  */
125cc8f4d02SIntel #define RTE_TEST_RX_DESC_DEFAULT 128
126cc8f4d02SIntel #define RTE_TEST_TX_DESC_DEFAULT 512
127595ea7dcSIntel 
128cc8f4d02SIntel static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
129cc8f4d02SIntel static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;
130cc8f4d02SIntel 
131cc8f4d02SIntel /* ethernet addresses of ports */
132b84fb4cbSAnatoly Burakov static struct ether_addr ports_eth_addr[RTE_MAX_ETHPORTS];
133b84fb4cbSAnatoly Burakov 
134b84fb4cbSAnatoly Burakov #ifndef IPv4_BYTES
135b84fb4cbSAnatoly Burakov #define IPv4_BYTES_FMT "%" PRIu8 ".%" PRIu8 ".%" PRIu8 ".%" PRIu8
136b84fb4cbSAnatoly Burakov #define IPv4_BYTES(addr) \
137b84fb4cbSAnatoly Burakov 		(uint8_t) (((addr) >> 24) & 0xFF),\
138b84fb4cbSAnatoly Burakov 		(uint8_t) (((addr) >> 16) & 0xFF),\
139b84fb4cbSAnatoly Burakov 		(uint8_t) (((addr) >> 8) & 0xFF),\
140b84fb4cbSAnatoly Burakov 		(uint8_t) ((addr) & 0xFF)
141b84fb4cbSAnatoly Burakov #endif
142b84fb4cbSAnatoly Burakov 
143b84fb4cbSAnatoly Burakov #ifndef IPv6_BYTES
144b84fb4cbSAnatoly Burakov #define IPv6_BYTES_FMT "%02x%02x:%02x%02x:%02x%02x:%02x%02x:"\
145b84fb4cbSAnatoly Burakov                        "%02x%02x:%02x%02x:%02x%02x:%02x%02x"
146b84fb4cbSAnatoly Burakov #define IPv6_BYTES(addr) \
147b84fb4cbSAnatoly Burakov 	addr[0],  addr[1], addr[2],  addr[3], \
148b84fb4cbSAnatoly Burakov 	addr[4],  addr[5], addr[6],  addr[7], \
149b84fb4cbSAnatoly Burakov 	addr[8],  addr[9], addr[10], addr[11],\
150b84fb4cbSAnatoly Burakov 	addr[12], addr[13],addr[14], addr[15]
151b84fb4cbSAnatoly Burakov #endif
152b84fb4cbSAnatoly Burakov 
153b84fb4cbSAnatoly Burakov #define IPV6_ADDR_LEN 16
154cc8f4d02SIntel 
155cc8f4d02SIntel /* mask of enabled ports */
156cc8f4d02SIntel static uint32_t enabled_port_mask = 0;
157b84fb4cbSAnatoly Burakov 
158b84fb4cbSAnatoly Burakov static int rx_queue_per_lcore = 1;
159cc8f4d02SIntel 
160cc8f4d02SIntel struct mbuf_table {
161595ea7dcSIntel 	uint32_t len;
162595ea7dcSIntel 	uint32_t head;
163595ea7dcSIntel 	uint32_t tail;
164595ea7dcSIntel 	struct rte_mbuf *m_table[0];
165cc8f4d02SIntel };
166cc8f4d02SIntel 
167b84fb4cbSAnatoly Burakov struct rx_queue {
168b84fb4cbSAnatoly Burakov 	struct rte_ip_frag_tbl *frag_tbl;
169b84fb4cbSAnatoly Burakov 	struct rte_mempool *pool;
170b84fb4cbSAnatoly Burakov 	struct rte_lpm *lpm;
171b84fb4cbSAnatoly Burakov 	struct rte_lpm6 *lpm6;
172b84fb4cbSAnatoly Burakov 	uint8_t portid;
173cc8f4d02SIntel };
174cc8f4d02SIntel 
175b84fb4cbSAnatoly Burakov struct tx_lcore_stat {
176b84fb4cbSAnatoly Burakov 	uint64_t call;
177b84fb4cbSAnatoly Burakov 	uint64_t drop;
178b84fb4cbSAnatoly Burakov 	uint64_t queue;
179b84fb4cbSAnatoly Burakov 	uint64_t send;
180b84fb4cbSAnatoly Burakov };
181b84fb4cbSAnatoly Burakov 
182b84fb4cbSAnatoly Burakov #define MAX_RX_QUEUE_PER_LCORE 16
183b84fb4cbSAnatoly Burakov #define MAX_TX_QUEUE_PER_PORT 16
184b84fb4cbSAnatoly Burakov #define MAX_RX_QUEUE_PER_PORT 128
185b84fb4cbSAnatoly Burakov 
186b84fb4cbSAnatoly Burakov struct lcore_queue_conf {
187b84fb4cbSAnatoly Burakov 	uint16_t n_rx_queue;
188b84fb4cbSAnatoly Burakov 	struct rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
189b84fb4cbSAnatoly Burakov 	uint16_t tx_queue_id[RTE_MAX_ETHPORTS];
190b84fb4cbSAnatoly Burakov 	struct rte_ip_frag_death_row death_row;
191b84fb4cbSAnatoly Burakov 	struct mbuf_table *tx_mbufs[RTE_MAX_ETHPORTS];
192b84fb4cbSAnatoly Burakov 	struct tx_lcore_stat tx_stat;
193b84fb4cbSAnatoly Burakov } __rte_cache_aligned;
194b84fb4cbSAnatoly Burakov static struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
195cc8f4d02SIntel 
196cc8f4d02SIntel static struct rte_eth_conf port_conf = {
197cc8f4d02SIntel 	.rxmode = {
19813c4ebd6SBruce Richardson 		.mq_mode        = ETH_MQ_RX_RSS,
199b84fb4cbSAnatoly Burakov 		.max_rx_pkt_len = JUMBO_FRAME_MAX_SIZE,
200cc8f4d02SIntel 		.split_hdr_size = 0,
201cc8f4d02SIntel 		.header_split   = 0, /**< Header Split disabled */
202cc8f4d02SIntel 		.hw_ip_checksum = 1, /**< IP checksum offload enabled */
203cc8f4d02SIntel 		.hw_vlan_filter = 0, /**< VLAN filtering disabled */
204b84fb4cbSAnatoly Burakov 		.jumbo_frame    = 1, /**< Jumbo Frame Support disabled */
205cc8f4d02SIntel 		.hw_strip_crc   = 0, /**< CRC stripped by hardware */
206cc8f4d02SIntel 	},
207cc8f4d02SIntel 	.rx_adv_conf = {
208cc8f4d02SIntel 			.rss_conf = {
209cc8f4d02SIntel 				.rss_key = NULL,
2108a387fa8SHelin Zhang 				.rss_hf = ETH_RSS_IP,
211cc8f4d02SIntel 		},
212cc8f4d02SIntel 	},
213cc8f4d02SIntel 	.txmode = {
214cc8f4d02SIntel 		.mq_mode = ETH_MQ_TX_NONE,
215cc8f4d02SIntel 	},
216cc8f4d02SIntel };
217cc8f4d02SIntel 
218b84fb4cbSAnatoly Burakov /*
219b84fb4cbSAnatoly Burakov  * IPv4 forwarding table
220b84fb4cbSAnatoly Burakov  */
221b84fb4cbSAnatoly Burakov struct l3fwd_ipv4_route {
222cc8f4d02SIntel 	uint32_t ip;
223cc8f4d02SIntel 	uint8_t  depth;
224cc8f4d02SIntel 	uint8_t  if_out;
225cc8f4d02SIntel };
226cc8f4d02SIntel 
227b84fb4cbSAnatoly Burakov struct l3fwd_ipv4_route l3fwd_ipv4_route_array[] = {
228b84fb4cbSAnatoly Burakov 		{IPv4(100,10,0,0), 16, 0},
229b84fb4cbSAnatoly Burakov 		{IPv4(100,20,0,0), 16, 1},
230b84fb4cbSAnatoly Burakov 		{IPv4(100,30,0,0), 16, 2},
231b84fb4cbSAnatoly Burakov 		{IPv4(100,40,0,0), 16, 3},
232b84fb4cbSAnatoly Burakov 		{IPv4(100,50,0,0), 16, 4},
233b84fb4cbSAnatoly Burakov 		{IPv4(100,60,0,0), 16, 5},
234b84fb4cbSAnatoly Burakov 		{IPv4(100,70,0,0), 16, 6},
235b84fb4cbSAnatoly Burakov 		{IPv4(100,80,0,0), 16, 7},
236b84fb4cbSAnatoly Burakov };
237b84fb4cbSAnatoly Burakov 
238b84fb4cbSAnatoly Burakov /*
239b84fb4cbSAnatoly Burakov  * IPv6 forwarding table
240b84fb4cbSAnatoly Burakov  */
241b84fb4cbSAnatoly Burakov 
242b84fb4cbSAnatoly Burakov struct l3fwd_ipv6_route {
243b84fb4cbSAnatoly Burakov 	uint8_t ip[IPV6_ADDR_LEN];
244cc8f4d02SIntel 	uint8_t depth;
245cc8f4d02SIntel 	uint8_t if_out;
246cc8f4d02SIntel };
247cc8f4d02SIntel 
248b84fb4cbSAnatoly Burakov static struct l3fwd_ipv6_route l3fwd_ipv6_route_array[] = {
249cc8f4d02SIntel 	{{1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 0},
250cc8f4d02SIntel 	{{2,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 1},
251cc8f4d02SIntel 	{{3,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 2},
252cc8f4d02SIntel 	{{4,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 3},
253cc8f4d02SIntel 	{{5,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 4},
254cc8f4d02SIntel 	{{6,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 5},
255cc8f4d02SIntel 	{{7,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 6},
256cc8f4d02SIntel 	{{8,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, 48, 7},
257cc8f4d02SIntel };
258cc8f4d02SIntel 
259b84fb4cbSAnatoly Burakov #define LPM_MAX_RULES         1024
260b84fb4cbSAnatoly Burakov #define LPM6_MAX_RULES         1024
261b84fb4cbSAnatoly Burakov #define LPM6_NUMBER_TBL8S (1 << 16)
262cc8f4d02SIntel 
263b84fb4cbSAnatoly Burakov struct rte_lpm6_config lpm6_config = {
264b84fb4cbSAnatoly Burakov 		.max_rules = LPM6_MAX_RULES,
265b84fb4cbSAnatoly Burakov 		.number_tbl8s = LPM6_NUMBER_TBL8S,
266b84fb4cbSAnatoly Burakov 		.flags = 0
267595ea7dcSIntel };
268595ea7dcSIntel 
269b84fb4cbSAnatoly Burakov static struct rte_lpm *socket_lpm[RTE_MAX_NUMA_NODES];
270b84fb4cbSAnatoly Burakov static struct rte_lpm6 *socket_lpm6[RTE_MAX_NUMA_NODES];
271b84fb4cbSAnatoly Burakov 
272240952a9SAnatoly Burakov #ifdef RTE_LIBRTE_IP_FRAG_TBL_STAT
273595ea7dcSIntel #define TX_LCORE_STAT_UPDATE(s, f, v)   ((s)->f += (v))
274595ea7dcSIntel #else
275595ea7dcSIntel #define TX_LCORE_STAT_UPDATE(s, f, v)   do {} while (0)
276240952a9SAnatoly Burakov #endif /* RTE_LIBRTE_IP_FRAG_TBL_STAT */
277cc8f4d02SIntel 
278595ea7dcSIntel /*
279595ea7dcSIntel  * If number of queued packets reached given threahold, then
280595ea7dcSIntel  * send burst of packets on an output interface.
281595ea7dcSIntel  */
282595ea7dcSIntel static inline uint32_t
283b84fb4cbSAnatoly Burakov send_burst(struct lcore_queue_conf *qconf, uint32_t thresh, uint8_t port)
284cc8f4d02SIntel {
285595ea7dcSIntel 	uint32_t fill, len, k, n;
286595ea7dcSIntel 	struct mbuf_table *txmb;
287cc8f4d02SIntel 
288595ea7dcSIntel 	txmb = qconf->tx_mbufs[port];
289595ea7dcSIntel 	len = txmb->len;
290cc8f4d02SIntel 
291595ea7dcSIntel 	if ((int32_t)(fill = txmb->head - txmb->tail) < 0)
292595ea7dcSIntel 		fill += len;
293595ea7dcSIntel 
294595ea7dcSIntel 	if (fill >= thresh) {
295595ea7dcSIntel 		n = RTE_MIN(len - txmb->tail, fill);
296595ea7dcSIntel 
297595ea7dcSIntel 		k = rte_eth_tx_burst(port, qconf->tx_queue_id[port],
298595ea7dcSIntel 			txmb->m_table + txmb->tail, (uint16_t)n);
299595ea7dcSIntel 
300595ea7dcSIntel 		TX_LCORE_STAT_UPDATE(&qconf->tx_stat, call, 1);
301595ea7dcSIntel 		TX_LCORE_STAT_UPDATE(&qconf->tx_stat, send, k);
302595ea7dcSIntel 
303595ea7dcSIntel 		fill -= k;
304595ea7dcSIntel 		if ((txmb->tail += k) == len)
305595ea7dcSIntel 			txmb->tail = 0;
306cc8f4d02SIntel 	}
307cc8f4d02SIntel 
308595ea7dcSIntel 	return (fill);
309cc8f4d02SIntel }
310cc8f4d02SIntel 
311cc8f4d02SIntel /* Enqueue a single packet, and send burst if queue is filled */
312cc8f4d02SIntel static inline int
313cc8f4d02SIntel send_single_packet(struct rte_mbuf *m, uint8_t port)
314cc8f4d02SIntel {
315595ea7dcSIntel 	uint32_t fill, lcore_id, len;
316b84fb4cbSAnatoly Burakov 	struct lcore_queue_conf *qconf;
317595ea7dcSIntel 	struct mbuf_table *txmb;
318cc8f4d02SIntel 
319cc8f4d02SIntel 	lcore_id = rte_lcore_id();
320b84fb4cbSAnatoly Burakov 	qconf = &lcore_queue_conf[lcore_id];
321cc8f4d02SIntel 
322595ea7dcSIntel 	txmb = qconf->tx_mbufs[port];
323595ea7dcSIntel 	len = txmb->len;
324595ea7dcSIntel 
325595ea7dcSIntel 	fill = send_burst(qconf, MAX_PKT_BURST, port);
326595ea7dcSIntel 
327595ea7dcSIntel 	if (fill == len - 1) {
328595ea7dcSIntel 		TX_LCORE_STAT_UPDATE(&qconf->tx_stat, drop, 1);
329595ea7dcSIntel 		rte_pktmbuf_free(txmb->m_table[txmb->tail]);
330595ea7dcSIntel 		if (++txmb->tail == len)
331595ea7dcSIntel 			txmb->tail = 0;
332cc8f4d02SIntel 	}
333cc8f4d02SIntel 
334595ea7dcSIntel 	TX_LCORE_STAT_UPDATE(&qconf->tx_stat, queue, 1);
335595ea7dcSIntel 	txmb->m_table[txmb->head] = m;
336595ea7dcSIntel 	if(++txmb->head == len)
337595ea7dcSIntel 		txmb->head = 0;
338595ea7dcSIntel 
339595ea7dcSIntel 	return (0);
340cc8f4d02SIntel }
341cc8f4d02SIntel 
342cc8f4d02SIntel static inline void
343b84fb4cbSAnatoly Burakov reassemble(struct rte_mbuf *m, uint8_t portid, uint32_t queue,
344b84fb4cbSAnatoly Burakov 	struct lcore_queue_conf *qconf, uint64_t tms)
345cc8f4d02SIntel {
346cc8f4d02SIntel 	struct ether_hdr *eth_hdr;
347b84fb4cbSAnatoly Burakov 	struct rte_ip_frag_tbl *tbl;
348b84fb4cbSAnatoly Burakov 	struct rte_ip_frag_death_row *dr;
349b84fb4cbSAnatoly Burakov 	struct rx_queue *rxq;
350cc8f4d02SIntel 	void *d_addr_bytes;
351b84fb4cbSAnatoly Burakov 	uint8_t next_hop, dst_port;
352b84fb4cbSAnatoly Burakov 
353b84fb4cbSAnatoly Burakov 	rxq = &qconf->rx_queue_list[queue];
354cc8f4d02SIntel 
355cc8f4d02SIntel 	eth_hdr = rte_pktmbuf_mtod(m, struct ether_hdr *);
356cc8f4d02SIntel 
357b84fb4cbSAnatoly Burakov 	dst_port = portid;
358cc8f4d02SIntel 
359b84fb4cbSAnatoly Burakov 	/* if packet is IPv4 */
360b84fb4cbSAnatoly Burakov 	if (m->ol_flags & (PKT_RX_IPV4_HDR)) {
361b84fb4cbSAnatoly Burakov 		struct ipv4_hdr *ip_hdr;
362b84fb4cbSAnatoly Burakov 		uint32_t ip_dst;
363cc8f4d02SIntel 
364b84fb4cbSAnatoly Burakov 		ip_hdr = (struct ipv4_hdr *)(eth_hdr + 1);
365cc8f4d02SIntel 
366cc8f4d02SIntel 		 /* if it is a fragmented packet, then try to reassemble. */
367b84fb4cbSAnatoly Burakov 		if (rte_ipv4_frag_pkt_is_fragmented(ip_hdr)) {
368cc8f4d02SIntel 			struct rte_mbuf *mo;
369cc8f4d02SIntel 
370b84fb4cbSAnatoly Burakov 			tbl = rxq->frag_tbl;
371595ea7dcSIntel 			dr = &qconf->death_row;
372cc8f4d02SIntel 
373cc8f4d02SIntel 			/* prepare mbuf: setup l2_len/l3_len. */
3747869536fSBruce Richardson 			m->l2_len = sizeof(*eth_hdr);
3757869536fSBruce Richardson 			m->l3_len = sizeof(*ip_hdr);
376cc8f4d02SIntel 
377cc8f4d02SIntel 			/* process this fragment. */
378b84fb4cbSAnatoly Burakov 			mo = rte_ipv4_frag_reassemble_packet(tbl, dr, m, tms, ip_hdr);
379b84fb4cbSAnatoly Burakov 			if (mo == NULL)
380cc8f4d02SIntel 				/* no packet to send out. */
381cc8f4d02SIntel 				return;
382cc8f4d02SIntel 
383cc8f4d02SIntel 			/* we have our packet reassembled. */
384cc8f4d02SIntel 			if (mo != m) {
385cc8f4d02SIntel 				m = mo;
386cc8f4d02SIntel 				eth_hdr = rte_pktmbuf_mtod(m,
387cc8f4d02SIntel 					struct ether_hdr *);
388b84fb4cbSAnatoly Burakov 				ip_hdr = (struct ipv4_hdr *)(eth_hdr + 1);
389b84fb4cbSAnatoly Burakov 			}
390b84fb4cbSAnatoly Burakov 		}
391b84fb4cbSAnatoly Burakov 		ip_dst = rte_be_to_cpu_32(ip_hdr->dst_addr);
392b84fb4cbSAnatoly Burakov 
393b84fb4cbSAnatoly Burakov 		/* Find destination port */
394b84fb4cbSAnatoly Burakov 		if (rte_lpm_lookup(rxq->lpm, ip_dst, &next_hop) == 0 &&
395b84fb4cbSAnatoly Burakov 				(enabled_port_mask & 1 << next_hop) != 0) {
396b84fb4cbSAnatoly Burakov 			dst_port = next_hop;
397b84fb4cbSAnatoly Burakov 		}
398b84fb4cbSAnatoly Burakov 
399b84fb4cbSAnatoly Burakov 		eth_hdr->ether_type = rte_be_to_cpu_16(ETHER_TYPE_IPv4);
400b84fb4cbSAnatoly Burakov 	}
401b84fb4cbSAnatoly Burakov 	/* if packet is IPv6 */
402b84fb4cbSAnatoly Burakov 	else if (m->ol_flags & (PKT_RX_IPV6_HDR | PKT_RX_IPV6_HDR_EXT)) {
403b84fb4cbSAnatoly Burakov 		struct ipv6_extension_fragment *frag_hdr;
404b84fb4cbSAnatoly Burakov 		struct ipv6_hdr *ip_hdr;
405b84fb4cbSAnatoly Burakov 
406b84fb4cbSAnatoly Burakov 		ip_hdr = (struct ipv6_hdr *)(eth_hdr + 1);
407b84fb4cbSAnatoly Burakov 
408b84fb4cbSAnatoly Burakov 		frag_hdr = rte_ipv6_frag_get_ipv6_fragment_header(ip_hdr);
409b84fb4cbSAnatoly Burakov 
410b84fb4cbSAnatoly Burakov 		if (frag_hdr != NULL) {
411b84fb4cbSAnatoly Burakov 			struct rte_mbuf *mo;
412b84fb4cbSAnatoly Burakov 
413b84fb4cbSAnatoly Burakov 			tbl = rxq->frag_tbl;
414b84fb4cbSAnatoly Burakov 			dr  = &qconf->death_row;
415b84fb4cbSAnatoly Burakov 
416b84fb4cbSAnatoly Burakov 			/* prepare mbuf: setup l2_len/l3_len. */
4177869536fSBruce Richardson 			m->l2_len = sizeof(*eth_hdr);
4187869536fSBruce Richardson 			m->l3_len = sizeof(*ip_hdr) + sizeof(*frag_hdr);
419b84fb4cbSAnatoly Burakov 
420b84fb4cbSAnatoly Burakov 			mo = rte_ipv6_frag_reassemble_packet(tbl, dr, m, tms, ip_hdr, frag_hdr);
421b84fb4cbSAnatoly Burakov 			if (mo == NULL)
422b84fb4cbSAnatoly Burakov 				return;
423b84fb4cbSAnatoly Burakov 
424b84fb4cbSAnatoly Burakov 			if (mo != m) {
425b84fb4cbSAnatoly Burakov 				m = mo;
426b84fb4cbSAnatoly Burakov 				eth_hdr = rte_pktmbuf_mtod(m, struct ether_hdr *);
427b84fb4cbSAnatoly Burakov 				ip_hdr = (struct ipv6_hdr *)(eth_hdr + 1);
428cc8f4d02SIntel 			}
429cc8f4d02SIntel 		}
430cc8f4d02SIntel 
431b84fb4cbSAnatoly Burakov 		/* Find destination port */
432b84fb4cbSAnatoly Burakov 		if (rte_lpm6_lookup(rxq->lpm6, ip_hdr->dst_addr, &next_hop) == 0 &&
433b84fb4cbSAnatoly Burakov 				(enabled_port_mask & 1 << next_hop) != 0) {
434b84fb4cbSAnatoly Burakov 			dst_port = next_hop;
435b84fb4cbSAnatoly Burakov 		}
436b84fb4cbSAnatoly Burakov 
437b84fb4cbSAnatoly Burakov 		eth_hdr->ether_type = rte_be_to_cpu_16(ETHER_TYPE_IPv6);
438b84fb4cbSAnatoly Burakov 	}
439b84fb4cbSAnatoly Burakov 	/* if packet wasn't IPv4 or IPv6, it's forwarded to the port it came from */
440cc8f4d02SIntel 
441cc8f4d02SIntel 	/* 02:00:00:00:00:xx */
442cc8f4d02SIntel 	d_addr_bytes = &eth_hdr->d_addr.addr_bytes[0];
443cc8f4d02SIntel 	*((uint64_t *)d_addr_bytes) = 0x000000000002 + ((uint64_t)dst_port << 40);
444cc8f4d02SIntel 
445cc8f4d02SIntel 	/* src addr */
446cc8f4d02SIntel 	ether_addr_copy(&ports_eth_addr[dst_port], &eth_hdr->s_addr);
447cc8f4d02SIntel 
448cc8f4d02SIntel 	send_single_packet(m, dst_port);
449cc8f4d02SIntel }
450cc8f4d02SIntel 
451cc8f4d02SIntel /* main processing loop */
452cc8f4d02SIntel static int
453cc8f4d02SIntel main_loop(__attribute__((unused)) void *dummy)
454cc8f4d02SIntel {
455cc8f4d02SIntel 	struct rte_mbuf *pkts_burst[MAX_PKT_BURST];
456cc8f4d02SIntel 	unsigned lcore_id;
457cc8f4d02SIntel 	uint64_t diff_tsc, cur_tsc, prev_tsc;
458cc8f4d02SIntel 	int i, j, nb_rx;
459b84fb4cbSAnatoly Burakov 	uint8_t portid;
460b84fb4cbSAnatoly Burakov 	struct lcore_queue_conf *qconf;
461cc8f4d02SIntel 	const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US;
462cc8f4d02SIntel 
463cc8f4d02SIntel 	prev_tsc = 0;
464cc8f4d02SIntel 
465cc8f4d02SIntel 	lcore_id = rte_lcore_id();
466b84fb4cbSAnatoly Burakov 	qconf = &lcore_queue_conf[lcore_id];
467cc8f4d02SIntel 
468cc8f4d02SIntel 	if (qconf->n_rx_queue == 0) {
469b84fb4cbSAnatoly Burakov 		RTE_LOG(INFO, IP_RSMBL, "lcore %u has nothing to do\n", lcore_id);
470cc8f4d02SIntel 		return 0;
471cc8f4d02SIntel 	}
472cc8f4d02SIntel 
473b84fb4cbSAnatoly Burakov 	RTE_LOG(INFO, IP_RSMBL, "entering main loop on lcore %u\n", lcore_id);
474cc8f4d02SIntel 
475cc8f4d02SIntel 	for (i = 0; i < qconf->n_rx_queue; i++) {
476cc8f4d02SIntel 
477b84fb4cbSAnatoly Burakov 		portid = qconf->rx_queue_list[i].portid;
478b84fb4cbSAnatoly Burakov 		RTE_LOG(INFO, IP_RSMBL, " -- lcoreid=%u portid=%hhu\n", lcore_id,
479b84fb4cbSAnatoly Burakov 			portid);
480cc8f4d02SIntel 	}
481cc8f4d02SIntel 
482cc8f4d02SIntel 	while (1) {
483cc8f4d02SIntel 
484cc8f4d02SIntel 		cur_tsc = rte_rdtsc();
485cc8f4d02SIntel 
486cc8f4d02SIntel 		/*
487cc8f4d02SIntel 		 * TX burst queue drain
488cc8f4d02SIntel 		 */
489cc8f4d02SIntel 		diff_tsc = cur_tsc - prev_tsc;
490cc8f4d02SIntel 		if (unlikely(diff_tsc > drain_tsc)) {
491cc8f4d02SIntel 
492cc8f4d02SIntel 			/*
493cc8f4d02SIntel 			 * This could be optimized (use queueid instead of
494cc8f4d02SIntel 			 * portid), but it is not called so often
495cc8f4d02SIntel 			 */
496b84fb4cbSAnatoly Burakov 			for (portid = 0; portid < RTE_MAX_ETHPORTS; portid++) {
497595ea7dcSIntel 				if ((enabled_port_mask & (1 << portid)) != 0)
498595ea7dcSIntel 					send_burst(qconf, 1, portid);
499cc8f4d02SIntel 			}
500cc8f4d02SIntel 
501cc8f4d02SIntel 			prev_tsc = cur_tsc;
502cc8f4d02SIntel 		}
503cc8f4d02SIntel 
504cc8f4d02SIntel 		/*
505cc8f4d02SIntel 		 * Read packet from RX queues
506cc8f4d02SIntel 		 */
507cc8f4d02SIntel 		for (i = 0; i < qconf->n_rx_queue; ++i) {
508cc8f4d02SIntel 
509b84fb4cbSAnatoly Burakov 			portid = qconf->rx_queue_list[i].portid;
510cc8f4d02SIntel 
511b84fb4cbSAnatoly Burakov 			nb_rx = rte_eth_rx_burst(portid, 0, pkts_burst,
512cc8f4d02SIntel 				MAX_PKT_BURST);
513cc8f4d02SIntel 
514cc8f4d02SIntel 			/* Prefetch first packets */
515cc8f4d02SIntel 			for (j = 0; j < PREFETCH_OFFSET && j < nb_rx; j++) {
516cc8f4d02SIntel 				rte_prefetch0(rte_pktmbuf_mtod(
517cc8f4d02SIntel 						pkts_burst[j], void *));
518cc8f4d02SIntel 			}
519cc8f4d02SIntel 
520cc8f4d02SIntel 			/* Prefetch and forward already prefetched packets */
521cc8f4d02SIntel 			for (j = 0; j < (nb_rx - PREFETCH_OFFSET); j++) {
522cc8f4d02SIntel 				rte_prefetch0(rte_pktmbuf_mtod(pkts_burst[
523cc8f4d02SIntel 					j + PREFETCH_OFFSET], void *));
524b84fb4cbSAnatoly Burakov 				reassemble(pkts_burst[j], portid,
525cc8f4d02SIntel 					i, qconf, cur_tsc);
526cc8f4d02SIntel 			}
527cc8f4d02SIntel 
528cc8f4d02SIntel 			/* Forward remaining prefetched packets */
529cc8f4d02SIntel 			for (; j < nb_rx; j++) {
530b84fb4cbSAnatoly Burakov 				reassemble(pkts_burst[j], portid,
531cc8f4d02SIntel 					i, qconf, cur_tsc);
532cc8f4d02SIntel 			}
533595ea7dcSIntel 
53463ec0b58SAnatoly Burakov 			rte_ip_frag_free_death_row(&qconf->death_row,
535595ea7dcSIntel 				PREFETCH_OFFSET);
536cc8f4d02SIntel 		}
537cc8f4d02SIntel 	}
538cc8f4d02SIntel }
539cc8f4d02SIntel 
540cc8f4d02SIntel /* display usage */
541cc8f4d02SIntel static void
542cc8f4d02SIntel print_usage(const char *prgname)
543cc8f4d02SIntel {
544b84fb4cbSAnatoly Burakov 	printf("%s [EAL options] -- -p PORTMASK [-q NQ]"
545b84fb4cbSAnatoly Burakov 		"  [--max-pkt-len PKTLEN]"
546cc8f4d02SIntel 		"  [--maxflows=<flows>]  [--flowttl=<ttl>[(s|ms)]]\n"
547cc8f4d02SIntel 		"  -p PORTMASK: hexadecimal bitmask of ports to configure\n"
548b84fb4cbSAnatoly Burakov 		"  -q NQ: number of RX queues per lcore\n"
549cc8f4d02SIntel 		"  --maxflows=<flows>: optional, maximum number of flows "
550cc8f4d02SIntel 		"supported\n"
551cc8f4d02SIntel 		"  --flowttl=<ttl>[(s|ms)]: optional, maximum TTL for each "
552cc8f4d02SIntel 		"flow\n",
553cc8f4d02SIntel 		prgname);
554cc8f4d02SIntel }
555cc8f4d02SIntel 
556cc8f4d02SIntel static uint32_t
557cc8f4d02SIntel parse_flow_num(const char *str, uint32_t min, uint32_t max, uint32_t *val)
558cc8f4d02SIntel {
559cc8f4d02SIntel 	char *end;
560cc8f4d02SIntel 	uint64_t v;
561cc8f4d02SIntel 
562cc8f4d02SIntel 	/* parse decimal string */
563cc8f4d02SIntel 	errno = 0;
564cc8f4d02SIntel 	v = strtoul(str, &end, 10);
565cc8f4d02SIntel 	if (errno != 0 || *end != '\0')
566cc8f4d02SIntel 		return (-EINVAL);
567cc8f4d02SIntel 
568cc8f4d02SIntel 	if (v < min || v > max)
569cc8f4d02SIntel 		return (-EINVAL);
570cc8f4d02SIntel 
571cc8f4d02SIntel 	*val = (uint32_t)v;
572cc8f4d02SIntel 	return (0);
573cc8f4d02SIntel }
574cc8f4d02SIntel 
575cc8f4d02SIntel static int
576cc8f4d02SIntel parse_flow_ttl(const char *str, uint32_t min, uint32_t max, uint32_t *val)
577cc8f4d02SIntel {
578cc8f4d02SIntel 	char *end;
579cc8f4d02SIntel 	uint64_t v;
580cc8f4d02SIntel 
581cc8f4d02SIntel 	static const char frmt_sec[] = "s";
582cc8f4d02SIntel 	static const char frmt_msec[] = "ms";
583cc8f4d02SIntel 
584cc8f4d02SIntel 	/* parse decimal string */
585cc8f4d02SIntel 	errno = 0;
586cc8f4d02SIntel 	v = strtoul(str, &end, 10);
587cc8f4d02SIntel 	if (errno != 0)
588cc8f4d02SIntel 		return (-EINVAL);
589cc8f4d02SIntel 
590cc8f4d02SIntel 	if (*end != '\0') {
591cc8f4d02SIntel 		if (strncmp(frmt_sec, end, sizeof(frmt_sec)) == 0)
592cc8f4d02SIntel 			v *= MS_PER_S;
593cc8f4d02SIntel 		else if (strncmp(frmt_msec, end, sizeof (frmt_msec)) != 0)
594cc8f4d02SIntel 			return (-EINVAL);
595cc8f4d02SIntel 	}
596cc8f4d02SIntel 
597cc8f4d02SIntel 	if (v < min || v > max)
598cc8f4d02SIntel 		return (-EINVAL);
599cc8f4d02SIntel 
600cc8f4d02SIntel 	*val = (uint32_t)v;
601cc8f4d02SIntel 	return (0);
602cc8f4d02SIntel }
603cc8f4d02SIntel 
604cc8f4d02SIntel static int
605cc8f4d02SIntel parse_portmask(const char *portmask)
606cc8f4d02SIntel {
607cc8f4d02SIntel 	char *end = NULL;
608cc8f4d02SIntel 	unsigned long pm;
609cc8f4d02SIntel 
610cc8f4d02SIntel 	/* parse hexadecimal string */
611cc8f4d02SIntel 	pm = strtoul(portmask, &end, 16);
612cc8f4d02SIntel 	if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0'))
613cc8f4d02SIntel 		return -1;
614cc8f4d02SIntel 
615cc8f4d02SIntel 	if (pm == 0)
616cc8f4d02SIntel 		return -1;
617cc8f4d02SIntel 
618cc8f4d02SIntel 	return pm;
619cc8f4d02SIntel }
620cc8f4d02SIntel 
621cc8f4d02SIntel static int
622b84fb4cbSAnatoly Burakov parse_nqueue(const char *q_arg)
623cc8f4d02SIntel {
624b84fb4cbSAnatoly Burakov 	char *end = NULL;
625b84fb4cbSAnatoly Burakov 	unsigned long n;
626cc8f4d02SIntel 
627b84fb4cbSAnatoly Burakov 	printf("%p\n", q_arg);
628cc8f4d02SIntel 
629b84fb4cbSAnatoly Burakov 	/* parse hexadecimal string */
630b84fb4cbSAnatoly Burakov 	n = strtoul(q_arg, &end, 10);
631b84fb4cbSAnatoly Burakov 	if ((q_arg[0] == '\0') || (end == NULL) || (*end != '\0'))
632b84fb4cbSAnatoly Burakov 		return -1;
633b84fb4cbSAnatoly Burakov 	if (n == 0)
634b84fb4cbSAnatoly Burakov 		return -1;
635b84fb4cbSAnatoly Burakov 	if (n >= MAX_RX_QUEUE_PER_LCORE)
636cc8f4d02SIntel 		return -1;
637cc8f4d02SIntel 
638b84fb4cbSAnatoly Burakov 	return n;
639cc8f4d02SIntel }
640cc8f4d02SIntel 
641cc8f4d02SIntel /* Parse the argument given in the command line of the application */
642cc8f4d02SIntel static int
643cc8f4d02SIntel parse_args(int argc, char **argv)
644cc8f4d02SIntel {
645cc8f4d02SIntel 	int opt, ret;
646cc8f4d02SIntel 	char **argvopt;
647cc8f4d02SIntel 	int option_index;
648cc8f4d02SIntel 	char *prgname = argv[0];
649cc8f4d02SIntel 	static struct option lgopts[] = {
650b84fb4cbSAnatoly Burakov 		{"max-pkt-len", 1, 0, 0},
651cc8f4d02SIntel 		{"maxflows", 1, 0, 0},
652cc8f4d02SIntel 		{"flowttl", 1, 0, 0},
653cc8f4d02SIntel 		{NULL, 0, 0, 0}
654cc8f4d02SIntel 	};
655cc8f4d02SIntel 
656cc8f4d02SIntel 	argvopt = argv;
657cc8f4d02SIntel 
658b84fb4cbSAnatoly Burakov 	while ((opt = getopt_long(argc, argvopt, "p:q:",
659cc8f4d02SIntel 				lgopts, &option_index)) != EOF) {
660cc8f4d02SIntel 
661cc8f4d02SIntel 		switch (opt) {
662cc8f4d02SIntel 		/* portmask */
663cc8f4d02SIntel 		case 'p':
664cc8f4d02SIntel 			enabled_port_mask = parse_portmask(optarg);
665cc8f4d02SIntel 			if (enabled_port_mask == 0) {
666cc8f4d02SIntel 				printf("invalid portmask\n");
667cc8f4d02SIntel 				print_usage(prgname);
668cc8f4d02SIntel 				return -1;
669cc8f4d02SIntel 			}
670cc8f4d02SIntel 			break;
671b84fb4cbSAnatoly Burakov 
672b84fb4cbSAnatoly Burakov 		/* nqueue */
673b84fb4cbSAnatoly Burakov 		case 'q':
674b84fb4cbSAnatoly Burakov 			rx_queue_per_lcore = parse_nqueue(optarg);
675b84fb4cbSAnatoly Burakov 			if (rx_queue_per_lcore < 0) {
676b84fb4cbSAnatoly Burakov 				printf("invalid queue number\n");
677b84fb4cbSAnatoly Burakov 				print_usage(prgname);
678b84fb4cbSAnatoly Burakov 				return -1;
679b84fb4cbSAnatoly Burakov 			}
680cc8f4d02SIntel 			break;
681cc8f4d02SIntel 
682cc8f4d02SIntel 		/* long options */
683cc8f4d02SIntel 		case 0:
684cc8f4d02SIntel 			if (!strncmp(lgopts[option_index].name,
685cc8f4d02SIntel 					"maxflows", 8)) {
686cc8f4d02SIntel 				if ((ret = parse_flow_num(optarg, MIN_FLOW_NUM,
687cc8f4d02SIntel 						MAX_FLOW_NUM,
688cc8f4d02SIntel 						&max_flow_num)) != 0) {
689cc8f4d02SIntel 					printf("invalid value: \"%s\" for "
690cc8f4d02SIntel 						"parameter %s\n",
691cc8f4d02SIntel 						optarg,
692cc8f4d02SIntel 						lgopts[option_index].name);
693cc8f4d02SIntel 					print_usage(prgname);
694cc8f4d02SIntel 					return (ret);
695cc8f4d02SIntel 				}
696cc8f4d02SIntel 			}
697cc8f4d02SIntel 
698cc8f4d02SIntel 			if (!strncmp(lgopts[option_index].name, "flowttl", 7)) {
699cc8f4d02SIntel 				if ((ret = parse_flow_ttl(optarg, MIN_FLOW_TTL,
700cc8f4d02SIntel 						MAX_FLOW_TTL,
701cc8f4d02SIntel 						&max_flow_ttl)) != 0) {
702cc8f4d02SIntel 					printf("invalid value: \"%s\" for "
703cc8f4d02SIntel 						"parameter %s\n",
704cc8f4d02SIntel 						optarg,
705cc8f4d02SIntel 						lgopts[option_index].name);
706cc8f4d02SIntel 					print_usage(prgname);
707cc8f4d02SIntel 					return (ret);
708cc8f4d02SIntel 				}
709cc8f4d02SIntel 			}
710cc8f4d02SIntel 
711cc8f4d02SIntel 			break;
712cc8f4d02SIntel 
713cc8f4d02SIntel 		default:
714cc8f4d02SIntel 			print_usage(prgname);
715cc8f4d02SIntel 			return -1;
716cc8f4d02SIntel 		}
717cc8f4d02SIntel 	}
718cc8f4d02SIntel 
719cc8f4d02SIntel 	if (optind >= 0)
720cc8f4d02SIntel 		argv[optind-1] = prgname;
721cc8f4d02SIntel 
722cc8f4d02SIntel 	ret = optind-1;
723cc8f4d02SIntel 	optind = 0; /* reset getopt lib */
724cc8f4d02SIntel 	return ret;
725cc8f4d02SIntel }
726cc8f4d02SIntel 
727cc8f4d02SIntel static void
728cc8f4d02SIntel print_ethaddr(const char *name, const struct ether_addr *eth_addr)
729cc8f4d02SIntel {
730ec3d82dbSCunming Liang 	char buf[ETHER_ADDR_FMT_SIZE];
731ec3d82dbSCunming Liang 	ether_format_addr(buf, ETHER_ADDR_FMT_SIZE, eth_addr);
732ec3d82dbSCunming Liang 	printf("%s%s", name, buf);
733cc8f4d02SIntel }
734cc8f4d02SIntel 
735cc8f4d02SIntel /* Check the link status of all ports in up to 9s, and print them finally */
736cc8f4d02SIntel static void
737cc8f4d02SIntel check_all_ports_link_status(uint8_t port_num, uint32_t port_mask)
738cc8f4d02SIntel {
739cc8f4d02SIntel #define CHECK_INTERVAL 100 /* 100ms */
740cc8f4d02SIntel #define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */
741cc8f4d02SIntel 	uint8_t portid, count, all_ports_up, print_flag = 0;
742cc8f4d02SIntel 	struct rte_eth_link link;
743cc8f4d02SIntel 
744cc8f4d02SIntel 	printf("\nChecking link status");
745cc8f4d02SIntel 	fflush(stdout);
746cc8f4d02SIntel 	for (count = 0; count <= MAX_CHECK_TIME; count++) {
747cc8f4d02SIntel 		all_ports_up = 1;
748cc8f4d02SIntel 		for (portid = 0; portid < port_num; portid++) {
749cc8f4d02SIntel 			if ((port_mask & (1 << portid)) == 0)
750cc8f4d02SIntel 				continue;
751cc8f4d02SIntel 			memset(&link, 0, sizeof(link));
752cc8f4d02SIntel 			rte_eth_link_get_nowait(portid, &link);
753cc8f4d02SIntel 			/* print link status if flag set */
754cc8f4d02SIntel 			if (print_flag == 1) {
755cc8f4d02SIntel 				if (link.link_status)
756cc8f4d02SIntel 					printf("Port %d Link Up - speed %u "
757cc8f4d02SIntel 						"Mbps - %s\n", (uint8_t)portid,
758cc8f4d02SIntel 						(unsigned)link.link_speed,
759cc8f4d02SIntel 				(link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
760cc8f4d02SIntel 					("full-duplex") : ("half-duplex\n"));
761cc8f4d02SIntel 				else
762cc8f4d02SIntel 					printf("Port %d Link Down\n",
763cc8f4d02SIntel 						(uint8_t)portid);
764cc8f4d02SIntel 				continue;
765cc8f4d02SIntel 			}
766cc8f4d02SIntel 			/* clear all_ports_up flag if any link down */
767cc8f4d02SIntel 			if (link.link_status == 0) {
768cc8f4d02SIntel 				all_ports_up = 0;
769cc8f4d02SIntel 				break;
770cc8f4d02SIntel 			}
771cc8f4d02SIntel 		}
772cc8f4d02SIntel 		/* after finally printing all link status, get out */
773cc8f4d02SIntel 		if (print_flag == 1)
774cc8f4d02SIntel 			break;
775cc8f4d02SIntel 
776cc8f4d02SIntel 		if (all_ports_up == 0) {
777cc8f4d02SIntel 			printf(".");
778cc8f4d02SIntel 			fflush(stdout);
779cc8f4d02SIntel 			rte_delay_ms(CHECK_INTERVAL);
780cc8f4d02SIntel 		}
781cc8f4d02SIntel 
782cc8f4d02SIntel 		/* set the print_flag if all ports up or timeout */
783cc8f4d02SIntel 		if (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) {
784cc8f4d02SIntel 			print_flag = 1;
785b84fb4cbSAnatoly Burakov 			printf("\ndone\n");
786cc8f4d02SIntel 		}
787cc8f4d02SIntel 	}
788cc8f4d02SIntel }
789b84fb4cbSAnatoly Burakov 
790b84fb4cbSAnatoly Burakov static int
791b84fb4cbSAnatoly Burakov init_routing_table(void)
792b84fb4cbSAnatoly Burakov {
793b84fb4cbSAnatoly Burakov 	struct rte_lpm *lpm;
794b84fb4cbSAnatoly Burakov 	struct rte_lpm6 *lpm6;
795b84fb4cbSAnatoly Burakov 	int socket, ret;
796b84fb4cbSAnatoly Burakov 	unsigned i;
797b84fb4cbSAnatoly Burakov 
798b84fb4cbSAnatoly Burakov 	for (socket = 0; socket < RTE_MAX_NUMA_NODES; socket++) {
799b84fb4cbSAnatoly Burakov 		if (socket_lpm[socket]) {
800b84fb4cbSAnatoly Burakov 			lpm = socket_lpm[socket];
801b84fb4cbSAnatoly Burakov 			/* populate the LPM table */
802b84fb4cbSAnatoly Burakov 			for (i = 0; i < RTE_DIM(l3fwd_ipv4_route_array); i++) {
803b84fb4cbSAnatoly Burakov 				ret = rte_lpm_add(lpm,
804b84fb4cbSAnatoly Burakov 					l3fwd_ipv4_route_array[i].ip,
805b84fb4cbSAnatoly Burakov 					l3fwd_ipv4_route_array[i].depth,
806b84fb4cbSAnatoly Burakov 					l3fwd_ipv4_route_array[i].if_out);
807b84fb4cbSAnatoly Burakov 
808b84fb4cbSAnatoly Burakov 				if (ret < 0) {
809b84fb4cbSAnatoly Burakov 					RTE_LOG(ERR, IP_RSMBL, "Unable to add entry %i to the l3fwd "
810b84fb4cbSAnatoly Burakov 						"LPM table\n", i);
811b84fb4cbSAnatoly Burakov 					return -1;
812b84fb4cbSAnatoly Burakov 				}
813b84fb4cbSAnatoly Burakov 
814b84fb4cbSAnatoly Burakov 				RTE_LOG(INFO, IP_RSMBL, "Socket %i: adding route " IPv4_BYTES_FMT
815b84fb4cbSAnatoly Burakov 						"/%d (port %d)\n",
816b84fb4cbSAnatoly Burakov 					socket,
817b84fb4cbSAnatoly Burakov 					IPv4_BYTES(l3fwd_ipv4_route_array[i].ip),
818b84fb4cbSAnatoly Burakov 					l3fwd_ipv4_route_array[i].depth,
819b84fb4cbSAnatoly Burakov 					l3fwd_ipv4_route_array[i].if_out);
820b84fb4cbSAnatoly Burakov 			}
821b84fb4cbSAnatoly Burakov 		}
822b84fb4cbSAnatoly Burakov 
823b84fb4cbSAnatoly Burakov 		if (socket_lpm6[socket]) {
824b84fb4cbSAnatoly Burakov 			lpm6 = socket_lpm6[socket];
825b84fb4cbSAnatoly Burakov 			/* populate the LPM6 table */
826b84fb4cbSAnatoly Burakov 			for (i = 0; i < RTE_DIM(l3fwd_ipv6_route_array); i++) {
827b84fb4cbSAnatoly Burakov 				ret = rte_lpm6_add(lpm6,
828b84fb4cbSAnatoly Burakov 					l3fwd_ipv6_route_array[i].ip,
829b84fb4cbSAnatoly Burakov 					l3fwd_ipv6_route_array[i].depth,
830b84fb4cbSAnatoly Burakov 					l3fwd_ipv6_route_array[i].if_out);
831b84fb4cbSAnatoly Burakov 
832b84fb4cbSAnatoly Burakov 				if (ret < 0) {
833b84fb4cbSAnatoly Burakov 					RTE_LOG(ERR, IP_RSMBL, "Unable to add entry %i to the l3fwd "
834b84fb4cbSAnatoly Burakov 						"LPM6 table\n", i);
835b84fb4cbSAnatoly Burakov 					return -1;
836b84fb4cbSAnatoly Burakov 				}
837b84fb4cbSAnatoly Burakov 
838b84fb4cbSAnatoly Burakov 				RTE_LOG(INFO, IP_RSMBL, "Socket %i: adding route " IPv6_BYTES_FMT
839b84fb4cbSAnatoly Burakov 						"/%d (port %d)\n",
840b84fb4cbSAnatoly Burakov 					socket,
841b84fb4cbSAnatoly Burakov 					IPv6_BYTES(l3fwd_ipv6_route_array[i].ip),
842b84fb4cbSAnatoly Burakov 					l3fwd_ipv6_route_array[i].depth,
843b84fb4cbSAnatoly Burakov 					l3fwd_ipv6_route_array[i].if_out);
844b84fb4cbSAnatoly Burakov 			}
845b84fb4cbSAnatoly Burakov 		}
846b84fb4cbSAnatoly Burakov 	}
847b84fb4cbSAnatoly Burakov 	return 0;
848b84fb4cbSAnatoly Burakov }
849b84fb4cbSAnatoly Burakov 
850b84fb4cbSAnatoly Burakov static int
851b84fb4cbSAnatoly Burakov setup_port_tbl(struct lcore_queue_conf *qconf, uint32_t lcore, int socket,
852595ea7dcSIntel 	uint32_t port)
853595ea7dcSIntel {
854595ea7dcSIntel 	struct mbuf_table *mtb;
855595ea7dcSIntel 	uint32_t n;
856595ea7dcSIntel 	size_t sz;
857595ea7dcSIntel 
858595ea7dcSIntel 	n = RTE_MAX(max_flow_num, 2UL * MAX_PKT_BURST);
859595ea7dcSIntel 	sz = sizeof (*mtb) + sizeof (mtb->m_table[0]) *  n;
860595ea7dcSIntel 
861595ea7dcSIntel 	if ((mtb = rte_zmalloc_socket(__func__, sz, CACHE_LINE_SIZE,
862b84fb4cbSAnatoly Burakov 			socket)) == NULL) {
863b84fb4cbSAnatoly Burakov 		RTE_LOG(ERR, IP_RSMBL, "%s() for lcore: %u, port: %u "
864595ea7dcSIntel 			"failed to allocate %zu bytes\n",
865595ea7dcSIntel 			__func__, lcore, port, sz);
866b84fb4cbSAnatoly Burakov 		return -1;
867b84fb4cbSAnatoly Burakov 	}
868595ea7dcSIntel 
869595ea7dcSIntel 	mtb->len = n;
870595ea7dcSIntel 	qconf->tx_mbufs[port] = mtb;
871b84fb4cbSAnatoly Burakov 
872b84fb4cbSAnatoly Burakov 	return 0;
873595ea7dcSIntel }
874cc8f4d02SIntel 
875b84fb4cbSAnatoly Burakov static int
876b84fb4cbSAnatoly Burakov setup_queue_tbl(struct rx_queue *rxq, uint32_t lcore, uint32_t queue)
877cc8f4d02SIntel {
878b84fb4cbSAnatoly Burakov 	int socket;
879cc8f4d02SIntel 	uint32_t nb_mbuf;
880cc8f4d02SIntel 	uint64_t frag_cycles;
881cc8f4d02SIntel 	char buf[RTE_MEMPOOL_NAMESIZE];
882cc8f4d02SIntel 
883b84fb4cbSAnatoly Burakov 	socket = rte_lcore_to_socket_id(lcore);
884b84fb4cbSAnatoly Burakov 	if (socket == SOCKET_ID_ANY)
885b84fb4cbSAnatoly Burakov 		socket = 0;
886b84fb4cbSAnatoly Burakov 
887cc8f4d02SIntel 	frag_cycles = (rte_get_tsc_hz() + MS_PER_S - 1) / MS_PER_S *
888cc8f4d02SIntel 		max_flow_ttl;
889cc8f4d02SIntel 
890b84fb4cbSAnatoly Burakov 	if ((rxq->frag_tbl = rte_ip_frag_table_create(max_flow_num,
891b84fb4cbSAnatoly Burakov 			IP_FRAG_TBL_BUCKET_ENTRIES, max_flow_num, frag_cycles,
892b84fb4cbSAnatoly Burakov 			socket)) == NULL) {
893b84fb4cbSAnatoly Burakov 		RTE_LOG(ERR, IP_RSMBL, "ip_frag_tbl_create(%u) on "
894cc8f4d02SIntel 			"lcore: %u for queue: %u failed\n",
895cc8f4d02SIntel 			max_flow_num, lcore, queue);
896b84fb4cbSAnatoly Burakov 		return -1;
897b84fb4cbSAnatoly Burakov 	}
898cc8f4d02SIntel 
899595ea7dcSIntel 	/*
900d47bd10cSAnatoly Burakov 	 * At any given moment up to <max_flow_num * (MAX_FRAG_NUM)>
901595ea7dcSIntel 	 * mbufs could be stored int the fragment table.
902595ea7dcSIntel 	 * Plus, each TX queue can hold up to <max_flow_num> packets.
903595ea7dcSIntel 	 */
904595ea7dcSIntel 
905d47bd10cSAnatoly Burakov 	nb_mbuf = RTE_MAX(max_flow_num, 2UL * MAX_PKT_BURST) * MAX_FRAG_NUM;
906cc8f4d02SIntel 	nb_mbuf *= (port_conf.rxmode.max_rx_pkt_len + BUF_SIZE - 1) / BUF_SIZE;
907b84fb4cbSAnatoly Burakov 	nb_mbuf *= 2; /* ipv4 and ipv6 */
908d47bd10cSAnatoly Burakov 	nb_mbuf += RTE_TEST_RX_DESC_DEFAULT + RTE_TEST_TX_DESC_DEFAULT;
909595ea7dcSIntel 
910b84fb4cbSAnatoly Burakov 	nb_mbuf = RTE_MAX(nb_mbuf, (uint32_t)NB_MBUF);
911cc8f4d02SIntel 
9126f41fe75SStephen Hemminger 	snprintf(buf, sizeof(buf), "mbuf_pool_%u_%u", lcore, queue);
913cc8f4d02SIntel 
914b84fb4cbSAnatoly Burakov 	if ((rxq->pool = rte_mempool_create(buf, nb_mbuf, MBUF_SIZE, 0,
915cc8f4d02SIntel 			sizeof(struct rte_pktmbuf_pool_private),
916cc8f4d02SIntel 			rte_pktmbuf_pool_init, NULL, rte_pktmbuf_init, NULL,
917b84fb4cbSAnatoly Burakov 			socket, MEMPOOL_F_SP_PUT | MEMPOOL_F_SC_GET)) == NULL) {
918b84fb4cbSAnatoly Burakov 		RTE_LOG(ERR, IP_RSMBL, "mempool_create(%s) failed", buf);
919b84fb4cbSAnatoly Burakov 		return -1;
920b84fb4cbSAnatoly Burakov 	}
921b84fb4cbSAnatoly Burakov 
922b84fb4cbSAnatoly Burakov 	return 0;
923b84fb4cbSAnatoly Burakov }
924b84fb4cbSAnatoly Burakov 
925b84fb4cbSAnatoly Burakov static int
926b84fb4cbSAnatoly Burakov init_mem(void)
927b84fb4cbSAnatoly Burakov {
928b84fb4cbSAnatoly Burakov 	char buf[PATH_MAX];
929b84fb4cbSAnatoly Burakov 	struct rte_lpm *lpm;
930b84fb4cbSAnatoly Burakov 	struct rte_lpm6 *lpm6;
931b84fb4cbSAnatoly Burakov 	int socket;
932b84fb4cbSAnatoly Burakov 	unsigned lcore_id;
933b84fb4cbSAnatoly Burakov 
934b84fb4cbSAnatoly Burakov 	/* traverse through lcores and initialize structures on each socket */
935b84fb4cbSAnatoly Burakov 
936b84fb4cbSAnatoly Burakov 	for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
937b84fb4cbSAnatoly Burakov 
938b84fb4cbSAnatoly Burakov 		if (rte_lcore_is_enabled(lcore_id) == 0)
939b84fb4cbSAnatoly Burakov 			continue;
940b84fb4cbSAnatoly Burakov 
941b84fb4cbSAnatoly Burakov 		socket = rte_lcore_to_socket_id(lcore_id);
942b84fb4cbSAnatoly Burakov 
943b84fb4cbSAnatoly Burakov 		if (socket == SOCKET_ID_ANY)
944b84fb4cbSAnatoly Burakov 			socket = 0;
945b84fb4cbSAnatoly Burakov 
946b84fb4cbSAnatoly Burakov 		if (socket_lpm[socket] == NULL) {
947b84fb4cbSAnatoly Burakov 			RTE_LOG(INFO, IP_RSMBL, "Creating LPM table on socket %i\n", socket);
9486f41fe75SStephen Hemminger 			snprintf(buf, sizeof(buf), "IP_RSMBL_LPM_%i", socket);
949b84fb4cbSAnatoly Burakov 
950b84fb4cbSAnatoly Burakov 			lpm = rte_lpm_create(buf, socket, LPM_MAX_RULES, 0);
951b84fb4cbSAnatoly Burakov 			if (lpm == NULL) {
952b84fb4cbSAnatoly Burakov 				RTE_LOG(ERR, IP_RSMBL, "Cannot create LPM table\n");
953b84fb4cbSAnatoly Burakov 				return -1;
954b84fb4cbSAnatoly Burakov 			}
955b84fb4cbSAnatoly Burakov 			socket_lpm[socket] = lpm;
956b84fb4cbSAnatoly Burakov 		}
957b84fb4cbSAnatoly Burakov 
958b84fb4cbSAnatoly Burakov 		if (socket_lpm6[socket] == NULL) {
959b84fb4cbSAnatoly Burakov 			RTE_LOG(INFO, IP_RSMBL, "Creating LPM6 table on socket %i\n", socket);
9606f41fe75SStephen Hemminger 			snprintf(buf, sizeof(buf), "IP_RSMBL_LPM_%i", socket);
961b84fb4cbSAnatoly Burakov 
962b84fb4cbSAnatoly Burakov 			lpm6 = rte_lpm6_create("IP_RSMBL_LPM6", socket, &lpm6_config);
963b84fb4cbSAnatoly Burakov 			if (lpm6 == NULL) {
964b84fb4cbSAnatoly Burakov 				RTE_LOG(ERR, IP_RSMBL, "Cannot create LPM table\n");
965b84fb4cbSAnatoly Burakov 				return -1;
966b84fb4cbSAnatoly Burakov 			}
967b84fb4cbSAnatoly Burakov 			socket_lpm6[socket] = lpm6;
968b84fb4cbSAnatoly Burakov 		}
969b84fb4cbSAnatoly Burakov 	}
970b84fb4cbSAnatoly Burakov 
971b84fb4cbSAnatoly Burakov 	return 0;
972cc8f4d02SIntel }
973cc8f4d02SIntel 
974cc8f4d02SIntel static void
975595ea7dcSIntel queue_dump_stat(void)
976cc8f4d02SIntel {
977cc8f4d02SIntel 	uint32_t i, lcore;
978b84fb4cbSAnatoly Burakov 	const struct lcore_queue_conf *qconf;
979cc8f4d02SIntel 
980cc8f4d02SIntel 	for (lcore = 0; lcore < RTE_MAX_LCORE; lcore++) {
981cc8f4d02SIntel 		if (rte_lcore_is_enabled(lcore) == 0)
982cc8f4d02SIntel 			continue;
983cc8f4d02SIntel 
984b84fb4cbSAnatoly Burakov 		qconf = &lcore_queue_conf[lcore];
985cc8f4d02SIntel 		for (i = 0; i < qconf->n_rx_queue; i++) {
986cc8f4d02SIntel 
987cc8f4d02SIntel 			fprintf(stdout, " -- lcoreid=%u portid=%hhu "
988b84fb4cbSAnatoly Burakov 				"frag tbl stat:\n",
989b84fb4cbSAnatoly Burakov 				lcore,  qconf->rx_queue_list[i].portid);
990b84fb4cbSAnatoly Burakov 			rte_ip_frag_table_statistics_dump(stdout,
991b84fb4cbSAnatoly Burakov 					qconf->rx_queue_list[i].frag_tbl);
992595ea7dcSIntel 			fprintf(stdout, "TX bursts:\t%" PRIu64 "\n"
993595ea7dcSIntel 				"TX packets _queued:\t%" PRIu64 "\n"
994595ea7dcSIntel 				"TX packets dropped:\t%" PRIu64 "\n"
995595ea7dcSIntel 				"TX packets send:\t%" PRIu64 "\n",
996595ea7dcSIntel 				qconf->tx_stat.call,
997595ea7dcSIntel 				qconf->tx_stat.queue,
998595ea7dcSIntel 				qconf->tx_stat.drop,
999595ea7dcSIntel 				qconf->tx_stat.send);
1000cc8f4d02SIntel 		}
1001cc8f4d02SIntel 	}
1002cc8f4d02SIntel }
1003cc8f4d02SIntel 
1004cc8f4d02SIntel static void
1005cc8f4d02SIntel signal_handler(int signum)
1006cc8f4d02SIntel {
1007595ea7dcSIntel 	queue_dump_stat();
1008cc8f4d02SIntel 	if (signum != SIGUSR1)
1009cc8f4d02SIntel 		rte_exit(0, "received signal: %d, exiting\n", signum);
1010cc8f4d02SIntel }
1011cc8f4d02SIntel 
1012cc8f4d02SIntel int
1013*98a16481SDavid Marchand main(int argc, char **argv)
1014cc8f4d02SIntel {
1015b84fb4cbSAnatoly Burakov 	struct lcore_queue_conf *qconf;
101681f7ecd9SPablo de Lara 	struct rte_eth_dev_info dev_info;
101781f7ecd9SPablo de Lara 	struct rte_eth_txconf *txconf;
1018b84fb4cbSAnatoly Burakov 	struct rx_queue *rxq;
1019b84fb4cbSAnatoly Burakov 	int ret, socket;
1020cc8f4d02SIntel 	unsigned nb_ports;
1021cc8f4d02SIntel 	uint16_t queueid;
1022b84fb4cbSAnatoly Burakov 	unsigned lcore_id = 0, rx_lcore_id = 0;
1023cc8f4d02SIntel 	uint32_t n_tx_queue, nb_lcores;
1024b84fb4cbSAnatoly Burakov 	uint8_t portid;
1025cc8f4d02SIntel 
1026cc8f4d02SIntel 	/* init EAL */
1027cc8f4d02SIntel 	ret = rte_eal_init(argc, argv);
1028cc8f4d02SIntel 	if (ret < 0)
1029cc8f4d02SIntel 		rte_exit(EXIT_FAILURE, "Invalid EAL parameters\n");
1030cc8f4d02SIntel 	argc -= ret;
1031cc8f4d02SIntel 	argv += ret;
1032cc8f4d02SIntel 
1033cc8f4d02SIntel 	/* parse application arguments (after the EAL ones) */
1034cc8f4d02SIntel 	ret = parse_args(argc, argv);
1035cc8f4d02SIntel 	if (ret < 0)
1036b84fb4cbSAnatoly Burakov 		rte_exit(EXIT_FAILURE, "Invalid IP reassembly parameters\n");
1037cc8f4d02SIntel 
1038cc8f4d02SIntel 	nb_ports = rte_eth_dev_count();
1039b84fb4cbSAnatoly Burakov 	if (nb_ports > RTE_MAX_ETHPORTS)
1040b84fb4cbSAnatoly Burakov 		nb_ports = RTE_MAX_ETHPORTS;
1041b84fb4cbSAnatoly Burakov 	else if (nb_ports == 0)
1042b84fb4cbSAnatoly Burakov 		rte_exit(EXIT_FAILURE, "No ports found!\n");
1043cc8f4d02SIntel 
1044cc8f4d02SIntel 	nb_lcores = rte_lcore_count();
1045cc8f4d02SIntel 
1046b84fb4cbSAnatoly Burakov 	/* initialize structures (mempools, lpm etc.) */
1047b84fb4cbSAnatoly Burakov 	if (init_mem() < 0)
1048b84fb4cbSAnatoly Burakov 		rte_panic("Cannot initialize memory structures!\n");
1049b84fb4cbSAnatoly Burakov 
1050eaa8d3bfSAnatoly Burakov 	/* check if portmask has non-existent ports */
1051eaa8d3bfSAnatoly Burakov 	if (enabled_port_mask & ~(RTE_LEN2MASK(nb_ports, unsigned)))
1052eaa8d3bfSAnatoly Burakov 		rte_exit(EXIT_FAILURE, "Non-existent ports in portmask!\n");
1053eaa8d3bfSAnatoly Burakov 
1054cc8f4d02SIntel 	/* initialize all ports */
1055cc8f4d02SIntel 	for (portid = 0; portid < nb_ports; portid++) {
1056cc8f4d02SIntel 		/* skip ports that are not enabled */
1057cc8f4d02SIntel 		if ((enabled_port_mask & (1 << portid)) == 0) {
1058cc8f4d02SIntel 			printf("\nSkipping disabled port %d\n", portid);
1059cc8f4d02SIntel 			continue;
1060cc8f4d02SIntel 		}
1061cc8f4d02SIntel 
1062b84fb4cbSAnatoly Burakov 		qconf = &lcore_queue_conf[rx_lcore_id];
1063b84fb4cbSAnatoly Burakov 
1064b84fb4cbSAnatoly Burakov 		/* get the lcore_id for this port */
1065b84fb4cbSAnatoly Burakov 		while (rte_lcore_is_enabled(rx_lcore_id) == 0 ||
1066b84fb4cbSAnatoly Burakov 			   qconf->n_rx_queue == (unsigned)rx_queue_per_lcore) {
1067b84fb4cbSAnatoly Burakov 
1068b84fb4cbSAnatoly Burakov 			rx_lcore_id++;
1069b84fb4cbSAnatoly Burakov 			if (rx_lcore_id >= RTE_MAX_LCORE)
1070b84fb4cbSAnatoly Burakov 				rte_exit(EXIT_FAILURE, "Not enough cores\n");
1071b84fb4cbSAnatoly Burakov 
1072b84fb4cbSAnatoly Burakov 			qconf = &lcore_queue_conf[rx_lcore_id];
1073b84fb4cbSAnatoly Burakov 		}
1074b84fb4cbSAnatoly Burakov 
1075324bcf45SAnatoly Burakov 		socket = rte_lcore_to_socket_id(portid);
1076b84fb4cbSAnatoly Burakov 		if (socket == SOCKET_ID_ANY)
1077b84fb4cbSAnatoly Burakov 			socket = 0;
1078b84fb4cbSAnatoly Burakov 
1079b84fb4cbSAnatoly Burakov 		queueid = qconf->n_rx_queue;
1080b84fb4cbSAnatoly Burakov 		rxq = &qconf->rx_queue_list[queueid];
1081b84fb4cbSAnatoly Burakov 		rxq->portid = portid;
1082b84fb4cbSAnatoly Burakov 		rxq->lpm = socket_lpm[socket];
1083b84fb4cbSAnatoly Burakov 		rxq->lpm6 = socket_lpm6[socket];
1084b84fb4cbSAnatoly Burakov 		if (setup_queue_tbl(rxq, rx_lcore_id, queueid) < 0)
1085b84fb4cbSAnatoly Burakov 			rte_exit(EXIT_FAILURE, "Failed to set up queue table\n");
1086b84fb4cbSAnatoly Burakov 		qconf->n_rx_queue++;
1087b84fb4cbSAnatoly Burakov 
1088cc8f4d02SIntel 		/* init port */
1089cc8f4d02SIntel 		printf("Initializing port %d ... ", portid );
1090cc8f4d02SIntel 		fflush(stdout);
1091cc8f4d02SIntel 
1092cc8f4d02SIntel 		n_tx_queue = nb_lcores;
1093cc8f4d02SIntel 		if (n_tx_queue > MAX_TX_QUEUE_PER_PORT)
1094cc8f4d02SIntel 			n_tx_queue = MAX_TX_QUEUE_PER_PORT;
1095b84fb4cbSAnatoly Burakov 		ret = rte_eth_dev_configure(portid, 1, (uint16_t)n_tx_queue,
1096b84fb4cbSAnatoly Burakov 					    &port_conf);
1097b84fb4cbSAnatoly Burakov 		if (ret < 0) {
1098b84fb4cbSAnatoly Burakov 			printf("\n");
1099b84fb4cbSAnatoly Burakov 			rte_exit(EXIT_FAILURE, "Cannot configure device: "
1100b84fb4cbSAnatoly Burakov 				"err=%d, port=%d\n",
1101cc8f4d02SIntel 				ret, portid);
1102b84fb4cbSAnatoly Burakov 		}
1103b84fb4cbSAnatoly Burakov 
1104b84fb4cbSAnatoly Burakov 		/* init one RX queue */
1105b84fb4cbSAnatoly Burakov 		ret = rte_eth_rx_queue_setup(portid, 0, nb_rxd,
110681f7ecd9SPablo de Lara 					     socket, NULL,
1107b84fb4cbSAnatoly Burakov 					     rxq->pool);
1108b84fb4cbSAnatoly Burakov 		if (ret < 0) {
1109b84fb4cbSAnatoly Burakov 			printf("\n");
1110b84fb4cbSAnatoly Burakov 			rte_exit(EXIT_FAILURE, "rte_eth_rx_queue_setup: "
1111b84fb4cbSAnatoly Burakov 				"err=%d, port=%d\n",
1112b84fb4cbSAnatoly Burakov 				ret, portid);
1113b84fb4cbSAnatoly Burakov 		}
1114cc8f4d02SIntel 
1115cc8f4d02SIntel 		rte_eth_macaddr_get(portid, &ports_eth_addr[portid]);
1116cc8f4d02SIntel 		print_ethaddr(" Address:", &ports_eth_addr[portid]);
1117b84fb4cbSAnatoly Burakov 		printf("\n");
1118cc8f4d02SIntel 
1119cc8f4d02SIntel 		/* init one TX queue per couple (lcore,port) */
1120cc8f4d02SIntel 		queueid = 0;
1121cc8f4d02SIntel 		for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
1122cc8f4d02SIntel 			if (rte_lcore_is_enabled(lcore_id) == 0)
1123cc8f4d02SIntel 				continue;
1124cc8f4d02SIntel 
1125b84fb4cbSAnatoly Burakov 			socket = (int) rte_lcore_to_socket_id(lcore_id);
1126cc8f4d02SIntel 
1127b84fb4cbSAnatoly Burakov 			printf("txq=%u,%d,%d ", lcore_id, queueid, socket);
1128cc8f4d02SIntel 			fflush(stdout);
112981f7ecd9SPablo de Lara 
113081f7ecd9SPablo de Lara 			rte_eth_dev_info_get(portid, &dev_info);
113181f7ecd9SPablo de Lara 			txconf = &dev_info.default_txconf;
113281f7ecd9SPablo de Lara 			txconf->txq_flags = 0;
113381f7ecd9SPablo de Lara 
1134cc8f4d02SIntel 			ret = rte_eth_tx_queue_setup(portid, queueid, nb_txd,
113581f7ecd9SPablo de Lara 					socket, txconf);
1136cc8f4d02SIntel 			if (ret < 0)
1137cc8f4d02SIntel 				rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d, "
1138cc8f4d02SIntel 					"port=%d\n", ret, portid);
1139cc8f4d02SIntel 
1140b84fb4cbSAnatoly Burakov 			qconf = &lcore_queue_conf[lcore_id];
1141cc8f4d02SIntel 			qconf->tx_queue_id[portid] = queueid;
1142b84fb4cbSAnatoly Burakov 			setup_port_tbl(qconf, lcore_id, socket, portid);
1143cc8f4d02SIntel 			queueid++;
1144cc8f4d02SIntel 		}
1145cc8f4d02SIntel 		printf("\n");
1146cc8f4d02SIntel 	}
1147cc8f4d02SIntel 
1148cc8f4d02SIntel 	printf("\n");
1149cc8f4d02SIntel 
1150cc8f4d02SIntel 	/* start ports */
1151cc8f4d02SIntel 	for (portid = 0; portid < nb_ports; portid++) {
1152cc8f4d02SIntel 		if ((enabled_port_mask & (1 << portid)) == 0) {
1153cc8f4d02SIntel 			continue;
1154cc8f4d02SIntel 		}
1155cc8f4d02SIntel 		/* Start device */
1156cc8f4d02SIntel 		ret = rte_eth_dev_start(portid);
1157cc8f4d02SIntel 		if (ret < 0)
1158cc8f4d02SIntel 			rte_exit(EXIT_FAILURE, "rte_eth_dev_start: err=%d, port=%d\n",
1159cc8f4d02SIntel 				ret, portid);
1160cc8f4d02SIntel 
1161cc8f4d02SIntel 		rte_eth_promiscuous_enable(portid);
1162cc8f4d02SIntel 	}
1163cc8f4d02SIntel 
1164b84fb4cbSAnatoly Burakov 	if (init_routing_table() < 0)
1165b84fb4cbSAnatoly Burakov 		rte_exit(EXIT_FAILURE, "Cannot init routing table\n");
1166b84fb4cbSAnatoly Burakov 
1167cc8f4d02SIntel 	check_all_ports_link_status((uint8_t)nb_ports, enabled_port_mask);
1168cc8f4d02SIntel 
1169cc8f4d02SIntel 	signal(SIGUSR1, signal_handler);
1170cc8f4d02SIntel 	signal(SIGTERM, signal_handler);
1171cc8f4d02SIntel 	signal(SIGINT, signal_handler);
1172cc8f4d02SIntel 
1173cc8f4d02SIntel 	/* launch per-lcore init on every lcore */
1174cc8f4d02SIntel 	rte_eal_mp_remote_launch(main_loop, NULL, CALL_MASTER);
1175cc8f4d02SIntel 	RTE_LCORE_FOREACH_SLAVE(lcore_id) {
1176cc8f4d02SIntel 		if (rte_eal_wait_lcore(lcore_id) < 0)
1177cc8f4d02SIntel 			return -1;
1178cc8f4d02SIntel 	}
1179cc8f4d02SIntel 
1180cc8f4d02SIntel 	return 0;
1181cc8f4d02SIntel }
1182