xref: /dpdk/examples/eventdev_pipeline/pipeline_worker_generic.c (revision 2a1e2da1bb34c7cc0145fdd8940047ae325277bc)
1 /*
2  * SPDX-License-Identifier: BSD-3-Clause
3  * Copyright 2016 Intel Corporation.
4  * Copyright 2017 Cavium, Inc.
5  */
6 
7 #include "pipeline_common.h"
8 
9 static __rte_always_inline int
10 worker_generic(void *arg)
11 {
12 	struct rte_event ev;
13 
14 	struct worker_data *data = (struct worker_data *)arg;
15 	uint8_t dev_id = data->dev_id;
16 	uint8_t port_id = data->port_id;
17 	size_t sent = 0, received = 0;
18 	unsigned int lcore_id = rte_lcore_id();
19 
20 	while (!fdata->done) {
21 
22 		if (fdata->cap.scheduler)
23 			fdata->cap.scheduler(lcore_id);
24 
25 		if (!fdata->worker_core[lcore_id]) {
26 			rte_pause();
27 			continue;
28 		}
29 
30 		const uint16_t nb_rx = rte_event_dequeue_burst(dev_id, port_id,
31 				&ev, 1, 0);
32 
33 		if (nb_rx == 0) {
34 			rte_pause();
35 			continue;
36 		}
37 		received++;
38 
39 		/* The first worker stage does classification */
40 		if (ev.queue_id == cdata.qid[0])
41 			ev.flow_id = ev.mbuf->hash.rss
42 						% cdata.num_fids;
43 
44 		ev.queue_id = cdata.next_qid[ev.queue_id];
45 		ev.op = RTE_EVENT_OP_FORWARD;
46 		ev.sched_type = cdata.queue_type;
47 
48 		work();
49 
50 		while (rte_event_enqueue_burst(dev_id, port_id, &ev, 1) != 1)
51 			rte_pause();
52 		sent++;
53 	}
54 
55 	if (!cdata.quiet)
56 		printf("  worker %u thread done. RX=%zu TX=%zu\n",
57 				rte_lcore_id(), received, sent);
58 
59 	return 0;
60 }
61 
62 static int
63 worker_generic_burst(void *arg)
64 {
65 	struct rte_event events[BATCH_SIZE];
66 
67 	struct worker_data *data = (struct worker_data *)arg;
68 	uint8_t dev_id = data->dev_id;
69 	uint8_t port_id = data->port_id;
70 	size_t sent = 0, received = 0;
71 	unsigned int lcore_id = rte_lcore_id();
72 
73 	while (!fdata->done) {
74 		uint16_t i;
75 
76 		if (fdata->cap.scheduler)
77 			fdata->cap.scheduler(lcore_id);
78 
79 		if (!fdata->worker_core[lcore_id]) {
80 			rte_pause();
81 			continue;
82 		}
83 
84 		const uint16_t nb_rx = rte_event_dequeue_burst(dev_id, port_id,
85 				events, RTE_DIM(events), 0);
86 
87 		if (nb_rx == 0) {
88 			rte_pause();
89 			continue;
90 		}
91 		received += nb_rx;
92 
93 		for (i = 0; i < nb_rx; i++) {
94 
95 			/* The first worker stage does classification */
96 			if (events[i].queue_id == cdata.qid[0])
97 				events[i].flow_id = events[i].mbuf->hash.rss
98 							% cdata.num_fids;
99 
100 			events[i].queue_id = cdata.next_qid[events[i].queue_id];
101 			events[i].op = RTE_EVENT_OP_FORWARD;
102 			events[i].sched_type = cdata.queue_type;
103 
104 			work();
105 		}
106 		uint16_t nb_tx = rte_event_enqueue_burst(dev_id, port_id,
107 				events, nb_rx);
108 		while (nb_tx < nb_rx && !fdata->done)
109 			nb_tx += rte_event_enqueue_burst(dev_id, port_id,
110 							events + nb_tx,
111 							nb_rx - nb_tx);
112 		sent += nb_tx;
113 	}
114 
115 	if (!cdata.quiet)
116 		printf("  worker %u thread done. RX=%zu TX=%zu\n",
117 				rte_lcore_id(), received, sent);
118 
119 	return 0;
120 }
121 
122 static __rte_always_inline int
123 consumer(void)
124 {
125 	const uint64_t freq_khz = rte_get_timer_hz() / 1000;
126 	struct rte_event packet;
127 
128 	static uint64_t received;
129 	static uint64_t last_pkts;
130 	static uint64_t last_time;
131 	static uint64_t start_time;
132 	int i;
133 	uint8_t dev_id = cons_data.dev_id;
134 	uint8_t port_id = cons_data.port_id;
135 
136 	do {
137 		uint16_t n = rte_event_dequeue_burst(dev_id, port_id,
138 				&packet, 1, 0);
139 
140 		if (n == 0) {
141 			RTE_ETH_FOREACH_DEV(i)
142 				rte_eth_tx_buffer_flush(i, 0, fdata->tx_buf[i]);
143 			return 0;
144 		}
145 		if (start_time == 0)
146 			last_time = start_time = rte_get_timer_cycles();
147 
148 		received++;
149 		uint8_t outport = packet.mbuf->port;
150 
151 		exchange_mac(packet.mbuf);
152 		rte_eth_tx_buffer(outport, 0, fdata->tx_buf[outport],
153 				packet.mbuf);
154 
155 		if (cons_data.release)
156 			rte_event_enqueue_burst(dev_id, port_id,
157 								&packet, n);
158 
159 		/* Print out mpps every 1<22 packets */
160 		if (!cdata.quiet && received >= last_pkts + (1<<22)) {
161 			const uint64_t now = rte_get_timer_cycles();
162 			const uint64_t total_ms = (now - start_time) / freq_khz;
163 			const uint64_t delta_ms = (now - last_time) / freq_khz;
164 			uint64_t delta_pkts = received - last_pkts;
165 
166 			printf("# %s RX=%"PRIu64", time %"PRIu64 "ms, "
167 					"avg %.3f mpps [current %.3f mpps]\n",
168 					__func__,
169 					received,
170 					total_ms,
171 					received / (total_ms * 1000.0),
172 					delta_pkts / (delta_ms * 1000.0));
173 			last_pkts = received;
174 			last_time = now;
175 		}
176 
177 		cdata.num_packets--;
178 		if (cdata.num_packets <= 0)
179 			fdata->done = 1;
180 	/* Be stuck in this loop if single. */
181 	} while (!fdata->done && fdata->tx_single);
182 
183 	return 0;
184 }
185 
186 static __rte_always_inline int
187 consumer_burst(void)
188 {
189 	const uint64_t freq_khz = rte_get_timer_hz() / 1000;
190 	struct rte_event packets[BATCH_SIZE];
191 
192 	static uint64_t received;
193 	static uint64_t last_pkts;
194 	static uint64_t last_time;
195 	static uint64_t start_time;
196 	unsigned int i, j;
197 	uint8_t dev_id = cons_data.dev_id;
198 	uint8_t port_id = cons_data.port_id;
199 
200 	do {
201 		uint16_t n = rte_event_dequeue_burst(dev_id, port_id,
202 				packets, RTE_DIM(packets), 0);
203 
204 		if (n == 0) {
205 			RTE_ETH_FOREACH_DEV(j)
206 				rte_eth_tx_buffer_flush(j, 0, fdata->tx_buf[j]);
207 			return 0;
208 		}
209 		if (start_time == 0)
210 			last_time = start_time = rte_get_timer_cycles();
211 
212 		received += n;
213 		for (i = 0; i < n; i++) {
214 			uint8_t outport = packets[i].mbuf->port;
215 
216 			exchange_mac(packets[i].mbuf);
217 			rte_eth_tx_buffer(outport, 0, fdata->tx_buf[outport],
218 					packets[i].mbuf);
219 
220 			packets[i].op = RTE_EVENT_OP_RELEASE;
221 		}
222 
223 		if (cons_data.release) {
224 			uint16_t nb_tx;
225 
226 			nb_tx = rte_event_enqueue_burst(dev_id, port_id,
227 								packets, n);
228 			while (nb_tx < n)
229 				nb_tx += rte_event_enqueue_burst(dev_id,
230 						port_id, packets + nb_tx,
231 						n - nb_tx);
232 		}
233 
234 		/* Print out mpps every 1<22 packets */
235 		if (!cdata.quiet && received >= last_pkts + (1<<22)) {
236 			const uint64_t now = rte_get_timer_cycles();
237 			const uint64_t total_ms = (now - start_time) / freq_khz;
238 			const uint64_t delta_ms = (now - last_time) / freq_khz;
239 			uint64_t delta_pkts = received - last_pkts;
240 
241 			printf("# consumer RX=%"PRIu64", time %"PRIu64 "ms, "
242 					"avg %.3f mpps [current %.3f mpps]\n",
243 					received,
244 					total_ms,
245 					received / (total_ms * 1000.0),
246 					delta_pkts / (delta_ms * 1000.0));
247 			last_pkts = received;
248 			last_time = now;
249 		}
250 
251 		cdata.num_packets -= n;
252 		if (cdata.num_packets <= 0)
253 			fdata->done = 1;
254 	/* Be stuck in this loop if single. */
255 	} while (!fdata->done && fdata->tx_single);
256 
257 	return 0;
258 }
259 
260 static int
261 setup_eventdev_generic(struct cons_data *cons_data,
262 		struct worker_data *worker_data)
263 {
264 	const uint8_t dev_id = 0;
265 	/* +1 stages is for a SINGLE_LINK TX stage */
266 	const uint8_t nb_queues = cdata.num_stages + 1;
267 	/* + 1 is one port for consumer */
268 	const uint8_t nb_ports = cdata.num_workers + 1;
269 	struct rte_event_dev_config config = {
270 			.nb_event_queues = nb_queues,
271 			.nb_event_ports = nb_ports,
272 			.nb_events_limit  = 4096,
273 			.nb_event_queue_flows = 1024,
274 			.nb_event_port_dequeue_depth = 128,
275 			.nb_event_port_enqueue_depth = 128,
276 	};
277 	struct rte_event_port_conf wkr_p_conf = {
278 			.dequeue_depth = cdata.worker_cq_depth,
279 			.enqueue_depth = 64,
280 			.new_event_threshold = 4096,
281 	};
282 	struct rte_event_queue_conf wkr_q_conf = {
283 			.schedule_type = cdata.queue_type,
284 			.priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
285 			.nb_atomic_flows = 1024,
286 		.nb_atomic_order_sequences = 1024,
287 	};
288 	struct rte_event_port_conf tx_p_conf = {
289 			.dequeue_depth = 128,
290 			.enqueue_depth = 128,
291 			.new_event_threshold = 4096,
292 	};
293 	struct rte_event_queue_conf tx_q_conf = {
294 			.priority = RTE_EVENT_DEV_PRIORITY_HIGHEST,
295 			.event_queue_cfg = RTE_EVENT_QUEUE_CFG_SINGLE_LINK,
296 	};
297 
298 	struct port_link worker_queues[MAX_NUM_STAGES];
299 	uint8_t disable_implicit_release;
300 	struct port_link tx_queue;
301 	unsigned int i;
302 
303 	int ret, ndev = rte_event_dev_count();
304 	if (ndev < 1) {
305 		printf("%d: No Eventdev Devices Found\n", __LINE__);
306 		return -1;
307 	}
308 
309 	struct rte_event_dev_info dev_info;
310 	ret = rte_event_dev_info_get(dev_id, &dev_info);
311 	printf("\tEventdev %d: %s\n", dev_id, dev_info.driver_name);
312 
313 	disable_implicit_release = (dev_info.event_dev_cap &
314 			RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE);
315 
316 	wkr_p_conf.disable_implicit_release = disable_implicit_release;
317 	tx_p_conf.disable_implicit_release = disable_implicit_release;
318 
319 	if (dev_info.max_event_port_dequeue_depth <
320 			config.nb_event_port_dequeue_depth)
321 		config.nb_event_port_dequeue_depth =
322 				dev_info.max_event_port_dequeue_depth;
323 	if (dev_info.max_event_port_enqueue_depth <
324 			config.nb_event_port_enqueue_depth)
325 		config.nb_event_port_enqueue_depth =
326 				dev_info.max_event_port_enqueue_depth;
327 
328 	ret = rte_event_dev_configure(dev_id, &config);
329 	if (ret < 0) {
330 		printf("%d: Error configuring device\n", __LINE__);
331 		return -1;
332 	}
333 
334 	/* Q creation - one load balanced per pipeline stage*/
335 	printf("  Stages:\n");
336 	for (i = 0; i < cdata.num_stages; i++) {
337 		if (rte_event_queue_setup(dev_id, i, &wkr_q_conf) < 0) {
338 			printf("%d: error creating qid %d\n", __LINE__, i);
339 			return -1;
340 		}
341 		cdata.qid[i] = i;
342 		cdata.next_qid[i] = i+1;
343 		worker_queues[i].queue_id = i;
344 		if (cdata.enable_queue_priorities) {
345 			/* calculate priority stepping for each stage, leaving
346 			 * headroom of 1 for the SINGLE_LINK TX below
347 			 */
348 			const uint32_t prio_delta =
349 				(RTE_EVENT_DEV_PRIORITY_LOWEST-1) /  nb_queues;
350 
351 			/* higher priority for queues closer to tx */
352 			wkr_q_conf.priority =
353 				RTE_EVENT_DEV_PRIORITY_LOWEST - prio_delta * i;
354 		}
355 
356 		const char *type_str = "Atomic";
357 		switch (wkr_q_conf.schedule_type) {
358 		case RTE_SCHED_TYPE_ORDERED:
359 			type_str = "Ordered";
360 			break;
361 		case RTE_SCHED_TYPE_PARALLEL:
362 			type_str = "Parallel";
363 			break;
364 		}
365 		printf("\tStage %d, Type %s\tPriority = %d\n", i, type_str,
366 				wkr_q_conf.priority);
367 	}
368 	printf("\n");
369 
370 	/* final queue for sending to TX core */
371 	if (rte_event_queue_setup(dev_id, i, &tx_q_conf) < 0) {
372 		printf("%d: error creating qid %d\n", __LINE__, i);
373 		return -1;
374 	}
375 	tx_queue.queue_id = i;
376 	tx_queue.priority = RTE_EVENT_DEV_PRIORITY_HIGHEST;
377 
378 	if (wkr_p_conf.dequeue_depth > config.nb_event_port_dequeue_depth)
379 		wkr_p_conf.dequeue_depth = config.nb_event_port_dequeue_depth;
380 	if (wkr_p_conf.enqueue_depth > config.nb_event_port_enqueue_depth)
381 		wkr_p_conf.enqueue_depth = config.nb_event_port_enqueue_depth;
382 
383 	/* set up one port per worker, linking to all stage queues */
384 	for (i = 0; i < cdata.num_workers; i++) {
385 		struct worker_data *w = &worker_data[i];
386 		w->dev_id = dev_id;
387 		if (rte_event_port_setup(dev_id, i, &wkr_p_conf) < 0) {
388 			printf("Error setting up port %d\n", i);
389 			return -1;
390 		}
391 
392 		uint32_t s;
393 		for (s = 0; s < cdata.num_stages; s++) {
394 			if (rte_event_port_link(dev_id, i,
395 						&worker_queues[s].queue_id,
396 						&worker_queues[s].priority,
397 						1) != 1) {
398 				printf("%d: error creating link for port %d\n",
399 						__LINE__, i);
400 				return -1;
401 			}
402 		}
403 		w->port_id = i;
404 	}
405 
406 	if (tx_p_conf.dequeue_depth > config.nb_event_port_dequeue_depth)
407 		tx_p_conf.dequeue_depth = config.nb_event_port_dequeue_depth;
408 	if (tx_p_conf.enqueue_depth > config.nb_event_port_enqueue_depth)
409 		tx_p_conf.enqueue_depth = config.nb_event_port_enqueue_depth;
410 
411 	/* port for consumer, linked to TX queue */
412 	if (rte_event_port_setup(dev_id, i, &tx_p_conf) < 0) {
413 		printf("Error setting up port %d\n", i);
414 		return -1;
415 	}
416 	if (rte_event_port_link(dev_id, i, &tx_queue.queue_id,
417 				&tx_queue.priority, 1) != 1) {
418 		printf("%d: error creating link for port %d\n",
419 				__LINE__, i);
420 		return -1;
421 	}
422 	*cons_data = (struct cons_data){.dev_id = dev_id,
423 					.port_id = i,
424 					.release = disable_implicit_release };
425 
426 	ret = rte_event_dev_service_id_get(dev_id,
427 				&fdata->evdev_service_id);
428 	if (ret != -ESRCH && ret != 0) {
429 		printf("Error getting the service ID for sw eventdev\n");
430 		return -1;
431 	}
432 	rte_service_runstate_set(fdata->evdev_service_id, 1);
433 	rte_service_set_runstate_mapped_check(fdata->evdev_service_id, 0);
434 	if (rte_event_dev_start(dev_id) < 0) {
435 		printf("Error starting eventdev\n");
436 		return -1;
437 	}
438 
439 	return dev_id;
440 }
441 
442 static void
443 init_rx_adapter(uint16_t nb_ports)
444 {
445 	int i;
446 	int ret;
447 	uint8_t evdev_id = 0;
448 	struct rte_event_dev_info dev_info;
449 
450 	ret = rte_event_dev_info_get(evdev_id, &dev_info);
451 
452 	struct rte_event_port_conf rx_p_conf = {
453 		.dequeue_depth = 8,
454 		.enqueue_depth = 8,
455 		.new_event_threshold = 1200,
456 	};
457 
458 	if (rx_p_conf.dequeue_depth > dev_info.max_event_port_dequeue_depth)
459 		rx_p_conf.dequeue_depth = dev_info.max_event_port_dequeue_depth;
460 	if (rx_p_conf.enqueue_depth > dev_info.max_event_port_enqueue_depth)
461 		rx_p_conf.enqueue_depth = dev_info.max_event_port_enqueue_depth;
462 
463 	/* Create one adapter for all the ethernet ports. */
464 	ret = rte_event_eth_rx_adapter_create(cdata.rx_adapter_id, evdev_id,
465 			&rx_p_conf);
466 	if (ret)
467 		rte_exit(EXIT_FAILURE, "failed to create rx adapter[%d]",
468 				cdata.rx_adapter_id);
469 
470 	struct rte_event_eth_rx_adapter_queue_conf queue_conf;
471 	memset(&queue_conf, 0, sizeof(queue_conf));
472 	queue_conf.ev.sched_type = cdata.queue_type;
473 	queue_conf.ev.queue_id = cdata.qid[0];
474 
475 	for (i = 0; i < nb_ports; i++) {
476 		uint32_t cap;
477 
478 		ret = rte_event_eth_rx_adapter_caps_get(evdev_id, i, &cap);
479 		if (ret)
480 			rte_exit(EXIT_FAILURE,
481 					"failed to get event rx adapter "
482 					"capabilities");
483 
484 		ret = rte_event_eth_rx_adapter_queue_add(cdata.rx_adapter_id, i,
485 				-1, &queue_conf);
486 		if (ret)
487 			rte_exit(EXIT_FAILURE,
488 					"Failed to add queues to Rx adapter");
489 	}
490 
491 	ret = rte_event_eth_rx_adapter_service_id_get(cdata.rx_adapter_id,
492 				&fdata->rxadptr_service_id);
493 	if (ret != -ESRCH && ret != 0) {
494 		rte_exit(EXIT_FAILURE,
495 			"Error getting the service ID for sw eventdev\n");
496 	}
497 	rte_service_runstate_set(fdata->rxadptr_service_id, 1);
498 	rte_service_set_runstate_mapped_check(fdata->rxadptr_service_id, 0);
499 
500 	ret = rte_event_eth_rx_adapter_start(cdata.rx_adapter_id);
501 	if (ret)
502 		rte_exit(EXIT_FAILURE, "Rx adapter[%d] start failed",
503 				cdata.rx_adapter_id);
504 }
505 
506 static void
507 generic_opt_check(void)
508 {
509 	int i;
510 	int ret;
511 	uint32_t cap = 0;
512 	uint8_t rx_needed = 0;
513 	struct rte_event_dev_info eventdev_info;
514 
515 	memset(&eventdev_info, 0, sizeof(struct rte_event_dev_info));
516 	rte_event_dev_info_get(0, &eventdev_info);
517 
518 	if (cdata.all_type_queues && !(eventdev_info.event_dev_cap &
519 				RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES))
520 		rte_exit(EXIT_FAILURE,
521 				"Event dev doesn't support all type queues\n");
522 
523 	RTE_ETH_FOREACH_DEV(i) {
524 		ret = rte_event_eth_rx_adapter_caps_get(0, i, &cap);
525 		if (ret)
526 			rte_exit(EXIT_FAILURE,
527 				"failed to get event rx adapter capabilities");
528 		rx_needed |=
529 			!(cap & RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT);
530 	}
531 
532 	if (cdata.worker_lcore_mask == 0 ||
533 			(rx_needed && cdata.rx_lcore_mask == 0) ||
534 			cdata.tx_lcore_mask == 0 || (cdata.sched_lcore_mask == 0
535 				&& !(eventdev_info.event_dev_cap &
536 					RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED))) {
537 		printf("Core part of pipeline was not assigned any cores. "
538 			"This will stall the pipeline, please check core masks "
539 			"(use -h for details on setting core masks):\n"
540 			"\trx: %"PRIu64"\n\ttx: %"PRIu64"\n\tsched: %"PRIu64
541 			"\n\tworkers: %"PRIu64"\n",
542 			cdata.rx_lcore_mask, cdata.tx_lcore_mask,
543 			cdata.sched_lcore_mask,
544 			cdata.worker_lcore_mask);
545 		rte_exit(-1, "Fix core masks\n");
546 	}
547 
548 	if (eventdev_info.event_dev_cap & RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED)
549 		memset(fdata->sched_core, 0,
550 				sizeof(unsigned int) * MAX_NUM_CORE);
551 }
552 
553 void
554 set_worker_generic_setup_data(struct setup_data *caps, bool burst)
555 {
556 	if (burst) {
557 		caps->consumer = consumer_burst;
558 		caps->worker = worker_generic_burst;
559 	} else {
560 		caps->consumer = consumer;
561 		caps->worker = worker_generic;
562 	}
563 
564 	caps->adptr_setup = init_rx_adapter;
565 	caps->scheduler = schedule_devices;
566 	caps->evdev_setup = setup_eventdev_generic;
567 	caps->check_opt = generic_opt_check;
568 }
569