1 /* 2 * SPDX-License-Identifier: BSD-3-Clause 3 * Copyright 2016 Intel Corporation. 4 * Copyright 2017 Cavium, Inc. 5 */ 6 7 #include "pipeline_common.h" 8 9 static __rte_always_inline int 10 worker_generic(void *arg) 11 { 12 struct rte_event ev; 13 14 struct worker_data *data = (struct worker_data *)arg; 15 uint8_t dev_id = data->dev_id; 16 uint8_t port_id = data->port_id; 17 size_t sent = 0, received = 0; 18 unsigned int lcore_id = rte_lcore_id(); 19 20 while (!fdata->done) { 21 22 if (fdata->cap.scheduler) 23 fdata->cap.scheduler(lcore_id); 24 25 if (!fdata->worker_core[lcore_id]) { 26 rte_pause(); 27 continue; 28 } 29 30 const uint16_t nb_rx = rte_event_dequeue_burst(dev_id, port_id, 31 &ev, 1, 0); 32 33 if (nb_rx == 0) { 34 rte_pause(); 35 continue; 36 } 37 received++; 38 39 /* The first worker stage does classification */ 40 if (ev.queue_id == cdata.qid[0]) 41 ev.flow_id = ev.mbuf->hash.rss 42 % cdata.num_fids; 43 44 ev.queue_id = cdata.next_qid[ev.queue_id]; 45 ev.op = RTE_EVENT_OP_FORWARD; 46 ev.sched_type = cdata.queue_type; 47 48 work(); 49 50 while (rte_event_enqueue_burst(dev_id, port_id, &ev, 1) != 1) 51 rte_pause(); 52 sent++; 53 } 54 55 if (!cdata.quiet) 56 printf(" worker %u thread done. RX=%zu TX=%zu\n", 57 rte_lcore_id(), received, sent); 58 59 return 0; 60 } 61 62 static int 63 worker_generic_burst(void *arg) 64 { 65 struct rte_event events[BATCH_SIZE]; 66 67 struct worker_data *data = (struct worker_data *)arg; 68 uint8_t dev_id = data->dev_id; 69 uint8_t port_id = data->port_id; 70 size_t sent = 0, received = 0; 71 unsigned int lcore_id = rte_lcore_id(); 72 73 while (!fdata->done) { 74 uint16_t i; 75 76 if (fdata->cap.scheduler) 77 fdata->cap.scheduler(lcore_id); 78 79 if (!fdata->worker_core[lcore_id]) { 80 rte_pause(); 81 continue; 82 } 83 84 const uint16_t nb_rx = rte_event_dequeue_burst(dev_id, port_id, 85 events, RTE_DIM(events), 0); 86 87 if (nb_rx == 0) { 88 rte_pause(); 89 continue; 90 } 91 received += nb_rx; 92 93 for (i = 0; i < nb_rx; i++) { 94 95 /* The first worker stage does classification */ 96 if (events[i].queue_id == cdata.qid[0]) 97 events[i].flow_id = events[i].mbuf->hash.rss 98 % cdata.num_fids; 99 100 events[i].queue_id = cdata.next_qid[events[i].queue_id]; 101 events[i].op = RTE_EVENT_OP_FORWARD; 102 events[i].sched_type = cdata.queue_type; 103 104 work(); 105 } 106 uint16_t nb_tx = rte_event_enqueue_burst(dev_id, port_id, 107 events, nb_rx); 108 while (nb_tx < nb_rx && !fdata->done) 109 nb_tx += rte_event_enqueue_burst(dev_id, port_id, 110 events + nb_tx, 111 nb_rx - nb_tx); 112 sent += nb_tx; 113 } 114 115 if (!cdata.quiet) 116 printf(" worker %u thread done. RX=%zu TX=%zu\n", 117 rte_lcore_id(), received, sent); 118 119 return 0; 120 } 121 122 static int 123 setup_eventdev_generic(struct worker_data *worker_data) 124 { 125 const uint8_t dev_id = 0; 126 /* +1 stages is for a SINGLE_LINK TX stage */ 127 const uint8_t nb_queues = cdata.num_stages + 1; 128 const uint8_t nb_ports = cdata.num_workers; 129 struct rte_event_dev_config config = { 130 .nb_event_queues = nb_queues, 131 .nb_event_ports = nb_ports, 132 .nb_events_limit = 4096, 133 .nb_event_queue_flows = 1024, 134 .nb_event_port_dequeue_depth = 128, 135 .nb_event_port_enqueue_depth = 128, 136 }; 137 struct rte_event_port_conf wkr_p_conf = { 138 .dequeue_depth = cdata.worker_cq_depth, 139 .enqueue_depth = 64, 140 .new_event_threshold = 4096, 141 }; 142 struct rte_event_queue_conf wkr_q_conf = { 143 .schedule_type = cdata.queue_type, 144 .priority = RTE_EVENT_DEV_PRIORITY_NORMAL, 145 .nb_atomic_flows = 1024, 146 .nb_atomic_order_sequences = 1024, 147 }; 148 struct rte_event_queue_conf tx_q_conf = { 149 .priority = RTE_EVENT_DEV_PRIORITY_HIGHEST, 150 .event_queue_cfg = RTE_EVENT_QUEUE_CFG_SINGLE_LINK, 151 }; 152 153 struct port_link worker_queues[MAX_NUM_STAGES]; 154 uint8_t disable_implicit_release; 155 unsigned int i; 156 157 int ret, ndev = rte_event_dev_count(); 158 if (ndev < 1) { 159 printf("%d: No Eventdev Devices Found\n", __LINE__); 160 return -1; 161 } 162 163 struct rte_event_dev_info dev_info; 164 ret = rte_event_dev_info_get(dev_id, &dev_info); 165 printf("\tEventdev %d: %s\n", dev_id, dev_info.driver_name); 166 167 disable_implicit_release = (dev_info.event_dev_cap & 168 RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE); 169 170 wkr_p_conf.disable_implicit_release = disable_implicit_release; 171 172 if (dev_info.max_num_events < config.nb_events_limit) 173 config.nb_events_limit = dev_info.max_num_events; 174 if (dev_info.max_event_port_dequeue_depth < 175 config.nb_event_port_dequeue_depth) 176 config.nb_event_port_dequeue_depth = 177 dev_info.max_event_port_dequeue_depth; 178 if (dev_info.max_event_port_enqueue_depth < 179 config.nb_event_port_enqueue_depth) 180 config.nb_event_port_enqueue_depth = 181 dev_info.max_event_port_enqueue_depth; 182 183 ret = rte_event_dev_configure(dev_id, &config); 184 if (ret < 0) { 185 printf("%d: Error configuring device\n", __LINE__); 186 return -1; 187 } 188 189 /* Q creation - one load balanced per pipeline stage*/ 190 printf(" Stages:\n"); 191 for (i = 0; i < cdata.num_stages; i++) { 192 if (rte_event_queue_setup(dev_id, i, &wkr_q_conf) < 0) { 193 printf("%d: error creating qid %d\n", __LINE__, i); 194 return -1; 195 } 196 cdata.qid[i] = i; 197 cdata.next_qid[i] = i+1; 198 worker_queues[i].queue_id = i; 199 if (cdata.enable_queue_priorities) { 200 /* calculate priority stepping for each stage, leaving 201 * headroom of 1 for the SINGLE_LINK TX below 202 */ 203 const uint32_t prio_delta = 204 (RTE_EVENT_DEV_PRIORITY_LOWEST-1) / nb_queues; 205 206 /* higher priority for queues closer to tx */ 207 wkr_q_conf.priority = 208 RTE_EVENT_DEV_PRIORITY_LOWEST - prio_delta * i; 209 } 210 211 const char *type_str = "Atomic"; 212 switch (wkr_q_conf.schedule_type) { 213 case RTE_SCHED_TYPE_ORDERED: 214 type_str = "Ordered"; 215 break; 216 case RTE_SCHED_TYPE_PARALLEL: 217 type_str = "Parallel"; 218 break; 219 } 220 printf("\tStage %d, Type %s\tPriority = %d\n", i, type_str, 221 wkr_q_conf.priority); 222 } 223 printf("\n"); 224 225 /* final queue for sending to TX core */ 226 if (rte_event_queue_setup(dev_id, i, &tx_q_conf) < 0) { 227 printf("%d: error creating qid %d\n", __LINE__, i); 228 return -1; 229 } 230 cdata.tx_queue_id = i; 231 232 if (wkr_p_conf.new_event_threshold > config.nb_events_limit) 233 wkr_p_conf.new_event_threshold = config.nb_events_limit; 234 if (wkr_p_conf.dequeue_depth > config.nb_event_port_dequeue_depth) 235 wkr_p_conf.dequeue_depth = config.nb_event_port_dequeue_depth; 236 if (wkr_p_conf.enqueue_depth > config.nb_event_port_enqueue_depth) 237 wkr_p_conf.enqueue_depth = config.nb_event_port_enqueue_depth; 238 239 /* set up one port per worker, linking to all stage queues */ 240 for (i = 0; i < cdata.num_workers; i++) { 241 struct worker_data *w = &worker_data[i]; 242 w->dev_id = dev_id; 243 if (rte_event_port_setup(dev_id, i, &wkr_p_conf) < 0) { 244 printf("Error setting up port %d\n", i); 245 return -1; 246 } 247 248 uint32_t s; 249 for (s = 0; s < cdata.num_stages; s++) { 250 if (rte_event_port_link(dev_id, i, 251 &worker_queues[s].queue_id, 252 &worker_queues[s].priority, 253 1) != 1) { 254 printf("%d: error creating link for port %d\n", 255 __LINE__, i); 256 return -1; 257 } 258 } 259 w->port_id = i; 260 } 261 262 ret = rte_event_dev_service_id_get(dev_id, 263 &fdata->evdev_service_id); 264 if (ret != -ESRCH && ret != 0) { 265 printf("Error getting the service ID for sw eventdev\n"); 266 return -1; 267 } 268 rte_service_runstate_set(fdata->evdev_service_id, 1); 269 rte_service_set_runstate_mapped_check(fdata->evdev_service_id, 0); 270 271 return dev_id; 272 } 273 274 /* 275 * Initializes a given port using global settings and with the RX buffers 276 * coming from the mbuf_pool passed as a parameter. 277 */ 278 static inline int 279 port_init(uint8_t port, struct rte_mempool *mbuf_pool) 280 { 281 struct rte_eth_rxconf rx_conf; 282 static const struct rte_eth_conf port_conf_default = { 283 .rxmode = { 284 .mq_mode = ETH_MQ_RX_RSS, 285 .max_rx_pkt_len = RTE_ETHER_MAX_LEN, 286 }, 287 .rx_adv_conf = { 288 .rss_conf = { 289 .rss_hf = ETH_RSS_IP | 290 ETH_RSS_TCP | 291 ETH_RSS_UDP, 292 } 293 } 294 }; 295 const uint16_t rx_rings = 1, tx_rings = 1; 296 const uint16_t rx_ring_size = 512, tx_ring_size = 512; 297 struct rte_eth_conf port_conf = port_conf_default; 298 int retval; 299 uint16_t q; 300 struct rte_eth_dev_info dev_info; 301 struct rte_eth_txconf txconf; 302 303 if (!rte_eth_dev_is_valid_port(port)) 304 return -1; 305 306 retval = rte_eth_dev_info_get(port, &dev_info); 307 if (retval != 0) { 308 printf("Error during getting device (port %u) info: %s\n", 309 port, strerror(-retval)); 310 return retval; 311 } 312 313 if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE) 314 port_conf.txmode.offloads |= 315 DEV_TX_OFFLOAD_MBUF_FAST_FREE; 316 317 if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_RSS_HASH) 318 port_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; 319 320 rx_conf = dev_info.default_rxconf; 321 rx_conf.offloads = port_conf.rxmode.offloads; 322 323 port_conf.rx_adv_conf.rss_conf.rss_hf &= 324 dev_info.flow_type_rss_offloads; 325 if (port_conf.rx_adv_conf.rss_conf.rss_hf != 326 port_conf_default.rx_adv_conf.rss_conf.rss_hf) { 327 printf("Port %u modified RSS hash function based on hardware support," 328 "requested:%#"PRIx64" configured:%#"PRIx64"\n", 329 port, 330 port_conf_default.rx_adv_conf.rss_conf.rss_hf, 331 port_conf.rx_adv_conf.rss_conf.rss_hf); 332 } 333 334 /* Configure the Ethernet device. */ 335 retval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf); 336 if (retval != 0) 337 return retval; 338 339 /* Allocate and set up 1 RX queue per Ethernet port. */ 340 for (q = 0; q < rx_rings; q++) { 341 retval = rte_eth_rx_queue_setup(port, q, rx_ring_size, 342 rte_eth_dev_socket_id(port), &rx_conf, 343 mbuf_pool); 344 if (retval < 0) 345 return retval; 346 } 347 348 txconf = dev_info.default_txconf; 349 txconf.offloads = port_conf_default.txmode.offloads; 350 /* Allocate and set up 1 TX queue per Ethernet port. */ 351 for (q = 0; q < tx_rings; q++) { 352 retval = rte_eth_tx_queue_setup(port, q, tx_ring_size, 353 rte_eth_dev_socket_id(port), &txconf); 354 if (retval < 0) 355 return retval; 356 } 357 358 /* Display the port MAC address. */ 359 struct rte_ether_addr addr; 360 retval = rte_eth_macaddr_get(port, &addr); 361 if (retval != 0) { 362 printf("Failed to get MAC address (port %u): %s\n", 363 port, rte_strerror(-retval)); 364 return retval; 365 } 366 367 printf("Port %u MAC: %02" PRIx8 " %02" PRIx8 " %02" PRIx8 368 " %02" PRIx8 " %02" PRIx8 " %02" PRIx8 "\n", 369 (unsigned int)port, 370 addr.addr_bytes[0], addr.addr_bytes[1], 371 addr.addr_bytes[2], addr.addr_bytes[3], 372 addr.addr_bytes[4], addr.addr_bytes[5]); 373 374 /* Enable RX in promiscuous mode for the Ethernet device. */ 375 retval = rte_eth_promiscuous_enable(port); 376 if (retval != 0) 377 return retval; 378 379 return 0; 380 } 381 382 static int 383 init_ports(uint16_t num_ports) 384 { 385 uint16_t portid; 386 387 if (!cdata.num_mbuf) 388 cdata.num_mbuf = 16384 * num_ports; 389 390 struct rte_mempool *mp = rte_pktmbuf_pool_create("packet_pool", 391 /* mbufs */ cdata.num_mbuf, 392 /* cache_size */ 512, 393 /* priv_size*/ 0, 394 /* data_room_size */ RTE_MBUF_DEFAULT_BUF_SIZE, 395 rte_socket_id()); 396 397 RTE_ETH_FOREACH_DEV(portid) 398 if (port_init(portid, mp) != 0) 399 rte_exit(EXIT_FAILURE, "Cannot init port %"PRIu16 "\n", 400 portid); 401 402 return 0; 403 } 404 405 static void 406 init_adapters(uint16_t nb_ports) 407 { 408 int i; 409 int ret; 410 uint8_t tx_port_id = 0; 411 uint8_t evdev_id = 0; 412 struct rte_event_dev_info dev_info; 413 414 ret = rte_event_dev_info_get(evdev_id, &dev_info); 415 416 struct rte_event_port_conf adptr_p_conf = { 417 .dequeue_depth = cdata.worker_cq_depth, 418 .enqueue_depth = 64, 419 .new_event_threshold = 4096, 420 }; 421 422 if (adptr_p_conf.new_event_threshold > dev_info.max_num_events) 423 adptr_p_conf.new_event_threshold = dev_info.max_num_events; 424 if (adptr_p_conf.dequeue_depth > dev_info.max_event_port_dequeue_depth) 425 adptr_p_conf.dequeue_depth = 426 dev_info.max_event_port_dequeue_depth; 427 if (adptr_p_conf.enqueue_depth > dev_info.max_event_port_enqueue_depth) 428 adptr_p_conf.enqueue_depth = 429 dev_info.max_event_port_enqueue_depth; 430 431 init_ports(nb_ports); 432 /* Create one adapter for all the ethernet ports. */ 433 ret = rte_event_eth_rx_adapter_create(cdata.rx_adapter_id, evdev_id, 434 &adptr_p_conf); 435 if (ret) 436 rte_exit(EXIT_FAILURE, "failed to create rx adapter[%d]", 437 cdata.rx_adapter_id); 438 439 ret = rte_event_eth_tx_adapter_create(cdata.tx_adapter_id, evdev_id, 440 &adptr_p_conf); 441 if (ret) 442 rte_exit(EXIT_FAILURE, "failed to create tx adapter[%d]", 443 cdata.tx_adapter_id); 444 445 struct rte_event_eth_rx_adapter_queue_conf queue_conf; 446 memset(&queue_conf, 0, sizeof(queue_conf)); 447 queue_conf.ev.sched_type = cdata.queue_type; 448 queue_conf.ev.queue_id = cdata.qid[0]; 449 450 for (i = 0; i < nb_ports; i++) { 451 ret = rte_event_eth_rx_adapter_queue_add(cdata.rx_adapter_id, i, 452 -1, &queue_conf); 453 if (ret) 454 rte_exit(EXIT_FAILURE, 455 "Failed to add queues to Rx adapter"); 456 457 ret = rte_event_eth_tx_adapter_queue_add(cdata.tx_adapter_id, i, 458 -1); 459 if (ret) 460 rte_exit(EXIT_FAILURE, 461 "Failed to add queues to Tx adapter"); 462 } 463 464 ret = rte_event_eth_tx_adapter_event_port_get(cdata.tx_adapter_id, 465 &tx_port_id); 466 if (ret) 467 rte_exit(EXIT_FAILURE, 468 "Failed to get Tx adapter port id"); 469 ret = rte_event_port_link(evdev_id, tx_port_id, &cdata.tx_queue_id, 470 NULL, 1); 471 if (ret != 1) 472 rte_exit(EXIT_FAILURE, 473 "Unable to link Tx adapter port to Tx queue"); 474 475 ret = rte_event_eth_rx_adapter_service_id_get(cdata.rx_adapter_id, 476 &fdata->rxadptr_service_id); 477 if (ret != -ESRCH && ret != 0) { 478 rte_exit(EXIT_FAILURE, 479 "Error getting the service ID for Rx adapter\n"); 480 } 481 rte_service_runstate_set(fdata->rxadptr_service_id, 1); 482 rte_service_set_runstate_mapped_check(fdata->rxadptr_service_id, 0); 483 484 ret = rte_event_eth_tx_adapter_service_id_get(cdata.tx_adapter_id, 485 &fdata->txadptr_service_id); 486 if (ret != -ESRCH && ret != 0) { 487 rte_exit(EXIT_FAILURE, 488 "Error getting the service ID for Tx adapter\n"); 489 } 490 rte_service_runstate_set(fdata->txadptr_service_id, 1); 491 rte_service_set_runstate_mapped_check(fdata->txadptr_service_id, 0); 492 493 ret = rte_event_eth_rx_adapter_start(cdata.rx_adapter_id); 494 if (ret) 495 rte_exit(EXIT_FAILURE, "Rx adapter[%d] start failed", 496 cdata.rx_adapter_id); 497 498 ret = rte_event_eth_tx_adapter_start(cdata.tx_adapter_id); 499 if (ret) 500 rte_exit(EXIT_FAILURE, "Tx adapter[%d] start failed", 501 cdata.tx_adapter_id); 502 503 if (rte_event_dev_start(evdev_id) < 0) 504 rte_exit(EXIT_FAILURE, "Error starting eventdev"); 505 } 506 507 static void 508 generic_opt_check(void) 509 { 510 int i; 511 int ret; 512 uint32_t cap = 0; 513 uint8_t rx_needed = 0; 514 uint8_t sched_needed = 0; 515 struct rte_event_dev_info eventdev_info; 516 517 memset(&eventdev_info, 0, sizeof(struct rte_event_dev_info)); 518 rte_event_dev_info_get(0, &eventdev_info); 519 520 if (cdata.all_type_queues && !(eventdev_info.event_dev_cap & 521 RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES)) 522 rte_exit(EXIT_FAILURE, 523 "Event dev doesn't support all type queues\n"); 524 sched_needed = !(eventdev_info.event_dev_cap & 525 RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED); 526 527 RTE_ETH_FOREACH_DEV(i) { 528 ret = rte_event_eth_rx_adapter_caps_get(0, i, &cap); 529 if (ret) 530 rte_exit(EXIT_FAILURE, 531 "failed to get event rx adapter capabilities"); 532 rx_needed |= 533 !(cap & RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT); 534 } 535 536 if (cdata.worker_lcore_mask == 0 || 537 (rx_needed && cdata.rx_lcore_mask == 0) || 538 (cdata.tx_lcore_mask == 0) || 539 (sched_needed && cdata.sched_lcore_mask == 0)) { 540 printf("Core part of pipeline was not assigned any cores. " 541 "This will stall the pipeline, please check core masks " 542 "(use -h for details on setting core masks):\n" 543 "\trx: %"PRIu64"\n\ttx: %"PRIu64"\n\tsched: %"PRIu64 544 "\n\tworkers: %"PRIu64"\n", 545 cdata.rx_lcore_mask, cdata.tx_lcore_mask, 546 cdata.sched_lcore_mask, 547 cdata.worker_lcore_mask); 548 rte_exit(-1, "Fix core masks\n"); 549 } 550 551 if (!sched_needed) 552 memset(fdata->sched_core, 0, 553 sizeof(unsigned int) * MAX_NUM_CORE); 554 if (!rx_needed) 555 memset(fdata->rx_core, 0, 556 sizeof(unsigned int) * MAX_NUM_CORE); 557 } 558 559 void 560 set_worker_generic_setup_data(struct setup_data *caps, bool burst) 561 { 562 if (burst) { 563 caps->worker = worker_generic_burst; 564 } else { 565 caps->worker = worker_generic; 566 } 567 568 caps->adptr_setup = init_adapters; 569 caps->scheduler = schedule_devices; 570 caps->evdev_setup = setup_eventdev_generic; 571 caps->check_opt = generic_opt_check; 572 } 573