1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2019-2021 Intel Corporation 3 */ 4 5 #include <stdint.h> 6 #include <stdlib.h> 7 #include <signal.h> 8 #include <stdbool.h> 9 #include <unistd.h> 10 11 #include <rte_argparse.h> 12 #include <rte_malloc.h> 13 #include <rte_ethdev.h> 14 #include <rte_dmadev.h> 15 16 /* size of ring used for software copying between rx and tx. */ 17 #define RTE_LOGTYPE_DMA RTE_LOGTYPE_USER1 18 #define MAX_PKT_BURST 32 19 #define MEMPOOL_CACHE_SIZE 512 20 #define MIN_POOL_SIZE 65536U 21 #define CMD_LINE_OPT_PORTMASK_INDEX 1 22 #define CMD_LINE_OPT_COPY_TYPE_INDEX 2 23 24 /* configurable number of RX/TX ring descriptors */ 25 #define RX_DEFAULT_RINGSIZE 1024 26 #define TX_DEFAULT_RINGSIZE 1024 27 28 /* max number of RX queues per port */ 29 #define MAX_RX_QUEUES_COUNT 8 30 31 struct rxtx_port_config { 32 /* common config */ 33 uint16_t rxtx_port; 34 uint16_t nb_queues; 35 /* for software copy mode */ 36 struct rte_ring *rx_to_tx_ring; 37 /* for dmadev HW copy mode */ 38 uint16_t dmadev_ids[MAX_RX_QUEUES_COUNT]; 39 }; 40 41 /* Configuring ports and number of assigned lcores in struct. 8< */ 42 struct rxtx_transmission_config { 43 struct rxtx_port_config ports[RTE_MAX_ETHPORTS]; 44 uint16_t nb_ports; 45 uint16_t nb_lcores; 46 }; 47 /* >8 End of configuration of ports and number of assigned lcores. */ 48 49 /* per-port statistics struct */ 50 struct dma_port_statistics { 51 uint64_t rx[RTE_MAX_ETHPORTS]; 52 uint64_t tx[RTE_MAX_ETHPORTS]; 53 uint64_t tx_dropped[RTE_MAX_ETHPORTS]; 54 uint64_t copy_dropped[RTE_MAX_ETHPORTS]; 55 }; 56 struct dma_port_statistics port_statistics; 57 struct total_statistics { 58 uint64_t total_packets_dropped; 59 uint64_t total_packets_tx; 60 uint64_t total_packets_rx; 61 uint64_t total_submitted; 62 uint64_t total_completed; 63 uint64_t total_failed; 64 }; 65 66 typedef enum copy_mode_t { 67 #define COPY_MODE_SW "sw" 68 COPY_MODE_SW_NUM, 69 #define COPY_MODE_DMA "hw" 70 COPY_MODE_DMA_NUM, 71 COPY_MODE_INVALID_NUM, 72 COPY_MODE_SIZE_NUM = COPY_MODE_INVALID_NUM 73 } copy_mode_t; 74 75 /* mask of enabled ports */ 76 static uint32_t dma_enabled_port_mask; 77 78 /* number of RX queues per port */ 79 static uint16_t nb_queues = 1; 80 81 /* MAC updating enabled by default. */ 82 static int mac_updating = 1; 83 84 /* hardware copy mode enabled by default. */ 85 static copy_mode_t copy_mode = COPY_MODE_DMA_NUM; 86 87 /* size of descriptor ring for hardware copy mode or 88 * rte_ring for software copy mode 89 */ 90 static uint16_t ring_size = 2048; 91 92 /* interval, in seconds, between stats prints */ 93 static uint16_t stats_interval = 1; 94 /* global mbuf arrays for tracking DMA bufs */ 95 #define MBUF_RING_SIZE 2048 96 #define MBUF_RING_MASK (MBUF_RING_SIZE - 1) 97 struct dma_bufs { 98 struct rte_mbuf *bufs[MBUF_RING_SIZE]; 99 struct rte_mbuf *copies[MBUF_RING_SIZE]; 100 uint16_t sent; 101 }; 102 static struct dma_bufs dma_bufs[RTE_DMADEV_DEFAULT_MAX]; 103 104 /* global transmission config */ 105 struct rxtx_transmission_config cfg; 106 107 /* configurable number of RX/TX ring descriptors */ 108 static uint16_t nb_rxd = RX_DEFAULT_RINGSIZE; 109 static uint16_t nb_txd = TX_DEFAULT_RINGSIZE; 110 111 static volatile bool force_quit; 112 113 static uint32_t dma_batch_sz = MAX_PKT_BURST; 114 static uint32_t max_frame_size; 115 static uint32_t force_min_copy_size; 116 117 /* ethernet addresses of ports */ 118 static struct rte_ether_addr dma_ports_eth_addr[RTE_MAX_ETHPORTS]; 119 120 struct rte_mempool *dma_pktmbuf_pool; 121 122 /* Print out statistics for one port. */ 123 static void 124 print_port_stats(uint16_t port_id) 125 { 126 printf("\nStatistics for port %u ------------------------------" 127 "\nPackets sent: %34"PRIu64 128 "\nPackets received: %30"PRIu64 129 "\nPackets dropped on tx: %25"PRIu64 130 "\nPackets dropped on copy: %23"PRIu64, 131 port_id, 132 port_statistics.tx[port_id], 133 port_statistics.rx[port_id], 134 port_statistics.tx_dropped[port_id], 135 port_statistics.copy_dropped[port_id]); 136 } 137 138 /* Print out statistics for one dmadev device. */ 139 static void 140 print_dmadev_stats(uint32_t dev_id, struct rte_dma_stats stats) 141 { 142 printf("\nDMA channel %u", dev_id); 143 printf("\n\t Total submitted ops: %"PRIu64"", stats.submitted); 144 printf("\n\t Total completed ops: %"PRIu64"", stats.completed); 145 printf("\n\t Total failed ops: %"PRIu64"", stats.errors); 146 } 147 148 static void 149 print_total_stats(struct total_statistics *ts) 150 { 151 printf("\nAggregate statistics ===============================" 152 "\nTotal packets Tx: %22"PRIu64" [pkt/s]" 153 "\nTotal packets Rx: %22"PRIu64" [pkt/s]" 154 "\nTotal packets dropped: %17"PRIu64" [pkt/s]", 155 ts->total_packets_tx / stats_interval, 156 ts->total_packets_rx / stats_interval, 157 ts->total_packets_dropped / stats_interval); 158 159 if (copy_mode == COPY_MODE_DMA_NUM) { 160 printf("\nTotal submitted ops: %19"PRIu64" [ops/s]" 161 "\nTotal completed ops: %19"PRIu64" [ops/s]" 162 "\nTotal failed ops: %22"PRIu64" [ops/s]", 163 ts->total_submitted / stats_interval, 164 ts->total_completed / stats_interval, 165 ts->total_failed / stats_interval); 166 } 167 168 printf("\n====================================================\n"); 169 } 170 171 /* Print out statistics on packets dropped. */ 172 static void 173 print_stats(char *prgname) 174 { 175 struct total_statistics ts, delta_ts; 176 struct rte_dma_stats stats = {0}; 177 uint32_t i, port_id, dev_id; 178 char status_string[255]; /* to print at the top of the output */ 179 int status_strlen; 180 181 const char clr[] = { 27, '[', '2', 'J', '\0' }; 182 const char topLeft[] = { 27, '[', '1', ';', '1', 'H', '\0' }; 183 184 status_strlen = snprintf(status_string, sizeof(status_string), 185 "%s, ", prgname); 186 status_strlen += snprintf(status_string + status_strlen, 187 sizeof(status_string) - status_strlen, 188 "Worker Threads = %d, ", 189 rte_lcore_count() > 2 ? 2 : 1); 190 status_strlen += snprintf(status_string + status_strlen, 191 sizeof(status_string) - status_strlen, 192 "Copy Mode = %s,\n", copy_mode == COPY_MODE_SW_NUM ? 193 COPY_MODE_SW : COPY_MODE_DMA); 194 status_strlen += snprintf(status_string + status_strlen, 195 sizeof(status_string) - status_strlen, 196 "Updating MAC = %s, ", mac_updating ? 197 "enabled" : "disabled"); 198 status_strlen += snprintf(status_string + status_strlen, 199 sizeof(status_string) - status_strlen, 200 "Rx Queues = %d, ", nb_queues); 201 status_strlen += snprintf(status_string + status_strlen, 202 sizeof(status_string) - status_strlen, 203 "Ring Size = %d\n", ring_size); 204 status_strlen += snprintf(status_string + status_strlen, 205 sizeof(status_string) - status_strlen, 206 "Force Min Copy Size = %u Packet Data Room Size = %u", 207 force_min_copy_size, 208 rte_pktmbuf_data_room_size(dma_pktmbuf_pool) - 209 RTE_PKTMBUF_HEADROOM); 210 211 memset(&ts, 0, sizeof(struct total_statistics)); 212 213 while (!force_quit) { 214 /* Sleep for "stats_interval" seconds each round - init sleep allows reading 215 * messages from app startup. 216 */ 217 sleep(stats_interval); 218 219 /* Clear screen and move to top left */ 220 printf("%s%s", clr, topLeft); 221 222 memset(&delta_ts, 0, sizeof(struct total_statistics)); 223 224 printf("%s\n", status_string); 225 226 for (i = 0; i < cfg.nb_ports; i++) { 227 port_id = cfg.ports[i].rxtx_port; 228 print_port_stats(port_id); 229 230 delta_ts.total_packets_dropped += 231 port_statistics.tx_dropped[port_id] 232 + port_statistics.copy_dropped[port_id]; 233 delta_ts.total_packets_tx += 234 port_statistics.tx[port_id]; 235 delta_ts.total_packets_rx += 236 port_statistics.rx[port_id]; 237 238 if (copy_mode == COPY_MODE_DMA_NUM) { 239 uint32_t j; 240 241 for (j = 0; j < cfg.ports[i].nb_queues; j++) { 242 dev_id = cfg.ports[i].dmadev_ids[j]; 243 rte_dma_stats_get(dev_id, 0, &stats); 244 print_dmadev_stats(dev_id, stats); 245 246 delta_ts.total_submitted += stats.submitted; 247 delta_ts.total_completed += stats.completed; 248 delta_ts.total_failed += stats.errors; 249 } 250 } 251 } 252 253 delta_ts.total_packets_tx -= ts.total_packets_tx; 254 delta_ts.total_packets_rx -= ts.total_packets_rx; 255 delta_ts.total_packets_dropped -= ts.total_packets_dropped; 256 delta_ts.total_submitted -= ts.total_submitted; 257 delta_ts.total_completed -= ts.total_completed; 258 delta_ts.total_failed -= ts.total_failed; 259 260 printf("\n"); 261 print_total_stats(&delta_ts); 262 263 fflush(stdout); 264 265 ts.total_packets_tx += delta_ts.total_packets_tx; 266 ts.total_packets_rx += delta_ts.total_packets_rx; 267 ts.total_packets_dropped += delta_ts.total_packets_dropped; 268 ts.total_submitted += delta_ts.total_submitted; 269 ts.total_completed += delta_ts.total_completed; 270 ts.total_failed += delta_ts.total_failed; 271 } 272 } 273 274 static void 275 update_mac_addrs(struct rte_mbuf *m, uint32_t dest_portid) 276 { 277 struct rte_ether_hdr *eth; 278 void *tmp; 279 280 eth = rte_pktmbuf_mtod(m, struct rte_ether_hdr *); 281 282 /* 02:00:00:00:00:xx - overwriting 2 bytes of source address but 283 * it's acceptable cause it gets overwritten by rte_ether_addr_copy 284 */ 285 tmp = ð->dst_addr.addr_bytes[0]; 286 *((uint64_t *)tmp) = 0x000000000002 + ((uint64_t)dest_portid << 40); 287 288 /* src addr */ 289 rte_ether_addr_copy(&dma_ports_eth_addr[dest_portid], ð->src_addr); 290 } 291 292 /* Perform packet copy there is a user-defined function. 8< */ 293 static inline void 294 pktmbuf_metadata_copy(const struct rte_mbuf *src, struct rte_mbuf *dst) 295 { 296 dst->data_off = src->data_off; 297 memcpy(&dst->rx_descriptor_fields1, &src->rx_descriptor_fields1, 298 offsetof(struct rte_mbuf, buf_len) - 299 offsetof(struct rte_mbuf, rx_descriptor_fields1)); 300 } 301 302 /* Copy packet data */ 303 static inline void 304 pktmbuf_sw_copy(struct rte_mbuf *src, struct rte_mbuf *dst) 305 { 306 rte_memcpy(rte_pktmbuf_mtod(dst, char *), 307 rte_pktmbuf_mtod(src, char *), 308 RTE_MAX(src->data_len, force_min_copy_size)); 309 } 310 /* >8 End of perform packet copy there is a user-defined function. */ 311 312 static uint32_t 313 dma_enqueue_packets(struct rte_mbuf *pkts[], struct rte_mbuf *pkts_copy[], 314 uint32_t nb_rx, uint16_t dev_id) 315 { 316 struct dma_bufs *dma = &dma_bufs[dev_id]; 317 int ret; 318 uint32_t i; 319 320 for (i = 0; i < nb_rx; i++) { 321 /* Perform data copy */ 322 ret = rte_dma_copy(dev_id, 0, 323 rte_pktmbuf_iova(pkts[i]), 324 rte_pktmbuf_iova(pkts_copy[i]), 325 RTE_MAX(rte_pktmbuf_data_len(pkts[i]), 326 force_min_copy_size), 327 0); 328 329 if (ret < 0) 330 break; 331 332 dma->bufs[ret & MBUF_RING_MASK] = pkts[i]; 333 dma->copies[ret & MBUF_RING_MASK] = pkts_copy[i]; 334 } 335 336 ret = i; 337 return ret; 338 } 339 340 static inline uint32_t 341 dma_enqueue(struct rte_mbuf *pkts[], struct rte_mbuf *pkts_copy[], 342 uint32_t num, uint32_t step, uint16_t dev_id) 343 { 344 uint32_t i, k, m, n; 345 346 k = 0; 347 for (i = 0; i < num; i += m) { 348 349 m = RTE_MIN(step, num - i); 350 n = dma_enqueue_packets(pkts + i, pkts_copy + i, m, dev_id); 351 k += n; 352 if (n > 0) 353 rte_dma_submit(dev_id, 0); 354 355 /* don't try to enqueue more if HW queue is full */ 356 if (n != m) 357 break; 358 } 359 360 return k; 361 } 362 363 static inline uint32_t 364 dma_dequeue(struct rte_mbuf *src[], struct rte_mbuf *dst[], uint32_t num, 365 uint16_t dev_id) 366 { 367 struct dma_bufs *dma = &dma_bufs[dev_id]; 368 uint16_t nb_dq, filled; 369 /* Dequeue the mbufs from DMA device. Since all memory 370 * is DPDK pinned memory and therefore all addresses should 371 * be valid, we don't check for copy errors 372 */ 373 nb_dq = rte_dma_completed(dev_id, 0, num, NULL, NULL); 374 375 /* Return early if no work to do */ 376 if (unlikely(nb_dq == 0)) 377 return nb_dq; 378 379 /* Populate pkts_copy with the copies bufs from dma->copies for tx */ 380 for (filled = 0; filled < nb_dq; filled++) { 381 src[filled] = dma->bufs[(dma->sent + filled) & MBUF_RING_MASK]; 382 dst[filled] = dma->copies[(dma->sent + filled) & MBUF_RING_MASK]; 383 } 384 dma->sent += nb_dq; 385 386 return filled; 387 388 } 389 390 /* Receive packets on one port and enqueue to dmadev or rte_ring. 8< */ 391 static void 392 dma_rx_port(struct rxtx_port_config *rx_config) 393 { 394 int32_t ret; 395 uint32_t nb_rx, nb_enq, i, j; 396 struct rte_mbuf *pkts_burst[MAX_PKT_BURST]; 397 struct rte_mbuf *pkts_burst_copy[MAX_PKT_BURST]; 398 399 for (i = 0; i < rx_config->nb_queues; i++) { 400 401 nb_rx = rte_eth_rx_burst(rx_config->rxtx_port, i, 402 pkts_burst, MAX_PKT_BURST); 403 404 if (nb_rx == 0) { 405 if (copy_mode == COPY_MODE_DMA_NUM && 406 (nb_rx = dma_dequeue(pkts_burst, pkts_burst_copy, 407 MAX_PKT_BURST, rx_config->dmadev_ids[i])) > 0) 408 goto handle_tx; 409 continue; 410 } 411 412 port_statistics.rx[rx_config->rxtx_port] += nb_rx; 413 414 ret = rte_mempool_get_bulk(dma_pktmbuf_pool, 415 (void *)pkts_burst_copy, nb_rx); 416 417 if (unlikely(ret < 0)) 418 rte_exit(EXIT_FAILURE, 419 "Unable to allocate memory.\n"); 420 421 for (j = 0; j < nb_rx; j++) 422 pktmbuf_metadata_copy(pkts_burst[j], 423 pkts_burst_copy[j]); 424 425 if (copy_mode == COPY_MODE_DMA_NUM) { 426 /* enqueue packets for hardware copy */ 427 nb_enq = dma_enqueue(pkts_burst, pkts_burst_copy, 428 nb_rx, dma_batch_sz, rx_config->dmadev_ids[i]); 429 430 /* free any not enqueued packets. */ 431 rte_mempool_put_bulk(dma_pktmbuf_pool, 432 (void *)&pkts_burst[nb_enq], 433 nb_rx - nb_enq); 434 rte_mempool_put_bulk(dma_pktmbuf_pool, 435 (void *)&pkts_burst_copy[nb_enq], 436 nb_rx - nb_enq); 437 438 port_statistics.copy_dropped[rx_config->rxtx_port] += 439 (nb_rx - nb_enq); 440 441 /* get completed copies */ 442 nb_rx = dma_dequeue(pkts_burst, pkts_burst_copy, 443 MAX_PKT_BURST, rx_config->dmadev_ids[i]); 444 } else { 445 /* Perform packet software copy, free source packets */ 446 for (j = 0; j < nb_rx; j++) 447 pktmbuf_sw_copy(pkts_burst[j], 448 pkts_burst_copy[j]); 449 } 450 451 handle_tx: 452 rte_mempool_put_bulk(dma_pktmbuf_pool, 453 (void *)pkts_burst, nb_rx); 454 455 nb_enq = rte_ring_enqueue_burst(rx_config->rx_to_tx_ring, 456 (void *)pkts_burst_copy, nb_rx, NULL); 457 458 /* Free any not enqueued packets. */ 459 rte_mempool_put_bulk(dma_pktmbuf_pool, 460 (void *)&pkts_burst_copy[nb_enq], 461 nb_rx - nb_enq); 462 463 port_statistics.copy_dropped[rx_config->rxtx_port] += 464 (nb_rx - nb_enq); 465 } 466 } 467 /* >8 End of receive packets on one port and enqueue to dmadev or rte_ring. */ 468 469 /* Transmit packets from dmadev/rte_ring for one port. 8< */ 470 static void 471 dma_tx_port(struct rxtx_port_config *tx_config) 472 { 473 uint32_t i, j, nb_dq, nb_tx; 474 struct rte_mbuf *mbufs[MAX_PKT_BURST]; 475 476 for (i = 0; i < tx_config->nb_queues; i++) { 477 478 /* Dequeue the mbufs from rx_to_tx_ring. */ 479 nb_dq = rte_ring_dequeue_burst(tx_config->rx_to_tx_ring, 480 (void *)mbufs, MAX_PKT_BURST, NULL); 481 if (nb_dq == 0) 482 continue; 483 484 /* Update macs if enabled */ 485 if (mac_updating) { 486 for (j = 0; j < nb_dq; j++) 487 update_mac_addrs(mbufs[j], 488 tx_config->rxtx_port); 489 } 490 491 nb_tx = rte_eth_tx_burst(tx_config->rxtx_port, 0, 492 (void *)mbufs, nb_dq); 493 494 port_statistics.tx[tx_config->rxtx_port] += nb_tx; 495 496 if (unlikely(nb_tx < nb_dq)) { 497 port_statistics.tx_dropped[tx_config->rxtx_port] += 498 (nb_dq - nb_tx); 499 /* Free any unsent packets. */ 500 rte_mempool_put_bulk(dma_pktmbuf_pool, 501 (void *)&mbufs[nb_tx], nb_dq - nb_tx); 502 } 503 } 504 } 505 /* >8 End of transmitting packets from dmadev. */ 506 507 /* Main rx processing loop for dmadev. */ 508 static void 509 rx_main_loop(void) 510 { 511 uint16_t i; 512 uint16_t nb_ports = cfg.nb_ports; 513 514 RTE_LOG(INFO, DMA, "Entering main rx loop for copy on lcore %u\n", 515 rte_lcore_id()); 516 517 while (!force_quit) 518 for (i = 0; i < nb_ports; i++) 519 dma_rx_port(&cfg.ports[i]); 520 } 521 522 /* Main tx processing loop for hardware copy. */ 523 static void 524 tx_main_loop(void) 525 { 526 uint16_t i; 527 uint16_t nb_ports = cfg.nb_ports; 528 529 RTE_LOG(INFO, DMA, "Entering main tx loop for copy on lcore %u\n", 530 rte_lcore_id()); 531 532 while (!force_quit) 533 for (i = 0; i < nb_ports; i++) 534 dma_tx_port(&cfg.ports[i]); 535 } 536 537 /* Main rx and tx loop if only one worker lcore available */ 538 static void 539 rxtx_main_loop(void) 540 { 541 uint16_t i; 542 uint16_t nb_ports = cfg.nb_ports; 543 544 RTE_LOG(INFO, DMA, "Entering main rx and tx loop for copy on" 545 " lcore %u\n", rte_lcore_id()); 546 547 while (!force_quit) 548 for (i = 0; i < nb_ports; i++) { 549 dma_rx_port(&cfg.ports[i]); 550 dma_tx_port(&cfg.ports[i]); 551 } 552 } 553 554 /* Start processing for each lcore. 8< */ 555 static void start_forwarding_cores(void) 556 { 557 uint32_t lcore_id = rte_lcore_id(); 558 559 RTE_LOG(INFO, DMA, "Entering %s on lcore %u\n", 560 __func__, rte_lcore_id()); 561 562 if (cfg.nb_lcores == 1) { 563 lcore_id = rte_get_next_lcore(lcore_id, true, true); 564 rte_eal_remote_launch((lcore_function_t *)rxtx_main_loop, 565 NULL, lcore_id); 566 } else if (cfg.nb_lcores > 1) { 567 lcore_id = rte_get_next_lcore(lcore_id, true, true); 568 rte_eal_remote_launch((lcore_function_t *)rx_main_loop, 569 NULL, lcore_id); 570 571 lcore_id = rte_get_next_lcore(lcore_id, true, true); 572 rte_eal_remote_launch((lcore_function_t *)tx_main_loop, NULL, 573 lcore_id); 574 } 575 } 576 /* >8 End of starting to process for each lcore. */ 577 578 static int 579 dma_parse_portmask(const char *portmask) 580 { 581 char *end = NULL; 582 unsigned long pm; 583 584 /* Parse hexadecimal string */ 585 pm = strtoul(portmask, &end, 16); 586 if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 587 return 0; 588 589 return pm; 590 } 591 592 static copy_mode_t 593 dma_parse_copy_mode(const char *copy_mode) 594 { 595 if (strcmp(copy_mode, COPY_MODE_SW) == 0) 596 return COPY_MODE_SW_NUM; 597 else if (strcmp(copy_mode, COPY_MODE_DMA) == 0) 598 return COPY_MODE_DMA_NUM; 599 600 return COPY_MODE_INVALID_NUM; 601 } 602 603 static int 604 dma_parse_args_cb(uint32_t index, const char *value, void *opaque) 605 { 606 int port_mask; 607 608 RTE_SET_USED(opaque); 609 610 if (index == CMD_LINE_OPT_PORTMASK_INDEX) { 611 port_mask = dma_parse_portmask(value); 612 if (port_mask & ~dma_enabled_port_mask || port_mask <= 0) { 613 printf("Invalid portmask, %s, suggest 0x%x\n", 614 value, dma_enabled_port_mask); 615 return -1; 616 } 617 dma_enabled_port_mask = port_mask; 618 } else if (index == CMD_LINE_OPT_COPY_TYPE_INDEX) { 619 copy_mode = dma_parse_copy_mode(value); 620 if (copy_mode == COPY_MODE_INVALID_NUM) { 621 printf("Invalid copy type. Use: sw, hw\n"); 622 return -1; 623 } 624 } else { 625 printf("Invalid index %u\n", index); 626 return -1; 627 } 628 629 return 0; 630 } 631 632 /* Parse the argument given in the command line of the application */ 633 static int 634 dma_parse_args(int argc, char **argv, unsigned int nb_ports) 635 { 636 static struct rte_argparse obj = { 637 .prog_name = "dma", 638 .usage = "[EAL options] -- [optional parameters]", 639 .descriptor = NULL, 640 .epilog = NULL, 641 .exit_on_error = false, 642 .callback = dma_parse_args_cb, 643 .opaque = NULL, 644 .args = { 645 { "--mac-updating", NULL, "Enable MAC addresses updating", 646 &mac_updating, (void *)1, 647 RTE_ARGPARSE_ARG_NO_VALUE | RTE_ARGPARSE_ARG_VALUE_INT, 648 }, 649 { "--no-mac-updating", NULL, "Disable MAC addresses updating", 650 &mac_updating, (void *)0, 651 RTE_ARGPARSE_ARG_NO_VALUE | RTE_ARGPARSE_ARG_VALUE_INT, 652 }, 653 { "--portmask", "-p", "hexadecimal bitmask of ports to configure", 654 NULL, (void *)CMD_LINE_OPT_PORTMASK_INDEX, 655 RTE_ARGPARSE_ARG_REQUIRED_VALUE, 656 }, 657 { "--nb-queue", "-q", "number of RX queues per port (default is 1)", 658 &nb_queues, NULL, 659 RTE_ARGPARSE_ARG_REQUIRED_VALUE | RTE_ARGPARSE_ARG_VALUE_U16, 660 }, 661 { "--copy-type", "-c", "type of copy: sw|hw", 662 NULL, (void *)CMD_LINE_OPT_COPY_TYPE_INDEX, 663 RTE_ARGPARSE_ARG_REQUIRED_VALUE, 664 }, 665 { "--ring-size", "-s", "size of dmadev descriptor ring for hardware copy mode or rte_ring for software copy mode", 666 &ring_size, NULL, 667 RTE_ARGPARSE_ARG_REQUIRED_VALUE | RTE_ARGPARSE_ARG_VALUE_U16, 668 }, 669 { "--dma-batch-size", "-b", "number of requests per DMA batch", 670 &dma_batch_sz, NULL, 671 RTE_ARGPARSE_ARG_REQUIRED_VALUE | RTE_ARGPARSE_ARG_VALUE_U32, 672 }, 673 { "--max-frame-size", "-f", "max frame size", 674 &max_frame_size, NULL, 675 RTE_ARGPARSE_ARG_REQUIRED_VALUE | RTE_ARGPARSE_ARG_VALUE_U32, 676 }, 677 { "--force-min-copy-size", "-m", "force a minimum copy length, even for smaller packets", 678 &force_min_copy_size, NULL, 679 RTE_ARGPARSE_ARG_REQUIRED_VALUE | RTE_ARGPARSE_ARG_VALUE_U32, 680 }, 681 { "--stats-interval", "-i", "interval, in seconds, between stats prints (default is 1)", 682 &stats_interval, NULL, 683 RTE_ARGPARSE_ARG_REQUIRED_VALUE | RTE_ARGPARSE_ARG_VALUE_U16, 684 }, 685 ARGPARSE_ARG_END(), 686 }, 687 }; 688 689 const unsigned int default_port_mask = (1 << nb_ports) - 1; 690 int ret; 691 692 dma_enabled_port_mask = default_port_mask; 693 ret = rte_argparse_parse(&obj, argc, argv); 694 if (ret != 0) 695 return ret; 696 697 /* check argument's value which parsing by autosave. */ 698 if (dma_batch_sz <= 0 || dma_batch_sz > MAX_PKT_BURST) { 699 printf("Invalid dma batch size, %d.\n", dma_batch_sz); 700 return -1; 701 } 702 703 if (max_frame_size <= 0 || max_frame_size > RTE_ETHER_MAX_JUMBO_FRAME_LEN) { 704 printf("Invalid max frame size, %d.\n", max_frame_size); 705 return -1; 706 } 707 708 if (nb_queues <= 0 || nb_queues > MAX_RX_QUEUES_COUNT) { 709 printf("Invalid RX queues number %d. Max %u\n", 710 nb_queues, MAX_RX_QUEUES_COUNT); 711 return -1; 712 } 713 714 if (ring_size <= 0) { 715 printf("Invalid ring size, %d.\n", ring_size); 716 return -1; 717 } 718 if (ring_size > MBUF_RING_SIZE) { 719 printf("Max ring_size is %d, setting ring_size to max", 720 MBUF_RING_SIZE); 721 ring_size = MBUF_RING_SIZE; 722 } 723 724 if (stats_interval <= 0) { 725 printf("Invalid stats interval, setting to 1\n"); 726 stats_interval = 1; /* set to default */ 727 } 728 729 return 0; 730 } 731 732 /* check link status, return true if at least one port is up */ 733 static int 734 check_link_status(uint32_t port_mask) 735 { 736 uint16_t portid; 737 struct rte_eth_link link; 738 int ret, link_status = 0; 739 char link_status_text[RTE_ETH_LINK_MAX_STR_LEN]; 740 741 printf("\nChecking link status\n"); 742 RTE_ETH_FOREACH_DEV(portid) { 743 if ((port_mask & (1 << portid)) == 0) 744 continue; 745 746 memset(&link, 0, sizeof(link)); 747 ret = rte_eth_link_get(portid, &link); 748 if (ret < 0) { 749 printf("Port %u link get failed: err=%d\n", 750 portid, ret); 751 continue; 752 } 753 754 /* Print link status */ 755 rte_eth_link_to_str(link_status_text, 756 sizeof(link_status_text), &link); 757 printf("Port %d %s\n", portid, link_status_text); 758 759 if (link.link_status) 760 link_status = 1; 761 } 762 return link_status; 763 } 764 765 /* Configuration of device. 8< */ 766 static void 767 configure_dmadev_queue(uint32_t dev_id) 768 { 769 struct rte_dma_info info; 770 struct rte_dma_conf dev_config = { .nb_vchans = 1 }; 771 struct rte_dma_vchan_conf qconf = { 772 .direction = RTE_DMA_DIR_MEM_TO_MEM, 773 .nb_desc = ring_size 774 }; 775 uint16_t vchan = 0; 776 777 if (rte_dma_configure(dev_id, &dev_config) != 0) 778 rte_exit(EXIT_FAILURE, "Error with rte_dma_configure()\n"); 779 780 if (rte_dma_vchan_setup(dev_id, vchan, &qconf) != 0) { 781 printf("Error with queue configuration\n"); 782 rte_panic(); 783 } 784 rte_dma_info_get(dev_id, &info); 785 if (info.nb_vchans != 1) { 786 printf("Error, no configured queues reported on device id %u\n", dev_id); 787 rte_panic(); 788 } 789 if (rte_dma_start(dev_id) != 0) 790 rte_exit(EXIT_FAILURE, "Error with rte_dma_start()\n"); 791 } 792 /* >8 End of configuration of device. */ 793 794 /* Using dmadev API functions. 8< */ 795 static void 796 assign_dmadevs(void) 797 { 798 uint16_t nb_dmadev = 0; 799 int16_t dev_id = rte_dma_next_dev(0); 800 uint32_t i, j; 801 802 for (i = 0; i < cfg.nb_ports; i++) { 803 for (j = 0; j < cfg.ports[i].nb_queues; j++) { 804 if (dev_id == -1) 805 goto end; 806 807 cfg.ports[i].dmadev_ids[j] = dev_id; 808 configure_dmadev_queue(cfg.ports[i].dmadev_ids[j]); 809 dev_id = rte_dma_next_dev(dev_id + 1); 810 ++nb_dmadev; 811 } 812 } 813 end: 814 if (nb_dmadev < cfg.nb_ports * cfg.ports[0].nb_queues) 815 rte_exit(EXIT_FAILURE, 816 "Not enough dmadevs (%u) for all queues (%u).\n", 817 nb_dmadev, cfg.nb_ports * cfg.ports[0].nb_queues); 818 RTE_LOG(INFO, DMA, "Number of used dmadevs: %u.\n", nb_dmadev); 819 } 820 /* >8 End of using dmadev API functions. */ 821 822 /* Assign ring structures for packet exchanging. 8< */ 823 static void 824 assign_rings(void) 825 { 826 uint32_t i; 827 828 for (i = 0; i < cfg.nb_ports; i++) { 829 char ring_name[RTE_RING_NAMESIZE]; 830 831 snprintf(ring_name, sizeof(ring_name), "rx_to_tx_ring_%u", i); 832 /* Create ring for inter core communication */ 833 cfg.ports[i].rx_to_tx_ring = rte_ring_create( 834 ring_name, ring_size, 835 rte_socket_id(), RING_F_SP_ENQ | RING_F_SC_DEQ); 836 837 if (cfg.ports[i].rx_to_tx_ring == NULL) 838 rte_exit(EXIT_FAILURE, "Ring create failed: %s\n", 839 rte_strerror(rte_errno)); 840 } 841 } 842 /* >8 End of assigning ring structures for packet exchanging. */ 843 844 static uint32_t 845 eth_dev_get_overhead_len(uint32_t max_rx_pktlen, uint16_t max_mtu) 846 { 847 uint32_t overhead_len; 848 849 if (max_mtu != UINT16_MAX && max_rx_pktlen > max_mtu) 850 overhead_len = max_rx_pktlen - max_mtu; 851 else 852 overhead_len = RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN; 853 854 return overhead_len; 855 } 856 857 static int 858 config_port_max_pkt_len(struct rte_eth_conf *conf, 859 struct rte_eth_dev_info *dev_info) 860 { 861 uint32_t overhead_len; 862 863 if (max_frame_size == 0) 864 return 0; 865 866 if (max_frame_size < RTE_ETHER_MIN_LEN) 867 return -1; 868 869 overhead_len = eth_dev_get_overhead_len(dev_info->max_rx_pktlen, 870 dev_info->max_mtu); 871 conf->rxmode.mtu = max_frame_size - overhead_len; 872 873 return 0; 874 } 875 876 /* 877 * Initializes a given port using global settings and with the RX buffers 878 * coming from the mbuf_pool passed as a parameter. 879 */ 880 static inline void 881 port_init(uint16_t portid, struct rte_mempool *mbuf_pool, uint16_t nb_queues) 882 { 883 /* Configuring port to use RSS for multiple RX queues. 8< */ 884 static const struct rte_eth_conf port_conf = { 885 .rxmode = { 886 .mq_mode = RTE_ETH_MQ_RX_RSS, 887 }, 888 .rx_adv_conf = { 889 .rss_conf = { 890 .rss_key = NULL, 891 .rss_hf = RTE_ETH_RSS_PROTO_MASK, 892 } 893 } 894 }; 895 /* >8 End of configuring port to use RSS for multiple RX queues. */ 896 897 struct rte_eth_rxconf rxq_conf; 898 struct rte_eth_txconf txq_conf; 899 struct rte_eth_conf local_port_conf = port_conf; 900 struct rte_eth_dev_info dev_info; 901 int ret, i; 902 903 /* Skip ports that are not enabled */ 904 if ((dma_enabled_port_mask & (1 << portid)) == 0) { 905 printf("Skipping disabled port %u\n", portid); 906 return; 907 } 908 909 /* Init port */ 910 printf("Initializing port %u... ", portid); 911 fflush(stdout); 912 ret = rte_eth_dev_info_get(portid, &dev_info); 913 if (ret < 0) 914 rte_exit(EXIT_FAILURE, "Cannot get device info: %s, port=%u\n", 915 rte_strerror(-ret), portid); 916 917 ret = config_port_max_pkt_len(&local_port_conf, &dev_info); 918 if (ret != 0) 919 rte_exit(EXIT_FAILURE, 920 "Invalid max frame size: %u (port %u)\n", 921 max_frame_size, portid); 922 923 local_port_conf.rx_adv_conf.rss_conf.rss_hf &= 924 dev_info.flow_type_rss_offloads; 925 ret = rte_eth_dev_configure(portid, nb_queues, 1, &local_port_conf); 926 if (ret < 0) 927 rte_exit(EXIT_FAILURE, "Cannot configure device:" 928 " err=%d, port=%u\n", ret, portid); 929 930 ret = rte_eth_dev_adjust_nb_rx_tx_desc(portid, &nb_rxd, 931 &nb_txd); 932 if (ret < 0) 933 rte_exit(EXIT_FAILURE, 934 "Cannot adjust number of descriptors: err=%d, port=%u\n", 935 ret, portid); 936 937 rte_eth_macaddr_get(portid, &dma_ports_eth_addr[portid]); 938 939 /* Init RX queues */ 940 rxq_conf = dev_info.default_rxconf; 941 rxq_conf.offloads = local_port_conf.rxmode.offloads; 942 for (i = 0; i < nb_queues; i++) { 943 ret = rte_eth_rx_queue_setup(portid, i, nb_rxd, 944 rte_eth_dev_socket_id(portid), &rxq_conf, 945 mbuf_pool); 946 if (ret < 0) 947 rte_exit(EXIT_FAILURE, 948 "rte_eth_rx_queue_setup:err=%d,port=%u, queue_id=%u\n", 949 ret, portid, i); 950 } 951 952 /* Init one TX queue on each port */ 953 txq_conf = dev_info.default_txconf; 954 txq_conf.offloads = local_port_conf.txmode.offloads; 955 ret = rte_eth_tx_queue_setup(portid, 0, nb_txd, 956 rte_eth_dev_socket_id(portid), 957 &txq_conf); 958 if (ret < 0) 959 rte_exit(EXIT_FAILURE, 960 "rte_eth_tx_queue_setup:err=%d,port=%u\n", 961 ret, portid); 962 963 /* Start device. 8< */ 964 ret = rte_eth_dev_start(portid); 965 if (ret < 0) 966 rte_exit(EXIT_FAILURE, 967 "rte_eth_dev_start:err=%d, port=%u\n", 968 ret, portid); 969 /* >8 End of starting device. */ 970 971 /* RX port is set in promiscuous mode. 8< */ 972 rte_eth_promiscuous_enable(portid); 973 /* >8 End of RX port is set in promiscuous mode. */ 974 975 printf("Port %u, MAC address: " RTE_ETHER_ADDR_PRT_FMT "\n\n", 976 portid, 977 RTE_ETHER_ADDR_BYTES(&dma_ports_eth_addr[portid])); 978 979 cfg.ports[cfg.nb_ports].rxtx_port = portid; 980 cfg.ports[cfg.nb_ports++].nb_queues = nb_queues; 981 } 982 983 /* Get a device dump for each device being used by the application */ 984 static void 985 dmadev_dump(void) 986 { 987 uint32_t i, j; 988 989 if (copy_mode != COPY_MODE_DMA_NUM) 990 return; 991 992 for (i = 0; i < cfg.nb_ports; i++) 993 for (j = 0; j < cfg.ports[i].nb_queues; j++) 994 rte_dma_dump(cfg.ports[i].dmadev_ids[j], stdout); 995 } 996 997 static void 998 signal_handler(int signum) 999 { 1000 if (signum == SIGINT || signum == SIGTERM) { 1001 printf("\n\nSignal %d received, preparing to exit...\n", 1002 signum); 1003 force_quit = true; 1004 } else if (signum == SIGUSR1) { 1005 dmadev_dump(); 1006 } 1007 } 1008 1009 int 1010 main(int argc, char **argv) 1011 { 1012 int ret; 1013 uint16_t nb_ports, portid; 1014 uint32_t i; 1015 unsigned int nb_mbufs; 1016 size_t sz; 1017 1018 /* Init EAL. 8< */ 1019 ret = rte_eal_init(argc, argv); 1020 if (ret < 0) 1021 rte_exit(EXIT_FAILURE, "Invalid EAL arguments\n"); 1022 /* >8 End of init EAL. */ 1023 argc -= ret; 1024 argv += ret; 1025 1026 force_quit = false; 1027 signal(SIGINT, signal_handler); 1028 signal(SIGTERM, signal_handler); 1029 signal(SIGUSR1, signal_handler); 1030 1031 nb_ports = rte_eth_dev_count_avail(); 1032 if (nb_ports == 0) 1033 rte_exit(EXIT_FAILURE, "No Ethernet ports - bye\n"); 1034 1035 /* Parse application arguments (after the EAL ones) */ 1036 ret = dma_parse_args(argc, argv, nb_ports); 1037 if (ret < 0) 1038 rte_exit(EXIT_FAILURE, "Invalid DMA arguments\n"); 1039 1040 /* Allocates mempool to hold the mbufs. 8< */ 1041 nb_mbufs = RTE_MAX(nb_ports * (nb_queues * (nb_rxd + nb_txd + 1042 4 * MAX_PKT_BURST + ring_size) + ring_size + 1043 rte_lcore_count() * MEMPOOL_CACHE_SIZE), 1044 MIN_POOL_SIZE); 1045 1046 /* Create the mbuf pool */ 1047 sz = max_frame_size + RTE_PKTMBUF_HEADROOM; 1048 sz = RTE_MAX(sz, (size_t)RTE_MBUF_DEFAULT_BUF_SIZE); 1049 dma_pktmbuf_pool = rte_pktmbuf_pool_create("mbuf_pool", nb_mbufs, 1050 MEMPOOL_CACHE_SIZE, 0, sz, rte_socket_id()); 1051 if (dma_pktmbuf_pool == NULL) 1052 rte_exit(EXIT_FAILURE, "Cannot init mbuf pool\n"); 1053 /* >8 End of allocates mempool to hold the mbufs. */ 1054 1055 if (force_min_copy_size > 1056 (uint32_t)(rte_pktmbuf_data_room_size(dma_pktmbuf_pool) - 1057 RTE_PKTMBUF_HEADROOM)) 1058 rte_exit(EXIT_FAILURE, 1059 "Force min copy size > packet mbuf size\n"); 1060 1061 /* Initialize each port. 8< */ 1062 cfg.nb_ports = 0; 1063 RTE_ETH_FOREACH_DEV(portid) 1064 port_init(portid, dma_pktmbuf_pool, nb_queues); 1065 /* >8 End of initializing each port. */ 1066 1067 /* Initialize port xstats */ 1068 memset(&port_statistics, 0, sizeof(port_statistics)); 1069 1070 /* Assigning each port resources. 8< */ 1071 while (!check_link_status(dma_enabled_port_mask) && !force_quit) 1072 sleep(1); 1073 1074 /* Check if there is enough lcores for all ports. */ 1075 cfg.nb_lcores = rte_lcore_count() - 1; 1076 if (cfg.nb_lcores < 1) 1077 rte_exit(EXIT_FAILURE, 1078 "There should be at least one worker lcore.\n"); 1079 1080 if (copy_mode == COPY_MODE_DMA_NUM) 1081 assign_dmadevs(); 1082 1083 assign_rings(); 1084 /* >8 End of assigning each port resources. */ 1085 1086 start_forwarding_cores(); 1087 /* main core prints stats while other cores forward */ 1088 print_stats(argv[0]); 1089 1090 /* force_quit is true when we get here */ 1091 rte_eal_mp_wait_lcore(); 1092 1093 uint32_t j; 1094 for (i = 0; i < cfg.nb_ports; i++) { 1095 printf("Closing port %d\n", cfg.ports[i].rxtx_port); 1096 ret = rte_eth_dev_stop(cfg.ports[i].rxtx_port); 1097 if (ret != 0) 1098 RTE_LOG(ERR, DMA, "rte_eth_dev_stop: err=%s, port=%u\n", 1099 rte_strerror(-ret), cfg.ports[i].rxtx_port); 1100 1101 rte_eth_dev_close(cfg.ports[i].rxtx_port); 1102 if (copy_mode == COPY_MODE_DMA_NUM) { 1103 for (j = 0; j < cfg.ports[i].nb_queues; j++) { 1104 printf("Stopping dmadev %d\n", 1105 cfg.ports[i].dmadev_ids[j]); 1106 rte_dma_stop(cfg.ports[i].dmadev_ids[j]); 1107 } 1108 } else /* copy_mode == COPY_MODE_SW_NUM */ 1109 rte_ring_free(cfg.ports[i].rx_to_tx_ring); 1110 } 1111 1112 /* clean up the EAL */ 1113 rte_eal_cleanup(); 1114 1115 printf("Bye...\n"); 1116 return 0; 1117 } 1118