1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2020 Mellanox Technologies, Ltd 3 */ 4 5 #include <unistd.h> 6 #include <strings.h> 7 #include <stdint.h> 8 #include <sys/mman.h> 9 10 #include <rte_malloc.h> 11 #include <rte_log.h> 12 #include <rte_errno.h> 13 #include <rte_bus_pci.h> 14 #include <rte_pci.h> 15 #include <rte_regexdev_driver.h> 16 #include <rte_mbuf.h> 17 18 #include <infiniband/mlx5dv.h> 19 #include <mlx5_glue.h> 20 #include <mlx5_common.h> 21 #include <mlx5_prm.h> 22 23 #include "mlx5_regex_utils.h" 24 #include "mlx5_rxp.h" 25 #include "mlx5_regex.h" 26 27 #define MLX5_REGEX_MAX_WQE_INDEX 0xffff 28 #define MLX5_REGEX_METADATA_SIZE UINT32_C(64) 29 #define MLX5_REGEX_MAX_OUTPUT RTE_BIT32(11) 30 #define MLX5_REGEX_WQE_CTRL_OFFSET 12 31 #define MLX5_REGEX_WQE_METADATA_OFFSET 16 32 #define MLX5_REGEX_WQE_GATHER_OFFSET 32 33 #define MLX5_REGEX_WQE_SCATTER_OFFSET 48 34 #define MLX5_REGEX_METADATA_OFF 32 35 36 static inline uint32_t 37 sq_size_get(struct mlx5_regex_sq *sq) 38 { 39 return (1U << sq->log_nb_desc); 40 } 41 42 static inline uint32_t 43 cq_size_get(struct mlx5_regex_cq *cq) 44 { 45 return (1U << cq->log_nb_desc); 46 } 47 48 struct mlx5_regex_job { 49 uint64_t user_id; 50 volatile uint8_t *output; 51 volatile uint8_t *metadata; 52 } __rte_cached_aligned; 53 54 static inline void 55 set_data_seg(struct mlx5_wqe_data_seg *seg, 56 uint32_t length, uint32_t lkey, 57 uintptr_t address) 58 { 59 seg->byte_count = rte_cpu_to_be_32(length); 60 seg->lkey = rte_cpu_to_be_32(lkey); 61 seg->addr = rte_cpu_to_be_64(address); 62 } 63 64 static inline void 65 set_metadata_seg(struct mlx5_wqe_metadata_seg *seg, 66 uint32_t mmo_control_31_0, uint32_t lkey, 67 uintptr_t address) 68 { 69 seg->mmo_control_31_0 = htobe32(mmo_control_31_0); 70 seg->lkey = rte_cpu_to_be_32(lkey); 71 seg->addr = rte_cpu_to_be_64(address); 72 } 73 74 static inline void 75 set_regex_ctrl_seg(void *seg, uint8_t le, uint16_t subset_id0, 76 uint16_t subset_id1, uint16_t subset_id2, 77 uint16_t subset_id3, uint8_t ctrl) 78 { 79 MLX5_SET(regexp_mmo_control, seg, le, le); 80 MLX5_SET(regexp_mmo_control, seg, ctrl, ctrl); 81 MLX5_SET(regexp_mmo_control, seg, subset_id_0, subset_id0); 82 MLX5_SET(regexp_mmo_control, seg, subset_id_1, subset_id1); 83 MLX5_SET(regexp_mmo_control, seg, subset_id_2, subset_id2); 84 MLX5_SET(regexp_mmo_control, seg, subset_id_3, subset_id3); 85 } 86 87 static inline void 88 set_wqe_ctrl_seg(struct mlx5_wqe_ctrl_seg *seg, uint16_t pi, uint8_t opcode, 89 uint8_t opmod, uint32_t qp_num, uint8_t fm_ce_se, uint8_t ds, 90 uint8_t signature, uint32_t imm) 91 { 92 seg->opmod_idx_opcode = rte_cpu_to_be_32(((uint32_t)opmod << 24) | 93 ((uint32_t)pi << 8) | 94 opcode); 95 seg->qpn_ds = rte_cpu_to_be_32((qp_num << 8) | ds); 96 seg->fm_ce_se = fm_ce_se; 97 seg->signature = signature; 98 seg->imm = imm; 99 } 100 101 static inline void 102 prep_one(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp, 103 struct mlx5_regex_sq *sq, struct rte_regex_ops *op, 104 struct mlx5_regex_job *job) 105 { 106 size_t wqe_offset = (sq->pi & (sq_size_get(sq) - 1)) * MLX5_SEND_WQE_BB; 107 uint32_t lkey; 108 109 lkey = mlx5_mr_addr2mr_bh(priv->pd, 0, 110 &priv->mr_scache, &qp->mr_ctrl, 111 rte_pktmbuf_mtod(op->mbuf, uintptr_t), 112 !!(op->mbuf->ol_flags & EXT_ATTACHED_MBUF)); 113 uint8_t *wqe = (uint8_t *)sq->wqe + wqe_offset; 114 int ds = 4; /* ctrl + meta + input + output */ 115 116 set_wqe_ctrl_seg((struct mlx5_wqe_ctrl_seg *)wqe, sq->pi, 117 MLX5_OPCODE_MMO, MLX5_OPC_MOD_MMO_REGEX, sq->obj->id, 118 0, ds, 0, 0); 119 set_regex_ctrl_seg(wqe + 12, 0, op->group_id0, op->group_id1, 120 op->group_id2, 121 op->group_id3, 0); 122 struct mlx5_wqe_data_seg *input_seg = 123 (struct mlx5_wqe_data_seg *)(wqe + 124 MLX5_REGEX_WQE_GATHER_OFFSET); 125 input_seg->byte_count = 126 rte_cpu_to_be_32(rte_pktmbuf_data_len(op->mbuf)); 127 input_seg->addr = rte_cpu_to_be_64(rte_pktmbuf_mtod(op->mbuf, 128 uintptr_t)); 129 input_seg->lkey = lkey; 130 job->user_id = op->user_id; 131 sq->db_pi = sq->pi; 132 sq->pi = (sq->pi + 1) & MLX5_REGEX_MAX_WQE_INDEX; 133 } 134 135 static inline void 136 send_doorbell(struct mlx5dv_devx_uar *uar, struct mlx5_regex_sq *sq) 137 { 138 size_t wqe_offset = (sq->db_pi & (sq_size_get(sq) - 1)) * 139 MLX5_SEND_WQE_BB; 140 uint8_t *wqe = (uint8_t *)sq->wqe + wqe_offset; 141 ((struct mlx5_wqe_ctrl_seg *)wqe)->fm_ce_se = MLX5_WQE_CTRL_CQ_UPDATE; 142 uint64_t *doorbell_addr = 143 (uint64_t *)((uint8_t *)uar->base_addr + 0x800); 144 rte_io_wmb(); 145 sq->dbr[MLX5_SND_DBR] = rte_cpu_to_be_32((sq->db_pi + 1) & 146 MLX5_REGEX_MAX_WQE_INDEX); 147 rte_wmb(); 148 *doorbell_addr = *(volatile uint64_t *)wqe; 149 rte_wmb(); 150 } 151 152 static inline int 153 can_send(struct mlx5_regex_sq *sq) { 154 return ((uint16_t)(sq->pi - sq->ci) < sq_size_get(sq)); 155 } 156 157 static inline uint32_t 158 job_id_get(uint32_t qid, size_t sq_size, size_t index) { 159 return qid * sq_size + (index & (sq_size - 1)); 160 } 161 162 uint16_t 163 mlx5_regexdev_enqueue(struct rte_regexdev *dev, uint16_t qp_id, 164 struct rte_regex_ops **ops, uint16_t nb_ops) 165 { 166 struct mlx5_regex_priv *priv = dev->data->dev_private; 167 struct mlx5_regex_qp *queue = &priv->qps[qp_id]; 168 struct mlx5_regex_sq *sq; 169 size_t sqid, job_id, i = 0; 170 171 while ((sqid = ffs(queue->free_sqs))) { 172 sqid--; /* ffs returns 1 for bit 0 */ 173 sq = &queue->sqs[sqid]; 174 while (can_send(sq)) { 175 job_id = job_id_get(sqid, sq_size_get(sq), sq->pi); 176 prep_one(priv, queue, sq, ops[i], &queue->jobs[job_id]); 177 i++; 178 if (unlikely(i == nb_ops)) { 179 send_doorbell(priv->uar, sq); 180 goto out; 181 } 182 } 183 queue->free_sqs &= ~(1 << sqid); 184 send_doorbell(priv->uar, sq); 185 } 186 187 out: 188 queue->pi += i; 189 return i; 190 } 191 192 #define MLX5_REGEX_RESP_SZ 8 193 194 static inline void 195 extract_result(struct rte_regex_ops *op, struct mlx5_regex_job *job) 196 { 197 size_t j; 198 size_t offset; 199 uint16_t status; 200 201 op->user_id = job->user_id; 202 op->nb_matches = MLX5_GET_VOLATILE(regexp_metadata, job->metadata + 203 MLX5_REGEX_METADATA_OFF, 204 match_count); 205 op->nb_actual_matches = MLX5_GET_VOLATILE(regexp_metadata, 206 job->metadata + 207 MLX5_REGEX_METADATA_OFF, 208 detected_match_count); 209 for (j = 0; j < op->nb_matches; j++) { 210 offset = MLX5_REGEX_RESP_SZ * j; 211 op->matches[j].rule_id = 212 MLX5_GET_VOLATILE(regexp_match_tuple, 213 (job->output + offset), rule_id); 214 op->matches[j].start_offset = 215 MLX5_GET_VOLATILE(regexp_match_tuple, 216 (job->output + offset), start_ptr); 217 op->matches[j].len = 218 MLX5_GET_VOLATILE(regexp_match_tuple, 219 (job->output + offset), length); 220 } 221 status = MLX5_GET_VOLATILE(regexp_metadata, job->metadata + 222 MLX5_REGEX_METADATA_OFF, 223 status); 224 op->rsp_flags = 0; 225 if (status & MLX5_RXP_RESP_STATUS_PMI_SOJ) 226 op->rsp_flags |= RTE_REGEX_OPS_RSP_PMI_SOJ_F; 227 if (status & MLX5_RXP_RESP_STATUS_PMI_EOJ) 228 op->rsp_flags |= RTE_REGEX_OPS_RSP_PMI_EOJ_F; 229 if (status & MLX5_RXP_RESP_STATUS_MAX_LATENCY) 230 op->rsp_flags |= RTE_REGEX_OPS_RSP_MAX_SCAN_TIMEOUT_F; 231 if (status & MLX5_RXP_RESP_STATUS_MAX_MATCH) 232 op->rsp_flags |= RTE_REGEX_OPS_RSP_MAX_MATCH_F; 233 if (status & MLX5_RXP_RESP_STATUS_MAX_PREFIX) 234 op->rsp_flags |= RTE_REGEX_OPS_RSP_MAX_PREFIX_F; 235 if (status & MLX5_RXP_RESP_STATUS_MAX_PRI_THREADS) 236 op->rsp_flags |= RTE_REGEX_OPS_RSP_RESOURCE_LIMIT_REACHED_F; 237 if (status & MLX5_RXP_RESP_STATUS_MAX_SEC_THREADS) 238 op->rsp_flags |= RTE_REGEX_OPS_RSP_RESOURCE_LIMIT_REACHED_F; 239 } 240 241 static inline volatile struct mlx5_cqe * 242 poll_one(struct mlx5_regex_cq *cq) 243 { 244 volatile struct mlx5_cqe *cqe; 245 size_t next_cqe_offset; 246 247 next_cqe_offset = (cq->ci & (cq_size_get(cq) - 1)); 248 cqe = (volatile struct mlx5_cqe *)(cq->cqe + next_cqe_offset); 249 rte_io_wmb(); 250 251 int ret = check_cqe(cqe, cq_size_get(cq), cq->ci); 252 253 if (unlikely(ret == MLX5_CQE_STATUS_ERR)) { 254 DRV_LOG(ERR, "Completion with error on qp 0x%x", 0); 255 return NULL; 256 } 257 258 if (unlikely(ret != MLX5_CQE_STATUS_SW_OWN)) 259 return NULL; 260 261 return cqe; 262 } 263 264 265 /** 266 * DPDK callback for dequeue. 267 * 268 * @param dev 269 * Pointer to the regex dev structure. 270 * @param qp_id 271 * The queue to enqueue the traffic to. 272 * @param ops 273 * List of regex ops to dequeue. 274 * @param nb_ops 275 * Number of ops in ops parameter. 276 * 277 * @return 278 * Number of packets successfully dequeued (<= pkts_n). 279 */ 280 uint16_t 281 mlx5_regexdev_dequeue(struct rte_regexdev *dev, uint16_t qp_id, 282 struct rte_regex_ops **ops, uint16_t nb_ops) 283 { 284 struct mlx5_regex_priv *priv = dev->data->dev_private; 285 struct mlx5_regex_qp *queue = &priv->qps[qp_id]; 286 struct mlx5_regex_cq *cq = &queue->cq; 287 volatile struct mlx5_cqe *cqe; 288 size_t i = 0; 289 290 while ((cqe = poll_one(cq))) { 291 uint16_t wq_counter 292 = (rte_be_to_cpu_16(cqe->wqe_counter) + 1) & 293 MLX5_REGEX_MAX_WQE_INDEX; 294 size_t sqid = cqe->rsvd3[2]; 295 struct mlx5_regex_sq *sq = &queue->sqs[sqid]; 296 while (sq->ci != wq_counter) { 297 if (unlikely(i == nb_ops)) { 298 /* Return without updating cq->ci */ 299 goto out; 300 } 301 uint32_t job_id = job_id_get(sqid, sq_size_get(sq), 302 sq->ci); 303 extract_result(ops[i], &queue->jobs[job_id]); 304 sq->ci = (sq->ci + 1) & MLX5_REGEX_MAX_WQE_INDEX; 305 i++; 306 } 307 cq->ci = (cq->ci + 1) & 0xffffff; 308 rte_wmb(); 309 cq->dbr[0] = rte_cpu_to_be_32(cq->ci); 310 queue->free_sqs |= (1 << sqid); 311 } 312 313 out: 314 queue->ci += i; 315 return i; 316 } 317 318 static void 319 setup_sqs(struct mlx5_regex_qp *queue) 320 { 321 size_t sqid, entry; 322 uint32_t job_id; 323 for (sqid = 0; sqid < queue->nb_obj; sqid++) { 324 struct mlx5_regex_sq *sq = &queue->sqs[sqid]; 325 uint8_t *wqe = (uint8_t *)sq->wqe; 326 for (entry = 0 ; entry < sq_size_get(sq); entry++) { 327 job_id = sqid * sq_size_get(sq) + entry; 328 struct mlx5_regex_job *job = &queue->jobs[job_id]; 329 330 set_metadata_seg((struct mlx5_wqe_metadata_seg *) 331 (wqe + MLX5_REGEX_WQE_METADATA_OFFSET), 332 0, queue->metadata->lkey, 333 (uintptr_t)job->metadata); 334 set_data_seg((struct mlx5_wqe_data_seg *) 335 (wqe + MLX5_REGEX_WQE_SCATTER_OFFSET), 336 MLX5_REGEX_MAX_OUTPUT, 337 queue->outputs->lkey, 338 (uintptr_t)job->output); 339 wqe += 64; 340 } 341 queue->free_sqs |= 1 << sqid; 342 } 343 } 344 345 static int 346 setup_buffers(struct mlx5_regex_qp *qp, struct ibv_pd *pd) 347 { 348 uint32_t i; 349 int err; 350 351 void *ptr = rte_calloc(__func__, qp->nb_desc, 352 MLX5_REGEX_METADATA_SIZE, 353 MLX5_REGEX_METADATA_SIZE); 354 if (!ptr) 355 return -ENOMEM; 356 357 qp->metadata = mlx5_glue->reg_mr(pd, ptr, 358 MLX5_REGEX_METADATA_SIZE*qp->nb_desc, 359 IBV_ACCESS_LOCAL_WRITE); 360 if (!qp->metadata) { 361 DRV_LOG(ERR, "Failed to register metadata"); 362 rte_free(ptr); 363 return -EINVAL; 364 } 365 366 ptr = rte_calloc(__func__, qp->nb_desc, 367 MLX5_REGEX_MAX_OUTPUT, 368 MLX5_REGEX_MAX_OUTPUT); 369 if (!ptr) { 370 err = -ENOMEM; 371 goto err_output; 372 } 373 qp->outputs = mlx5_glue->reg_mr(pd, ptr, 374 MLX5_REGEX_MAX_OUTPUT * qp->nb_desc, 375 IBV_ACCESS_LOCAL_WRITE); 376 if (!qp->outputs) { 377 rte_free(ptr); 378 DRV_LOG(ERR, "Failed to register output"); 379 err = -EINVAL; 380 goto err_output; 381 } 382 383 /* distribute buffers to jobs */ 384 for (i = 0; i < qp->nb_desc; i++) { 385 qp->jobs[i].output = 386 (uint8_t *)qp->outputs->addr + 387 (i % qp->nb_desc) * MLX5_REGEX_MAX_OUTPUT; 388 qp->jobs[i].metadata = 389 (uint8_t *)qp->metadata->addr + 390 (i % qp->nb_desc) * MLX5_REGEX_METADATA_SIZE; 391 } 392 return 0; 393 394 err_output: 395 ptr = qp->metadata->addr; 396 rte_free(ptr); 397 mlx5_glue->dereg_mr(qp->metadata); 398 return err; 399 } 400 401 int 402 mlx5_regexdev_setup_fastpath(struct mlx5_regex_priv *priv, uint32_t qp_id) 403 { 404 struct mlx5_regex_qp *qp = &priv->qps[qp_id]; 405 int err; 406 407 qp->jobs = rte_calloc(__func__, qp->nb_desc, sizeof(*qp->jobs), 64); 408 if (!qp->jobs) 409 return -ENOMEM; 410 err = setup_buffers(qp, priv->pd); 411 if (err) { 412 rte_free(qp->jobs); 413 return err; 414 } 415 setup_sqs(qp); 416 return 0; 417 } 418 419 static void 420 free_buffers(struct mlx5_regex_qp *qp) 421 { 422 if (qp->metadata) { 423 mlx5_glue->dereg_mr(qp->metadata); 424 rte_free(qp->metadata->addr); 425 } 426 if (qp->outputs) { 427 mlx5_glue->dereg_mr(qp->outputs); 428 rte_free(qp->outputs->addr); 429 } 430 } 431 432 void 433 mlx5_regexdev_teardown_fastpath(struct mlx5_regex_priv *priv, uint32_t qp_id) 434 { 435 struct mlx5_regex_qp *qp = &priv->qps[qp_id]; 436 437 if (qp) { 438 free_buffers(qp); 439 if (qp->jobs) 440 rte_free(qp->jobs); 441 } 442 } 443