1fbc8c700SOri Kam /* SPDX-License-Identifier: BSD-3-Clause 2fbc8c700SOri Kam * Copyright 2020 Mellanox Technologies, Ltd 3fbc8c700SOri Kam */ 4fbc8c700SOri Kam 5fbc8c700SOri Kam #include <errno.h> 6fbc8c700SOri Kam 7fbc8c700SOri Kam #include <rte_log.h> 8fbc8c700SOri Kam #include <rte_errno.h> 9fbc8c700SOri Kam #include <rte_malloc.h> 10fbc8c700SOri Kam #include <rte_regexdev.h> 11fbc8c700SOri Kam #include <rte_regexdev_core.h> 12fbc8c700SOri Kam #include <rte_regexdev_driver.h> 13fbc8c700SOri Kam 14fbc8c700SOri Kam #include <mlx5_common.h> 15fbc8c700SOri Kam #include <mlx5_glue.h> 16fbc8c700SOri Kam #include <mlx5_devx_cmds.h> 17fbc8c700SOri Kam #include <mlx5_prm.h> 18fbc8c700SOri Kam #include <mlx5_common_os.h> 19fbc8c700SOri Kam 20fbc8c700SOri Kam #include "mlx5_regex.h" 21fbc8c700SOri Kam #include "mlx5_regex_utils.h" 22fbc8c700SOri Kam #include "mlx5_rxp_csrs.h" 23fbc8c700SOri Kam #include "mlx5_rxp.h" 24fbc8c700SOri Kam 25fbc8c700SOri Kam #define MLX5_REGEX_NUM_WQE_PER_PAGE (4096/64) 26fbc8c700SOri Kam 27fbc8c700SOri Kam /** 28fbc8c700SOri Kam * Returns the number of qp obj to be created. 29fbc8c700SOri Kam * 30fbc8c700SOri Kam * @param nb_desc 31fbc8c700SOri Kam * The number of descriptors for the queue. 32fbc8c700SOri Kam * 33fbc8c700SOri Kam * @return 34fbc8c700SOri Kam * The number of obj to be created. 35fbc8c700SOri Kam */ 36fbc8c700SOri Kam static uint16_t 37fbc8c700SOri Kam regex_ctrl_get_nb_obj(uint16_t nb_desc) 38fbc8c700SOri Kam { 39fbc8c700SOri Kam return ((nb_desc / MLX5_REGEX_NUM_WQE_PER_PAGE) + 40fbc8c700SOri Kam !!(nb_desc % MLX5_REGEX_NUM_WQE_PER_PAGE)); 41fbc8c700SOri Kam } 42fbc8c700SOri Kam 43fbc8c700SOri Kam /** 44fbc8c700SOri Kam * destroy CQ. 45fbc8c700SOri Kam * 46fbc8c700SOri Kam * @param priv 47fbc8c700SOri Kam * Pointer to the priv object. 48fbc8c700SOri Kam * @param cp 49fbc8c700SOri Kam * Pointer to the CQ to be destroyed. 50fbc8c700SOri Kam * 51fbc8c700SOri Kam * @return 52fbc8c700SOri Kam * 0 on success, a negative errno value otherwise and rte_errno is set. 53fbc8c700SOri Kam */ 54fbc8c700SOri Kam static int 55fbc8c700SOri Kam regex_ctrl_destroy_cq(struct mlx5_regex_priv *priv, struct mlx5_regex_cq *cq) 56fbc8c700SOri Kam { 57fbc8c700SOri Kam if (cq->cqe_umem) { 58fbc8c700SOri Kam mlx5_glue->devx_umem_dereg(cq->cqe_umem); 59fbc8c700SOri Kam cq->cqe_umem = NULL; 60fbc8c700SOri Kam } 61fbc8c700SOri Kam if (cq->cqe) { 62fbc8c700SOri Kam rte_free((void *)(uintptr_t)cq->cqe); 63fbc8c700SOri Kam cq->cqe = NULL; 64fbc8c700SOri Kam } 65fbc8c700SOri Kam if (cq->dbr_offset) { 66fbc8c700SOri Kam mlx5_release_dbr(&priv->dbrpgs, cq->dbr_umem, cq->dbr_offset); 67fbc8c700SOri Kam cq->dbr_offset = -1; 68fbc8c700SOri Kam } 69fbc8c700SOri Kam if (cq->obj) { 70fbc8c700SOri Kam mlx5_devx_cmd_destroy(cq->obj); 71fbc8c700SOri Kam cq->obj = NULL; 72fbc8c700SOri Kam } 73fbc8c700SOri Kam return 0; 74fbc8c700SOri Kam } 75fbc8c700SOri Kam 76fbc8c700SOri Kam /** 77fbc8c700SOri Kam * create the CQ object. 78fbc8c700SOri Kam * 79fbc8c700SOri Kam * @param priv 80fbc8c700SOri Kam * Pointer to the priv object. 81fbc8c700SOri Kam * @param cp 82fbc8c700SOri Kam * Pointer to the CQ to be created. 83fbc8c700SOri Kam * 84fbc8c700SOri Kam * @return 85fbc8c700SOri Kam * 0 on success, a negative errno value otherwise and rte_errno is set. 86fbc8c700SOri Kam */ 87fbc8c700SOri Kam static int 88fbc8c700SOri Kam regex_ctrl_create_cq(struct mlx5_regex_priv *priv, struct mlx5_regex_cq *cq) 89fbc8c700SOri Kam { 90fbc8c700SOri Kam struct mlx5_devx_cq_attr attr = { 91fbc8c700SOri Kam .q_umem_valid = 1, 92fbc8c700SOri Kam .db_umem_valid = 1, 93fbc8c700SOri Kam .eqn = priv->eqn, 94fbc8c700SOri Kam }; 95fbc8c700SOri Kam struct mlx5_devx_dbr_page *dbr_page = NULL; 96fbc8c700SOri Kam void *buf = NULL; 97fbc8c700SOri Kam size_t pgsize = sysconf(_SC_PAGESIZE); 98fbc8c700SOri Kam uint32_t cq_size = 1 << cq->log_nb_desc; 99fbc8c700SOri Kam uint32_t i; 100fbc8c700SOri Kam 101fbc8c700SOri Kam cq->dbr_offset = mlx5_get_dbr(priv->ctx, &priv->dbrpgs, &dbr_page); 102fbc8c700SOri Kam if (cq->dbr_offset < 0) { 103fbc8c700SOri Kam DRV_LOG(ERR, "Can't allocate cq door bell record."); 104fbc8c700SOri Kam rte_errno = ENOMEM; 105fbc8c700SOri Kam goto error; 106fbc8c700SOri Kam } 107fbc8c700SOri Kam cq->dbr_umem = mlx5_os_get_umem_id(dbr_page->umem); 10892f2c6a3SOri Kam cq->dbr = (uint32_t *)((uintptr_t)dbr_page->dbrs + 10992f2c6a3SOri Kam (uintptr_t)cq->dbr_offset); 11092f2c6a3SOri Kam 111fbc8c700SOri Kam buf = rte_calloc(NULL, 1, sizeof(struct mlx5_cqe) * cq_size, 4096); 112fbc8c700SOri Kam if (!buf) { 113fbc8c700SOri Kam DRV_LOG(ERR, "Can't allocate cqe buffer."); 114fbc8c700SOri Kam rte_errno = ENOMEM; 115fbc8c700SOri Kam goto error; 116fbc8c700SOri Kam } 117fbc8c700SOri Kam cq->cqe = buf; 118fbc8c700SOri Kam for (i = 0; i < cq_size; i++) 119fbc8c700SOri Kam cq->cqe[i].op_own = 0xff; 120fbc8c700SOri Kam cq->cqe_umem = mlx5_glue->devx_umem_reg(priv->ctx, buf, 121fbc8c700SOri Kam sizeof(struct mlx5_cqe) * 122fbc8c700SOri Kam cq_size, 7); 123fbc8c700SOri Kam if (!cq->cqe_umem) { 124fbc8c700SOri Kam DRV_LOG(ERR, "Can't register cqe mem."); 125fbc8c700SOri Kam rte_errno = ENOMEM; 126fbc8c700SOri Kam goto error; 127fbc8c700SOri Kam } 128fbc8c700SOri Kam attr.db_umem_offset = cq->dbr_offset; 129fbc8c700SOri Kam attr.db_umem_id = cq->dbr_umem; 130fbc8c700SOri Kam attr.q_umem_id = mlx5_os_get_umem_id(cq->cqe_umem); 131fbc8c700SOri Kam attr.log_cq_size = cq->log_nb_desc; 132fbc8c700SOri Kam attr.uar_page_id = priv->uar->page_id; 133fbc8c700SOri Kam attr.log_page_size = rte_log2_u32(pgsize); 134fbc8c700SOri Kam cq->obj = mlx5_devx_cmd_create_cq(priv->ctx, &attr); 135fbc8c700SOri Kam if (!cq->obj) { 136fbc8c700SOri Kam DRV_LOG(ERR, "Can't create cq object."); 137fbc8c700SOri Kam rte_errno = ENOMEM; 138fbc8c700SOri Kam goto error; 139fbc8c700SOri Kam } 140fbc8c700SOri Kam return 0; 141fbc8c700SOri Kam error: 142fbc8c700SOri Kam if (cq->cqe_umem) 143fbc8c700SOri Kam mlx5_glue->devx_umem_dereg(cq->cqe_umem); 144fbc8c700SOri Kam if (buf) 145fbc8c700SOri Kam rte_free(buf); 146fbc8c700SOri Kam if (cq->dbr_offset) 147fbc8c700SOri Kam mlx5_release_dbr(&priv->dbrpgs, cq->dbr_umem, cq->dbr_offset); 148fbc8c700SOri Kam return -rte_errno; 149fbc8c700SOri Kam } 150fbc8c700SOri Kam 15192f2c6a3SOri Kam #ifdef HAVE_IBV_FLOW_DV_SUPPORT 15292f2c6a3SOri Kam static int 15392f2c6a3SOri Kam regex_get_pdn(void *pd, uint32_t *pdn) 15492f2c6a3SOri Kam { 15592f2c6a3SOri Kam struct mlx5dv_obj obj; 15692f2c6a3SOri Kam struct mlx5dv_pd pd_info; 15792f2c6a3SOri Kam int ret = 0; 15892f2c6a3SOri Kam 15992f2c6a3SOri Kam obj.pd.in = pd; 16092f2c6a3SOri Kam obj.pd.out = &pd_info; 16192f2c6a3SOri Kam ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD); 16292f2c6a3SOri Kam if (ret) { 16392f2c6a3SOri Kam DRV_LOG(DEBUG, "Fail to get PD object info"); 16492f2c6a3SOri Kam return ret; 16592f2c6a3SOri Kam } 16692f2c6a3SOri Kam *pdn = pd_info.pdn; 16792f2c6a3SOri Kam return 0; 16892f2c6a3SOri Kam } 16992f2c6a3SOri Kam #endif 17092f2c6a3SOri Kam 17192f2c6a3SOri Kam /** 17292f2c6a3SOri Kam * create the SQ object. 17392f2c6a3SOri Kam * 17492f2c6a3SOri Kam * @param priv 17592f2c6a3SOri Kam * Pointer to the priv object. 17692f2c6a3SOri Kam * @param qp 17792f2c6a3SOri Kam * Pointer to the QP element 17892f2c6a3SOri Kam * @param q_ind 17992f2c6a3SOri Kam * The index of the queue. 18092f2c6a3SOri Kam * @param log_nb_desc 18192f2c6a3SOri Kam * Log 2 of the number of descriptors to be used. 18292f2c6a3SOri Kam * 18392f2c6a3SOri Kam * @return 18492f2c6a3SOri Kam * 0 on success, a negative errno value otherwise and rte_errno is set. 18592f2c6a3SOri Kam */ 18692f2c6a3SOri Kam static int 18792f2c6a3SOri Kam regex_ctrl_create_sq(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp, 18892f2c6a3SOri Kam uint16_t q_ind, uint16_t log_nb_desc) 18992f2c6a3SOri Kam { 19092f2c6a3SOri Kam #ifdef HAVE_IBV_FLOW_DV_SUPPORT 19192f2c6a3SOri Kam struct mlx5_devx_create_sq_attr attr = { 0 }; 19292f2c6a3SOri Kam struct mlx5_devx_modify_sq_attr modify_attr = { 0 }; 19392f2c6a3SOri Kam struct mlx5_devx_wq_attr *wq_attr = &attr.wq_attr; 19492f2c6a3SOri Kam struct mlx5_devx_dbr_page *dbr_page = NULL; 19592f2c6a3SOri Kam struct mlx5_regex_sq *sq = &qp->sqs[q_ind]; 19692f2c6a3SOri Kam void *buf = NULL; 19792f2c6a3SOri Kam uint32_t sq_size; 19892f2c6a3SOri Kam uint32_t pd_num = 0; 19992f2c6a3SOri Kam int ret; 20092f2c6a3SOri Kam 20192f2c6a3SOri Kam sq->log_nb_desc = log_nb_desc; 20292f2c6a3SOri Kam sq_size = 1 << sq->log_nb_desc; 20392f2c6a3SOri Kam sq->dbr_offset = mlx5_get_dbr(priv->ctx, &priv->dbrpgs, &dbr_page); 20492f2c6a3SOri Kam if (sq->dbr_offset < 0) { 20592f2c6a3SOri Kam DRV_LOG(ERR, "Can't allocate sq door bell record."); 20692f2c6a3SOri Kam rte_errno = ENOMEM; 20792f2c6a3SOri Kam goto error; 20892f2c6a3SOri Kam } 20992f2c6a3SOri Kam sq->dbr_umem = mlx5_os_get_umem_id(dbr_page->umem); 21092f2c6a3SOri Kam sq->dbr = (uint32_t *)((uintptr_t)dbr_page->dbrs + 21192f2c6a3SOri Kam (uintptr_t)sq->dbr_offset); 21292f2c6a3SOri Kam 21392f2c6a3SOri Kam buf = rte_calloc(NULL, 1, 64 * sq_size, 4096); 21492f2c6a3SOri Kam if (!buf) { 21592f2c6a3SOri Kam DRV_LOG(ERR, "Can't allocate wqe buffer."); 21692f2c6a3SOri Kam rte_errno = ENOMEM; 21792f2c6a3SOri Kam goto error; 21892f2c6a3SOri Kam } 21992f2c6a3SOri Kam sq->wqe = buf; 22092f2c6a3SOri Kam sq->wqe_umem = mlx5_glue->devx_umem_reg(priv->ctx, buf, 64 * sq_size, 22192f2c6a3SOri Kam 7); 222*4d4e245aSYuval Avnery sq->ci = 0; 223*4d4e245aSYuval Avnery sq->pi = 0; 22492f2c6a3SOri Kam if (!sq->wqe_umem) { 22592f2c6a3SOri Kam DRV_LOG(ERR, "Can't register wqe mem."); 22692f2c6a3SOri Kam rte_errno = ENOMEM; 22792f2c6a3SOri Kam goto error; 22892f2c6a3SOri Kam } 22992f2c6a3SOri Kam attr.state = MLX5_SQC_STATE_RST; 23092f2c6a3SOri Kam attr.tis_lst_sz = 0; 23192f2c6a3SOri Kam attr.tis_num = 0; 23292f2c6a3SOri Kam attr.user_index = q_ind; 23392f2c6a3SOri Kam attr.cqn = qp->cq.obj->id; 23492f2c6a3SOri Kam wq_attr->uar_page = priv->uar->page_id; 23592f2c6a3SOri Kam regex_get_pdn(priv->pd, &pd_num); 23692f2c6a3SOri Kam wq_attr->pd = pd_num; 23792f2c6a3SOri Kam wq_attr->wq_type = MLX5_WQ_TYPE_CYCLIC; 23892f2c6a3SOri Kam wq_attr->dbr_umem_id = sq->dbr_umem; 23992f2c6a3SOri Kam wq_attr->dbr_addr = sq->dbr_offset; 24092f2c6a3SOri Kam wq_attr->dbr_umem_valid = 1; 24192f2c6a3SOri Kam wq_attr->wq_umem_id = mlx5_os_get_umem_id(sq->wqe_umem); 24292f2c6a3SOri Kam wq_attr->wq_umem_offset = 0; 24392f2c6a3SOri Kam wq_attr->wq_umem_valid = 1; 24492f2c6a3SOri Kam wq_attr->log_wq_stride = 6; 24592f2c6a3SOri Kam wq_attr->log_wq_sz = sq->log_nb_desc; 24692f2c6a3SOri Kam sq->obj = mlx5_devx_cmd_create_sq(priv->ctx, &attr); 24792f2c6a3SOri Kam if (!sq->obj) { 24892f2c6a3SOri Kam DRV_LOG(ERR, "Can't create sq object."); 24992f2c6a3SOri Kam rte_errno = ENOMEM; 25092f2c6a3SOri Kam goto error; 25192f2c6a3SOri Kam } 25292f2c6a3SOri Kam modify_attr.state = MLX5_SQC_STATE_RDY; 25392f2c6a3SOri Kam ret = mlx5_devx_cmd_modify_sq(sq->obj, &modify_attr); 25492f2c6a3SOri Kam if (ret) { 25592f2c6a3SOri Kam DRV_LOG(ERR, "Can't change sq state to ready."); 25692f2c6a3SOri Kam rte_errno = ENOMEM; 25792f2c6a3SOri Kam goto error; 25892f2c6a3SOri Kam } 25992f2c6a3SOri Kam 26092f2c6a3SOri Kam return 0; 26192f2c6a3SOri Kam error: 26292f2c6a3SOri Kam if (sq->wqe_umem) 26392f2c6a3SOri Kam mlx5_glue->devx_umem_dereg(sq->wqe_umem); 26492f2c6a3SOri Kam if (buf) 26592f2c6a3SOri Kam rte_free(buf); 26692f2c6a3SOri Kam if (sq->dbr_offset) 26792f2c6a3SOri Kam mlx5_release_dbr(&priv->dbrpgs, sq->dbr_umem, sq->dbr_offset); 26892f2c6a3SOri Kam return -rte_errno; 26992f2c6a3SOri Kam #else 27092f2c6a3SOri Kam (void)priv; 27192f2c6a3SOri Kam (void)qp; 27292f2c6a3SOri Kam (void)q_ind; 27392f2c6a3SOri Kam (void)log_nb_desc; 27492f2c6a3SOri Kam DRV_LOG(ERR, "Cannot get pdn - no DV support."); 27592f2c6a3SOri Kam return -ENOTSUP; 27692f2c6a3SOri Kam #endif 27792f2c6a3SOri Kam } 27892f2c6a3SOri Kam 27992f2c6a3SOri Kam /** 28092f2c6a3SOri Kam * Destroy the SQ object. 28192f2c6a3SOri Kam * 28292f2c6a3SOri Kam * @param priv 28392f2c6a3SOri Kam * Pointer to the priv object. 28492f2c6a3SOri Kam * @param qp 28592f2c6a3SOri Kam * Pointer to the QP element 28692f2c6a3SOri Kam * @param q_ind 28792f2c6a3SOri Kam * The index of the queue. 28892f2c6a3SOri Kam * 28992f2c6a3SOri Kam * @return 29092f2c6a3SOri Kam * 0 on success, a negative errno value otherwise and rte_errno is set. 29192f2c6a3SOri Kam */ 29292f2c6a3SOri Kam static int 29392f2c6a3SOri Kam regex_ctrl_destroy_sq(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp, 29492f2c6a3SOri Kam uint16_t q_ind) 29592f2c6a3SOri Kam { 29692f2c6a3SOri Kam struct mlx5_regex_sq *sq = &qp->sqs[q_ind]; 29792f2c6a3SOri Kam 29892f2c6a3SOri Kam if (sq->wqe_umem) { 29992f2c6a3SOri Kam mlx5_glue->devx_umem_dereg(sq->wqe_umem); 30092f2c6a3SOri Kam sq->wqe_umem = NULL; 30192f2c6a3SOri Kam } 30292f2c6a3SOri Kam if (sq->wqe) { 30392f2c6a3SOri Kam rte_free((void *)(uintptr_t)sq->wqe); 30492f2c6a3SOri Kam sq->wqe = NULL; 30592f2c6a3SOri Kam } 30692f2c6a3SOri Kam if (sq->dbr_offset) { 30792f2c6a3SOri Kam mlx5_release_dbr(&priv->dbrpgs, sq->dbr_umem, sq->dbr_offset); 30892f2c6a3SOri Kam sq->dbr_offset = -1; 30992f2c6a3SOri Kam } 31092f2c6a3SOri Kam if (sq->obj) { 31192f2c6a3SOri Kam mlx5_devx_cmd_destroy(sq->obj); 31292f2c6a3SOri Kam sq->obj = NULL; 31392f2c6a3SOri Kam } 31492f2c6a3SOri Kam return 0; 31592f2c6a3SOri Kam } 31692f2c6a3SOri Kam 317fbc8c700SOri Kam /** 318fbc8c700SOri Kam * Setup the qp. 319fbc8c700SOri Kam * 320fbc8c700SOri Kam * @param dev 321fbc8c700SOri Kam * Pointer to RegEx dev structure. 322fbc8c700SOri Kam * @param qp_ind 323fbc8c700SOri Kam * The queue index to setup. 324fbc8c700SOri Kam * @param cfg 325fbc8c700SOri Kam * The queue requested configuration. 326fbc8c700SOri Kam * 327fbc8c700SOri Kam * @return 328fbc8c700SOri Kam * 0 on success, a negative errno value otherwise and rte_errno is set. 329fbc8c700SOri Kam */ 330fbc8c700SOri Kam int 331fbc8c700SOri Kam mlx5_regex_qp_setup(struct rte_regexdev *dev, uint16_t qp_ind, 332fbc8c700SOri Kam const struct rte_regexdev_qp_conf *cfg) 333fbc8c700SOri Kam { 334fbc8c700SOri Kam struct mlx5_regex_priv *priv = dev->data->dev_private; 335fbc8c700SOri Kam struct mlx5_regex_qp *qp; 33692f2c6a3SOri Kam int i; 337fbc8c700SOri Kam int ret; 33892f2c6a3SOri Kam uint16_t log_desc; 339fbc8c700SOri Kam 340fbc8c700SOri Kam qp = &priv->qps[qp_ind]; 341fbc8c700SOri Kam qp->flags = cfg->qp_conf_flags; 342fbc8c700SOri Kam qp->cq.log_nb_desc = rte_log2_u32(cfg->nb_desc); 343fbc8c700SOri Kam qp->nb_desc = 1 << qp->cq.log_nb_desc; 344fbc8c700SOri Kam if (qp->flags & RTE_REGEX_QUEUE_PAIR_CFG_OOS_F) 345fbc8c700SOri Kam qp->nb_obj = regex_ctrl_get_nb_obj(qp->nb_desc); 346fbc8c700SOri Kam else 347fbc8c700SOri Kam qp->nb_obj = 1; 348fbc8c700SOri Kam qp->sqs = rte_malloc(NULL, 349fbc8c700SOri Kam qp->nb_obj * sizeof(struct mlx5_regex_sq), 64); 350fbc8c700SOri Kam if (!qp->sqs) { 351fbc8c700SOri Kam DRV_LOG(ERR, "Can't allocate sq array memory."); 352fbc8c700SOri Kam rte_errno = ENOMEM; 353fbc8c700SOri Kam return -rte_errno; 354fbc8c700SOri Kam } 35592f2c6a3SOri Kam log_desc = rte_log2_u32(qp->nb_desc / qp->nb_obj); 356fbc8c700SOri Kam ret = regex_ctrl_create_cq(priv, &qp->cq); 357fbc8c700SOri Kam if (ret) { 358fbc8c700SOri Kam DRV_LOG(ERR, "Can't create cq."); 359fbc8c700SOri Kam goto error; 360fbc8c700SOri Kam } 36192f2c6a3SOri Kam for (i = 0; i < qp->nb_obj; i++) { 36292f2c6a3SOri Kam ret = regex_ctrl_create_sq(priv, qp, i, log_desc); 36392f2c6a3SOri Kam if (ret) { 36492f2c6a3SOri Kam DRV_LOG(ERR, "Can't create sq."); 36592f2c6a3SOri Kam goto error; 36692f2c6a3SOri Kam } 36792f2c6a3SOri Kam } 3685f41b66dSYuval Avnery 3695f41b66dSYuval Avnery mlx5_regexdev_setup_fastpath(priv, qp_ind); 370fbc8c700SOri Kam return 0; 371fbc8c700SOri Kam 372fbc8c700SOri Kam error: 373fbc8c700SOri Kam regex_ctrl_destroy_cq(priv, &qp->cq); 37492f2c6a3SOri Kam for (i = 0; i < qp->nb_obj; i++) 37592f2c6a3SOri Kam ret = regex_ctrl_destroy_sq(priv, qp, i); 376fbc8c700SOri Kam return -rte_errno; 377fbc8c700SOri Kam 378fbc8c700SOri Kam } 379