1*c39d1e08SXiaoyun Li /* SPDX-License-Identifier: BSD-3-Clause 2*c39d1e08SXiaoyun Li * Copyright(c) 2019 Intel Corporation. 3*c39d1e08SXiaoyun Li */ 4*c39d1e08SXiaoyun Li 5*c39d1e08SXiaoyun Li #ifndef _RTE_PMD_NTB_H_ 6*c39d1e08SXiaoyun Li #define _RTE_PMD_NTB_H_ 7*c39d1e08SXiaoyun Li 8*c39d1e08SXiaoyun Li /* App needs to set/get these attrs */ 9*c39d1e08SXiaoyun Li #define NTB_QUEUE_SZ_NAME "queue_size" 10*c39d1e08SXiaoyun Li #define NTB_QUEUE_NUM_NAME "queue_num" 11*c39d1e08SXiaoyun Li #define NTB_TOPO_NAME "topo" 12*c39d1e08SXiaoyun Li #define NTB_LINK_STATUS_NAME "link_status" 13*c39d1e08SXiaoyun Li #define NTB_SPEED_NAME "speed" 14*c39d1e08SXiaoyun Li #define NTB_WIDTH_NAME "width" 15*c39d1e08SXiaoyun Li #define NTB_MW_CNT_NAME "mw_count" 16*c39d1e08SXiaoyun Li #define NTB_DB_CNT_NAME "db_count" 17*c39d1e08SXiaoyun Li #define NTB_SPAD_CNT_NAME "spad_count" 18*c39d1e08SXiaoyun Li 19*c39d1e08SXiaoyun Li #define NTB_MAX_DESC_SIZE 1024 20*c39d1e08SXiaoyun Li #define NTB_MIN_DESC_SIZE 64 21*c39d1e08SXiaoyun Li 22*c39d1e08SXiaoyun Li struct ntb_dev_info { 23*c39d1e08SXiaoyun Li uint32_t ntb_hdr_size; 24*c39d1e08SXiaoyun Li /**< memzone needs to be mw size align or not. */ 25*c39d1e08SXiaoyun Li uint8_t mw_size_align; 26*c39d1e08SXiaoyun Li uint8_t mw_cnt; 27*c39d1e08SXiaoyun Li uint64_t *mw_size; 28*c39d1e08SXiaoyun Li }; 29*c39d1e08SXiaoyun Li 30*c39d1e08SXiaoyun Li struct ntb_dev_config { 31*c39d1e08SXiaoyun Li uint16_t num_queues; 32*c39d1e08SXiaoyun Li uint16_t queue_size; 33*c39d1e08SXiaoyun Li uint8_t mz_num; 34*c39d1e08SXiaoyun Li const struct rte_memzone **mz_list; 35*c39d1e08SXiaoyun Li }; 36*c39d1e08SXiaoyun Li 37*c39d1e08SXiaoyun Li struct ntb_queue_conf { 38*c39d1e08SXiaoyun Li uint16_t nb_desc; 39*c39d1e08SXiaoyun Li uint16_t tx_free_thresh; 40*c39d1e08SXiaoyun Li struct rte_mempool *rx_mp; 41*c39d1e08SXiaoyun Li }; 42*c39d1e08SXiaoyun Li 43*c39d1e08SXiaoyun Li #endif /* _RTE_PMD_NTB_H_ */ 44