1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2019 Intel Corporation. 3 */ 4 5 #ifndef _NTB_H_ 6 #define _NTB_H_ 7 8 #include <stdbool.h> 9 10 extern int ntb_logtype; 11 12 #define NTB_LOG(level, fmt, args...) \ 13 rte_log(RTE_LOG_ ## level, ntb_logtype, "%s(): " fmt "\n", \ 14 __func__, ##args) 15 16 /* Vendor ID */ 17 #define NTB_INTEL_VENDOR_ID 0x8086 18 19 /* Device IDs */ 20 #define NTB_INTEL_DEV_ID_B2B_SKX 0x201C 21 #define NTB_INTEL_DEV_ID_B2B_ICX 0x347E 22 23 /* Reserved to app to use. */ 24 #define NTB_SPAD_USER "spad_user_" 25 #define NTB_SPAD_USER_LEN (sizeof(NTB_SPAD_USER) - 1) 26 #define NTB_SPAD_USER_MAX_NUM 4 27 #define NTB_ATTR_NAME_LEN 30 28 29 #define NTB_DFLT_TX_FREE_THRESH 256 30 31 enum ntb_xstats_idx { 32 NTB_TX_PKTS_ID = 0, 33 NTB_TX_BYTES_ID, 34 NTB_TX_ERRS_ID, 35 NTB_RX_PKTS_ID, 36 NTB_RX_BYTES_ID, 37 NTB_RX_MISS_ID, 38 }; 39 40 enum ntb_topo { 41 NTB_TOPO_NONE = 0, 42 NTB_TOPO_B2B_USD, 43 NTB_TOPO_B2B_DSD, 44 }; 45 46 enum ntb_link { 47 NTB_LINK_DOWN = 0, 48 NTB_LINK_UP, 49 }; 50 51 enum ntb_speed { 52 NTB_SPEED_NONE = 0, 53 NTB_SPEED_GEN1 = 1, 54 NTB_SPEED_GEN2 = 2, 55 NTB_SPEED_GEN3 = 3, 56 NTB_SPEED_GEN4 = 4, 57 }; 58 59 enum ntb_width { 60 NTB_WIDTH_NONE = 0, 61 NTB_WIDTH_1 = 1, 62 NTB_WIDTH_2 = 2, 63 NTB_WIDTH_4 = 4, 64 NTB_WIDTH_8 = 8, 65 NTB_WIDTH_12 = 12, 66 NTB_WIDTH_16 = 16, 67 NTB_WIDTH_32 = 32, 68 }; 69 70 /* Define spad registers usage. 0 is reserved. */ 71 enum ntb_spad_idx { 72 SPAD_NUM_MWS = 1, 73 SPAD_NUM_QPS, 74 SPAD_Q_SZ, 75 SPAD_USED_MWS, 76 SPAD_MW0_SZ_H, 77 SPAD_MW0_SZ_L, 78 SPAD_MW1_SZ_H, 79 SPAD_MW1_SZ_L, 80 SPAD_MW0_BA_H, 81 SPAD_MW0_BA_L, 82 SPAD_MW1_BA_H, 83 SPAD_MW1_BA_L, 84 }; 85 86 /** 87 * NTB device operations 88 * @ntb_dev_init: Init ntb dev. 89 * @get_peer_mw_addr: To get the addr of peer mw[mw_idx]. 90 * @mw_set_trans: Set translation of internal memory that remote can access. 91 * @ioremap: Translate the remote host address to bar address. 92 * @get_link_status: get link status, link speed and link width. 93 * @set_link: Set local side up/down. 94 * @spad_read: Read local/peer spad register val. 95 * @spad_write: Write val to local/peer spad register. 96 * @db_read: Read doorbells status. 97 * @db_clear: Clear local doorbells. 98 * @db_set_mask: Set bits in db mask, preventing db interrpts generated 99 * for those db bits. 100 * @peer_db_set: Set doorbell bit to generate peer interrupt for that bit. 101 * @vector_bind: Bind vector source [intr] to msix vector [msix]. 102 */ 103 struct ntb_dev_ops { 104 int (*ntb_dev_init)(const struct rte_rawdev *dev); 105 void *(*get_peer_mw_addr)(const struct rte_rawdev *dev, int mw_idx); 106 int (*mw_set_trans)(const struct rte_rawdev *dev, int mw_idx, 107 uint64_t addr, uint64_t size); 108 void *(*ioremap)(const struct rte_rawdev *dev, uint64_t addr); 109 int (*get_link_status)(const struct rte_rawdev *dev); 110 int (*set_link)(const struct rte_rawdev *dev, bool up); 111 uint32_t (*spad_read)(const struct rte_rawdev *dev, int spad, 112 bool peer); 113 int (*spad_write)(const struct rte_rawdev *dev, int spad, 114 bool peer, uint32_t spad_v); 115 uint64_t (*db_read)(const struct rte_rawdev *dev); 116 int (*db_clear)(const struct rte_rawdev *dev, uint64_t db_bits); 117 int (*db_set_mask)(const struct rte_rawdev *dev, uint64_t db_mask); 118 int (*peer_db_set)(const struct rte_rawdev *dev, uint8_t db_bit); 119 int (*vector_bind)(const struct rte_rawdev *dev, uint8_t intr, 120 uint8_t msix); 121 }; 122 123 struct ntb_desc { 124 uint64_t addr; /* buffer addr */ 125 uint16_t len; /* buffer length */ 126 uint16_t rsv1; 127 uint32_t rsv2; 128 }; 129 130 #define NTB_FLAG_EOP 1 /* end of packet */ 131 struct ntb_used { 132 uint16_t len; /* buffer length */ 133 uint16_t flags; /* flags */ 134 }; 135 136 struct ntb_rx_entry { 137 struct rte_mbuf *mbuf; 138 }; 139 140 struct ntb_rx_queue { 141 struct ntb_desc *rx_desc_ring; 142 volatile struct ntb_used *rx_used_ring; 143 uint16_t *avail_cnt; 144 volatile uint16_t *used_cnt; 145 uint16_t last_avail; 146 uint16_t last_used; 147 uint16_t nb_rx_desc; 148 149 uint16_t rx_free_thresh; 150 151 struct rte_mempool *mpool; /* mempool for mbuf allocation */ 152 struct ntb_rx_entry *sw_ring; 153 154 uint16_t queue_id; /* DPDK queue index. */ 155 uint16_t port_id; /* Device port identifier. */ 156 157 struct ntb_hw *hw; 158 }; 159 160 struct ntb_tx_entry { 161 struct rte_mbuf *mbuf; 162 uint16_t next_id; 163 uint16_t last_id; 164 }; 165 166 struct ntb_tx_queue { 167 volatile struct ntb_desc *tx_desc_ring; 168 struct ntb_used *tx_used_ring; 169 volatile uint16_t *avail_cnt; 170 uint16_t *used_cnt; 171 uint16_t last_avail; /* Next need to be free. */ 172 uint16_t last_used; /* Next need to be sent. */ 173 uint16_t nb_tx_desc; 174 175 /* Total number of TX descriptors ready to be allocated. */ 176 uint16_t nb_tx_free; 177 uint16_t tx_free_thresh; 178 179 struct ntb_tx_entry *sw_ring; 180 181 uint16_t queue_id; /* DPDK queue index. */ 182 uint16_t port_id; /* Device port identifier. */ 183 184 struct ntb_hw *hw; 185 }; 186 187 struct ntb_header { 188 uint16_t avail_cnt __rte_cache_aligned; 189 uint16_t used_cnt __rte_cache_aligned; 190 struct ntb_desc desc_ring[] __rte_cache_aligned; 191 }; 192 193 /* ntb private data. */ 194 struct ntb_hw { 195 uint8_t mw_cnt; 196 uint8_t db_cnt; 197 uint8_t spad_cnt; 198 199 uint64_t db_valid_mask; 200 uint64_t db_mask; 201 202 enum ntb_topo topo; 203 204 enum ntb_link link_status; 205 enum ntb_speed link_speed; 206 enum ntb_width link_width; 207 208 const struct ntb_dev_ops *ntb_ops; 209 210 struct rte_pci_device *pci_dev; 211 char *hw_addr; 212 213 uint8_t peer_dev_up; 214 uint64_t *mw_size; 215 /* remote mem base addr */ 216 uint64_t *peer_mw_base; 217 218 uint16_t queue_pairs; 219 uint16_t queue_size; 220 uint32_t hdr_size_per_queue; 221 222 struct ntb_rx_queue **rx_queues; 223 struct ntb_tx_queue **tx_queues; 224 225 /* memzone to populate RX ring. */ 226 const struct rte_memzone **mz; 227 uint8_t used_mw_num; 228 229 uint8_t peer_used_mws; 230 231 uint64_t *ntb_xstats; 232 uint64_t *ntb_xstats_off; 233 234 /* Reserve several spad for app to use. */ 235 int spad_user_list[NTB_SPAD_USER_MAX_NUM]; 236 }; 237 238 #endif /* _NTB_H_ */ 239