1a05bd1b4SWei Huang /* SPDX-License-Identifier: BSD-3-Clause 2a05bd1b4SWei Huang * Copyright(c) 2021 Intel Corporation 3a05bd1b4SWei Huang */ 4a05bd1b4SWei Huang 5a05bd1b4SWei Huang #ifndef _RTE_PMD_IFPGA_H_ 6a05bd1b4SWei Huang #define _RTE_PMD_IFPGA_H_ 7a05bd1b4SWei Huang 8a05bd1b4SWei Huang /** 9a05bd1b4SWei Huang * @file rte_pmd_ifpga.h 10a05bd1b4SWei Huang * 11a05bd1b4SWei Huang * ifpga PMD specific functions. 12a05bd1b4SWei Huang * 13a05bd1b4SWei Huang * @b EXPERIMENTAL: this API may change, or be removed, without prior notice 14a05bd1b4SWei Huang * 15a05bd1b4SWei Huang */ 16a05bd1b4SWei Huang 17*719834a6SMattias Rönnblom #include <stdint.h> 18*719834a6SMattias Rönnblom 19a05bd1b4SWei Huang #ifdef __cplusplus 20a05bd1b4SWei Huang extern "C" { 21a05bd1b4SWei Huang #endif 22a05bd1b4SWei Huang 23cf38bcd7SWei Huang #define IFPGA_MAX_PORT_NUM 4 24cf38bcd7SWei Huang 25cf38bcd7SWei Huang /** 26cf38bcd7SWei Huang * UUID data structure. 27cf38bcd7SWei Huang */ 28cf38bcd7SWei Huang typedef struct { 29cf38bcd7SWei Huang uint8_t b[16]; 30cf38bcd7SWei Huang } rte_pmd_ifpga_uuid; 31cf38bcd7SWei Huang 32cf38bcd7SWei Huang /** 33cf38bcd7SWei Huang * FME property data structure. 34cf38bcd7SWei Huang */ 35cf38bcd7SWei Huang typedef struct { 36cf38bcd7SWei Huang uint32_t num_ports; 37cf38bcd7SWei Huang uint32_t boot_page; 38cf38bcd7SWei Huang uint64_t bitstream_id; 39cf38bcd7SWei Huang uint64_t bitstream_metadata; 40cf38bcd7SWei Huang rte_pmd_ifpga_uuid pr_id; 41cf38bcd7SWei Huang uint32_t bmc_version; 42cf38bcd7SWei Huang uint32_t bmc_nios_version; 43cf38bcd7SWei Huang } rte_pmd_ifpga_common_prop; 44cf38bcd7SWei Huang 45cf38bcd7SWei Huang /** 46cf38bcd7SWei Huang * port property data structure. 47cf38bcd7SWei Huang */ 48cf38bcd7SWei Huang typedef struct { 49cf38bcd7SWei Huang rte_pmd_ifpga_uuid afu_id; 50cf38bcd7SWei Huang uint32_t type; /* AFU memory access control type */ 51cf38bcd7SWei Huang } rte_pmd_ifpga_port_prop; 52cf38bcd7SWei Huang 53cf38bcd7SWei Huang /** 54cf38bcd7SWei Huang * FPGA property data structure. 55cf38bcd7SWei Huang */ 56cf38bcd7SWei Huang typedef struct { 57cf38bcd7SWei Huang rte_pmd_ifpga_common_prop common; 58cf38bcd7SWei Huang rte_pmd_ifpga_port_prop port[IFPGA_MAX_PORT_NUM]; 59cf38bcd7SWei Huang } rte_pmd_ifpga_prop; 60cf38bcd7SWei Huang 61cf38bcd7SWei Huang /** 62cf38bcd7SWei Huang * PHY information data structure. 63cf38bcd7SWei Huang */ 64cf38bcd7SWei Huang typedef struct { 65cf38bcd7SWei Huang uint32_t num_retimers; 66cf38bcd7SWei Huang uint32_t link_speed; 67cf38bcd7SWei Huang uint32_t link_status; 68cf38bcd7SWei Huang } rte_pmd_ifpga_phy_info; 69cf38bcd7SWei Huang 70a05bd1b4SWei Huang /** 71a05bd1b4SWei Huang * Get raw device ID from PCI address string like 'Domain:Bus:Dev.Func' 72a05bd1b4SWei Huang * 73a05bd1b4SWei Huang * @param pci_addr 74a05bd1b4SWei Huang * The PCI address of specified Intel FPGA device. 75a05bd1b4SWei Huang * @param dev_id 76a05bd1b4SWei Huang * The buffer to output device ID. 77a05bd1b4SWei Huang * @return 78a05bd1b4SWei Huang * - (0) if successful. 79a05bd1b4SWei Huang * - (-EINVAL) if bad parameter. 80a05bd1b4SWei Huang * - (-ENODEV) if FPGA is not probed by ifpga driver. 81a05bd1b4SWei Huang */ 82a05bd1b4SWei Huang int 83a05bd1b4SWei Huang rte_pmd_ifpga_get_dev_id(const char *pci_addr, uint16_t *dev_id); 84a05bd1b4SWei Huang 85a05bd1b4SWei Huang /** 86cf38bcd7SWei Huang * Get current RSU status of the specified Intel FPGA device 87cf38bcd7SWei Huang * 88cf38bcd7SWei Huang * @param dev_id 89cf38bcd7SWei Huang * The raw device ID of specified Intel FPGA device. 90cf38bcd7SWei Huang * @param stat 91cf38bcd7SWei Huang * The buffer to output RSU status. 92cf38bcd7SWei Huang * @param prog 93cf38bcd7SWei Huang * The buffer to output RSU progress. 94cf38bcd7SWei Huang * @return 95cf38bcd7SWei Huang * - (0) if successful. 96cf38bcd7SWei Huang * - (-ENODEV) if dev_id is invalid. 97cf38bcd7SWei Huang * - (-ENOMEM) if share data is not initialized. 98cf38bcd7SWei Huang */ 99cf38bcd7SWei Huang int 100cf38bcd7SWei Huang rte_pmd_ifpga_get_rsu_status(uint16_t dev_id, uint32_t *stat, uint32_t *prog); 101cf38bcd7SWei Huang 102cf38bcd7SWei Huang /** 103f724a802SWei Huang * Set current RSU status of the specified Intel FPGA device 104f724a802SWei Huang * 105f724a802SWei Huang * @param dev_id 106f724a802SWei Huang * The raw device ID of specified Intel FPGA device. 107f724a802SWei Huang * @param stat 108f724a802SWei Huang * The RSU status value to set. 109f724a802SWei Huang * @param prog 110f724a802SWei Huang * The RSU progress value to set. 111f724a802SWei Huang * @return 112f724a802SWei Huang * - (0) if successful. 113f724a802SWei Huang * - (-ENODEV) if dev_id is invalid. 114f724a802SWei Huang * - (-ENOMEM) if share data is not initialized. 115f724a802SWei Huang */ 116f724a802SWei Huang int 117f724a802SWei Huang rte_pmd_ifpga_set_rsu_status(uint16_t dev_id, uint32_t stat, uint32_t prog); 118f724a802SWei Huang 119f724a802SWei Huang /** 120cf38bcd7SWei Huang * Get FPGA property of specified Intel FPGA device 121cf38bcd7SWei Huang * 122cf38bcd7SWei Huang * @param dev_id 123cf38bcd7SWei Huang * The raw device ID of specified Intel FPGA device. 124cf38bcd7SWei Huang * @param prop 125cf38bcd7SWei Huang * The data pointer of FPGA property buffer. 126cf38bcd7SWei Huang * @return 127cf38bcd7SWei Huang * - (0) if successful. 128cf38bcd7SWei Huang * - (-ENODEV) if dev_id is invalid. 129cf38bcd7SWei Huang * - (-EBUSY) if FPGA is rebooting. 130cf38bcd7SWei Huang * - (-EIO) if failed to access hardware. 131cf38bcd7SWei Huang */ 132cf38bcd7SWei Huang int 133cf38bcd7SWei Huang rte_pmd_ifpga_get_property(uint16_t dev_id, rte_pmd_ifpga_prop *prop); 134cf38bcd7SWei Huang 135cf38bcd7SWei Huang /** 136cf38bcd7SWei Huang * Get PHY information of specified Intel FPGA device 137cf38bcd7SWei Huang * 138cf38bcd7SWei Huang * @param dev_id 139cf38bcd7SWei Huang * The raw device ID of specified Intel FPGA device. 140cf38bcd7SWei Huang * @param info 141cf38bcd7SWei Huang * The data pointer of PHY information buffer. 142cf38bcd7SWei Huang * @return 143cf38bcd7SWei Huang * - (0) if successful. 144cf38bcd7SWei Huang * - (-ENODEV) if dev_id is invalid. 145cf38bcd7SWei Huang * - (-EBUSY) if FPGA is rebooting. 146cf38bcd7SWei Huang * - (-EIO) if failed to access hardware. 147cf38bcd7SWei Huang */ 148cf38bcd7SWei Huang int 149cf38bcd7SWei Huang rte_pmd_ifpga_get_phy_info(uint16_t dev_id, rte_pmd_ifpga_phy_info *info); 150cf38bcd7SWei Huang 151cf38bcd7SWei Huang /** 152a05bd1b4SWei Huang * Update image flash of specified Intel FPGA device 153a05bd1b4SWei Huang * 154a05bd1b4SWei Huang * @param dev_id 155a05bd1b4SWei Huang * The raw device ID of specified Intel FPGA device. 156a05bd1b4SWei Huang * @param image 157a05bd1b4SWei Huang * The image file name string. 158a05bd1b4SWei Huang * @param status 159a05bd1b4SWei Huang * The detailed update status for debug. 160a05bd1b4SWei Huang * @return 161a05bd1b4SWei Huang * - (0) if successful. 162a05bd1b4SWei Huang * - (-ENODEV) if dev_id is invalid. 163a05bd1b4SWei Huang * - (-EINVAL) if bad parameter or staging area is not initialized. 164a05bd1b4SWei Huang * - (-EBUSY) if FPGA is updating or rebooting. 165a05bd1b4SWei Huang * - (-EIO) if failed to open image file. 166a05bd1b4SWei Huang */ 167a05bd1b4SWei Huang int 168a05bd1b4SWei Huang rte_pmd_ifpga_update_flash(uint16_t dev_id, const char *image, 169a05bd1b4SWei Huang uint64_t *status); 170a05bd1b4SWei Huang 171a05bd1b4SWei Huang /** 172a05bd1b4SWei Huang * Stop flash update of specified Intel FPGA device 173a05bd1b4SWei Huang * 174a05bd1b4SWei Huang * @param dev_id 175a05bd1b4SWei Huang * The raw device ID of specified Intel FPGA device. 176a05bd1b4SWei Huang * @param force 177a05bd1b4SWei Huang * Abort the update process by writing register if set non-zero. 178a05bd1b4SWei Huang * @return 179a05bd1b4SWei Huang * - (0) if successful. 180a05bd1b4SWei Huang * - (-ENODEV) if dev_id is invalid. 181a05bd1b4SWei Huang * - (-EINVAL) if bad parameter. 182a05bd1b4SWei Huang * - (-EAGAIN) if failed with force. 183a05bd1b4SWei Huang */ 184a05bd1b4SWei Huang int 185a05bd1b4SWei Huang rte_pmd_ifpga_stop_update(uint16_t dev_id, int force); 186a05bd1b4SWei Huang 187a05bd1b4SWei Huang /** 188a05bd1b4SWei Huang * Check current Intel FPGA status and change it to reboot status if it is idle 189a05bd1b4SWei Huang * 190a05bd1b4SWei Huang * @param dev_id 191a05bd1b4SWei Huang * The raw device ID of specified Intel FPGA device. 192a05bd1b4SWei Huang * @return 193a05bd1b4SWei Huang * - (0) if FPGA is ready to reboot. 194a05bd1b4SWei Huang * - (-ENODEV) if dev_id is invalid. 195a05bd1b4SWei Huang * - (-ENOMEM) if share data is not initialized. 196a05bd1b4SWei Huang * - (-EBUSY) if FPGA is updating or rebooting. 197a05bd1b4SWei Huang */ 198a05bd1b4SWei Huang int 199a05bd1b4SWei Huang rte_pmd_ifpga_reboot_try(uint16_t dev_id); 200a05bd1b4SWei Huang 201a05bd1b4SWei Huang /** 202a05bd1b4SWei Huang * Trigger full reconfiguration of specified Intel FPGA device 203a05bd1b4SWei Huang * 204a05bd1b4SWei Huang * @param dev_id 205a05bd1b4SWei Huang * The raw device ID of specified Intel FPGA device. 206a05bd1b4SWei Huang * @param type 207a05bd1b4SWei Huang * Select reconfiguration type. 208a05bd1b4SWei Huang * 0 - reconfigure FPGA only. 209a05bd1b4SWei Huang * 1 - reboot the whole card including FPGA. 210a05bd1b4SWei Huang * @param page 211a05bd1b4SWei Huang * Select image from which flash partition. 212a05bd1b4SWei Huang * 0 - factory partition. 213a05bd1b4SWei Huang * 1 - user partition. 214a05bd1b4SWei Huang * @return 215a05bd1b4SWei Huang * - (0) if successful. 216a05bd1b4SWei Huang * - (-ENODEV) if dev_id is invalid. 217a05bd1b4SWei Huang * - (-EINVAL) if bad parameter. 218a05bd1b4SWei Huang * - (-EBUSY) if failed to access BMC register. 219a05bd1b4SWei Huang */ 220a05bd1b4SWei Huang int 221a05bd1b4SWei Huang rte_pmd_ifpga_reload(uint16_t dev_id, int type, int page); 222a05bd1b4SWei Huang 223f724a802SWei Huang /** 224f724a802SWei Huang * Perform PR (partial reconfiguration) on specified Intel FPGA device 225f724a802SWei Huang * 226f724a802SWei Huang * @param dev_id 227f724a802SWei Huang * The raw device ID of specified Intel FPGA device. 228f724a802SWei Huang * @param port 229f724a802SWei Huang * The port index of the partial reconfiguration area. 230f724a802SWei Huang * @param file 231f724a802SWei Huang * The GBS (Green BitStream) image file name string. 232f724a802SWei Huang * @return 233f724a802SWei Huang * - (0) if successful. 234f724a802SWei Huang * - (-EINVAL) if bad parameter or operation failed. 235f724a802SWei Huang * - (-ENOMEM) if failed to allocate memory. 236f724a802SWei Huang */ 237f724a802SWei Huang int 238f724a802SWei Huang rte_pmd_ifpga_partial_reconfigure(uint16_t dev_id, int port, const char *file); 239f724a802SWei Huang 240f724a802SWei Huang /** 241f724a802SWei Huang * Free software resources allocated by Intel FPGA PMD 242f724a802SWei Huang */ 243f724a802SWei Huang void 244f724a802SWei Huang rte_pmd_ifpga_cleanup(void); 245f724a802SWei Huang 246a05bd1b4SWei Huang #ifdef __cplusplus 247a05bd1b4SWei Huang } 248a05bd1b4SWei Huang #endif 249a05bd1b4SWei Huang 250a05bd1b4SWei Huang #endif /* _RTE_PMD_IFPGA_H_ */ 251