1 2 /* SPDX-License-Identifier: BSD-3-Clause 3 * Copyright(c) 2010-2019 Intel Corporation 4 */ 5 6 #include "opae_osdep.h" 7 #include "opae_i2c.h" 8 9 static int i2c_transfer(struct altera_i2c_dev *dev, 10 struct i2c_msg *msg, int num) 11 { 12 int ret, try; 13 14 for (ret = 0, try = 0; try < I2C_XFER_RETRY; try++) { 15 ret = dev->xfer(dev, msg, num); 16 if (ret != -EAGAIN) 17 break; 18 } 19 20 return ret; 21 } 22 23 /** 24 * i2c read function 25 */ 26 int i2c_read(struct altera_i2c_dev *dev, int flags, unsigned int slave_addr, 27 u32 offset, u8 *buf, u32 count) 28 { 29 u8 msgbuf[2]; 30 int i = 0; 31 int ret; 32 33 pthread_mutex_lock(dev->mutex); 34 35 if (flags & I2C_FLAG_ADDR16) 36 msgbuf[i++] = offset >> 8; 37 38 msgbuf[i++] = offset; 39 40 struct i2c_msg msg[2] = { 41 { 42 .addr = slave_addr, 43 .flags = 0, 44 .len = i, 45 .buf = msgbuf, 46 }, 47 { 48 .addr = slave_addr, 49 .flags = I2C_M_RD, 50 .len = count, 51 .buf = buf, 52 }, 53 }; 54 55 if (!dev->xfer) { 56 ret = -ENODEV; 57 goto exit; 58 } 59 60 ret = i2c_transfer(dev, msg, 2); 61 62 exit: 63 pthread_mutex_unlock(dev->mutex); 64 return ret; 65 } 66 67 int i2c_write(struct altera_i2c_dev *dev, int flags, unsigned int slave_addr, 68 u32 offset, u8 *buffer, int len) 69 { 70 struct i2c_msg msg; 71 u8 *buf; 72 int ret; 73 int i = 0; 74 75 pthread_mutex_lock(dev->mutex); 76 77 if (!dev->xfer) { 78 ret = -ENODEV; 79 goto exit; 80 } 81 82 buf = opae_malloc(I2C_MAX_OFFSET_LEN + len); 83 if (!buf) { 84 ret = -ENOMEM; 85 goto exit; 86 } 87 88 msg.addr = slave_addr; 89 msg.flags = 0; 90 msg.buf = buf; 91 92 if (flags & I2C_FLAG_ADDR16) 93 msg.buf[i++] = offset >> 8; 94 95 msg.buf[i++] = offset; 96 opae_memcpy(&msg.buf[i], buffer, len); 97 msg.len = i + len; 98 99 ret = i2c_transfer(dev, &msg, 1); 100 101 opae_free(buf); 102 exit: 103 pthread_mutex_unlock(dev->mutex); 104 return ret; 105 } 106 107 int i2c_read8(struct altera_i2c_dev *dev, unsigned int slave_addr, u32 offset, 108 u8 *buf, u32 count) 109 { 110 return i2c_read(dev, 0, slave_addr, offset, buf, count); 111 } 112 113 int i2c_read16(struct altera_i2c_dev *dev, unsigned int slave_addr, u32 offset, 114 u8 *buf, u32 count) 115 { 116 return i2c_read(dev, I2C_FLAG_ADDR16, slave_addr, offset, 117 buf, count); 118 } 119 120 int i2c_write8(struct altera_i2c_dev *dev, unsigned int slave_addr, u32 offset, 121 u8 *buf, u32 count) 122 { 123 return i2c_write(dev, 0, slave_addr, offset, buf, count); 124 } 125 126 int i2c_write16(struct altera_i2c_dev *dev, unsigned int slave_addr, u32 offset, 127 u8 *buf, u32 count) 128 { 129 return i2c_write(dev, I2C_FLAG_ADDR16, slave_addr, offset, 130 buf, count); 131 } 132 133 static void i2c_indirect_write(struct altera_i2c_dev *dev, u32 reg, 134 u32 value) 135 { 136 u64 ctrl; 137 138 ctrl = I2C_CTRL_W | (reg >> 2); 139 140 opae_writeq(value & I2C_WRITE_DATA_MASK, dev->base + I2C_WRITE); 141 opae_writeq(ctrl, dev->base + I2C_CTRL); 142 } 143 144 static u32 i2c_indirect_read(struct altera_i2c_dev *dev, u32 reg) 145 { 146 u64 tmp; 147 u64 ctrl; 148 u32 value; 149 150 ctrl = I2C_CTRL_R | (reg >> 2); 151 opae_writeq(ctrl, dev->base + I2C_CTRL); 152 153 /* FIXME: Read one more time to avoid HW timing issue. */ 154 tmp = opae_readq(dev->base + I2C_READ); 155 tmp = opae_readq(dev->base + I2C_READ); 156 157 value = tmp & I2C_READ_DATA_MASK; 158 159 return value; 160 } 161 162 static void altera_i2c_transfer(struct altera_i2c_dev *dev, u32 data) 163 { 164 /*send STOP on last byte*/ 165 if (dev->msg_len == 1) 166 data |= ALTERA_I2C_TFR_CMD_STO; 167 if (dev->msg_len > 0) 168 i2c_indirect_write(dev, ALTERA_I2C_TFR_CMD, data); 169 } 170 171 static void altera_i2c_disable(struct altera_i2c_dev *dev) 172 { 173 u32 val = i2c_indirect_read(dev, ALTERA_I2C_CTRL); 174 175 i2c_indirect_write(dev, ALTERA_I2C_CTRL, val&~ALTERA_I2C_CTRL_EN); 176 } 177 178 static void altera_i2c_enable(struct altera_i2c_dev *dev) 179 { 180 u32 val = i2c_indirect_read(dev, ALTERA_I2C_CTRL); 181 182 i2c_indirect_write(dev, ALTERA_I2C_CTRL, val | ALTERA_I2C_CTRL_EN); 183 } 184 185 static void altera_i2c_reset(struct altera_i2c_dev *dev) 186 { 187 altera_i2c_disable(dev); 188 altera_i2c_enable(dev); 189 } 190 191 static int altera_i2c_wait_core_idle(struct altera_i2c_dev *dev) 192 { 193 int retry = 0; 194 195 while (i2c_indirect_read(dev, ALTERA_I2C_STATUS) 196 & ALTERA_I2C_STAT_CORE) { 197 if (retry++ > ALTERA_I2C_TIMEOUT_US) { 198 dev_err(dev, "timeout: Core Status not IDLE...\n"); 199 return -EBUSY; 200 } 201 udelay(1); 202 } 203 204 return 0; 205 } 206 207 static void altera_i2c_enable_interrupt(struct altera_i2c_dev *dev, 208 u32 mask, bool enable) 209 { 210 u32 status; 211 212 status = i2c_indirect_read(dev, ALTERA_I2C_ISER); 213 if (enable) 214 dev->isr_mask = status | mask; 215 else 216 dev->isr_mask = status&~mask; 217 218 i2c_indirect_write(dev, ALTERA_I2C_ISER, dev->isr_mask); 219 } 220 221 static void altera_i2c_interrupt_clear(struct altera_i2c_dev *dev, u32 mask) 222 { 223 u32 int_en; 224 225 int_en = i2c_indirect_read(dev, ALTERA_I2C_ISR); 226 227 i2c_indirect_write(dev, ALTERA_I2C_ISR, int_en | mask); 228 } 229 230 static void altera_i2c_read_rx_fifo(struct altera_i2c_dev *dev) 231 { 232 size_t rx_avail; 233 size_t bytes; 234 235 rx_avail = i2c_indirect_read(dev, ALTERA_I2C_RX_FIFO_LVL); 236 bytes = min(rx_avail, dev->msg_len); 237 238 while (bytes-- > 0) { 239 *dev->buf++ = i2c_indirect_read(dev, ALTERA_I2C_RX_DATA); 240 dev->msg_len--; 241 altera_i2c_transfer(dev, 0); 242 } 243 } 244 245 static void altera_i2c_stop(struct altera_i2c_dev *dev) 246 { 247 i2c_indirect_write(dev, ALTERA_I2C_TFR_CMD, ALTERA_I2C_TFR_CMD_STO); 248 } 249 250 static int altera_i2c_fill_tx_fifo(struct altera_i2c_dev *dev) 251 { 252 size_t tx_avail; 253 int bytes; 254 int ret; 255 256 tx_avail = dev->fifo_size - 257 i2c_indirect_read(dev, ALTERA_I2C_TC_FIFO_LVL); 258 bytes = min(tx_avail, dev->msg_len); 259 ret = dev->msg_len - bytes; 260 261 while (bytes-- > 0) { 262 altera_i2c_transfer(dev, *dev->buf++); 263 dev->msg_len--; 264 } 265 266 return ret; 267 } 268 269 static u8 i2c_8bit_addr_from_msg(const struct i2c_msg *msg) 270 { 271 return (msg->addr << 1) | (msg->flags & I2C_M_RD ? 1 : 0); 272 } 273 274 static int altera_i2c_wait_complete(struct altera_i2c_dev *dev, 275 u32 *status) 276 { 277 int retry = 0; 278 279 while (!((*status = i2c_indirect_read(dev, ALTERA_I2C_ISR)) 280 & dev->isr_mask)) { 281 if (retry++ > ALTERA_I2C_TIMEOUT_US) 282 return -EBUSY; 283 284 udelay(1000); 285 } 286 287 return 0; 288 } 289 290 static bool altera_handle_i2c_status(struct altera_i2c_dev *dev, u32 status) 291 { 292 bool read, finish = false; 293 int ret; 294 295 read = (dev->msg->flags & I2C_M_RD) != 0; 296 297 if (status & ALTERA_I2C_ISR_ARB) { 298 altera_i2c_interrupt_clear(dev, ALTERA_I2C_ISR_ARB); 299 dev->msg_err = -EAGAIN; 300 finish = true; 301 } else if (status & ALTERA_I2C_ISR_NACK) { 302 dev_debug(dev, "could not get ACK\n"); 303 dev->msg_err = -ENXIO; 304 altera_i2c_interrupt_clear(dev, ALTERA_I2C_ISR_NACK); 305 altera_i2c_stop(dev); 306 finish = true; 307 } else if (read && (status & ALTERA_I2C_ISR_RXOF)) { 308 /* RX FIFO Overflow */ 309 altera_i2c_read_rx_fifo(dev); 310 altera_i2c_interrupt_clear(dev, ALTERA_I2C_ISER_RXOF_EN); 311 altera_i2c_stop(dev); 312 dev_err(dev, "error: RX FIFO overflow\n"); 313 finish = true; 314 } else if (read && (status & ALTERA_I2C_ISR_RXRDY)) { 315 altera_i2c_read_rx_fifo(dev); 316 altera_i2c_interrupt_clear(dev, ALTERA_I2C_ISR_RXRDY); 317 if (!dev->msg_len) 318 finish = true; 319 } else if (!read && (status & ALTERA_I2C_ISR_TXRDY)) { 320 altera_i2c_interrupt_clear(dev, ALTERA_I2C_ISR_TXRDY); 321 if (dev->msg_len > 0) 322 altera_i2c_fill_tx_fifo(dev); 323 else 324 finish = true; 325 } else { 326 dev_err(dev, "unexpected status:0x%x\n", status); 327 altera_i2c_interrupt_clear(dev, ALTERA_I2C_ALL_IRQ); 328 } 329 330 if (finish) { 331 ret = altera_i2c_wait_core_idle(dev); 332 if (ret) 333 dev_err(dev, "message timeout\n"); 334 335 altera_i2c_enable_interrupt(dev, ALTERA_I2C_ALL_IRQ, false); 336 altera_i2c_interrupt_clear(dev, ALTERA_I2C_ALL_IRQ); 337 dev_debug(dev, "message done\n"); 338 } 339 340 return finish; 341 } 342 343 static bool altera_i2c_poll_status(struct altera_i2c_dev *dev) 344 { 345 u32 status; 346 bool finish = false; 347 int i = 0; 348 349 do { 350 if (altera_i2c_wait_complete(dev, &status)) { 351 dev_err(dev, "altera i2c wait complete timeout, status=0x%x\n", 352 status); 353 return -EBUSY; 354 } 355 356 finish = altera_handle_i2c_status(dev, status); 357 358 if (i++ > I2C_XFER_RETRY) 359 break; 360 361 } while (!finish); 362 363 return finish; 364 } 365 366 static int altera_i2c_xfer_msg(struct altera_i2c_dev *dev, 367 struct i2c_msg *msg) 368 { 369 u32 int_mask = ALTERA_I2C_ISR_RXOF | 370 ALTERA_I2C_ISR_ARB | ALTERA_I2C_ISR_NACK; 371 u8 addr = i2c_8bit_addr_from_msg(msg); 372 bool finish; 373 374 dev->msg = msg; 375 dev->msg_len = msg->len; 376 dev->buf = msg->buf; 377 dev->msg_err = 0; 378 altera_i2c_enable(dev); 379 380 /*make sure RX FIFO is emtry*/ 381 do { 382 i2c_indirect_read(dev, ALTERA_I2C_RX_DATA); 383 } while (i2c_indirect_read(dev, ALTERA_I2C_RX_FIFO_LVL)); 384 385 i2c_indirect_write(dev, ALTERA_I2C_TFR_CMD_RW_D, 386 ALTERA_I2C_TFR_CMD_STA | addr); 387 388 /*enable irq*/ 389 if (msg->flags & I2C_M_RD) { 390 int_mask |= ALTERA_I2C_ISR_RXOF | ALTERA_I2C_ISR_RXRDY; 391 /* in polling mode, we should set this ISR register? */ 392 altera_i2c_enable_interrupt(dev, int_mask, true); 393 altera_i2c_transfer(dev, 0); 394 } else { 395 int_mask |= ALTERA_I2C_ISR_TXRDY; 396 altera_i2c_enable_interrupt(dev, int_mask, true); 397 altera_i2c_fill_tx_fifo(dev); 398 } 399 400 finish = altera_i2c_poll_status(dev); 401 if (!finish) { 402 dev->msg_err = -ETIMEDOUT; 403 dev_err(dev, "%s: i2c transfer error\n", __func__); 404 } 405 406 altera_i2c_enable_interrupt(dev, int_mask, false); 407 408 if (i2c_indirect_read(dev, ALTERA_I2C_STATUS) & ALTERA_I2C_STAT_CORE) 409 dev_info(dev, "core not idle...\n"); 410 411 altera_i2c_disable(dev); 412 413 return dev->msg_err; 414 } 415 416 static int altera_i2c_xfer(struct altera_i2c_dev *dev, 417 struct i2c_msg *msg, int num) 418 { 419 int ret = 0; 420 int i; 421 422 for (i = 0; i < num; i++, msg++) { 423 ret = altera_i2c_xfer_msg(dev, msg); 424 if (ret) 425 break; 426 } 427 428 return ret; 429 } 430 431 static void altera_i2c_hardware_init(struct altera_i2c_dev *dev) 432 { 433 u32 divisor = dev->i2c_clk / dev->bus_clk_rate; 434 u32 clk_mhz = dev->i2c_clk / 1000000; 435 u32 tmp = (ALTERA_I2C_THRESHOLD << ALTERA_I2C_CTRL_RXT_SHFT) | 436 (ALTERA_I2C_THRESHOLD << ALTERA_I2C_CTRL_TCT_SHFT); 437 u32 t_high, t_low; 438 439 if (dev->bus_clk_rate <= 100000) { 440 tmp &= ~ALTERA_I2C_CTRL_BSPEED; 441 /*standard mode SCL 50/50*/ 442 t_high = divisor*1/2; 443 t_low = divisor*1/2; 444 } else { 445 tmp |= ALTERA_I2C_CTRL_BSPEED; 446 /*Fast mode SCL 33/66*/ 447 t_high = divisor*1/3; 448 t_low = divisor*2/3; 449 } 450 451 i2c_indirect_write(dev, ALTERA_I2C_CTRL, tmp); 452 453 dev_info(dev, "%s: rate=%uHz per_clk=%uMHz -> ratio=1:%u\n", 454 __func__, dev->bus_clk_rate, clk_mhz, divisor); 455 456 /*reset the i2c*/ 457 altera_i2c_reset(dev); 458 459 /*Set SCL high Time*/ 460 i2c_indirect_write(dev, ALTERA_I2C_SCL_HIGH, t_high); 461 /*Set SCL low time*/ 462 i2c_indirect_write(dev, ALTERA_I2C_SCL_LOW, t_low); 463 /*Set SDA Hold time, 300ms*/ 464 i2c_indirect_write(dev, ALTERA_I2C_SDA_HOLD, (300*clk_mhz)/1000); 465 466 altera_i2c_enable_interrupt(dev, ALTERA_I2C_ALL_IRQ, false); 467 } 468 469 struct altera_i2c_dev *altera_i2c_probe(void *base) 470 { 471 struct altera_i2c_dev *dev; 472 473 dev = opae_malloc(sizeof(*dev)); 474 if (!dev) 475 return NULL; 476 477 dev->base = (u8 *)base; 478 dev->i2c_param.info = opae_readq(dev->base + I2C_PARAM); 479 480 if (dev->i2c_param.devid != 0xEE011) { 481 dev_err(dev, "find a invalid i2c master\n"); 482 return NULL; 483 } 484 485 dev->fifo_size = dev->i2c_param.fifo_depth; 486 487 if (dev->i2c_param.max_req == ALTERA_I2C_100KHZ) 488 dev->bus_clk_rate = 100000; 489 else if (dev->i2c_param.max_req == ALTERA_I2C_400KHZ) 490 /* i2c bus clk 400KHz*/ 491 dev->bus_clk_rate = 400000; 492 493 /* i2c input clock for vista creek is 100MHz */ 494 dev->i2c_clk = dev->i2c_param.ref_clk * 1000000; 495 dev->xfer = altera_i2c_xfer; 496 497 if (pthread_mutex_init(&dev->lock, NULL)) 498 return NULL; 499 dev->mutex = &dev->lock; 500 501 altera_i2c_hardware_init(dev); 502 503 return dev; 504 } 505 506 void altera_i2c_remove(struct altera_i2c_dev *dev) 507 { 508 if (dev) { 509 pthread_mutex_destroy(&dev->lock); 510 altera_i2c_disable(dev); 511 opae_free(dev); 512 } 513 } 514