xref: /dpdk/drivers/raw/dpaa2_cmdif/dpaa2_cmdif.c (revision 089e5ed727a15da2729cfee9b63533dd120bd04c)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2018 NXP
3  */
4 
5 #include <stdio.h>
6 #include <errno.h>
7 #include <stdint.h>
8 
9 #include <rte_bus_vdev.h>
10 #include <rte_atomic.h>
11 #include <rte_interrupts.h>
12 #include <rte_branch_prediction.h>
13 #include <rte_lcore.h>
14 
15 #include <rte_rawdev.h>
16 #include <rte_rawdev_pmd.h>
17 
18 #include <portal/dpaa2_hw_pvt.h>
19 #include <portal/dpaa2_hw_dpio.h>
20 #include "dpaa2_cmdif_logs.h"
21 #include "rte_pmd_dpaa2_cmdif.h"
22 
23 /* Dynamic log type identifier */
24 int dpaa2_cmdif_logtype;
25 
26 /* CMDIF driver name */
27 #define DPAA2_CMDIF_PMD_NAME dpaa2_dpci
28 
29 /*
30  * This API provides the DPCI device ID in 'attr_value'.
31  * The device ID shall be passed by GPP to the AIOP using CMDIF commands.
32  */
33 static int
34 dpaa2_cmdif_get_attr(struct rte_rawdev *dev,
35 		     const char *attr_name,
36 		     uint64_t *attr_value)
37 {
38 	struct dpaa2_dpci_dev *cidev = dev->dev_private;
39 
40 	DPAA2_CMDIF_FUNC_TRACE();
41 
42 	RTE_SET_USED(attr_name);
43 
44 	if (!attr_value) {
45 		DPAA2_CMDIF_ERR("Invalid arguments for getting attributes");
46 		return -EINVAL;
47 	}
48 	*attr_value = cidev->dpci_id;
49 
50 	return 0;
51 }
52 
53 static int
54 dpaa2_cmdif_enqueue_bufs(struct rte_rawdev *dev,
55 			 struct rte_rawdev_buf **buffers,
56 			 unsigned int count,
57 			 rte_rawdev_obj_t context)
58 {
59 	struct dpaa2_dpci_dev *cidev = dev->dev_private;
60 	struct rte_dpaa2_cmdif_context *cmdif_send_cnxt;
61 	struct dpaa2_queue *txq;
62 	struct qbman_fd fd;
63 	struct qbman_eq_desc eqdesc;
64 	struct qbman_swp *swp;
65 	int ret;
66 
67 	RTE_SET_USED(count);
68 
69 	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
70 		ret = dpaa2_affine_qbman_swp();
71 		if (ret) {
72 			DPAA2_CMDIF_ERR("Failure in affining portal\n");
73 			return 0;
74 		}
75 	}
76 	swp = DPAA2_PER_LCORE_PORTAL;
77 
78 	cmdif_send_cnxt = (struct rte_dpaa2_cmdif_context *)(context);
79 	txq = &(cidev->tx_queue[cmdif_send_cnxt->priority]);
80 
81 	/* Prepare enqueue descriptor */
82 	qbman_eq_desc_clear(&eqdesc);
83 	qbman_eq_desc_set_fq(&eqdesc, txq->fqid);
84 	qbman_eq_desc_set_no_orp(&eqdesc, 0);
85 	qbman_eq_desc_set_response(&eqdesc, 0, 0);
86 
87 	/* Set some of the FD parameters to i.
88 	 * For performance reasons do not memset
89 	 */
90 	fd.simple.bpid_offset = 0;
91 	fd.simple.ctrl = 0;
92 
93 	DPAA2_SET_FD_ADDR(&fd, DPAA2_VADDR_TO_IOVA(buffers[0]->buf_addr));
94 	DPAA2_SET_FD_LEN(&fd, cmdif_send_cnxt->size);
95 	DPAA2_SET_FD_FRC(&fd, cmdif_send_cnxt->frc);
96 	DPAA2_SET_FD_FLC(&fd, cmdif_send_cnxt->flc);
97 
98 	/* Enqueue a packet to the QBMAN */
99 	do {
100 		ret = qbman_swp_enqueue_multiple(swp, &eqdesc, &fd, NULL, 1);
101 		if (ret < 0 && ret != -EBUSY)
102 			DPAA2_CMDIF_ERR("Transmit failure with err: %d\n", ret);
103 	} while (ret == -EBUSY);
104 
105 	DPAA2_CMDIF_DP_DEBUG("Successfully transmitted a packet\n");
106 
107 	return 0;
108 }
109 
110 static int
111 dpaa2_cmdif_dequeue_bufs(struct rte_rawdev *dev,
112 			 struct rte_rawdev_buf **buffers,
113 			 unsigned int count,
114 			 rte_rawdev_obj_t context)
115 {
116 	struct dpaa2_dpci_dev *cidev = dev->dev_private;
117 	struct rte_dpaa2_cmdif_context *cmdif_rcv_cnxt;
118 	struct dpaa2_queue *rxq;
119 	struct qbman_swp *swp;
120 	struct qbman_result *dq_storage;
121 	const struct qbman_fd *fd;
122 	struct qbman_pull_desc pulldesc;
123 	uint8_t status;
124 	int ret;
125 
126 	RTE_SET_USED(count);
127 
128 	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
129 		ret = dpaa2_affine_qbman_swp();
130 		if (ret) {
131 			DPAA2_CMDIF_ERR("Failure in affining portal\n");
132 			return 0;
133 		}
134 	}
135 	swp = DPAA2_PER_LCORE_PORTAL;
136 
137 	cmdif_rcv_cnxt = (struct rte_dpaa2_cmdif_context *)(context);
138 	rxq = &(cidev->rx_queue[cmdif_rcv_cnxt->priority]);
139 	dq_storage = rxq->q_storage->dq_storage[0];
140 
141 	qbman_pull_desc_clear(&pulldesc);
142 	qbman_pull_desc_set_fq(&pulldesc, rxq->fqid);
143 	qbman_pull_desc_set_numframes(&pulldesc, 1);
144 	qbman_pull_desc_set_storage(&pulldesc, dq_storage,
145 		(uint64_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);
146 
147 	while (1) {
148 		if (qbman_swp_pull(swp, &pulldesc)) {
149 			DPAA2_CMDIF_DP_WARN("VDQ cmd not issued. QBMAN is busy\n");
150 			/* Portal was busy, try again */
151 			continue;
152 		}
153 		break;
154 	}
155 
156 	/* Check if previous issued command is completed. */
157 	while (!qbman_check_command_complete(dq_storage))
158 		;
159 	/* Loop until the dq_storage is updated with new token by QBMAN */
160 	while (!qbman_result_has_new_result(swp, dq_storage))
161 		;
162 
163 	/* Check for valid frame. */
164 	status = (uint8_t)qbman_result_DQ_flags(dq_storage);
165 	if (unlikely((status & QBMAN_DQ_STAT_VALIDFRAME) == 0)) {
166 		DPAA2_CMDIF_DP_DEBUG("No frame is delivered\n");
167 		return 0;
168 	}
169 
170 	fd = qbman_result_DQ_fd(dq_storage);
171 
172 	buffers[0]->buf_addr = (void *)DPAA2_IOVA_TO_VADDR(
173 			DPAA2_GET_FD_ADDR(fd) +	DPAA2_GET_FD_OFFSET(fd));
174 	cmdif_rcv_cnxt->size = DPAA2_GET_FD_LEN(fd);
175 	cmdif_rcv_cnxt->flc = DPAA2_GET_FD_FLC(fd);
176 	cmdif_rcv_cnxt->frc = DPAA2_GET_FD_FRC(fd);
177 
178 	DPAA2_CMDIF_DP_DEBUG("packet received\n");
179 
180 	return 1;
181 }
182 
183 static const struct rte_rawdev_ops dpaa2_cmdif_ops = {
184 	.attr_get = dpaa2_cmdif_get_attr,
185 	.enqueue_bufs = dpaa2_cmdif_enqueue_bufs,
186 	.dequeue_bufs = dpaa2_cmdif_dequeue_bufs,
187 };
188 
189 static int
190 dpaa2_cmdif_create(const char *name,
191 		   struct rte_vdev_device *vdev,
192 		   int socket_id)
193 {
194 	struct rte_rawdev *rawdev;
195 	struct dpaa2_dpci_dev *cidev;
196 
197 	/* Allocate device structure */
198 	rawdev = rte_rawdev_pmd_allocate(name, sizeof(struct dpaa2_dpci_dev),
199 					 socket_id);
200 	if (!rawdev) {
201 		DPAA2_CMDIF_ERR("Unable to allocate rawdevice");
202 		return -EINVAL;
203 	}
204 
205 	rawdev->dev_ops = &dpaa2_cmdif_ops;
206 	rawdev->device = &vdev->device;
207 
208 	/* For secondary processes, the primary has done all the work */
209 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
210 		return 0;
211 
212 	cidev = rte_dpaa2_alloc_dpci_dev();
213 	if (!cidev) {
214 		DPAA2_CMDIF_ERR("Unable to allocate CI device");
215 		rte_rawdev_pmd_release(rawdev);
216 		return -ENODEV;
217 	}
218 
219 	rawdev->dev_private = cidev;
220 
221 	return 0;
222 }
223 
224 static int
225 dpaa2_cmdif_destroy(const char *name)
226 {
227 	int ret;
228 	struct rte_rawdev *rdev;
229 
230 	rdev = rte_rawdev_pmd_get_named_dev(name);
231 	if (!rdev) {
232 		DPAA2_CMDIF_ERR("Invalid device name (%s)", name);
233 		return -EINVAL;
234 	}
235 
236 	/* The primary process will only free the DPCI device */
237 	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
238 		rte_dpaa2_free_dpci_dev(rdev->dev_private);
239 
240 	ret = rte_rawdev_pmd_release(rdev);
241 	if (ret)
242 		DPAA2_CMDIF_DEBUG("Device cleanup failed");
243 
244 	return 0;
245 }
246 
247 static int
248 dpaa2_cmdif_probe(struct rte_vdev_device *vdev)
249 {
250 	const char *name;
251 	int ret = 0;
252 
253 	name = rte_vdev_device_name(vdev);
254 
255 	DPAA2_CMDIF_INFO("Init %s on NUMA node %d", name, rte_socket_id());
256 
257 	ret = dpaa2_cmdif_create(name, vdev, rte_socket_id());
258 
259 	return ret;
260 }
261 
262 static int
263 dpaa2_cmdif_remove(struct rte_vdev_device *vdev)
264 {
265 	const char *name;
266 	int ret;
267 
268 	name = rte_vdev_device_name(vdev);
269 	if (name == NULL)
270 		return -1;
271 
272 	DPAA2_CMDIF_INFO("Closing %s on NUMA node %d", name, rte_socket_id());
273 
274 	ret = dpaa2_cmdif_destroy(name);
275 
276 	return ret;
277 }
278 
279 static struct rte_vdev_driver dpaa2_cmdif_drv = {
280 	.probe = dpaa2_cmdif_probe,
281 	.remove = dpaa2_cmdif_remove
282 };
283 
284 RTE_PMD_REGISTER_VDEV(DPAA2_CMDIF_PMD_NAME, dpaa2_cmdif_drv);
285 
286 RTE_INIT(dpaa2_cmdif_init_log)
287 {
288 	dpaa2_cmdif_logtype = rte_log_register("pmd.raw.dpaa2.cmdif");
289 	if (dpaa2_cmdif_logtype >= 0)
290 		rte_log_set_level(dpaa2_cmdif_logtype, RTE_LOG_INFO);
291 }
292