1*b462f273SDavid Marchand /* SPDX-License-Identifier: BSD-3-Clause 2*b462f273SDavid Marchand * Copyright(c) 2010-2021 Intel Corporation 3*b462f273SDavid Marchand */ 4*b462f273SDavid Marchand #ifndef RTE_POWER_GUEST_CHANNEL_H 5*b462f273SDavid Marchand #define RTE_POWER_GUEST_CHANNEL_H 6*b462f273SDavid Marchand 7*b462f273SDavid Marchand #include <stdint.h> 8*b462f273SDavid Marchand #include <stddef.h> 9*b462f273SDavid Marchand #include <stdbool.h> 10*b462f273SDavid Marchand 11*b462f273SDavid Marchand #ifdef __cplusplus 12*b462f273SDavid Marchand extern "C" { 13*b462f273SDavid Marchand #endif 14*b462f273SDavid Marchand 15*b462f273SDavid Marchand #define RTE_POWER_MAX_VFS 10 16*b462f273SDavid Marchand #define RTE_POWER_VM_MAX_NAME_SZ 32 17*b462f273SDavid Marchand #define RTE_POWER_MAX_VCPU_PER_VM 8 18*b462f273SDavid Marchand #define RTE_POWER_HOURS_PER_DAY 24 19*b462f273SDavid Marchand 20*b462f273SDavid Marchand /* Valid Commands */ 21*b462f273SDavid Marchand #define RTE_POWER_CPU_POWER 1 22*b462f273SDavid Marchand #define RTE_POWER_CPU_POWER_CONNECT 2 23*b462f273SDavid Marchand #define RTE_POWER_PKT_POLICY 3 24*b462f273SDavid Marchand #define RTE_POWER_PKT_POLICY_REMOVE 4 25*b462f273SDavid Marchand 26*b462f273SDavid Marchand #define RTE_POWER_CORE_TYPE_VIRTUAL 0 27*b462f273SDavid Marchand #define RTE_POWER_CORE_TYPE_PHYSICAL 1 28*b462f273SDavid Marchand 29*b462f273SDavid Marchand /* CPU Power Command Scaling */ 30*b462f273SDavid Marchand #define RTE_POWER_SCALE_UP 1 31*b462f273SDavid Marchand #define RTE_POWER_SCALE_DOWN 2 32*b462f273SDavid Marchand #define RTE_POWER_SCALE_MAX 3 33*b462f273SDavid Marchand #define RTE_POWER_SCALE_MIN 4 34*b462f273SDavid Marchand #define RTE_POWER_ENABLE_TURBO 5 35*b462f273SDavid Marchand #define RTE_POWER_DISABLE_TURBO 6 36*b462f273SDavid Marchand 37*b462f273SDavid Marchand /* CPU Power Queries */ 38*b462f273SDavid Marchand #define RTE_POWER_QUERY_FREQ_LIST 7 39*b462f273SDavid Marchand #define RTE_POWER_QUERY_FREQ 8 40*b462f273SDavid Marchand #define RTE_POWER_QUERY_CAPS_LIST 9 41*b462f273SDavid Marchand #define RTE_POWER_QUERY_CAPS 10 42*b462f273SDavid Marchand 43*b462f273SDavid Marchand /* Generic Power Command Response */ 44*b462f273SDavid Marchand #define RTE_POWER_CMD_ACK 1 45*b462f273SDavid Marchand #define RTE_POWER_CMD_NACK 2 46*b462f273SDavid Marchand 47*b462f273SDavid Marchand /* CPU Power Query Responses */ 48*b462f273SDavid Marchand #define RTE_POWER_FREQ_LIST 3 49*b462f273SDavid Marchand #define RTE_POWER_CAPS_LIST 4 50*b462f273SDavid Marchand 51*b462f273SDavid Marchand struct rte_power_traffic_policy { 52*b462f273SDavid Marchand uint32_t min_packet_thresh; 53*b462f273SDavid Marchand uint32_t avg_max_packet_thresh; 54*b462f273SDavid Marchand uint32_t max_max_packet_thresh; 55*b462f273SDavid Marchand }; 56*b462f273SDavid Marchand 57*b462f273SDavid Marchand struct rte_power_timer_profile { 58*b462f273SDavid Marchand int busy_hours[RTE_POWER_HOURS_PER_DAY]; 59*b462f273SDavid Marchand int quiet_hours[RTE_POWER_HOURS_PER_DAY]; 60*b462f273SDavid Marchand int hours_to_use_traffic_profile[RTE_POWER_HOURS_PER_DAY]; 61*b462f273SDavid Marchand }; 62*b462f273SDavid Marchand 63*b462f273SDavid Marchand enum rte_power_workload_level { 64*b462f273SDavid Marchand RTE_POWER_WL_HIGH, 65*b462f273SDavid Marchand RTE_POWER_WL_MEDIUM, 66*b462f273SDavid Marchand RTE_POWER_WL_LOW 67*b462f273SDavid Marchand }; 68*b462f273SDavid Marchand 69*b462f273SDavid Marchand enum rte_power_policy { 70*b462f273SDavid Marchand RTE_POWER_POLICY_TRAFFIC, 71*b462f273SDavid Marchand RTE_POWER_POLICY_TIME, 72*b462f273SDavid Marchand RTE_POWER_POLICY_WORKLOAD, 73*b462f273SDavid Marchand RTE_POWER_POLICY_BRANCH_RATIO 74*b462f273SDavid Marchand }; 75*b462f273SDavid Marchand 76*b462f273SDavid Marchand struct rte_power_turbo_status { 77*b462f273SDavid Marchand bool tbEnabled; 78*b462f273SDavid Marchand }; 79*b462f273SDavid Marchand 80*b462f273SDavid Marchand struct rte_power_channel_packet { 81*b462f273SDavid Marchand uint64_t resource_id; /**< core_num, device */ 82*b462f273SDavid Marchand uint32_t unit; /**< scale down/up/min/max */ 83*b462f273SDavid Marchand uint32_t command; /**< Power, IO, etc */ 84*b462f273SDavid Marchand char vm_name[RTE_POWER_VM_MAX_NAME_SZ]; 85*b462f273SDavid Marchand 86*b462f273SDavid Marchand uint64_t vfid[RTE_POWER_MAX_VFS]; 87*b462f273SDavid Marchand int nb_mac_to_monitor; 88*b462f273SDavid Marchand struct rte_power_traffic_policy traffic_policy; 89*b462f273SDavid Marchand uint8_t vcpu_to_control[RTE_POWER_MAX_VCPU_PER_VM]; 90*b462f273SDavid Marchand uint8_t num_vcpu; 91*b462f273SDavid Marchand struct rte_power_timer_profile timer_policy; 92*b462f273SDavid Marchand bool core_type; 93*b462f273SDavid Marchand enum rte_power_workload_level workload; 94*b462f273SDavid Marchand enum rte_power_policy policy_to_use; 95*b462f273SDavid Marchand struct rte_power_turbo_status t_boost_status; 96*b462f273SDavid Marchand }; 97*b462f273SDavid Marchand 98*b462f273SDavid Marchand struct rte_power_channel_packet_freq_list { 99*b462f273SDavid Marchand uint64_t resource_id; /**< core_num, device */ 100*b462f273SDavid Marchand uint32_t unit; /**< scale down/up/min/max */ 101*b462f273SDavid Marchand uint32_t command; /**< Power, IO, etc */ 102*b462f273SDavid Marchand char vm_name[RTE_POWER_VM_MAX_NAME_SZ]; 103*b462f273SDavid Marchand 104*b462f273SDavid Marchand uint32_t freq_list[RTE_POWER_MAX_VCPU_PER_VM]; 105*b462f273SDavid Marchand uint8_t num_vcpu; 106*b462f273SDavid Marchand }; 107*b462f273SDavid Marchand 108*b462f273SDavid Marchand struct rte_power_channel_packet_caps_list { 109*b462f273SDavid Marchand uint64_t resource_id; /**< core_num, device */ 110*b462f273SDavid Marchand uint32_t unit; /**< scale down/up/min/max */ 111*b462f273SDavid Marchand uint32_t command; /**< Power, IO, etc */ 112*b462f273SDavid Marchand char vm_name[RTE_POWER_VM_MAX_NAME_SZ]; 113*b462f273SDavid Marchand 114*b462f273SDavid Marchand uint64_t turbo[RTE_POWER_MAX_VCPU_PER_VM]; 115*b462f273SDavid Marchand uint64_t priority[RTE_POWER_MAX_VCPU_PER_VM]; 116*b462f273SDavid Marchand uint8_t num_vcpu; 117*b462f273SDavid Marchand }; 118*b462f273SDavid Marchand 119*b462f273SDavid Marchand /** 120*b462f273SDavid Marchand * Send a message contained in pkt over the Virtio-Serial to the host endpoint. 121*b462f273SDavid Marchand * 122*b462f273SDavid Marchand * @param pkt 123*b462f273SDavid Marchand * Pointer to a populated struct channel_packet. 124*b462f273SDavid Marchand * 125*b462f273SDavid Marchand * @param lcore_id 126*b462f273SDavid Marchand * Use channel specific to this lcore_id. 127*b462f273SDavid Marchand * 128*b462f273SDavid Marchand * @return 129*b462f273SDavid Marchand * - 0 on success. 130*b462f273SDavid Marchand * - Negative on error. 131*b462f273SDavid Marchand */ 132*b462f273SDavid Marchand int rte_power_guest_channel_send_msg(struct rte_power_channel_packet *pkt, 133*b462f273SDavid Marchand unsigned int lcore_id); 134*b462f273SDavid Marchand 135*b462f273SDavid Marchand /** 136*b462f273SDavid Marchand * Receive a message contained in pkt over the Virtio-Serial 137*b462f273SDavid Marchand * from the host endpoint. 138*b462f273SDavid Marchand * 139*b462f273SDavid Marchand * @param pkt 140*b462f273SDavid Marchand * Pointer to channel_packet or 141*b462f273SDavid Marchand * channel_packet_freq_list struct. 142*b462f273SDavid Marchand * 143*b462f273SDavid Marchand * @param pkt_len 144*b462f273SDavid Marchand * Size of expected data packet. 145*b462f273SDavid Marchand * 146*b462f273SDavid Marchand * @param lcore_id 147*b462f273SDavid Marchand * Use channel specific to this lcore_id. 148*b462f273SDavid Marchand * 149*b462f273SDavid Marchand * @return 150*b462f273SDavid Marchand * - 0 on success. 151*b462f273SDavid Marchand * - Negative on error. 152*b462f273SDavid Marchand */ 153*b462f273SDavid Marchand int rte_power_guest_channel_receive_msg(void *pkt, 154*b462f273SDavid Marchand size_t pkt_len, 155*b462f273SDavid Marchand unsigned int lcore_id); 156*b462f273SDavid Marchand 157*b462f273SDavid Marchand 158*b462f273SDavid Marchand #ifdef __cplusplus 159*b462f273SDavid Marchand } 160*b462f273SDavid Marchand #endif 161*b462f273SDavid Marchand 162*b462f273SDavid Marchand #endif /* RTE_POWER_GUEST_CHANNEL_H_ */ 163