xref: /dpdk/drivers/net/zxdh/zxdh_ethdev.h (revision 70d49e4b97702155b4b4f52623f7a154efddf2c8)
129e89288SJunlong Wang /* SPDX-License-Identifier: BSD-3-Clause
229e89288SJunlong Wang  * Copyright(c) 2024 ZTE Corporation
329e89288SJunlong Wang  */
429e89288SJunlong Wang 
529e89288SJunlong Wang #ifndef ZXDH_ETHDEV_H
629e89288SJunlong Wang #define ZXDH_ETHDEV_H
729e89288SJunlong Wang 
8102ac20eSJunlong Wang #include <rte_ether.h>
929e89288SJunlong Wang #include "ethdev_driver.h"
103630ac8bSJunlong Wang #include <rte_interrupts.h>
113630ac8bSJunlong Wang #include <eal_interrupts.h>
1229e89288SJunlong Wang 
1329e89288SJunlong Wang /* ZXDH PCI vendor/device ID. */
1429e89288SJunlong Wang #define ZXDH_PCI_VENDOR_ID        0x1cf2
1529e89288SJunlong Wang 
1629e89288SJunlong Wang #define ZXDH_E310_PF_DEVICEID     0x8061
1729e89288SJunlong Wang #define ZXDH_E310_VF_DEVICEID     0x8062
1829e89288SJunlong Wang #define ZXDH_E312_PF_DEVICEID     0x8049
1929e89288SJunlong Wang #define ZXDH_E312_VF_DEVICEID     0x8060
2029e89288SJunlong Wang 
2129e89288SJunlong Wang #define ZXDH_MAX_UC_MAC_ADDRS     32
2229e89288SJunlong Wang #define ZXDH_MAX_MC_MAC_ADDRS     32
2329e89288SJunlong Wang #define ZXDH_MAX_MAC_ADDRS        (ZXDH_MAX_UC_MAC_ADDRS + ZXDH_MAX_MC_MAC_ADDRS)
2429e89288SJunlong Wang 
2529e89288SJunlong Wang #define ZXDH_NUM_BARS             2
26102ac20eSJunlong Wang #define ZXDH_RX_QUEUES_MAX        128U
27102ac20eSJunlong Wang #define ZXDH_TX_QUEUES_MAX        128U
28fea1ddb0SJunlong Wang #define ZXDH_MIN_RX_BUFSIZE       64
29fea1ddb0SJunlong Wang #define ZXDH_MAX_RX_PKTLEN        14000U
30*70d49e4bSJunlong Wang #define ZXDH_QUEUE_DEPTH          1024
31*70d49e4bSJunlong Wang #define ZXDH_QUEUES_BASE          0
32*70d49e4bSJunlong Wang #define ZXDH_TOTAL_QUEUES_NUM     4096
33*70d49e4bSJunlong Wang #define ZXDH_QUEUES_NUM_MAX       256
34*70d49e4bSJunlong Wang #define ZXDH_QUERES_SHARE_BASE    (0x5000)
35*70d49e4bSJunlong Wang 
36*70d49e4bSJunlong Wang #define ZXDH_MBUF_BURST_SZ        64
3729e89288SJunlong Wang 
38d2fc5332SJunlong Wang union zxdh_virport_num {
39d2fc5332SJunlong Wang 	uint16_t vport;
40d2fc5332SJunlong Wang 	struct {
41d2fc5332SJunlong Wang 		uint16_t vfid:8;
42d2fc5332SJunlong Wang 		uint16_t pfid:3;
43d2fc5332SJunlong Wang 		uint16_t vf_flag:1;
44d2fc5332SJunlong Wang 		uint16_t epid:3;
45d2fc5332SJunlong Wang 		uint16_t direct_flag:1;
46d2fc5332SJunlong Wang 	};
47d2fc5332SJunlong Wang };
48d2fc5332SJunlong Wang 
49*70d49e4bSJunlong Wang struct zxdh_chnl_context {
50*70d49e4bSJunlong Wang 	uint16_t valid;
51*70d49e4bSJunlong Wang 	uint16_t ph_chno;
52*70d49e4bSJunlong Wang };
53*70d49e4bSJunlong Wang 
5429e89288SJunlong Wang struct zxdh_hw {
5529e89288SJunlong Wang 	struct rte_eth_dev *eth_dev;
56102ac20eSJunlong Wang 	struct zxdh_pci_common_cfg *common_cfg;
57102ac20eSJunlong Wang 	struct zxdh_net_config *dev_cfg;
583630ac8bSJunlong Wang 	struct rte_intr_handle *risc_intr;
593630ac8bSJunlong Wang 	struct rte_intr_handle *dtb_intr;
603630ac8bSJunlong Wang 	struct zxdh_virtqueue **vqs;
61*70d49e4bSJunlong Wang 	struct zxdh_chnl_context channel_context[ZXDH_QUEUES_NUM_MAX];
62d2fc5332SJunlong Wang 	union zxdh_virport_num vport;
6329e89288SJunlong Wang 
64102ac20eSJunlong Wang 	uint64_t bar_addr[ZXDH_NUM_BARS];
65102ac20eSJunlong Wang 	uint64_t host_features;
66102ac20eSJunlong Wang 	uint64_t guest_features;
67102ac20eSJunlong Wang 	uint32_t max_queue_pairs;
6829e89288SJunlong Wang 	uint32_t speed;
69102ac20eSJunlong Wang 	uint32_t notify_off_multiplier;
70102ac20eSJunlong Wang 	uint16_t *notify_base;
71102ac20eSJunlong Wang 	uint16_t pcie_id;
7229e89288SJunlong Wang 	uint16_t device_id;
7329e89288SJunlong Wang 	uint16_t port_id;
746310e397SJunlong Wang 	uint16_t vfid;
75*70d49e4bSJunlong Wang 	uint16_t queue_num;
7629e89288SJunlong Wang 
77102ac20eSJunlong Wang 	uint8_t *isr;
78102ac20eSJunlong Wang 	uint8_t weak_barriers;
793630ac8bSJunlong Wang 	uint8_t intr_enabled;
80102ac20eSJunlong Wang 	uint8_t use_msix;
81102ac20eSJunlong Wang 	uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
82102ac20eSJunlong Wang 
8329e89288SJunlong Wang 	uint8_t duplex;
8429e89288SJunlong Wang 	uint8_t is_pf;
859d80d592SJunlong Wang 	uint8_t msg_chan_init;
866310e397SJunlong Wang 	uint8_t phyport;
876310e397SJunlong Wang 	uint8_t panel_id;
88*70d49e4bSJunlong Wang 	uint8_t has_tx_offload;
89*70d49e4bSJunlong Wang 	uint8_t has_rx_offload;
9029e89288SJunlong Wang };
9129e89288SJunlong Wang 
926310e397SJunlong Wang uint16_t zxdh_vport_to_vfid(union zxdh_virport_num v);
936310e397SJunlong Wang 
9429e89288SJunlong Wang #endif /* ZXDH_ETHDEV_H */
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