1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2016 Cavium, Inc 3 */ 4 5 #ifndef _THUNDERX_NICVF_HW_H 6 #define _THUNDERX_NICVF_HW_H 7 8 #include <stdint.h> 9 10 #include "nicvf_hw_defs.h" 11 12 #define PCI_VENDOR_ID_CAVIUM 0x177D 13 #define PCI_DEVICE_ID_THUNDERX_CN88XX_PASS1_NICVF 0x0011 14 #define PCI_DEVICE_ID_THUNDERX_NICVF 0xA034 15 #define PCI_SUB_DEVICE_ID_CN88XX_PASS1_NICVF 0xA11E 16 #define PCI_SUB_DEVICE_ID_CN88XX_PASS2_NICVF 0xA134 17 #define PCI_SUB_DEVICE_ID_CN81XX_NICVF 0xA234 18 #define PCI_SUB_DEVICE_ID_CN83XX_NICVF 0xA334 19 20 #define NICVF_ARRAY_SIZE(arr) RTE_DIM(arr) 21 22 #define NICVF_GET_RX_STATS(reg) \ 23 nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | (reg << 3)) 24 #define NICVF_GET_TX_STATS(reg) \ 25 nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3)) 26 27 #define NICVF_CAP_TUNNEL_PARSING (1ULL << 0) 28 /* Additional word in Rx descriptor to hold optional tunneling extension info */ 29 #define NICVF_CAP_CQE_RX2 (1ULL << 1) 30 /* The device capable of setting NIC_CQE_RX_S[APAD] == 0 */ 31 #define NICVF_CAP_DISABLE_APAD (1ULL << 2) 32 33 enum nicvf_tns_mode { 34 NIC_TNS_BYPASS_MODE, 35 NIC_TNS_MODE, 36 }; 37 38 enum nicvf_err_e { 39 NICVF_OK, 40 NICVF_ERR_SET_QS = -8191,/* -8191 */ 41 NICVF_ERR_RESET_QS, /* -8190 */ 42 NICVF_ERR_REG_POLL, /* -8189 */ 43 NICVF_ERR_RBDR_RESET, /* -8188 */ 44 NICVF_ERR_RBDR_DISABLE, /* -8187 */ 45 NICVF_ERR_RBDR_PREFETCH, /* -8186 */ 46 NICVF_ERR_RBDR_RESET1, /* -8185 */ 47 NICVF_ERR_RBDR_RESET2, /* -8184 */ 48 NICVF_ERR_RQ_CLAIM, /* -8183 */ 49 NICVF_ERR_RQ_PF_CFG, /* -8182 */ 50 NICVF_ERR_RQ_BP_CFG, /* -8181 */ 51 NICVF_ERR_RQ_DROP_CFG, /* -8180 */ 52 NICVF_ERR_CQ_DISABLE, /* -8179 */ 53 NICVF_ERR_CQ_RESET, /* -8178 */ 54 NICVF_ERR_SQ_DISABLE, /* -8177 */ 55 NICVF_ERR_SQ_RESET, /* -8176 */ 56 NICVF_ERR_SQ_PF_CFG, /* -8175 */ 57 NICVF_ERR_LOOPBACK_CFG, /* -8174 */ 58 NICVF_ERR_BASE_INIT, /* -8173 */ 59 NICVF_ERR_RSS_TBL_UPDATE,/* -8172 */ 60 NICVF_ERR_RSS_GET_SZ, /* -8171 */ 61 }; 62 63 typedef nicvf_iova_addr_t (*rbdr_pool_get_handler)(void *dev, void *opaque); 64 65 struct nicvf_hw_rx_qstats { 66 uint64_t q_rx_bytes; 67 uint64_t q_rx_packets; 68 }; 69 70 struct nicvf_hw_tx_qstats { 71 uint64_t q_tx_bytes; 72 uint64_t q_tx_packets; 73 }; 74 75 struct nicvf_hw_stats { 76 uint64_t rx_bytes; 77 uint64_t rx_ucast_frames; 78 uint64_t rx_bcast_frames; 79 uint64_t rx_mcast_frames; 80 uint64_t rx_fcs_errors; 81 uint64_t rx_l2_errors; 82 uint64_t rx_drop_red; 83 uint64_t rx_drop_red_bytes; 84 uint64_t rx_drop_overrun; 85 uint64_t rx_drop_overrun_bytes; 86 uint64_t rx_drop_bcast; 87 uint64_t rx_drop_mcast; 88 uint64_t rx_drop_l3_bcast; 89 uint64_t rx_drop_l3_mcast; 90 91 uint64_t tx_bytes_ok; 92 uint64_t tx_ucast_frames_ok; 93 uint64_t tx_bcast_frames_ok; 94 uint64_t tx_mcast_frames_ok; 95 uint64_t tx_drops; 96 }; 97 98 struct nicvf_rss_reta_info { 99 uint8_t hash_bits; 100 uint16_t rss_size; 101 uint8_t ind_tbl[NIC_MAX_RSS_IDR_TBL_SIZE]; 102 }; 103 104 /* Common structs used in DPDK and base layer are defined in DPDK layer */ 105 #include "../nicvf_struct.h" 106 107 NICVF_STATIC_ASSERT(sizeof(struct nicvf_rbdr) <= 128); 108 NICVF_STATIC_ASSERT(sizeof(struct nicvf_txq) <= 128); 109 NICVF_STATIC_ASSERT(sizeof(struct nicvf_rxq) <= 128); 110 111 static inline void 112 nicvf_reg_write(struct nicvf *nic, uint32_t offset, uint64_t val) 113 { 114 nicvf_addr_write(nic->reg_base + offset, val); 115 } 116 117 static inline uint64_t 118 nicvf_reg_read(struct nicvf *nic, uint32_t offset) 119 { 120 return nicvf_addr_read(nic->reg_base + offset); 121 } 122 123 static inline uintptr_t 124 nicvf_qset_base(struct nicvf *nic, uint32_t qidx) 125 { 126 return nic->reg_base + (qidx << NIC_Q_NUM_SHIFT); 127 } 128 129 static inline void 130 nicvf_queue_reg_write(struct nicvf *nic, uint32_t offset, uint32_t qidx, 131 uint64_t val) 132 { 133 nicvf_addr_write(nicvf_qset_base(nic, qidx) + offset, val); 134 } 135 136 static inline uint64_t 137 nicvf_queue_reg_read(struct nicvf *nic, uint32_t offset, uint32_t qidx) 138 { 139 return nicvf_addr_read(nicvf_qset_base(nic, qidx) + offset); 140 } 141 142 static inline void 143 nicvf_disable_all_interrupts(struct nicvf *nic) 144 { 145 nicvf_reg_write(nic, NIC_VF_ENA_W1C, NICVF_INTR_ALL_MASK); 146 nicvf_reg_write(nic, NIC_VF_INT, NICVF_INTR_ALL_MASK); 147 } 148 149 static inline uint32_t 150 nicvf_hw_version(struct nicvf *nic) 151 { 152 return nic->subsystem_device_id; 153 } 154 155 static inline uint64_t 156 nicvf_hw_cap(struct nicvf *nic) 157 { 158 return nic->hwcap; 159 } 160 161 int nicvf_base_init(struct nicvf *nic); 162 163 int nicvf_reg_get_count(void); 164 int nicvf_reg_poll_interrupts(struct nicvf *nic); 165 int nicvf_reg_dump(struct nicvf *nic, uint64_t *data); 166 167 int nicvf_qset_config(struct nicvf *nic); 168 int nicvf_qset_reclaim(struct nicvf *nic); 169 170 int nicvf_qset_rbdr_config(struct nicvf *nic, uint16_t qidx); 171 int nicvf_qset_rbdr_reclaim(struct nicvf *nic, uint16_t qidx); 172 int nicvf_qset_rbdr_precharge(void *dev, struct nicvf *nic, 173 uint16_t ridx, rbdr_pool_get_handler handler, 174 uint32_t max_buffs); 175 int nicvf_qset_rbdr_active(struct nicvf *nic, uint16_t qidx); 176 177 int nicvf_qset_rq_config(struct nicvf *nic, uint16_t qidx, 178 struct nicvf_rxq *rxq); 179 int nicvf_qset_rq_reclaim(struct nicvf *nic, uint16_t qidx); 180 181 int nicvf_qset_cq_config(struct nicvf *nic, uint16_t qidx, 182 struct nicvf_rxq *rxq); 183 int nicvf_qset_cq_reclaim(struct nicvf *nic, uint16_t qidx); 184 185 int nicvf_qset_sq_config(struct nicvf *nic, uint16_t qidx, 186 struct nicvf_txq *txq); 187 int nicvf_qset_sq_reclaim(struct nicvf *nic, uint16_t qidx); 188 189 uint32_t nicvf_qsize_rbdr_roundup(uint32_t val); 190 uint32_t nicvf_qsize_cq_roundup(uint32_t val); 191 uint32_t nicvf_qsize_sq_roundup(uint32_t val); 192 193 void nicvf_vlan_hw_strip(struct nicvf *nic, bool enable); 194 195 void nicvf_apad_config(struct nicvf *nic, bool enable); 196 void nicvf_first_skip_config(struct nicvf *nic, uint8_t dwords); 197 198 int nicvf_rss_config(struct nicvf *nic, uint32_t qcnt, uint64_t cfg); 199 int nicvf_rss_term(struct nicvf *nic); 200 201 int nicvf_rss_reta_update(struct nicvf *nic, uint8_t *tbl, uint32_t max_count); 202 int nicvf_rss_reta_query(struct nicvf *nic, uint8_t *tbl, uint32_t max_count); 203 204 void nicvf_rss_set_key(struct nicvf *nic, uint8_t *key); 205 void nicvf_rss_get_key(struct nicvf *nic, uint8_t *key); 206 207 void nicvf_rss_set_cfg(struct nicvf *nic, uint64_t val); 208 uint64_t nicvf_rss_get_cfg(struct nicvf *nic); 209 210 int nicvf_loopback_config(struct nicvf *nic, bool enable); 211 212 void nicvf_hw_get_stats(struct nicvf *nic, struct nicvf_hw_stats *stats); 213 void nicvf_hw_get_rx_qstats(struct nicvf *nic, 214 struct nicvf_hw_rx_qstats *qstats, uint16_t qidx); 215 void nicvf_hw_get_tx_qstats(struct nicvf *nic, 216 struct nicvf_hw_tx_qstats *qstats, uint16_t qidx); 217 218 #endif /* _THUNDERX_NICVF_HW_H */ 219