1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) 2016-2017 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * This software was jointly developed between OKTET Labs (under contract 8 * for Solarflare) and Solarflare Communications, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <rte_dev.h> 33 #include <rte_ethdev.h> 34 #include <rte_pci.h> 35 #include <rte_errno.h> 36 37 #include "efx.h" 38 39 #include "sfc.h" 40 #include "sfc_debug.h" 41 #include "sfc_log.h" 42 #include "sfc_kvargs.h" 43 #include "sfc_ev.h" 44 #include "sfc_rx.h" 45 #include "sfc_tx.h" 46 #include "sfc_flow.h" 47 #include "sfc_dp.h" 48 #include "sfc_dp_rx.h" 49 50 static struct sfc_dp_list sfc_dp_head = 51 TAILQ_HEAD_INITIALIZER(sfc_dp_head); 52 53 static int 54 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) 55 { 56 struct sfc_adapter *sa = dev->data->dev_private; 57 efx_nic_fw_info_t enfi; 58 int ret; 59 int rc; 60 61 /* 62 * Return value of the callback is likely supposed to be 63 * equal to or greater than 0, nevertheless, if an error 64 * occurs, it will be desirable to pass it to the caller 65 */ 66 if ((fw_version == NULL) || (fw_size == 0)) 67 return -EINVAL; 68 69 rc = efx_nic_get_fw_version(sa->nic, &enfi); 70 if (rc != 0) 71 return -rc; 72 73 ret = snprintf(fw_version, fw_size, 74 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16, 75 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1], 76 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]); 77 if (ret < 0) 78 return ret; 79 80 if (enfi.enfi_dpcpu_fw_ids_valid) { 81 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret); 82 int ret_extra; 83 84 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset, 85 fw_size - dpcpu_fw_ids_offset, 86 " rx%" PRIx16 " tx%" PRIx16, 87 enfi.enfi_rx_dpcpu_fw_id, 88 enfi.enfi_tx_dpcpu_fw_id); 89 if (ret_extra < 0) 90 return ret_extra; 91 92 ret += ret_extra; 93 } 94 95 if (fw_size < (size_t)(++ret)) 96 return ret; 97 else 98 return 0; 99 } 100 101 static void 102 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 103 { 104 struct sfc_adapter *sa = dev->data->dev_private; 105 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 106 107 sfc_log_init(sa, "entry"); 108 109 dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device); 110 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; 111 112 /* Autonegotiation may be disabled */ 113 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 114 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX) 115 dev_info->speed_capa |= ETH_LINK_SPEED_1G; 116 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX) 117 dev_info->speed_capa |= ETH_LINK_SPEED_10G; 118 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX) 119 dev_info->speed_capa |= ETH_LINK_SPEED_40G; 120 121 dev_info->max_rx_queues = sa->rxq_max; 122 dev_info->max_tx_queues = sa->txq_max; 123 124 /* By default packets are dropped if no descriptors are available */ 125 dev_info->default_rxconf.rx_drop_en = 1; 126 127 dev_info->rx_offload_capa = 128 DEV_RX_OFFLOAD_IPV4_CKSUM | 129 DEV_RX_OFFLOAD_UDP_CKSUM | 130 DEV_RX_OFFLOAD_TCP_CKSUM; 131 132 dev_info->tx_offload_capa = 133 DEV_TX_OFFLOAD_IPV4_CKSUM | 134 DEV_TX_OFFLOAD_UDP_CKSUM | 135 DEV_TX_OFFLOAD_TCP_CKSUM; 136 137 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP; 138 if (!encp->enc_hw_tx_insert_vlan_enabled) 139 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL; 140 else 141 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT; 142 143 #if EFSYS_OPT_RX_SCALE 144 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) { 145 dev_info->reta_size = EFX_RSS_TBL_SIZE; 146 dev_info->hash_key_size = SFC_RSS_KEY_SIZE; 147 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS; 148 } 149 #endif 150 151 if (sa->tso) 152 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO; 153 154 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS; 155 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS; 156 /* The RXQ hardware requires that the descriptor count is a power 157 * of 2, but rx_desc_lim cannot properly describe that constraint. 158 */ 159 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS; 160 161 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; 162 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS; 163 /* 164 * The TXQ hardware requires that the descriptor count is a power 165 * of 2, but tx_desc_lim cannot properly describe that constraint 166 */ 167 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS; 168 } 169 170 static const uint32_t * 171 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) 172 { 173 struct sfc_adapter *sa = dev->data->dev_private; 174 175 return sa->dp_rx->supported_ptypes_get(); 176 } 177 178 static int 179 sfc_dev_configure(struct rte_eth_dev *dev) 180 { 181 struct rte_eth_dev_data *dev_data = dev->data; 182 struct sfc_adapter *sa = dev_data->dev_private; 183 int rc; 184 185 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u", 186 dev_data->nb_rx_queues, dev_data->nb_tx_queues); 187 188 sfc_adapter_lock(sa); 189 switch (sa->state) { 190 case SFC_ADAPTER_CONFIGURED: 191 sfc_close(sa); 192 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED); 193 /* FALLTHROUGH */ 194 case SFC_ADAPTER_INITIALIZED: 195 rc = sfc_configure(sa); 196 break; 197 default: 198 sfc_err(sa, "unexpected adapter state %u to configure", 199 sa->state); 200 rc = EINVAL; 201 break; 202 } 203 sfc_adapter_unlock(sa); 204 205 sfc_log_init(sa, "done %d", rc); 206 SFC_ASSERT(rc >= 0); 207 return -rc; 208 } 209 210 static int 211 sfc_dev_start(struct rte_eth_dev *dev) 212 { 213 struct sfc_adapter *sa = dev->data->dev_private; 214 int rc; 215 216 sfc_log_init(sa, "entry"); 217 218 sfc_adapter_lock(sa); 219 rc = sfc_start(sa); 220 sfc_adapter_unlock(sa); 221 222 sfc_log_init(sa, "done %d", rc); 223 SFC_ASSERT(rc >= 0); 224 return -rc; 225 } 226 227 static int 228 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 229 { 230 struct sfc_adapter *sa = dev->data->dev_private; 231 struct rte_eth_link *dev_link = &dev->data->dev_link; 232 struct rte_eth_link old_link; 233 struct rte_eth_link current_link; 234 235 sfc_log_init(sa, "entry"); 236 237 retry: 238 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t)); 239 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link); 240 241 if (sa->state != SFC_ADAPTER_STARTED) { 242 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link); 243 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 244 *(uint64_t *)&old_link, 245 *(uint64_t *)¤t_link)) 246 goto retry; 247 } else if (wait_to_complete) { 248 efx_link_mode_t link_mode; 249 250 if (efx_port_poll(sa->nic, &link_mode) != 0) 251 link_mode = EFX_LINK_UNKNOWN; 252 sfc_port_link_mode_to_info(link_mode, ¤t_link); 253 254 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 255 *(uint64_t *)&old_link, 256 *(uint64_t *)¤t_link)) 257 goto retry; 258 } else { 259 sfc_ev_mgmt_qpoll(sa); 260 *(int64_t *)¤t_link = 261 rte_atomic64_read((rte_atomic64_t *)dev_link); 262 } 263 264 if (old_link.link_status != current_link.link_status) 265 sfc_info(sa, "Link status is %s", 266 current_link.link_status ? "UP" : "DOWN"); 267 268 return old_link.link_status == current_link.link_status ? 0 : -1; 269 } 270 271 static void 272 sfc_dev_stop(struct rte_eth_dev *dev) 273 { 274 struct sfc_adapter *sa = dev->data->dev_private; 275 276 sfc_log_init(sa, "entry"); 277 278 sfc_adapter_lock(sa); 279 sfc_stop(sa); 280 sfc_adapter_unlock(sa); 281 282 sfc_log_init(sa, "done"); 283 } 284 285 static int 286 sfc_dev_set_link_up(struct rte_eth_dev *dev) 287 { 288 struct sfc_adapter *sa = dev->data->dev_private; 289 int rc; 290 291 sfc_log_init(sa, "entry"); 292 293 sfc_adapter_lock(sa); 294 rc = sfc_start(sa); 295 sfc_adapter_unlock(sa); 296 297 SFC_ASSERT(rc >= 0); 298 return -rc; 299 } 300 301 static int 302 sfc_dev_set_link_down(struct rte_eth_dev *dev) 303 { 304 struct sfc_adapter *sa = dev->data->dev_private; 305 306 sfc_log_init(sa, "entry"); 307 308 sfc_adapter_lock(sa); 309 sfc_stop(sa); 310 sfc_adapter_unlock(sa); 311 312 return 0; 313 } 314 315 static void 316 sfc_dev_close(struct rte_eth_dev *dev) 317 { 318 struct sfc_adapter *sa = dev->data->dev_private; 319 320 sfc_log_init(sa, "entry"); 321 322 sfc_adapter_lock(sa); 323 switch (sa->state) { 324 case SFC_ADAPTER_STARTED: 325 sfc_stop(sa); 326 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED); 327 /* FALLTHROUGH */ 328 case SFC_ADAPTER_CONFIGURED: 329 sfc_close(sa); 330 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED); 331 /* FALLTHROUGH */ 332 case SFC_ADAPTER_INITIALIZED: 333 break; 334 default: 335 sfc_err(sa, "unexpected adapter state %u on close", sa->state); 336 break; 337 } 338 sfc_adapter_unlock(sa); 339 340 sfc_log_init(sa, "done"); 341 } 342 343 static void 344 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode, 345 boolean_t enabled) 346 { 347 struct sfc_port *port; 348 boolean_t *toggle; 349 struct sfc_adapter *sa = dev->data->dev_private; 350 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI); 351 const char *desc = (allmulti) ? "all-multi" : "promiscuous"; 352 353 sfc_adapter_lock(sa); 354 355 port = &sa->port; 356 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc); 357 358 if (*toggle != enabled) { 359 *toggle = enabled; 360 361 if ((sa->state == SFC_ADAPTER_STARTED) && 362 (sfc_set_rx_mode(sa) != 0)) { 363 *toggle = !(enabled); 364 sfc_warn(sa, "Failed to %s %s mode", 365 ((enabled) ? "enable" : "disable"), desc); 366 } 367 } 368 369 sfc_adapter_unlock(sa); 370 } 371 372 static void 373 sfc_dev_promisc_enable(struct rte_eth_dev *dev) 374 { 375 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE); 376 } 377 378 static void 379 sfc_dev_promisc_disable(struct rte_eth_dev *dev) 380 { 381 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE); 382 } 383 384 static void 385 sfc_dev_allmulti_enable(struct rte_eth_dev *dev) 386 { 387 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE); 388 } 389 390 static void 391 sfc_dev_allmulti_disable(struct rte_eth_dev *dev) 392 { 393 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE); 394 } 395 396 static int 397 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, 398 uint16_t nb_rx_desc, unsigned int socket_id, 399 const struct rte_eth_rxconf *rx_conf, 400 struct rte_mempool *mb_pool) 401 { 402 struct sfc_adapter *sa = dev->data->dev_private; 403 int rc; 404 405 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u", 406 rx_queue_id, nb_rx_desc, socket_id); 407 408 sfc_adapter_lock(sa); 409 410 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id, 411 rx_conf, mb_pool); 412 if (rc != 0) 413 goto fail_rx_qinit; 414 415 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq->dp; 416 417 sfc_adapter_unlock(sa); 418 419 return 0; 420 421 fail_rx_qinit: 422 sfc_adapter_unlock(sa); 423 SFC_ASSERT(rc > 0); 424 return -rc; 425 } 426 427 static void 428 sfc_rx_queue_release(void *queue) 429 { 430 struct sfc_dp_rxq *dp_rxq = queue; 431 struct sfc_rxq *rxq; 432 struct sfc_adapter *sa; 433 unsigned int sw_index; 434 435 if (dp_rxq == NULL) 436 return; 437 438 rxq = sfc_rxq_by_dp_rxq(dp_rxq); 439 sa = rxq->evq->sa; 440 sfc_adapter_lock(sa); 441 442 sw_index = sfc_rxq_sw_index(rxq); 443 444 sfc_log_init(sa, "RxQ=%u", sw_index); 445 446 sa->eth_dev->data->rx_queues[sw_index] = NULL; 447 448 sfc_rx_qfini(sa, sw_index); 449 450 sfc_adapter_unlock(sa); 451 } 452 453 static int 454 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, 455 uint16_t nb_tx_desc, unsigned int socket_id, 456 const struct rte_eth_txconf *tx_conf) 457 { 458 struct sfc_adapter *sa = dev->data->dev_private; 459 int rc; 460 461 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u", 462 tx_queue_id, nb_tx_desc, socket_id); 463 464 sfc_adapter_lock(sa); 465 466 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf); 467 if (rc != 0) 468 goto fail_tx_qinit; 469 470 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq; 471 472 sfc_adapter_unlock(sa); 473 return 0; 474 475 fail_tx_qinit: 476 sfc_adapter_unlock(sa); 477 SFC_ASSERT(rc > 0); 478 return -rc; 479 } 480 481 static void 482 sfc_tx_queue_release(void *queue) 483 { 484 struct sfc_txq *txq = queue; 485 unsigned int sw_index; 486 struct sfc_adapter *sa; 487 488 if (txq == NULL) 489 return; 490 491 sw_index = sfc_txq_sw_index(txq); 492 493 SFC_ASSERT(txq->evq != NULL); 494 sa = txq->evq->sa; 495 496 sfc_log_init(sa, "TxQ = %u", sw_index); 497 498 sfc_adapter_lock(sa); 499 500 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues); 501 sa->eth_dev->data->tx_queues[sw_index] = NULL; 502 503 sfc_tx_qfini(sa, sw_index); 504 505 sfc_adapter_unlock(sa); 506 } 507 508 static void 509 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 510 { 511 struct sfc_adapter *sa = dev->data->dev_private; 512 struct sfc_port *port = &sa->port; 513 uint64_t *mac_stats; 514 515 rte_spinlock_lock(&port->mac_stats_lock); 516 517 if (sfc_port_update_mac_stats(sa) != 0) 518 goto unlock; 519 520 mac_stats = port->mac_stats_buf; 521 522 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, 523 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) { 524 stats->ipackets = 525 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] + 526 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] + 527 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]; 528 stats->opackets = 529 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] + 530 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] + 531 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]; 532 stats->ibytes = 533 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] + 534 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] + 535 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]; 536 stats->obytes = 537 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] + 538 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] + 539 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; 540 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW]; 541 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; 542 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; 543 } else { 544 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS]; 545 stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; 546 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS]; 547 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS]; 548 /* 549 * Take into account stats which are whenever supported 550 * on EF10. If some stat is not supported by current 551 * firmware variant or HW revision, it is guaranteed 552 * to be zero in mac_stats. 553 */ 554 stats->imissed = 555 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] + 556 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] + 557 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] + 558 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] + 559 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] + 560 mac_stats[EFX_MAC_PM_TRUNC_QBB] + 561 mac_stats[EFX_MAC_PM_DISCARD_QBB] + 562 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] + 563 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] + 564 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS]; 565 stats->ierrors = 566 mac_stats[EFX_MAC_RX_FCS_ERRORS] + 567 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] + 568 mac_stats[EFX_MAC_RX_JABBER_PKTS]; 569 /* no oerrors counters supported on EF10 */ 570 } 571 572 unlock: 573 rte_spinlock_unlock(&port->mac_stats_lock); 574 } 575 576 static void 577 sfc_stats_reset(struct rte_eth_dev *dev) 578 { 579 struct sfc_adapter *sa = dev->data->dev_private; 580 struct sfc_port *port = &sa->port; 581 int rc; 582 583 if (sa->state != SFC_ADAPTER_STARTED) { 584 /* 585 * The operation cannot be done if port is not started; it 586 * will be scheduled to be done during the next port start 587 */ 588 port->mac_stats_reset_pending = B_TRUE; 589 return; 590 } 591 592 rc = sfc_port_reset_mac_stats(sa); 593 if (rc != 0) 594 sfc_err(sa, "failed to reset statistics (rc = %d)", rc); 595 } 596 597 static int 598 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 599 unsigned int xstats_count) 600 { 601 struct sfc_adapter *sa = dev->data->dev_private; 602 struct sfc_port *port = &sa->port; 603 uint64_t *mac_stats; 604 int rc; 605 unsigned int i; 606 int nstats = 0; 607 608 rte_spinlock_lock(&port->mac_stats_lock); 609 610 rc = sfc_port_update_mac_stats(sa); 611 if (rc != 0) { 612 SFC_ASSERT(rc > 0); 613 nstats = -rc; 614 goto unlock; 615 } 616 617 mac_stats = port->mac_stats_buf; 618 619 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 620 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 621 if (xstats != NULL && nstats < (int)xstats_count) { 622 xstats[nstats].id = nstats; 623 xstats[nstats].value = mac_stats[i]; 624 } 625 nstats++; 626 } 627 } 628 629 unlock: 630 rte_spinlock_unlock(&port->mac_stats_lock); 631 632 return nstats; 633 } 634 635 static int 636 sfc_xstats_get_names(struct rte_eth_dev *dev, 637 struct rte_eth_xstat_name *xstats_names, 638 unsigned int xstats_count) 639 { 640 struct sfc_adapter *sa = dev->data->dev_private; 641 struct sfc_port *port = &sa->port; 642 unsigned int i; 643 unsigned int nstats = 0; 644 645 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 646 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 647 if (xstats_names != NULL && nstats < xstats_count) 648 strncpy(xstats_names[nstats].name, 649 efx_mac_stat_name(sa->nic, i), 650 sizeof(xstats_names[0].name)); 651 nstats++; 652 } 653 } 654 655 return nstats; 656 } 657 658 static int 659 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 660 { 661 struct sfc_adapter *sa = dev->data->dev_private; 662 unsigned int wanted_fc, link_fc; 663 664 memset(fc_conf, 0, sizeof(*fc_conf)); 665 666 sfc_adapter_lock(sa); 667 668 if (sa->state == SFC_ADAPTER_STARTED) 669 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc); 670 else 671 link_fc = sa->port.flow_ctrl; 672 673 switch (link_fc) { 674 case 0: 675 fc_conf->mode = RTE_FC_NONE; 676 break; 677 case EFX_FCNTL_RESPOND: 678 fc_conf->mode = RTE_FC_RX_PAUSE; 679 break; 680 case EFX_FCNTL_GENERATE: 681 fc_conf->mode = RTE_FC_TX_PAUSE; 682 break; 683 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE): 684 fc_conf->mode = RTE_FC_FULL; 685 break; 686 default: 687 sfc_err(sa, "%s: unexpected flow control value %#x", 688 __func__, link_fc); 689 } 690 691 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; 692 693 sfc_adapter_unlock(sa); 694 695 return 0; 696 } 697 698 static int 699 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 700 { 701 struct sfc_adapter *sa = dev->data->dev_private; 702 struct sfc_port *port = &sa->port; 703 unsigned int fcntl; 704 int rc; 705 706 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || 707 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || 708 fc_conf->mac_ctrl_frame_fwd != 0) { 709 sfc_err(sa, "unsupported flow control settings specified"); 710 rc = EINVAL; 711 goto fail_inval; 712 } 713 714 switch (fc_conf->mode) { 715 case RTE_FC_NONE: 716 fcntl = 0; 717 break; 718 case RTE_FC_RX_PAUSE: 719 fcntl = EFX_FCNTL_RESPOND; 720 break; 721 case RTE_FC_TX_PAUSE: 722 fcntl = EFX_FCNTL_GENERATE; 723 break; 724 case RTE_FC_FULL: 725 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 726 break; 727 default: 728 rc = EINVAL; 729 goto fail_inval; 730 } 731 732 sfc_adapter_lock(sa); 733 734 if (sa->state == SFC_ADAPTER_STARTED) { 735 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg); 736 if (rc != 0) 737 goto fail_mac_fcntl_set; 738 } 739 740 port->flow_ctrl = fcntl; 741 port->flow_ctrl_autoneg = fc_conf->autoneg; 742 743 sfc_adapter_unlock(sa); 744 745 return 0; 746 747 fail_mac_fcntl_set: 748 sfc_adapter_unlock(sa); 749 fail_inval: 750 SFC_ASSERT(rc > 0); 751 return -rc; 752 } 753 754 static int 755 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 756 { 757 struct sfc_adapter *sa = dev->data->dev_private; 758 size_t pdu = EFX_MAC_PDU(mtu); 759 size_t old_pdu; 760 int rc; 761 762 sfc_log_init(sa, "mtu=%u", mtu); 763 764 rc = EINVAL; 765 if (pdu < EFX_MAC_PDU_MIN) { 766 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)", 767 (unsigned int)mtu, (unsigned int)pdu, 768 EFX_MAC_PDU_MIN); 769 goto fail_inval; 770 } 771 if (pdu > EFX_MAC_PDU_MAX) { 772 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)", 773 (unsigned int)mtu, (unsigned int)pdu, 774 EFX_MAC_PDU_MAX); 775 goto fail_inval; 776 } 777 778 sfc_adapter_lock(sa); 779 780 if (pdu != sa->port.pdu) { 781 if (sa->state == SFC_ADAPTER_STARTED) { 782 sfc_stop(sa); 783 784 old_pdu = sa->port.pdu; 785 sa->port.pdu = pdu; 786 rc = sfc_start(sa); 787 if (rc != 0) 788 goto fail_start; 789 } else { 790 sa->port.pdu = pdu; 791 } 792 } 793 794 /* 795 * The driver does not use it, but other PMDs update jumbo_frame 796 * flag and max_rx_pkt_len when MTU is set. 797 */ 798 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN); 799 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu; 800 801 sfc_adapter_unlock(sa); 802 803 sfc_log_init(sa, "done"); 804 return 0; 805 806 fail_start: 807 sa->port.pdu = old_pdu; 808 if (sfc_start(sa) != 0) 809 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) " 810 "PDU max size - port is stopped", 811 (unsigned int)pdu, (unsigned int)old_pdu); 812 sfc_adapter_unlock(sa); 813 814 fail_inval: 815 sfc_log_init(sa, "failed %d", rc); 816 SFC_ASSERT(rc > 0); 817 return -rc; 818 } 819 static void 820 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr) 821 { 822 struct sfc_adapter *sa = dev->data->dev_private; 823 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 824 int rc; 825 826 sfc_adapter_lock(sa); 827 828 if (sa->state != SFC_ADAPTER_STARTED) { 829 sfc_info(sa, "the port is not started"); 830 sfc_info(sa, "the new MAC address will be set on port start"); 831 832 goto unlock; 833 } 834 835 if (encp->enc_allow_set_mac_with_installed_filters) { 836 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes); 837 if (rc != 0) { 838 sfc_err(sa, "cannot set MAC address (rc = %u)", rc); 839 goto unlock; 840 } 841 842 /* 843 * Changing the MAC address by means of MCDI request 844 * has no effect on received traffic, therefore 845 * we also need to update unicast filters 846 */ 847 rc = sfc_set_rx_mode(sa); 848 if (rc != 0) 849 sfc_err(sa, "cannot set filter (rc = %u)", rc); 850 } else { 851 sfc_warn(sa, "cannot set MAC address with filters installed"); 852 sfc_warn(sa, "adapter will be restarted to pick the new MAC"); 853 sfc_warn(sa, "(some traffic may be dropped)"); 854 855 /* 856 * Since setting MAC address with filters installed is not 857 * allowed on the adapter, one needs to simply restart adapter 858 * so that the new MAC address will be taken from an outer 859 * storage and set flawlessly by means of sfc_start() call 860 */ 861 sfc_stop(sa); 862 rc = sfc_start(sa); 863 if (rc != 0) 864 sfc_err(sa, "cannot restart adapter (rc = %u)", rc); 865 } 866 867 unlock: 868 sfc_adapter_unlock(sa); 869 } 870 871 872 static int 873 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set, 874 uint32_t nb_mc_addr) 875 { 876 struct sfc_adapter *sa = dev->data->dev_private; 877 struct sfc_port *port = &sa->port; 878 uint8_t *mc_addrs = port->mcast_addrs; 879 int rc; 880 unsigned int i; 881 882 if (mc_addrs == NULL) 883 return -ENOBUFS; 884 885 if (nb_mc_addr > port->max_mcast_addrs) { 886 sfc_err(sa, "too many multicast addresses: %u > %u", 887 nb_mc_addr, port->max_mcast_addrs); 888 return -EINVAL; 889 } 890 891 for (i = 0; i < nb_mc_addr; ++i) { 892 (void)rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, 893 EFX_MAC_ADDR_LEN); 894 mc_addrs += EFX_MAC_ADDR_LEN; 895 } 896 897 port->nb_mcast_addrs = nb_mc_addr; 898 899 if (sa->state != SFC_ADAPTER_STARTED) 900 return 0; 901 902 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, 903 port->nb_mcast_addrs); 904 if (rc != 0) 905 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); 906 907 SFC_ASSERT(rc > 0); 908 return -rc; 909 } 910 911 static void 912 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id, 913 struct rte_eth_rxq_info *qinfo) 914 { 915 struct sfc_adapter *sa = dev->data->dev_private; 916 struct sfc_rxq_info *rxq_info; 917 struct sfc_rxq *rxq; 918 919 sfc_adapter_lock(sa); 920 921 SFC_ASSERT(rx_queue_id < sa->rxq_count); 922 923 rxq_info = &sa->rxq_info[rx_queue_id]; 924 rxq = rxq_info->rxq; 925 SFC_ASSERT(rxq != NULL); 926 927 qinfo->mp = rxq->refill_mb_pool; 928 qinfo->conf.rx_free_thresh = rxq->refill_threshold; 929 qinfo->conf.rx_drop_en = 1; 930 qinfo->conf.rx_deferred_start = rxq_info->deferred_start; 931 qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER); 932 qinfo->nb_desc = rxq_info->entries; 933 934 sfc_adapter_unlock(sa); 935 } 936 937 static void 938 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id, 939 struct rte_eth_txq_info *qinfo) 940 { 941 struct sfc_adapter *sa = dev->data->dev_private; 942 struct sfc_txq_info *txq_info; 943 944 sfc_adapter_lock(sa); 945 946 SFC_ASSERT(tx_queue_id < sa->txq_count); 947 948 txq_info = &sa->txq_info[tx_queue_id]; 949 SFC_ASSERT(txq_info->txq != NULL); 950 951 memset(qinfo, 0, sizeof(*qinfo)); 952 953 qinfo->conf.txq_flags = txq_info->txq->flags; 954 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh; 955 qinfo->conf.tx_deferred_start = txq_info->deferred_start; 956 qinfo->nb_desc = txq_info->entries; 957 958 sfc_adapter_unlock(sa); 959 } 960 961 static uint32_t 962 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) 963 { 964 struct sfc_adapter *sa = dev->data->dev_private; 965 966 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 967 968 return sfc_rx_qdesc_npending(sa, rx_queue_id); 969 } 970 971 static int 972 sfc_rx_descriptor_done(void *queue, uint16_t offset) 973 { 974 struct sfc_dp_rxq *dp_rxq = queue; 975 976 return sfc_rx_qdesc_done(dp_rxq, offset); 977 } 978 979 static int 980 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) 981 { 982 struct sfc_adapter *sa = dev->data->dev_private; 983 int rc; 984 985 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 986 987 sfc_adapter_lock(sa); 988 989 rc = EINVAL; 990 if (sa->state != SFC_ADAPTER_STARTED) 991 goto fail_not_started; 992 993 rc = sfc_rx_qstart(sa, rx_queue_id); 994 if (rc != 0) 995 goto fail_rx_qstart; 996 997 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE; 998 999 sfc_adapter_unlock(sa); 1000 1001 return 0; 1002 1003 fail_rx_qstart: 1004 fail_not_started: 1005 sfc_adapter_unlock(sa); 1006 SFC_ASSERT(rc > 0); 1007 return -rc; 1008 } 1009 1010 static int 1011 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) 1012 { 1013 struct sfc_adapter *sa = dev->data->dev_private; 1014 1015 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 1016 1017 sfc_adapter_lock(sa); 1018 sfc_rx_qstop(sa, rx_queue_id); 1019 1020 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE; 1021 1022 sfc_adapter_unlock(sa); 1023 1024 return 0; 1025 } 1026 1027 static int 1028 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1029 { 1030 struct sfc_adapter *sa = dev->data->dev_private; 1031 int rc; 1032 1033 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1034 1035 sfc_adapter_lock(sa); 1036 1037 rc = EINVAL; 1038 if (sa->state != SFC_ADAPTER_STARTED) 1039 goto fail_not_started; 1040 1041 rc = sfc_tx_qstart(sa, tx_queue_id); 1042 if (rc != 0) 1043 goto fail_tx_qstart; 1044 1045 sa->txq_info[tx_queue_id].deferred_started = B_TRUE; 1046 1047 sfc_adapter_unlock(sa); 1048 return 0; 1049 1050 fail_tx_qstart: 1051 1052 fail_not_started: 1053 sfc_adapter_unlock(sa); 1054 SFC_ASSERT(rc > 0); 1055 return -rc; 1056 } 1057 1058 static int 1059 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1060 { 1061 struct sfc_adapter *sa = dev->data->dev_private; 1062 1063 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1064 1065 sfc_adapter_lock(sa); 1066 1067 sfc_tx_qstop(sa, tx_queue_id); 1068 1069 sa->txq_info[tx_queue_id].deferred_started = B_FALSE; 1070 1071 sfc_adapter_unlock(sa); 1072 return 0; 1073 } 1074 1075 #if EFSYS_OPT_RX_SCALE 1076 static int 1077 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1078 struct rte_eth_rss_conf *rss_conf) 1079 { 1080 struct sfc_adapter *sa = dev->data->dev_private; 1081 1082 if ((sa->rss_channels == 1) || 1083 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) 1084 return -ENOTSUP; 1085 1086 sfc_adapter_lock(sa); 1087 1088 /* 1089 * Mapping of hash configuration between RTE and EFX is not one-to-one, 1090 * hence, conversion is done here to derive a correct set of ETH_RSS 1091 * flags which corresponds to the active EFX configuration stored 1092 * locally in 'sfc_adapter' and kept up-to-date 1093 */ 1094 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types); 1095 rss_conf->rss_key_len = SFC_RSS_KEY_SIZE; 1096 if (rss_conf->rss_key != NULL) 1097 rte_memcpy(rss_conf->rss_key, sa->rss_key, SFC_RSS_KEY_SIZE); 1098 1099 sfc_adapter_unlock(sa); 1100 1101 return 0; 1102 } 1103 1104 static int 1105 sfc_dev_rss_hash_update(struct rte_eth_dev *dev, 1106 struct rte_eth_rss_conf *rss_conf) 1107 { 1108 struct sfc_adapter *sa = dev->data->dev_private; 1109 unsigned int efx_hash_types; 1110 int rc = 0; 1111 1112 if ((sa->rss_channels == 1) || 1113 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) { 1114 sfc_err(sa, "RSS is not available"); 1115 return -ENOTSUP; 1116 } 1117 1118 if ((rss_conf->rss_key != NULL) && 1119 (rss_conf->rss_key_len != sizeof(sa->rss_key))) { 1120 sfc_err(sa, "RSS key size is wrong (should be %lu)", 1121 sizeof(sa->rss_key)); 1122 return -EINVAL; 1123 } 1124 1125 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) { 1126 sfc_err(sa, "unsupported hash functions requested"); 1127 return -EINVAL; 1128 } 1129 1130 sfc_adapter_lock(sa); 1131 1132 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf); 1133 1134 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, 1135 efx_hash_types, B_TRUE); 1136 if (rc != 0) 1137 goto fail_scale_mode_set; 1138 1139 if (rss_conf->rss_key != NULL) { 1140 if (sa->state == SFC_ADAPTER_STARTED) { 1141 rc = efx_rx_scale_key_set(sa->nic, rss_conf->rss_key, 1142 sizeof(sa->rss_key)); 1143 if (rc != 0) 1144 goto fail_scale_key_set; 1145 } 1146 1147 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key)); 1148 } 1149 1150 sa->rss_hash_types = efx_hash_types; 1151 1152 sfc_adapter_unlock(sa); 1153 1154 return 0; 1155 1156 fail_scale_key_set: 1157 if (efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, 1158 sa->rss_hash_types, B_TRUE) != 0) 1159 sfc_err(sa, "failed to restore RSS mode"); 1160 1161 fail_scale_mode_set: 1162 sfc_adapter_unlock(sa); 1163 return -rc; 1164 } 1165 1166 static int 1167 sfc_dev_rss_reta_query(struct rte_eth_dev *dev, 1168 struct rte_eth_rss_reta_entry64 *reta_conf, 1169 uint16_t reta_size) 1170 { 1171 struct sfc_adapter *sa = dev->data->dev_private; 1172 int entry; 1173 1174 if ((sa->rss_channels == 1) || 1175 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) 1176 return -ENOTSUP; 1177 1178 if (reta_size != EFX_RSS_TBL_SIZE) 1179 return -EINVAL; 1180 1181 sfc_adapter_lock(sa); 1182 1183 for (entry = 0; entry < reta_size; entry++) { 1184 int grp = entry / RTE_RETA_GROUP_SIZE; 1185 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1186 1187 if ((reta_conf[grp].mask >> grp_idx) & 1) 1188 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry]; 1189 } 1190 1191 sfc_adapter_unlock(sa); 1192 1193 return 0; 1194 } 1195 1196 static int 1197 sfc_dev_rss_reta_update(struct rte_eth_dev *dev, 1198 struct rte_eth_rss_reta_entry64 *reta_conf, 1199 uint16_t reta_size) 1200 { 1201 struct sfc_adapter *sa = dev->data->dev_private; 1202 unsigned int *rss_tbl_new; 1203 uint16_t entry; 1204 int rc; 1205 1206 1207 if ((sa->rss_channels == 1) || 1208 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) { 1209 sfc_err(sa, "RSS is not available"); 1210 return -ENOTSUP; 1211 } 1212 1213 if (reta_size != EFX_RSS_TBL_SIZE) { 1214 sfc_err(sa, "RETA size is wrong (should be %u)", 1215 EFX_RSS_TBL_SIZE); 1216 return -EINVAL; 1217 } 1218 1219 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0); 1220 if (rss_tbl_new == NULL) 1221 return -ENOMEM; 1222 1223 sfc_adapter_lock(sa); 1224 1225 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl)); 1226 1227 for (entry = 0; entry < reta_size; entry++) { 1228 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1229 struct rte_eth_rss_reta_entry64 *grp; 1230 1231 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE]; 1232 1233 if (grp->mask & (1ull << grp_idx)) { 1234 if (grp->reta[grp_idx] >= sa->rss_channels) { 1235 rc = EINVAL; 1236 goto bad_reta_entry; 1237 } 1238 rss_tbl_new[entry] = grp->reta[grp_idx]; 1239 } 1240 } 1241 1242 rc = efx_rx_scale_tbl_set(sa->nic, rss_tbl_new, EFX_RSS_TBL_SIZE); 1243 if (rc == 0) 1244 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl)); 1245 1246 bad_reta_entry: 1247 sfc_adapter_unlock(sa); 1248 1249 rte_free(rss_tbl_new); 1250 1251 SFC_ASSERT(rc >= 0); 1252 return -rc; 1253 } 1254 #endif 1255 1256 static int 1257 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type, 1258 enum rte_filter_op filter_op, 1259 void *arg) 1260 { 1261 struct sfc_adapter *sa = dev->data->dev_private; 1262 int rc = ENOTSUP; 1263 1264 sfc_log_init(sa, "entry"); 1265 1266 switch (filter_type) { 1267 case RTE_ETH_FILTER_NONE: 1268 sfc_err(sa, "Global filters configuration not supported"); 1269 break; 1270 case RTE_ETH_FILTER_MACVLAN: 1271 sfc_err(sa, "MACVLAN filters not supported"); 1272 break; 1273 case RTE_ETH_FILTER_ETHERTYPE: 1274 sfc_err(sa, "EtherType filters not supported"); 1275 break; 1276 case RTE_ETH_FILTER_FLEXIBLE: 1277 sfc_err(sa, "Flexible filters not supported"); 1278 break; 1279 case RTE_ETH_FILTER_SYN: 1280 sfc_err(sa, "SYN filters not supported"); 1281 break; 1282 case RTE_ETH_FILTER_NTUPLE: 1283 sfc_err(sa, "NTUPLE filters not supported"); 1284 break; 1285 case RTE_ETH_FILTER_TUNNEL: 1286 sfc_err(sa, "Tunnel filters not supported"); 1287 break; 1288 case RTE_ETH_FILTER_FDIR: 1289 sfc_err(sa, "Flow Director filters not supported"); 1290 break; 1291 case RTE_ETH_FILTER_HASH: 1292 sfc_err(sa, "Hash filters not supported"); 1293 break; 1294 case RTE_ETH_FILTER_GENERIC: 1295 if (filter_op != RTE_ETH_FILTER_GET) { 1296 rc = EINVAL; 1297 } else { 1298 *(const void **)arg = &sfc_flow_ops; 1299 rc = 0; 1300 } 1301 break; 1302 default: 1303 sfc_err(sa, "Unknown filter type %u", filter_type); 1304 break; 1305 } 1306 1307 sfc_log_init(sa, "exit: %d", -rc); 1308 SFC_ASSERT(rc >= 0); 1309 return -rc; 1310 } 1311 1312 static const struct eth_dev_ops sfc_eth_dev_ops = { 1313 .dev_configure = sfc_dev_configure, 1314 .dev_start = sfc_dev_start, 1315 .dev_stop = sfc_dev_stop, 1316 .dev_set_link_up = sfc_dev_set_link_up, 1317 .dev_set_link_down = sfc_dev_set_link_down, 1318 .dev_close = sfc_dev_close, 1319 .promiscuous_enable = sfc_dev_promisc_enable, 1320 .promiscuous_disable = sfc_dev_promisc_disable, 1321 .allmulticast_enable = sfc_dev_allmulti_enable, 1322 .allmulticast_disable = sfc_dev_allmulti_disable, 1323 .link_update = sfc_dev_link_update, 1324 .stats_get = sfc_stats_get, 1325 .stats_reset = sfc_stats_reset, 1326 .xstats_get = sfc_xstats_get, 1327 .xstats_reset = sfc_stats_reset, 1328 .xstats_get_names = sfc_xstats_get_names, 1329 .dev_infos_get = sfc_dev_infos_get, 1330 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 1331 .mtu_set = sfc_dev_set_mtu, 1332 .rx_queue_start = sfc_rx_queue_start, 1333 .rx_queue_stop = sfc_rx_queue_stop, 1334 .tx_queue_start = sfc_tx_queue_start, 1335 .tx_queue_stop = sfc_tx_queue_stop, 1336 .rx_queue_setup = sfc_rx_queue_setup, 1337 .rx_queue_release = sfc_rx_queue_release, 1338 .rx_queue_count = sfc_rx_queue_count, 1339 .rx_descriptor_done = sfc_rx_descriptor_done, 1340 .tx_queue_setup = sfc_tx_queue_setup, 1341 .tx_queue_release = sfc_tx_queue_release, 1342 .flow_ctrl_get = sfc_flow_ctrl_get, 1343 .flow_ctrl_set = sfc_flow_ctrl_set, 1344 .mac_addr_set = sfc_mac_addr_set, 1345 #if EFSYS_OPT_RX_SCALE 1346 .reta_update = sfc_dev_rss_reta_update, 1347 .reta_query = sfc_dev_rss_reta_query, 1348 .rss_hash_update = sfc_dev_rss_hash_update, 1349 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 1350 #endif 1351 .filter_ctrl = sfc_dev_filter_ctrl, 1352 .set_mc_addr_list = sfc_set_mc_addr_list, 1353 .rxq_info_get = sfc_rx_queue_info_get, 1354 .txq_info_get = sfc_tx_queue_info_get, 1355 .fw_version_get = sfc_fw_version_get, 1356 }; 1357 1358 static int 1359 sfc_eth_dev_set_ops(struct rte_eth_dev *dev) 1360 { 1361 struct sfc_adapter *sa = dev->data->dev_private; 1362 unsigned int avail_caps = 0; 1363 const char *rx_name = NULL; 1364 int rc; 1365 1366 if (sa == NULL || sa->state == SFC_ADAPTER_UNINITIALIZED) 1367 return -E_RTE_SECONDARY; 1368 1369 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH, 1370 sfc_kvarg_string_handler, &rx_name); 1371 if (rc != 0) 1372 goto fail_kvarg_rx_datapath; 1373 1374 if (rx_name != NULL) { 1375 sa->dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name); 1376 if (sa->dp_rx == NULL) { 1377 sfc_err(sa, "Rx datapath %s not found", rx_name); 1378 rc = ENOENT; 1379 goto fail_dp_rx; 1380 } 1381 if (!sfc_dp_match_hw_fw_caps(&sa->dp_rx->dp, avail_caps)) { 1382 sfc_err(sa, 1383 "Insufficient Hw/FW capabilities to use Rx datapath %s", 1384 rx_name); 1385 rc = EINVAL; 1386 goto fail_dp_rx; 1387 } 1388 } else { 1389 sa->dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps); 1390 if (sa->dp_rx == NULL) { 1391 sfc_err(sa, "Rx datapath by caps %#x not found", 1392 avail_caps); 1393 rc = ENOENT; 1394 goto fail_dp_rx; 1395 } 1396 } 1397 1398 sfc_info(sa, "use %s Rx datapath", sa->dp_rx->dp.name); 1399 1400 dev->rx_pkt_burst = sa->dp_rx->pkt_burst; 1401 1402 dev->tx_pkt_burst = sfc_xmit_pkts; 1403 1404 dev->dev_ops = &sfc_eth_dev_ops; 1405 1406 return 0; 1407 1408 fail_dp_rx: 1409 fail_kvarg_rx_datapath: 1410 return rc; 1411 } 1412 1413 static void 1414 sfc_register_dp(void) 1415 { 1416 /* Register once */ 1417 if (TAILQ_EMPTY(&sfc_dp_head)) 1418 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); 1419 } 1420 1421 static int 1422 sfc_eth_dev_init(struct rte_eth_dev *dev) 1423 { 1424 struct sfc_adapter *sa = dev->data->dev_private; 1425 struct rte_pci_device *pci_dev = SFC_DEV_TO_PCI(dev); 1426 int rc; 1427 const efx_nic_cfg_t *encp; 1428 const struct ether_addr *from; 1429 1430 sfc_register_dp(); 1431 1432 /* Required for logging */ 1433 sa->eth_dev = dev; 1434 1435 /* Copy PCI device info to the dev->data */ 1436 rte_eth_copy_pci_info(dev, pci_dev); 1437 1438 rc = sfc_kvargs_parse(sa); 1439 if (rc != 0) 1440 goto fail_kvargs_parse; 1441 1442 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT, 1443 sfc_kvarg_bool_handler, &sa->debug_init); 1444 if (rc != 0) 1445 goto fail_kvarg_debug_init; 1446 1447 sfc_log_init(sa, "entry"); 1448 1449 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0); 1450 if (dev->data->mac_addrs == NULL) { 1451 rc = ENOMEM; 1452 goto fail_mac_addrs; 1453 } 1454 1455 sfc_adapter_lock_init(sa); 1456 sfc_adapter_lock(sa); 1457 1458 sfc_log_init(sa, "attaching"); 1459 rc = sfc_attach(sa); 1460 if (rc != 0) 1461 goto fail_attach; 1462 1463 encp = efx_nic_cfg_get(sa->nic); 1464 1465 /* 1466 * The arguments are really reverse order in comparison to 1467 * Linux kernel. Copy from NIC config to Ethernet device data. 1468 */ 1469 from = (const struct ether_addr *)(encp->enc_mac_addr); 1470 ether_addr_copy(from, &dev->data->mac_addrs[0]); 1471 1472 sfc_adapter_unlock(sa); 1473 1474 sfc_eth_dev_set_ops(dev); 1475 1476 sfc_log_init(sa, "done"); 1477 return 0; 1478 1479 fail_attach: 1480 sfc_adapter_unlock(sa); 1481 sfc_adapter_lock_fini(sa); 1482 rte_free(dev->data->mac_addrs); 1483 dev->data->mac_addrs = NULL; 1484 1485 fail_mac_addrs: 1486 fail_kvarg_debug_init: 1487 sfc_kvargs_cleanup(sa); 1488 1489 fail_kvargs_parse: 1490 sfc_log_init(sa, "failed %d", rc); 1491 SFC_ASSERT(rc > 0); 1492 return -rc; 1493 } 1494 1495 static int 1496 sfc_eth_dev_uninit(struct rte_eth_dev *dev) 1497 { 1498 struct sfc_adapter *sa = dev->data->dev_private; 1499 1500 sfc_log_init(sa, "entry"); 1501 1502 sfc_adapter_lock(sa); 1503 1504 sfc_detach(sa); 1505 1506 rte_free(dev->data->mac_addrs); 1507 dev->data->mac_addrs = NULL; 1508 1509 dev->dev_ops = NULL; 1510 dev->rx_pkt_burst = NULL; 1511 dev->tx_pkt_burst = NULL; 1512 1513 sfc_kvargs_cleanup(sa); 1514 1515 sfc_adapter_unlock(sa); 1516 sfc_adapter_lock_fini(sa); 1517 1518 sfc_log_init(sa, "done"); 1519 1520 /* Required for logging, so cleanup last */ 1521 sa->eth_dev = NULL; 1522 return 0; 1523 } 1524 1525 static const struct rte_pci_id pci_id_sfc_efx_map[] = { 1526 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, 1527 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, 1528 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, 1529 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, 1530 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, 1531 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, 1532 { .vendor_id = 0 /* sentinel */ } 1533 }; 1534 1535 static struct eth_driver sfc_efx_pmd = { 1536 .pci_drv = { 1537 .id_table = pci_id_sfc_efx_map, 1538 .drv_flags = 1539 RTE_PCI_DRV_INTR_LSC | 1540 RTE_PCI_DRV_NEED_MAPPING, 1541 .probe = rte_eth_dev_pci_probe, 1542 .remove = rte_eth_dev_pci_remove, 1543 }, 1544 .eth_dev_init = sfc_eth_dev_init, 1545 .eth_dev_uninit = sfc_eth_dev_uninit, 1546 .dev_private_size = sizeof(struct sfc_adapter), 1547 }; 1548 1549 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd.pci_drv); 1550 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); 1551 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio"); 1552 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, 1553 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " " 1554 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " 1555 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> " 1556 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " " 1557 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL); 1558