1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) 2016-2017 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * This software was jointly developed between OKTET Labs (under contract 8 * for Solarflare) and Solarflare Communications, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <rte_dev.h> 33 #include <rte_ethdev.h> 34 #include <rte_pci.h> 35 #include <rte_errno.h> 36 37 #include "efx.h" 38 39 #include "sfc.h" 40 #include "sfc_debug.h" 41 #include "sfc_log.h" 42 #include "sfc_kvargs.h" 43 #include "sfc_ev.h" 44 #include "sfc_rx.h" 45 #include "sfc_tx.h" 46 #include "sfc_flow.h" 47 #include "sfc_dp.h" 48 #include "sfc_dp_rx.h" 49 50 static struct sfc_dp_list sfc_dp_head = 51 TAILQ_HEAD_INITIALIZER(sfc_dp_head); 52 53 static int 54 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) 55 { 56 struct sfc_adapter *sa = dev->data->dev_private; 57 efx_nic_fw_info_t enfi; 58 int ret; 59 int rc; 60 61 /* 62 * Return value of the callback is likely supposed to be 63 * equal to or greater than 0, nevertheless, if an error 64 * occurs, it will be desirable to pass it to the caller 65 */ 66 if ((fw_version == NULL) || (fw_size == 0)) 67 return -EINVAL; 68 69 rc = efx_nic_get_fw_version(sa->nic, &enfi); 70 if (rc != 0) 71 return -rc; 72 73 ret = snprintf(fw_version, fw_size, 74 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16, 75 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1], 76 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]); 77 if (ret < 0) 78 return ret; 79 80 if (enfi.enfi_dpcpu_fw_ids_valid) { 81 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret); 82 int ret_extra; 83 84 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset, 85 fw_size - dpcpu_fw_ids_offset, 86 " rx%" PRIx16 " tx%" PRIx16, 87 enfi.enfi_rx_dpcpu_fw_id, 88 enfi.enfi_tx_dpcpu_fw_id); 89 if (ret_extra < 0) 90 return ret_extra; 91 92 ret += ret_extra; 93 } 94 95 if (fw_size < (size_t)(++ret)) 96 return ret; 97 else 98 return 0; 99 } 100 101 static void 102 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 103 { 104 struct sfc_adapter *sa = dev->data->dev_private; 105 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 106 107 sfc_log_init(sa, "entry"); 108 109 dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device); 110 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; 111 112 /* Autonegotiation may be disabled */ 113 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 114 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX) 115 dev_info->speed_capa |= ETH_LINK_SPEED_1G; 116 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX) 117 dev_info->speed_capa |= ETH_LINK_SPEED_10G; 118 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX) 119 dev_info->speed_capa |= ETH_LINK_SPEED_40G; 120 121 dev_info->max_rx_queues = sa->rxq_max; 122 dev_info->max_tx_queues = sa->txq_max; 123 124 /* By default packets are dropped if no descriptors are available */ 125 dev_info->default_rxconf.rx_drop_en = 1; 126 127 dev_info->rx_offload_capa = 128 DEV_RX_OFFLOAD_IPV4_CKSUM | 129 DEV_RX_OFFLOAD_UDP_CKSUM | 130 DEV_RX_OFFLOAD_TCP_CKSUM; 131 132 dev_info->tx_offload_capa = 133 DEV_TX_OFFLOAD_IPV4_CKSUM | 134 DEV_TX_OFFLOAD_UDP_CKSUM | 135 DEV_TX_OFFLOAD_TCP_CKSUM; 136 137 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP; 138 if (!encp->enc_hw_tx_insert_vlan_enabled) 139 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL; 140 else 141 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT; 142 143 #if EFSYS_OPT_RX_SCALE 144 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) { 145 dev_info->reta_size = EFX_RSS_TBL_SIZE; 146 dev_info->hash_key_size = SFC_RSS_KEY_SIZE; 147 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS; 148 } 149 #endif 150 151 if (sa->tso) 152 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO; 153 154 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS; 155 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS; 156 /* The RXQ hardware requires that the descriptor count is a power 157 * of 2, but rx_desc_lim cannot properly describe that constraint. 158 */ 159 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS; 160 161 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; 162 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS; 163 /* 164 * The TXQ hardware requires that the descriptor count is a power 165 * of 2, but tx_desc_lim cannot properly describe that constraint 166 */ 167 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS; 168 } 169 170 static const uint32_t * 171 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) 172 { 173 struct sfc_adapter *sa = dev->data->dev_private; 174 175 return sa->dp_rx->supported_ptypes_get(); 176 } 177 178 static int 179 sfc_dev_configure(struct rte_eth_dev *dev) 180 { 181 struct rte_eth_dev_data *dev_data = dev->data; 182 struct sfc_adapter *sa = dev_data->dev_private; 183 int rc; 184 185 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u", 186 dev_data->nb_rx_queues, dev_data->nb_tx_queues); 187 188 sfc_adapter_lock(sa); 189 switch (sa->state) { 190 case SFC_ADAPTER_CONFIGURED: 191 sfc_close(sa); 192 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED); 193 /* FALLTHROUGH */ 194 case SFC_ADAPTER_INITIALIZED: 195 rc = sfc_configure(sa); 196 break; 197 default: 198 sfc_err(sa, "unexpected adapter state %u to configure", 199 sa->state); 200 rc = EINVAL; 201 break; 202 } 203 sfc_adapter_unlock(sa); 204 205 sfc_log_init(sa, "done %d", rc); 206 SFC_ASSERT(rc >= 0); 207 return -rc; 208 } 209 210 static int 211 sfc_dev_start(struct rte_eth_dev *dev) 212 { 213 struct sfc_adapter *sa = dev->data->dev_private; 214 int rc; 215 216 sfc_log_init(sa, "entry"); 217 218 sfc_adapter_lock(sa); 219 rc = sfc_start(sa); 220 sfc_adapter_unlock(sa); 221 222 sfc_log_init(sa, "done %d", rc); 223 SFC_ASSERT(rc >= 0); 224 return -rc; 225 } 226 227 static int 228 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 229 { 230 struct sfc_adapter *sa = dev->data->dev_private; 231 struct rte_eth_link *dev_link = &dev->data->dev_link; 232 struct rte_eth_link old_link; 233 struct rte_eth_link current_link; 234 235 sfc_log_init(sa, "entry"); 236 237 retry: 238 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t)); 239 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link); 240 241 if (sa->state != SFC_ADAPTER_STARTED) { 242 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link); 243 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 244 *(uint64_t *)&old_link, 245 *(uint64_t *)¤t_link)) 246 goto retry; 247 } else if (wait_to_complete) { 248 efx_link_mode_t link_mode; 249 250 if (efx_port_poll(sa->nic, &link_mode) != 0) 251 link_mode = EFX_LINK_UNKNOWN; 252 sfc_port_link_mode_to_info(link_mode, ¤t_link); 253 254 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 255 *(uint64_t *)&old_link, 256 *(uint64_t *)¤t_link)) 257 goto retry; 258 } else { 259 sfc_ev_mgmt_qpoll(sa); 260 *(int64_t *)¤t_link = 261 rte_atomic64_read((rte_atomic64_t *)dev_link); 262 } 263 264 if (old_link.link_status != current_link.link_status) 265 sfc_info(sa, "Link status is %s", 266 current_link.link_status ? "UP" : "DOWN"); 267 268 return old_link.link_status == current_link.link_status ? 0 : -1; 269 } 270 271 static void 272 sfc_dev_stop(struct rte_eth_dev *dev) 273 { 274 struct sfc_adapter *sa = dev->data->dev_private; 275 276 sfc_log_init(sa, "entry"); 277 278 sfc_adapter_lock(sa); 279 sfc_stop(sa); 280 sfc_adapter_unlock(sa); 281 282 sfc_log_init(sa, "done"); 283 } 284 285 static int 286 sfc_dev_set_link_up(struct rte_eth_dev *dev) 287 { 288 struct sfc_adapter *sa = dev->data->dev_private; 289 int rc; 290 291 sfc_log_init(sa, "entry"); 292 293 sfc_adapter_lock(sa); 294 rc = sfc_start(sa); 295 sfc_adapter_unlock(sa); 296 297 SFC_ASSERT(rc >= 0); 298 return -rc; 299 } 300 301 static int 302 sfc_dev_set_link_down(struct rte_eth_dev *dev) 303 { 304 struct sfc_adapter *sa = dev->data->dev_private; 305 306 sfc_log_init(sa, "entry"); 307 308 sfc_adapter_lock(sa); 309 sfc_stop(sa); 310 sfc_adapter_unlock(sa); 311 312 return 0; 313 } 314 315 static void 316 sfc_dev_close(struct rte_eth_dev *dev) 317 { 318 struct sfc_adapter *sa = dev->data->dev_private; 319 320 sfc_log_init(sa, "entry"); 321 322 sfc_adapter_lock(sa); 323 switch (sa->state) { 324 case SFC_ADAPTER_STARTED: 325 sfc_stop(sa); 326 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED); 327 /* FALLTHROUGH */ 328 case SFC_ADAPTER_CONFIGURED: 329 sfc_close(sa); 330 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED); 331 /* FALLTHROUGH */ 332 case SFC_ADAPTER_INITIALIZED: 333 break; 334 default: 335 sfc_err(sa, "unexpected adapter state %u on close", sa->state); 336 break; 337 } 338 sfc_adapter_unlock(sa); 339 340 sfc_log_init(sa, "done"); 341 } 342 343 static void 344 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode, 345 boolean_t enabled) 346 { 347 struct sfc_port *port; 348 boolean_t *toggle; 349 struct sfc_adapter *sa = dev->data->dev_private; 350 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI); 351 const char *desc = (allmulti) ? "all-multi" : "promiscuous"; 352 353 sfc_adapter_lock(sa); 354 355 port = &sa->port; 356 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc); 357 358 if (*toggle != enabled) { 359 *toggle = enabled; 360 361 if ((sa->state == SFC_ADAPTER_STARTED) && 362 (sfc_set_rx_mode(sa) != 0)) { 363 *toggle = !(enabled); 364 sfc_warn(sa, "Failed to %s %s mode", 365 ((enabled) ? "enable" : "disable"), desc); 366 } 367 } 368 369 sfc_adapter_unlock(sa); 370 } 371 372 static void 373 sfc_dev_promisc_enable(struct rte_eth_dev *dev) 374 { 375 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE); 376 } 377 378 static void 379 sfc_dev_promisc_disable(struct rte_eth_dev *dev) 380 { 381 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE); 382 } 383 384 static void 385 sfc_dev_allmulti_enable(struct rte_eth_dev *dev) 386 { 387 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE); 388 } 389 390 static void 391 sfc_dev_allmulti_disable(struct rte_eth_dev *dev) 392 { 393 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE); 394 } 395 396 static int 397 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, 398 uint16_t nb_rx_desc, unsigned int socket_id, 399 const struct rte_eth_rxconf *rx_conf, 400 struct rte_mempool *mb_pool) 401 { 402 struct sfc_adapter *sa = dev->data->dev_private; 403 int rc; 404 405 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u", 406 rx_queue_id, nb_rx_desc, socket_id); 407 408 sfc_adapter_lock(sa); 409 410 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id, 411 rx_conf, mb_pool); 412 if (rc != 0) 413 goto fail_rx_qinit; 414 415 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq->dp; 416 417 sfc_adapter_unlock(sa); 418 419 return 0; 420 421 fail_rx_qinit: 422 sfc_adapter_unlock(sa); 423 SFC_ASSERT(rc > 0); 424 return -rc; 425 } 426 427 static void 428 sfc_rx_queue_release(void *queue) 429 { 430 struct sfc_dp_rxq *dp_rxq = queue; 431 struct sfc_rxq *rxq; 432 struct sfc_adapter *sa; 433 unsigned int sw_index; 434 435 if (dp_rxq == NULL) 436 return; 437 438 rxq = sfc_rxq_by_dp_rxq(dp_rxq); 439 sa = rxq->evq->sa; 440 sfc_adapter_lock(sa); 441 442 sw_index = sfc_rxq_sw_index(rxq); 443 444 sfc_log_init(sa, "RxQ=%u", sw_index); 445 446 sa->eth_dev->data->rx_queues[sw_index] = NULL; 447 448 sfc_rx_qfini(sa, sw_index); 449 450 sfc_adapter_unlock(sa); 451 } 452 453 static int 454 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, 455 uint16_t nb_tx_desc, unsigned int socket_id, 456 const struct rte_eth_txconf *tx_conf) 457 { 458 struct sfc_adapter *sa = dev->data->dev_private; 459 int rc; 460 461 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u", 462 tx_queue_id, nb_tx_desc, socket_id); 463 464 sfc_adapter_lock(sa); 465 466 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf); 467 if (rc != 0) 468 goto fail_tx_qinit; 469 470 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq->dp; 471 472 sfc_adapter_unlock(sa); 473 return 0; 474 475 fail_tx_qinit: 476 sfc_adapter_unlock(sa); 477 SFC_ASSERT(rc > 0); 478 return -rc; 479 } 480 481 static void 482 sfc_tx_queue_release(void *queue) 483 { 484 struct sfc_dp_txq *dp_txq = queue; 485 struct sfc_txq *txq; 486 unsigned int sw_index; 487 struct sfc_adapter *sa; 488 489 if (dp_txq == NULL) 490 return; 491 492 txq = sfc_txq_by_dp_txq(dp_txq); 493 sw_index = sfc_txq_sw_index(txq); 494 495 SFC_ASSERT(txq->evq != NULL); 496 sa = txq->evq->sa; 497 498 sfc_log_init(sa, "TxQ = %u", sw_index); 499 500 sfc_adapter_lock(sa); 501 502 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues); 503 sa->eth_dev->data->tx_queues[sw_index] = NULL; 504 505 sfc_tx_qfini(sa, sw_index); 506 507 sfc_adapter_unlock(sa); 508 } 509 510 static void 511 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 512 { 513 struct sfc_adapter *sa = dev->data->dev_private; 514 struct sfc_port *port = &sa->port; 515 uint64_t *mac_stats; 516 517 rte_spinlock_lock(&port->mac_stats_lock); 518 519 if (sfc_port_update_mac_stats(sa) != 0) 520 goto unlock; 521 522 mac_stats = port->mac_stats_buf; 523 524 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, 525 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) { 526 stats->ipackets = 527 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] + 528 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] + 529 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]; 530 stats->opackets = 531 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] + 532 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] + 533 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]; 534 stats->ibytes = 535 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] + 536 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] + 537 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]; 538 stats->obytes = 539 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] + 540 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] + 541 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; 542 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW]; 543 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; 544 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; 545 } else { 546 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS]; 547 stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; 548 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS]; 549 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS]; 550 /* 551 * Take into account stats which are whenever supported 552 * on EF10. If some stat is not supported by current 553 * firmware variant or HW revision, it is guaranteed 554 * to be zero in mac_stats. 555 */ 556 stats->imissed = 557 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] + 558 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] + 559 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] + 560 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] + 561 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] + 562 mac_stats[EFX_MAC_PM_TRUNC_QBB] + 563 mac_stats[EFX_MAC_PM_DISCARD_QBB] + 564 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] + 565 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] + 566 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS]; 567 stats->ierrors = 568 mac_stats[EFX_MAC_RX_FCS_ERRORS] + 569 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] + 570 mac_stats[EFX_MAC_RX_JABBER_PKTS]; 571 /* no oerrors counters supported on EF10 */ 572 } 573 574 unlock: 575 rte_spinlock_unlock(&port->mac_stats_lock); 576 } 577 578 static void 579 sfc_stats_reset(struct rte_eth_dev *dev) 580 { 581 struct sfc_adapter *sa = dev->data->dev_private; 582 struct sfc_port *port = &sa->port; 583 int rc; 584 585 if (sa->state != SFC_ADAPTER_STARTED) { 586 /* 587 * The operation cannot be done if port is not started; it 588 * will be scheduled to be done during the next port start 589 */ 590 port->mac_stats_reset_pending = B_TRUE; 591 return; 592 } 593 594 rc = sfc_port_reset_mac_stats(sa); 595 if (rc != 0) 596 sfc_err(sa, "failed to reset statistics (rc = %d)", rc); 597 } 598 599 static int 600 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 601 unsigned int xstats_count) 602 { 603 struct sfc_adapter *sa = dev->data->dev_private; 604 struct sfc_port *port = &sa->port; 605 uint64_t *mac_stats; 606 int rc; 607 unsigned int i; 608 int nstats = 0; 609 610 rte_spinlock_lock(&port->mac_stats_lock); 611 612 rc = sfc_port_update_mac_stats(sa); 613 if (rc != 0) { 614 SFC_ASSERT(rc > 0); 615 nstats = -rc; 616 goto unlock; 617 } 618 619 mac_stats = port->mac_stats_buf; 620 621 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 622 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 623 if (xstats != NULL && nstats < (int)xstats_count) { 624 xstats[nstats].id = nstats; 625 xstats[nstats].value = mac_stats[i]; 626 } 627 nstats++; 628 } 629 } 630 631 unlock: 632 rte_spinlock_unlock(&port->mac_stats_lock); 633 634 return nstats; 635 } 636 637 static int 638 sfc_xstats_get_names(struct rte_eth_dev *dev, 639 struct rte_eth_xstat_name *xstats_names, 640 unsigned int xstats_count) 641 { 642 struct sfc_adapter *sa = dev->data->dev_private; 643 struct sfc_port *port = &sa->port; 644 unsigned int i; 645 unsigned int nstats = 0; 646 647 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 648 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 649 if (xstats_names != NULL && nstats < xstats_count) 650 strncpy(xstats_names[nstats].name, 651 efx_mac_stat_name(sa->nic, i), 652 sizeof(xstats_names[0].name)); 653 nstats++; 654 } 655 } 656 657 return nstats; 658 } 659 660 static int 661 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 662 { 663 struct sfc_adapter *sa = dev->data->dev_private; 664 unsigned int wanted_fc, link_fc; 665 666 memset(fc_conf, 0, sizeof(*fc_conf)); 667 668 sfc_adapter_lock(sa); 669 670 if (sa->state == SFC_ADAPTER_STARTED) 671 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc); 672 else 673 link_fc = sa->port.flow_ctrl; 674 675 switch (link_fc) { 676 case 0: 677 fc_conf->mode = RTE_FC_NONE; 678 break; 679 case EFX_FCNTL_RESPOND: 680 fc_conf->mode = RTE_FC_RX_PAUSE; 681 break; 682 case EFX_FCNTL_GENERATE: 683 fc_conf->mode = RTE_FC_TX_PAUSE; 684 break; 685 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE): 686 fc_conf->mode = RTE_FC_FULL; 687 break; 688 default: 689 sfc_err(sa, "%s: unexpected flow control value %#x", 690 __func__, link_fc); 691 } 692 693 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; 694 695 sfc_adapter_unlock(sa); 696 697 return 0; 698 } 699 700 static int 701 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 702 { 703 struct sfc_adapter *sa = dev->data->dev_private; 704 struct sfc_port *port = &sa->port; 705 unsigned int fcntl; 706 int rc; 707 708 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || 709 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || 710 fc_conf->mac_ctrl_frame_fwd != 0) { 711 sfc_err(sa, "unsupported flow control settings specified"); 712 rc = EINVAL; 713 goto fail_inval; 714 } 715 716 switch (fc_conf->mode) { 717 case RTE_FC_NONE: 718 fcntl = 0; 719 break; 720 case RTE_FC_RX_PAUSE: 721 fcntl = EFX_FCNTL_RESPOND; 722 break; 723 case RTE_FC_TX_PAUSE: 724 fcntl = EFX_FCNTL_GENERATE; 725 break; 726 case RTE_FC_FULL: 727 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 728 break; 729 default: 730 rc = EINVAL; 731 goto fail_inval; 732 } 733 734 sfc_adapter_lock(sa); 735 736 if (sa->state == SFC_ADAPTER_STARTED) { 737 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg); 738 if (rc != 0) 739 goto fail_mac_fcntl_set; 740 } 741 742 port->flow_ctrl = fcntl; 743 port->flow_ctrl_autoneg = fc_conf->autoneg; 744 745 sfc_adapter_unlock(sa); 746 747 return 0; 748 749 fail_mac_fcntl_set: 750 sfc_adapter_unlock(sa); 751 fail_inval: 752 SFC_ASSERT(rc > 0); 753 return -rc; 754 } 755 756 static int 757 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 758 { 759 struct sfc_adapter *sa = dev->data->dev_private; 760 size_t pdu = EFX_MAC_PDU(mtu); 761 size_t old_pdu; 762 int rc; 763 764 sfc_log_init(sa, "mtu=%u", mtu); 765 766 rc = EINVAL; 767 if (pdu < EFX_MAC_PDU_MIN) { 768 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)", 769 (unsigned int)mtu, (unsigned int)pdu, 770 EFX_MAC_PDU_MIN); 771 goto fail_inval; 772 } 773 if (pdu > EFX_MAC_PDU_MAX) { 774 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)", 775 (unsigned int)mtu, (unsigned int)pdu, 776 EFX_MAC_PDU_MAX); 777 goto fail_inval; 778 } 779 780 sfc_adapter_lock(sa); 781 782 if (pdu != sa->port.pdu) { 783 if (sa->state == SFC_ADAPTER_STARTED) { 784 sfc_stop(sa); 785 786 old_pdu = sa->port.pdu; 787 sa->port.pdu = pdu; 788 rc = sfc_start(sa); 789 if (rc != 0) 790 goto fail_start; 791 } else { 792 sa->port.pdu = pdu; 793 } 794 } 795 796 /* 797 * The driver does not use it, but other PMDs update jumbo_frame 798 * flag and max_rx_pkt_len when MTU is set. 799 */ 800 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN); 801 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu; 802 803 sfc_adapter_unlock(sa); 804 805 sfc_log_init(sa, "done"); 806 return 0; 807 808 fail_start: 809 sa->port.pdu = old_pdu; 810 if (sfc_start(sa) != 0) 811 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) " 812 "PDU max size - port is stopped", 813 (unsigned int)pdu, (unsigned int)old_pdu); 814 sfc_adapter_unlock(sa); 815 816 fail_inval: 817 sfc_log_init(sa, "failed %d", rc); 818 SFC_ASSERT(rc > 0); 819 return -rc; 820 } 821 static void 822 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr) 823 { 824 struct sfc_adapter *sa = dev->data->dev_private; 825 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 826 int rc; 827 828 sfc_adapter_lock(sa); 829 830 if (sa->state != SFC_ADAPTER_STARTED) { 831 sfc_info(sa, "the port is not started"); 832 sfc_info(sa, "the new MAC address will be set on port start"); 833 834 goto unlock; 835 } 836 837 if (encp->enc_allow_set_mac_with_installed_filters) { 838 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes); 839 if (rc != 0) { 840 sfc_err(sa, "cannot set MAC address (rc = %u)", rc); 841 goto unlock; 842 } 843 844 /* 845 * Changing the MAC address by means of MCDI request 846 * has no effect on received traffic, therefore 847 * we also need to update unicast filters 848 */ 849 rc = sfc_set_rx_mode(sa); 850 if (rc != 0) 851 sfc_err(sa, "cannot set filter (rc = %u)", rc); 852 } else { 853 sfc_warn(sa, "cannot set MAC address with filters installed"); 854 sfc_warn(sa, "adapter will be restarted to pick the new MAC"); 855 sfc_warn(sa, "(some traffic may be dropped)"); 856 857 /* 858 * Since setting MAC address with filters installed is not 859 * allowed on the adapter, one needs to simply restart adapter 860 * so that the new MAC address will be taken from an outer 861 * storage and set flawlessly by means of sfc_start() call 862 */ 863 sfc_stop(sa); 864 rc = sfc_start(sa); 865 if (rc != 0) 866 sfc_err(sa, "cannot restart adapter (rc = %u)", rc); 867 } 868 869 unlock: 870 sfc_adapter_unlock(sa); 871 } 872 873 874 static int 875 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set, 876 uint32_t nb_mc_addr) 877 { 878 struct sfc_adapter *sa = dev->data->dev_private; 879 struct sfc_port *port = &sa->port; 880 uint8_t *mc_addrs = port->mcast_addrs; 881 int rc; 882 unsigned int i; 883 884 if (mc_addrs == NULL) 885 return -ENOBUFS; 886 887 if (nb_mc_addr > port->max_mcast_addrs) { 888 sfc_err(sa, "too many multicast addresses: %u > %u", 889 nb_mc_addr, port->max_mcast_addrs); 890 return -EINVAL; 891 } 892 893 for (i = 0; i < nb_mc_addr; ++i) { 894 (void)rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, 895 EFX_MAC_ADDR_LEN); 896 mc_addrs += EFX_MAC_ADDR_LEN; 897 } 898 899 port->nb_mcast_addrs = nb_mc_addr; 900 901 if (sa->state != SFC_ADAPTER_STARTED) 902 return 0; 903 904 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, 905 port->nb_mcast_addrs); 906 if (rc != 0) 907 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); 908 909 SFC_ASSERT(rc > 0); 910 return -rc; 911 } 912 913 static void 914 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id, 915 struct rte_eth_rxq_info *qinfo) 916 { 917 struct sfc_adapter *sa = dev->data->dev_private; 918 struct sfc_rxq_info *rxq_info; 919 struct sfc_rxq *rxq; 920 921 sfc_adapter_lock(sa); 922 923 SFC_ASSERT(rx_queue_id < sa->rxq_count); 924 925 rxq_info = &sa->rxq_info[rx_queue_id]; 926 rxq = rxq_info->rxq; 927 SFC_ASSERT(rxq != NULL); 928 929 qinfo->mp = rxq->refill_mb_pool; 930 qinfo->conf.rx_free_thresh = rxq->refill_threshold; 931 qinfo->conf.rx_drop_en = 1; 932 qinfo->conf.rx_deferred_start = rxq_info->deferred_start; 933 qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER); 934 qinfo->nb_desc = rxq_info->entries; 935 936 sfc_adapter_unlock(sa); 937 } 938 939 static void 940 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id, 941 struct rte_eth_txq_info *qinfo) 942 { 943 struct sfc_adapter *sa = dev->data->dev_private; 944 struct sfc_txq_info *txq_info; 945 946 sfc_adapter_lock(sa); 947 948 SFC_ASSERT(tx_queue_id < sa->txq_count); 949 950 txq_info = &sa->txq_info[tx_queue_id]; 951 SFC_ASSERT(txq_info->txq != NULL); 952 953 memset(qinfo, 0, sizeof(*qinfo)); 954 955 qinfo->conf.txq_flags = txq_info->txq->flags; 956 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh; 957 qinfo->conf.tx_deferred_start = txq_info->deferred_start; 958 qinfo->nb_desc = txq_info->entries; 959 960 sfc_adapter_unlock(sa); 961 } 962 963 static uint32_t 964 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) 965 { 966 struct sfc_adapter *sa = dev->data->dev_private; 967 968 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 969 970 return sfc_rx_qdesc_npending(sa, rx_queue_id); 971 } 972 973 static int 974 sfc_rx_descriptor_done(void *queue, uint16_t offset) 975 { 976 struct sfc_dp_rxq *dp_rxq = queue; 977 978 return sfc_rx_qdesc_done(dp_rxq, offset); 979 } 980 981 static int 982 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) 983 { 984 struct sfc_adapter *sa = dev->data->dev_private; 985 int rc; 986 987 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 988 989 sfc_adapter_lock(sa); 990 991 rc = EINVAL; 992 if (sa->state != SFC_ADAPTER_STARTED) 993 goto fail_not_started; 994 995 rc = sfc_rx_qstart(sa, rx_queue_id); 996 if (rc != 0) 997 goto fail_rx_qstart; 998 999 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE; 1000 1001 sfc_adapter_unlock(sa); 1002 1003 return 0; 1004 1005 fail_rx_qstart: 1006 fail_not_started: 1007 sfc_adapter_unlock(sa); 1008 SFC_ASSERT(rc > 0); 1009 return -rc; 1010 } 1011 1012 static int 1013 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) 1014 { 1015 struct sfc_adapter *sa = dev->data->dev_private; 1016 1017 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 1018 1019 sfc_adapter_lock(sa); 1020 sfc_rx_qstop(sa, rx_queue_id); 1021 1022 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE; 1023 1024 sfc_adapter_unlock(sa); 1025 1026 return 0; 1027 } 1028 1029 static int 1030 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1031 { 1032 struct sfc_adapter *sa = dev->data->dev_private; 1033 int rc; 1034 1035 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1036 1037 sfc_adapter_lock(sa); 1038 1039 rc = EINVAL; 1040 if (sa->state != SFC_ADAPTER_STARTED) 1041 goto fail_not_started; 1042 1043 rc = sfc_tx_qstart(sa, tx_queue_id); 1044 if (rc != 0) 1045 goto fail_tx_qstart; 1046 1047 sa->txq_info[tx_queue_id].deferred_started = B_TRUE; 1048 1049 sfc_adapter_unlock(sa); 1050 return 0; 1051 1052 fail_tx_qstart: 1053 1054 fail_not_started: 1055 sfc_adapter_unlock(sa); 1056 SFC_ASSERT(rc > 0); 1057 return -rc; 1058 } 1059 1060 static int 1061 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1062 { 1063 struct sfc_adapter *sa = dev->data->dev_private; 1064 1065 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1066 1067 sfc_adapter_lock(sa); 1068 1069 sfc_tx_qstop(sa, tx_queue_id); 1070 1071 sa->txq_info[tx_queue_id].deferred_started = B_FALSE; 1072 1073 sfc_adapter_unlock(sa); 1074 return 0; 1075 } 1076 1077 #if EFSYS_OPT_RX_SCALE 1078 static int 1079 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1080 struct rte_eth_rss_conf *rss_conf) 1081 { 1082 struct sfc_adapter *sa = dev->data->dev_private; 1083 1084 if ((sa->rss_channels == 1) || 1085 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) 1086 return -ENOTSUP; 1087 1088 sfc_adapter_lock(sa); 1089 1090 /* 1091 * Mapping of hash configuration between RTE and EFX is not one-to-one, 1092 * hence, conversion is done here to derive a correct set of ETH_RSS 1093 * flags which corresponds to the active EFX configuration stored 1094 * locally in 'sfc_adapter' and kept up-to-date 1095 */ 1096 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types); 1097 rss_conf->rss_key_len = SFC_RSS_KEY_SIZE; 1098 if (rss_conf->rss_key != NULL) 1099 rte_memcpy(rss_conf->rss_key, sa->rss_key, SFC_RSS_KEY_SIZE); 1100 1101 sfc_adapter_unlock(sa); 1102 1103 return 0; 1104 } 1105 1106 static int 1107 sfc_dev_rss_hash_update(struct rte_eth_dev *dev, 1108 struct rte_eth_rss_conf *rss_conf) 1109 { 1110 struct sfc_adapter *sa = dev->data->dev_private; 1111 unsigned int efx_hash_types; 1112 int rc = 0; 1113 1114 if ((sa->rss_channels == 1) || 1115 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) { 1116 sfc_err(sa, "RSS is not available"); 1117 return -ENOTSUP; 1118 } 1119 1120 if ((rss_conf->rss_key != NULL) && 1121 (rss_conf->rss_key_len != sizeof(sa->rss_key))) { 1122 sfc_err(sa, "RSS key size is wrong (should be %lu)", 1123 sizeof(sa->rss_key)); 1124 return -EINVAL; 1125 } 1126 1127 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) { 1128 sfc_err(sa, "unsupported hash functions requested"); 1129 return -EINVAL; 1130 } 1131 1132 sfc_adapter_lock(sa); 1133 1134 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf); 1135 1136 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, 1137 efx_hash_types, B_TRUE); 1138 if (rc != 0) 1139 goto fail_scale_mode_set; 1140 1141 if (rss_conf->rss_key != NULL) { 1142 if (sa->state == SFC_ADAPTER_STARTED) { 1143 rc = efx_rx_scale_key_set(sa->nic, rss_conf->rss_key, 1144 sizeof(sa->rss_key)); 1145 if (rc != 0) 1146 goto fail_scale_key_set; 1147 } 1148 1149 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key)); 1150 } 1151 1152 sa->rss_hash_types = efx_hash_types; 1153 1154 sfc_adapter_unlock(sa); 1155 1156 return 0; 1157 1158 fail_scale_key_set: 1159 if (efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, 1160 sa->rss_hash_types, B_TRUE) != 0) 1161 sfc_err(sa, "failed to restore RSS mode"); 1162 1163 fail_scale_mode_set: 1164 sfc_adapter_unlock(sa); 1165 return -rc; 1166 } 1167 1168 static int 1169 sfc_dev_rss_reta_query(struct rte_eth_dev *dev, 1170 struct rte_eth_rss_reta_entry64 *reta_conf, 1171 uint16_t reta_size) 1172 { 1173 struct sfc_adapter *sa = dev->data->dev_private; 1174 int entry; 1175 1176 if ((sa->rss_channels == 1) || 1177 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) 1178 return -ENOTSUP; 1179 1180 if (reta_size != EFX_RSS_TBL_SIZE) 1181 return -EINVAL; 1182 1183 sfc_adapter_lock(sa); 1184 1185 for (entry = 0; entry < reta_size; entry++) { 1186 int grp = entry / RTE_RETA_GROUP_SIZE; 1187 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1188 1189 if ((reta_conf[grp].mask >> grp_idx) & 1) 1190 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry]; 1191 } 1192 1193 sfc_adapter_unlock(sa); 1194 1195 return 0; 1196 } 1197 1198 static int 1199 sfc_dev_rss_reta_update(struct rte_eth_dev *dev, 1200 struct rte_eth_rss_reta_entry64 *reta_conf, 1201 uint16_t reta_size) 1202 { 1203 struct sfc_adapter *sa = dev->data->dev_private; 1204 unsigned int *rss_tbl_new; 1205 uint16_t entry; 1206 int rc; 1207 1208 1209 if ((sa->rss_channels == 1) || 1210 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) { 1211 sfc_err(sa, "RSS is not available"); 1212 return -ENOTSUP; 1213 } 1214 1215 if (reta_size != EFX_RSS_TBL_SIZE) { 1216 sfc_err(sa, "RETA size is wrong (should be %u)", 1217 EFX_RSS_TBL_SIZE); 1218 return -EINVAL; 1219 } 1220 1221 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0); 1222 if (rss_tbl_new == NULL) 1223 return -ENOMEM; 1224 1225 sfc_adapter_lock(sa); 1226 1227 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl)); 1228 1229 for (entry = 0; entry < reta_size; entry++) { 1230 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1231 struct rte_eth_rss_reta_entry64 *grp; 1232 1233 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE]; 1234 1235 if (grp->mask & (1ull << grp_idx)) { 1236 if (grp->reta[grp_idx] >= sa->rss_channels) { 1237 rc = EINVAL; 1238 goto bad_reta_entry; 1239 } 1240 rss_tbl_new[entry] = grp->reta[grp_idx]; 1241 } 1242 } 1243 1244 rc = efx_rx_scale_tbl_set(sa->nic, rss_tbl_new, EFX_RSS_TBL_SIZE); 1245 if (rc == 0) 1246 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl)); 1247 1248 bad_reta_entry: 1249 sfc_adapter_unlock(sa); 1250 1251 rte_free(rss_tbl_new); 1252 1253 SFC_ASSERT(rc >= 0); 1254 return -rc; 1255 } 1256 #endif 1257 1258 static int 1259 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type, 1260 enum rte_filter_op filter_op, 1261 void *arg) 1262 { 1263 struct sfc_adapter *sa = dev->data->dev_private; 1264 int rc = ENOTSUP; 1265 1266 sfc_log_init(sa, "entry"); 1267 1268 switch (filter_type) { 1269 case RTE_ETH_FILTER_NONE: 1270 sfc_err(sa, "Global filters configuration not supported"); 1271 break; 1272 case RTE_ETH_FILTER_MACVLAN: 1273 sfc_err(sa, "MACVLAN filters not supported"); 1274 break; 1275 case RTE_ETH_FILTER_ETHERTYPE: 1276 sfc_err(sa, "EtherType filters not supported"); 1277 break; 1278 case RTE_ETH_FILTER_FLEXIBLE: 1279 sfc_err(sa, "Flexible filters not supported"); 1280 break; 1281 case RTE_ETH_FILTER_SYN: 1282 sfc_err(sa, "SYN filters not supported"); 1283 break; 1284 case RTE_ETH_FILTER_NTUPLE: 1285 sfc_err(sa, "NTUPLE filters not supported"); 1286 break; 1287 case RTE_ETH_FILTER_TUNNEL: 1288 sfc_err(sa, "Tunnel filters not supported"); 1289 break; 1290 case RTE_ETH_FILTER_FDIR: 1291 sfc_err(sa, "Flow Director filters not supported"); 1292 break; 1293 case RTE_ETH_FILTER_HASH: 1294 sfc_err(sa, "Hash filters not supported"); 1295 break; 1296 case RTE_ETH_FILTER_GENERIC: 1297 if (filter_op != RTE_ETH_FILTER_GET) { 1298 rc = EINVAL; 1299 } else { 1300 *(const void **)arg = &sfc_flow_ops; 1301 rc = 0; 1302 } 1303 break; 1304 default: 1305 sfc_err(sa, "Unknown filter type %u", filter_type); 1306 break; 1307 } 1308 1309 sfc_log_init(sa, "exit: %d", -rc); 1310 SFC_ASSERT(rc >= 0); 1311 return -rc; 1312 } 1313 1314 static const struct eth_dev_ops sfc_eth_dev_ops = { 1315 .dev_configure = sfc_dev_configure, 1316 .dev_start = sfc_dev_start, 1317 .dev_stop = sfc_dev_stop, 1318 .dev_set_link_up = sfc_dev_set_link_up, 1319 .dev_set_link_down = sfc_dev_set_link_down, 1320 .dev_close = sfc_dev_close, 1321 .promiscuous_enable = sfc_dev_promisc_enable, 1322 .promiscuous_disable = sfc_dev_promisc_disable, 1323 .allmulticast_enable = sfc_dev_allmulti_enable, 1324 .allmulticast_disable = sfc_dev_allmulti_disable, 1325 .link_update = sfc_dev_link_update, 1326 .stats_get = sfc_stats_get, 1327 .stats_reset = sfc_stats_reset, 1328 .xstats_get = sfc_xstats_get, 1329 .xstats_reset = sfc_stats_reset, 1330 .xstats_get_names = sfc_xstats_get_names, 1331 .dev_infos_get = sfc_dev_infos_get, 1332 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 1333 .mtu_set = sfc_dev_set_mtu, 1334 .rx_queue_start = sfc_rx_queue_start, 1335 .rx_queue_stop = sfc_rx_queue_stop, 1336 .tx_queue_start = sfc_tx_queue_start, 1337 .tx_queue_stop = sfc_tx_queue_stop, 1338 .rx_queue_setup = sfc_rx_queue_setup, 1339 .rx_queue_release = sfc_rx_queue_release, 1340 .rx_queue_count = sfc_rx_queue_count, 1341 .rx_descriptor_done = sfc_rx_descriptor_done, 1342 .tx_queue_setup = sfc_tx_queue_setup, 1343 .tx_queue_release = sfc_tx_queue_release, 1344 .flow_ctrl_get = sfc_flow_ctrl_get, 1345 .flow_ctrl_set = sfc_flow_ctrl_set, 1346 .mac_addr_set = sfc_mac_addr_set, 1347 #if EFSYS_OPT_RX_SCALE 1348 .reta_update = sfc_dev_rss_reta_update, 1349 .reta_query = sfc_dev_rss_reta_query, 1350 .rss_hash_update = sfc_dev_rss_hash_update, 1351 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 1352 #endif 1353 .filter_ctrl = sfc_dev_filter_ctrl, 1354 .set_mc_addr_list = sfc_set_mc_addr_list, 1355 .rxq_info_get = sfc_rx_queue_info_get, 1356 .txq_info_get = sfc_tx_queue_info_get, 1357 .fw_version_get = sfc_fw_version_get, 1358 }; 1359 1360 static int 1361 sfc_eth_dev_set_ops(struct rte_eth_dev *dev) 1362 { 1363 struct sfc_adapter *sa = dev->data->dev_private; 1364 unsigned int avail_caps = 0; 1365 const char *rx_name = NULL; 1366 const char *tx_name = NULL; 1367 int rc; 1368 1369 if (sa == NULL || sa->state == SFC_ADAPTER_UNINITIALIZED) 1370 return -E_RTE_SECONDARY; 1371 1372 switch (sa->family) { 1373 case EFX_FAMILY_HUNTINGTON: 1374 case EFX_FAMILY_MEDFORD: 1375 avail_caps |= SFC_DP_HW_FW_CAP_EF10; 1376 break; 1377 default: 1378 break; 1379 } 1380 1381 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH, 1382 sfc_kvarg_string_handler, &rx_name); 1383 if (rc != 0) 1384 goto fail_kvarg_rx_datapath; 1385 1386 if (rx_name != NULL) { 1387 sa->dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name); 1388 if (sa->dp_rx == NULL) { 1389 sfc_err(sa, "Rx datapath %s not found", rx_name); 1390 rc = ENOENT; 1391 goto fail_dp_rx; 1392 } 1393 if (!sfc_dp_match_hw_fw_caps(&sa->dp_rx->dp, avail_caps)) { 1394 sfc_err(sa, 1395 "Insufficient Hw/FW capabilities to use Rx datapath %s", 1396 rx_name); 1397 rc = EINVAL; 1398 goto fail_dp_rx; 1399 } 1400 } else { 1401 sa->dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps); 1402 if (sa->dp_rx == NULL) { 1403 sfc_err(sa, "Rx datapath by caps %#x not found", 1404 avail_caps); 1405 rc = ENOENT; 1406 goto fail_dp_rx; 1407 } 1408 } 1409 1410 sfc_info(sa, "use %s Rx datapath", sa->dp_rx->dp.name); 1411 1412 dev->rx_pkt_burst = sa->dp_rx->pkt_burst; 1413 1414 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH, 1415 sfc_kvarg_string_handler, &tx_name); 1416 if (rc != 0) 1417 goto fail_kvarg_tx_datapath; 1418 1419 if (tx_name != NULL) { 1420 sa->dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name); 1421 if (sa->dp_tx == NULL) { 1422 sfc_err(sa, "Tx datapath %s not found", tx_name); 1423 rc = ENOENT; 1424 goto fail_dp_tx; 1425 } 1426 if (!sfc_dp_match_hw_fw_caps(&sa->dp_tx->dp, avail_caps)) { 1427 sfc_err(sa, 1428 "Insufficient Hw/FW capabilities to use Tx datapath %s", 1429 tx_name); 1430 rc = EINVAL; 1431 goto fail_dp_tx; 1432 } 1433 } else { 1434 sa->dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps); 1435 if (sa->dp_tx == NULL) { 1436 sfc_err(sa, "Tx datapath by caps %#x not found", 1437 avail_caps); 1438 rc = ENOENT; 1439 goto fail_dp_tx; 1440 } 1441 } 1442 1443 sfc_info(sa, "use %s Tx datapath", sa->dp_tx->dp.name); 1444 1445 dev->tx_pkt_burst = sa->dp_tx->pkt_burst; 1446 1447 dev->dev_ops = &sfc_eth_dev_ops; 1448 1449 return 0; 1450 1451 fail_dp_tx: 1452 fail_kvarg_tx_datapath: 1453 fail_dp_rx: 1454 fail_kvarg_rx_datapath: 1455 return rc; 1456 } 1457 1458 static void 1459 sfc_register_dp(void) 1460 { 1461 /* Register once */ 1462 if (TAILQ_EMPTY(&sfc_dp_head)) { 1463 /* Prefer EF10 datapath */ 1464 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp); 1465 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); 1466 1467 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp); 1468 } 1469 } 1470 1471 static int 1472 sfc_eth_dev_init(struct rte_eth_dev *dev) 1473 { 1474 struct sfc_adapter *sa = dev->data->dev_private; 1475 struct rte_pci_device *pci_dev = SFC_DEV_TO_PCI(dev); 1476 int rc; 1477 const efx_nic_cfg_t *encp; 1478 const struct ether_addr *from; 1479 1480 sfc_register_dp(); 1481 1482 /* Required for logging */ 1483 sa->eth_dev = dev; 1484 1485 /* Copy PCI device info to the dev->data */ 1486 rte_eth_copy_pci_info(dev, pci_dev); 1487 1488 rc = sfc_kvargs_parse(sa); 1489 if (rc != 0) 1490 goto fail_kvargs_parse; 1491 1492 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT, 1493 sfc_kvarg_bool_handler, &sa->debug_init); 1494 if (rc != 0) 1495 goto fail_kvarg_debug_init; 1496 1497 sfc_log_init(sa, "entry"); 1498 1499 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0); 1500 if (dev->data->mac_addrs == NULL) { 1501 rc = ENOMEM; 1502 goto fail_mac_addrs; 1503 } 1504 1505 sfc_adapter_lock_init(sa); 1506 sfc_adapter_lock(sa); 1507 1508 sfc_log_init(sa, "attaching"); 1509 rc = sfc_attach(sa); 1510 if (rc != 0) 1511 goto fail_attach; 1512 1513 encp = efx_nic_cfg_get(sa->nic); 1514 1515 /* 1516 * The arguments are really reverse order in comparison to 1517 * Linux kernel. Copy from NIC config to Ethernet device data. 1518 */ 1519 from = (const struct ether_addr *)(encp->enc_mac_addr); 1520 ether_addr_copy(from, &dev->data->mac_addrs[0]); 1521 1522 sfc_adapter_unlock(sa); 1523 1524 sfc_eth_dev_set_ops(dev); 1525 1526 sfc_log_init(sa, "done"); 1527 return 0; 1528 1529 fail_attach: 1530 sfc_adapter_unlock(sa); 1531 sfc_adapter_lock_fini(sa); 1532 rte_free(dev->data->mac_addrs); 1533 dev->data->mac_addrs = NULL; 1534 1535 fail_mac_addrs: 1536 fail_kvarg_debug_init: 1537 sfc_kvargs_cleanup(sa); 1538 1539 fail_kvargs_parse: 1540 sfc_log_init(sa, "failed %d", rc); 1541 SFC_ASSERT(rc > 0); 1542 return -rc; 1543 } 1544 1545 static int 1546 sfc_eth_dev_uninit(struct rte_eth_dev *dev) 1547 { 1548 struct sfc_adapter *sa = dev->data->dev_private; 1549 1550 sfc_log_init(sa, "entry"); 1551 1552 sfc_adapter_lock(sa); 1553 1554 sfc_detach(sa); 1555 1556 rte_free(dev->data->mac_addrs); 1557 dev->data->mac_addrs = NULL; 1558 1559 dev->dev_ops = NULL; 1560 dev->rx_pkt_burst = NULL; 1561 dev->tx_pkt_burst = NULL; 1562 1563 sfc_kvargs_cleanup(sa); 1564 1565 sfc_adapter_unlock(sa); 1566 sfc_adapter_lock_fini(sa); 1567 1568 sfc_log_init(sa, "done"); 1569 1570 /* Required for logging, so cleanup last */ 1571 sa->eth_dev = NULL; 1572 return 0; 1573 } 1574 1575 static const struct rte_pci_id pci_id_sfc_efx_map[] = { 1576 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, 1577 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, 1578 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, 1579 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, 1580 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, 1581 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, 1582 { .vendor_id = 0 /* sentinel */ } 1583 }; 1584 1585 static struct eth_driver sfc_efx_pmd = { 1586 .pci_drv = { 1587 .id_table = pci_id_sfc_efx_map, 1588 .drv_flags = 1589 RTE_PCI_DRV_INTR_LSC | 1590 RTE_PCI_DRV_NEED_MAPPING, 1591 .probe = rte_eth_dev_pci_probe, 1592 .remove = rte_eth_dev_pci_remove, 1593 }, 1594 .eth_dev_init = sfc_eth_dev_init, 1595 .eth_dev_uninit = sfc_eth_dev_uninit, 1596 .dev_private_size = sizeof(struct sfc_adapter), 1597 }; 1598 1599 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd.pci_drv); 1600 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); 1601 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio"); 1602 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, 1603 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " " 1604 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " " 1605 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " 1606 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> " 1607 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " " 1608 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL); 1609