xref: /dpdk/drivers/net/sfc/sfc_ethdev.c (revision cdbb29cf4bc4e2c8b6bf0683aa7519edea951b1a)
1 /*-
2  * Copyright (c) 2016 Solarflare Communications Inc.
3  * All rights reserved.
4  *
5  * This software was jointly developed between OKTET Labs (under contract
6  * for Solarflare) and Solarflare Communications, Inc.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright notice,
12  *    this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright notice,
14  *    this list of conditions and the following disclaimer in the documentation
15  *    and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 #include <rte_dev.h>
31 #include <rte_ethdev.h>
32 #include <rte_pci.h>
33 
34 #include "efx.h"
35 
36 #include "sfc.h"
37 #include "sfc_debug.h"
38 #include "sfc_log.h"
39 #include "sfc_kvargs.h"
40 #include "sfc_ev.h"
41 #include "sfc_rx.h"
42 #include "sfc_tx.h"
43 
44 
45 static void
46 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
47 {
48 	struct sfc_adapter *sa = dev->data->dev_private;
49 
50 	sfc_log_init(sa, "entry");
51 
52 	dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device);
53 	dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX;
54 
55 	dev_info->max_rx_queues = sa->rxq_max;
56 	dev_info->max_tx_queues = sa->txq_max;
57 
58 	/* By default packets are dropped if no descriptors are available */
59 	dev_info->default_rxconf.rx_drop_en = 1;
60 
61 	dev_info->tx_offload_capa =
62 		DEV_TX_OFFLOAD_IPV4_CKSUM |
63 		DEV_TX_OFFLOAD_UDP_CKSUM |
64 		DEV_TX_OFFLOAD_TCP_CKSUM;
65 
66 	dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOVLANOFFL |
67 					     ETH_TXQ_FLAGS_NOXSUMSCTP;
68 
69 	dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS;
70 	dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS;
71 	/* The RXQ hardware requires that the descriptor count is a power
72 	 * of 2, but rx_desc_lim cannot properly describe that constraint.
73 	 */
74 	dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS;
75 
76 	dev_info->tx_desc_lim.nb_max = sa->txq_max_entries;
77 	dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS;
78 	/*
79 	 * The TXQ hardware requires that the descriptor count is a power
80 	 * of 2, but tx_desc_lim cannot properly describe that constraint
81 	 */
82 	dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS;
83 }
84 
85 static int
86 sfc_dev_configure(struct rte_eth_dev *dev)
87 {
88 	struct rte_eth_dev_data *dev_data = dev->data;
89 	struct sfc_adapter *sa = dev_data->dev_private;
90 	int rc;
91 
92 	sfc_log_init(sa, "entry n_rxq=%u n_txq=%u",
93 		     dev_data->nb_rx_queues, dev_data->nb_tx_queues);
94 
95 	sfc_adapter_lock(sa);
96 	switch (sa->state) {
97 	case SFC_ADAPTER_CONFIGURED:
98 		sfc_close(sa);
99 		SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED);
100 		/* FALLTHROUGH */
101 	case SFC_ADAPTER_INITIALIZED:
102 		rc = sfc_configure(sa);
103 		break;
104 	default:
105 		sfc_err(sa, "unexpected adapter state %u to configure",
106 			sa->state);
107 		rc = EINVAL;
108 		break;
109 	}
110 	sfc_adapter_unlock(sa);
111 
112 	sfc_log_init(sa, "done %d", rc);
113 	SFC_ASSERT(rc >= 0);
114 	return -rc;
115 }
116 
117 static int
118 sfc_dev_start(struct rte_eth_dev *dev)
119 {
120 	struct sfc_adapter *sa = dev->data->dev_private;
121 	int rc;
122 
123 	sfc_log_init(sa, "entry");
124 
125 	sfc_adapter_lock(sa);
126 	rc = sfc_start(sa);
127 	sfc_adapter_unlock(sa);
128 
129 	sfc_log_init(sa, "done %d", rc);
130 	SFC_ASSERT(rc >= 0);
131 	return -rc;
132 }
133 
134 static int
135 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
136 {
137 	struct sfc_adapter *sa = dev->data->dev_private;
138 	struct rte_eth_link *dev_link = &dev->data->dev_link;
139 	struct rte_eth_link old_link;
140 	struct rte_eth_link current_link;
141 
142 	sfc_log_init(sa, "entry");
143 
144 	if (sa->state != SFC_ADAPTER_STARTED)
145 		return 0;
146 
147 retry:
148 	EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
149 	*(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link);
150 
151 	if (wait_to_complete) {
152 		efx_link_mode_t link_mode;
153 
154 		efx_port_poll(sa->nic, &link_mode);
155 		sfc_port_link_mode_to_info(link_mode, &current_link);
156 
157 		if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link,
158 					 *(uint64_t *)&old_link,
159 					 *(uint64_t *)&current_link))
160 			goto retry;
161 	} else {
162 		sfc_ev_mgmt_qpoll(sa);
163 		*(int64_t *)&current_link =
164 			rte_atomic64_read((rte_atomic64_t *)dev_link);
165 	}
166 
167 	if (old_link.link_status != current_link.link_status)
168 		sfc_info(sa, "Link status is %s",
169 			 current_link.link_status ? "UP" : "DOWN");
170 
171 	return old_link.link_status == current_link.link_status ? 0 : -1;
172 }
173 
174 static void
175 sfc_dev_stop(struct rte_eth_dev *dev)
176 {
177 	struct sfc_adapter *sa = dev->data->dev_private;
178 
179 	sfc_log_init(sa, "entry");
180 
181 	sfc_adapter_lock(sa);
182 	sfc_stop(sa);
183 	sfc_adapter_unlock(sa);
184 
185 	sfc_log_init(sa, "done");
186 }
187 
188 static void
189 sfc_dev_close(struct rte_eth_dev *dev)
190 {
191 	struct sfc_adapter *sa = dev->data->dev_private;
192 
193 	sfc_log_init(sa, "entry");
194 
195 	sfc_adapter_lock(sa);
196 	switch (sa->state) {
197 	case SFC_ADAPTER_STARTED:
198 		sfc_stop(sa);
199 		SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED);
200 		/* FALLTHROUGH */
201 	case SFC_ADAPTER_CONFIGURED:
202 		sfc_close(sa);
203 		SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED);
204 		/* FALLTHROUGH */
205 	case SFC_ADAPTER_INITIALIZED:
206 		break;
207 	default:
208 		sfc_err(sa, "unexpected adapter state %u on close", sa->state);
209 		break;
210 	}
211 	sfc_adapter_unlock(sa);
212 
213 	sfc_log_init(sa, "done");
214 }
215 
216 static int
217 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
218 		   uint16_t nb_rx_desc, unsigned int socket_id,
219 		   const struct rte_eth_rxconf *rx_conf,
220 		   struct rte_mempool *mb_pool)
221 {
222 	struct sfc_adapter *sa = dev->data->dev_private;
223 	int rc;
224 
225 	sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u",
226 		     rx_queue_id, nb_rx_desc, socket_id);
227 
228 	sfc_adapter_lock(sa);
229 
230 	rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id,
231 			  rx_conf, mb_pool);
232 	if (rc != 0)
233 		goto fail_rx_qinit;
234 
235 	dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq;
236 
237 	sfc_adapter_unlock(sa);
238 
239 	return 0;
240 
241 fail_rx_qinit:
242 	sfc_adapter_unlock(sa);
243 	SFC_ASSERT(rc > 0);
244 	return -rc;
245 }
246 
247 static void
248 sfc_rx_queue_release(void *queue)
249 {
250 	struct sfc_rxq *rxq = queue;
251 	struct sfc_adapter *sa;
252 	unsigned int sw_index;
253 
254 	if (rxq == NULL)
255 		return;
256 
257 	sa = rxq->evq->sa;
258 	sfc_adapter_lock(sa);
259 
260 	sw_index = sfc_rxq_sw_index(rxq);
261 
262 	sfc_log_init(sa, "RxQ=%u", sw_index);
263 
264 	sa->eth_dev->data->rx_queues[sw_index] = NULL;
265 
266 	sfc_rx_qfini(sa, sw_index);
267 
268 	sfc_adapter_unlock(sa);
269 }
270 
271 static int
272 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
273 		   uint16_t nb_tx_desc, unsigned int socket_id,
274 		   const struct rte_eth_txconf *tx_conf)
275 {
276 	struct sfc_adapter *sa = dev->data->dev_private;
277 	int rc;
278 
279 	sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u",
280 		     tx_queue_id, nb_tx_desc, socket_id);
281 
282 	sfc_adapter_lock(sa);
283 
284 	rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf);
285 	if (rc != 0)
286 		goto fail_tx_qinit;
287 
288 	dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq;
289 
290 	sfc_adapter_unlock(sa);
291 	return 0;
292 
293 fail_tx_qinit:
294 	sfc_adapter_unlock(sa);
295 	SFC_ASSERT(rc > 0);
296 	return -rc;
297 }
298 
299 static void
300 sfc_tx_queue_release(void *queue)
301 {
302 	struct sfc_txq *txq = queue;
303 	unsigned int sw_index;
304 	struct sfc_adapter *sa;
305 
306 	if (txq == NULL)
307 		return;
308 
309 	sw_index = sfc_txq_sw_index(txq);
310 
311 	SFC_ASSERT(txq->evq != NULL);
312 	sa = txq->evq->sa;
313 
314 	sfc_log_init(sa, "TxQ = %u", sw_index);
315 
316 	sfc_adapter_lock(sa);
317 
318 	SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues);
319 	sa->eth_dev->data->tx_queues[sw_index] = NULL;
320 
321 	sfc_tx_qfini(sa, sw_index);
322 
323 	sfc_adapter_unlock(sa);
324 }
325 
326 static void
327 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
328 {
329 	struct sfc_adapter *sa = dev->data->dev_private;
330 	struct sfc_port *port = &sa->port;
331 	uint64_t *mac_stats;
332 
333 	rte_spinlock_lock(&port->mac_stats_lock);
334 
335 	if (sfc_port_update_mac_stats(sa) != 0)
336 		goto unlock;
337 
338 	mac_stats = port->mac_stats_buf;
339 
340 	if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask,
341 				   EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) {
342 		stats->ipackets =
343 			mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] +
344 			mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] +
345 			mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS];
346 		stats->opackets =
347 			mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] +
348 			mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] +
349 			mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS];
350 		stats->ibytes =
351 			mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] +
352 			mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] +
353 			mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES];
354 		stats->obytes =
355 			mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] +
356 			mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] +
357 			mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES];
358 		stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW];
359 		stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS];
360 		stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS];
361 	} else {
362 		stats->ipackets = mac_stats[EFX_MAC_RX_PKTS];
363 		stats->opackets = mac_stats[EFX_MAC_TX_PKTS];
364 		stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS];
365 		stats->obytes = mac_stats[EFX_MAC_TX_OCTETS];
366 		/*
367 		 * Take into account stats which are whenever supported
368 		 * on EF10. If some stat is not supported by current
369 		 * firmware variant or HW revision, it is guaranteed
370 		 * to be zero in mac_stats.
371 		 */
372 		stats->imissed =
373 			mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] +
374 			mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] +
375 			mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] +
376 			mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] +
377 			mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] +
378 			mac_stats[EFX_MAC_PM_TRUNC_QBB] +
379 			mac_stats[EFX_MAC_PM_DISCARD_QBB] +
380 			mac_stats[EFX_MAC_PM_DISCARD_MAPPING] +
381 			mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] +
382 			mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS];
383 		stats->ierrors =
384 			mac_stats[EFX_MAC_RX_FCS_ERRORS] +
385 			mac_stats[EFX_MAC_RX_ALIGN_ERRORS] +
386 			mac_stats[EFX_MAC_RX_JABBER_PKTS];
387 		/* no oerrors counters supported on EF10 */
388 	}
389 
390 unlock:
391 	rte_spinlock_unlock(&port->mac_stats_lock);
392 }
393 
394 static int
395 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
396 	       unsigned int xstats_count)
397 {
398 	struct sfc_adapter *sa = dev->data->dev_private;
399 	struct sfc_port *port = &sa->port;
400 	uint64_t *mac_stats;
401 	int rc;
402 	unsigned int i;
403 	int nstats = 0;
404 
405 	rte_spinlock_lock(&port->mac_stats_lock);
406 
407 	rc = sfc_port_update_mac_stats(sa);
408 	if (rc != 0) {
409 		SFC_ASSERT(rc > 0);
410 		nstats = -rc;
411 		goto unlock;
412 	}
413 
414 	mac_stats = port->mac_stats_buf;
415 
416 	for (i = 0; i < EFX_MAC_NSTATS; ++i) {
417 		if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
418 			if (xstats != NULL && nstats < (int)xstats_count) {
419 				xstats[nstats].id = nstats;
420 				xstats[nstats].value = mac_stats[i];
421 			}
422 			nstats++;
423 		}
424 	}
425 
426 unlock:
427 	rte_spinlock_unlock(&port->mac_stats_lock);
428 
429 	return nstats;
430 }
431 
432 static int
433 sfc_xstats_get_names(struct rte_eth_dev *dev,
434 		     struct rte_eth_xstat_name *xstats_names,
435 		     unsigned int xstats_count)
436 {
437 	struct sfc_adapter *sa = dev->data->dev_private;
438 	struct sfc_port *port = &sa->port;
439 	unsigned int i;
440 	unsigned int nstats = 0;
441 
442 	for (i = 0; i < EFX_MAC_NSTATS; ++i) {
443 		if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
444 			if (xstats_names != NULL && nstats < xstats_count)
445 				strncpy(xstats_names[nstats].name,
446 					efx_mac_stat_name(sa->nic, i),
447 					sizeof(xstats_names[0].name));
448 			nstats++;
449 		}
450 	}
451 
452 	return nstats;
453 }
454 
455 static int
456 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
457 {
458 	struct sfc_adapter *sa = dev->data->dev_private;
459 	unsigned int wanted_fc, link_fc;
460 
461 	memset(fc_conf, 0, sizeof(*fc_conf));
462 
463 	sfc_adapter_lock(sa);
464 
465 	if (sa->state == SFC_ADAPTER_STARTED)
466 		efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc);
467 	else
468 		link_fc = sa->port.flow_ctrl;
469 
470 	switch (link_fc) {
471 	case 0:
472 		fc_conf->mode = RTE_FC_NONE;
473 		break;
474 	case EFX_FCNTL_RESPOND:
475 		fc_conf->mode = RTE_FC_RX_PAUSE;
476 		break;
477 	case EFX_FCNTL_GENERATE:
478 		fc_conf->mode = RTE_FC_TX_PAUSE;
479 		break;
480 	case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE):
481 		fc_conf->mode = RTE_FC_FULL;
482 		break;
483 	default:
484 		sfc_err(sa, "%s: unexpected flow control value %#x",
485 			__func__, link_fc);
486 	}
487 
488 	fc_conf->autoneg = sa->port.flow_ctrl_autoneg;
489 
490 	sfc_adapter_unlock(sa);
491 
492 	return 0;
493 }
494 
495 static int
496 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
497 {
498 	struct sfc_adapter *sa = dev->data->dev_private;
499 	struct sfc_port *port = &sa->port;
500 	unsigned int fcntl;
501 	int rc;
502 
503 	if (fc_conf->high_water != 0 || fc_conf->low_water != 0 ||
504 	    fc_conf->pause_time != 0 || fc_conf->send_xon != 0 ||
505 	    fc_conf->mac_ctrl_frame_fwd != 0) {
506 		sfc_err(sa, "unsupported flow control settings specified");
507 		rc = EINVAL;
508 		goto fail_inval;
509 	}
510 
511 	switch (fc_conf->mode) {
512 	case RTE_FC_NONE:
513 		fcntl = 0;
514 		break;
515 	case RTE_FC_RX_PAUSE:
516 		fcntl = EFX_FCNTL_RESPOND;
517 		break;
518 	case RTE_FC_TX_PAUSE:
519 		fcntl = EFX_FCNTL_GENERATE;
520 		break;
521 	case RTE_FC_FULL:
522 		fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
523 		break;
524 	default:
525 		rc = EINVAL;
526 		goto fail_inval;
527 	}
528 
529 	sfc_adapter_lock(sa);
530 
531 	if (sa->state == SFC_ADAPTER_STARTED) {
532 		rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg);
533 		if (rc != 0)
534 			goto fail_mac_fcntl_set;
535 	}
536 
537 	port->flow_ctrl = fcntl;
538 	port->flow_ctrl_autoneg = fc_conf->autoneg;
539 
540 	sfc_adapter_unlock(sa);
541 
542 	return 0;
543 
544 fail_mac_fcntl_set:
545 	sfc_adapter_unlock(sa);
546 fail_inval:
547 	SFC_ASSERT(rc > 0);
548 	return -rc;
549 }
550 
551 static const struct eth_dev_ops sfc_eth_dev_ops = {
552 	.dev_configure			= sfc_dev_configure,
553 	.dev_start			= sfc_dev_start,
554 	.dev_stop			= sfc_dev_stop,
555 	.dev_close			= sfc_dev_close,
556 	.link_update			= sfc_dev_link_update,
557 	.stats_get			= sfc_stats_get,
558 	.xstats_get			= sfc_xstats_get,
559 	.xstats_get_names		= sfc_xstats_get_names,
560 	.dev_infos_get			= sfc_dev_infos_get,
561 	.rx_queue_setup			= sfc_rx_queue_setup,
562 	.rx_queue_release		= sfc_rx_queue_release,
563 	.tx_queue_setup			= sfc_tx_queue_setup,
564 	.tx_queue_release		= sfc_tx_queue_release,
565 	.flow_ctrl_get			= sfc_flow_ctrl_get,
566 	.flow_ctrl_set			= sfc_flow_ctrl_set,
567 };
568 
569 static int
570 sfc_eth_dev_init(struct rte_eth_dev *dev)
571 {
572 	struct sfc_adapter *sa = dev->data->dev_private;
573 	struct rte_pci_device *pci_dev = SFC_DEV_TO_PCI(dev);
574 	int rc;
575 	const efx_nic_cfg_t *encp;
576 	const struct ether_addr *from;
577 
578 	/* Required for logging */
579 	sa->eth_dev = dev;
580 
581 	/* Copy PCI device info to the dev->data */
582 	rte_eth_copy_pci_info(dev, pci_dev);
583 
584 	rc = sfc_kvargs_parse(sa);
585 	if (rc != 0)
586 		goto fail_kvargs_parse;
587 
588 	rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT,
589 				sfc_kvarg_bool_handler, &sa->debug_init);
590 	if (rc != 0)
591 		goto fail_kvarg_debug_init;
592 
593 	sfc_log_init(sa, "entry");
594 
595 	dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0);
596 	if (dev->data->mac_addrs == NULL) {
597 		rc = ENOMEM;
598 		goto fail_mac_addrs;
599 	}
600 
601 	sfc_adapter_lock_init(sa);
602 	sfc_adapter_lock(sa);
603 
604 	sfc_log_init(sa, "attaching");
605 	rc = sfc_attach(sa);
606 	if (rc != 0)
607 		goto fail_attach;
608 
609 	encp = efx_nic_cfg_get(sa->nic);
610 
611 	/*
612 	 * The arguments are really reverse order in comparison to
613 	 * Linux kernel. Copy from NIC config to Ethernet device data.
614 	 */
615 	from = (const struct ether_addr *)(encp->enc_mac_addr);
616 	ether_addr_copy(from, &dev->data->mac_addrs[0]);
617 
618 	dev->dev_ops = &sfc_eth_dev_ops;
619 	dev->rx_pkt_burst = &sfc_recv_pkts;
620 	dev->tx_pkt_burst = &sfc_xmit_pkts;
621 
622 	sfc_adapter_unlock(sa);
623 
624 	sfc_log_init(sa, "done");
625 	return 0;
626 
627 fail_attach:
628 	sfc_adapter_unlock(sa);
629 	sfc_adapter_lock_fini(sa);
630 	rte_free(dev->data->mac_addrs);
631 	dev->data->mac_addrs = NULL;
632 
633 fail_mac_addrs:
634 fail_kvarg_debug_init:
635 	sfc_kvargs_cleanup(sa);
636 
637 fail_kvargs_parse:
638 	sfc_log_init(sa, "failed %d", rc);
639 	SFC_ASSERT(rc > 0);
640 	return -rc;
641 }
642 
643 static int
644 sfc_eth_dev_uninit(struct rte_eth_dev *dev)
645 {
646 	struct sfc_adapter *sa = dev->data->dev_private;
647 
648 	sfc_log_init(sa, "entry");
649 
650 	sfc_adapter_lock(sa);
651 
652 	sfc_detach(sa);
653 
654 	rte_free(dev->data->mac_addrs);
655 	dev->data->mac_addrs = NULL;
656 
657 	dev->dev_ops = NULL;
658 	dev->rx_pkt_burst = NULL;
659 	dev->tx_pkt_burst = NULL;
660 
661 	sfc_kvargs_cleanup(sa);
662 
663 	sfc_adapter_unlock(sa);
664 	sfc_adapter_lock_fini(sa);
665 
666 	sfc_log_init(sa, "done");
667 
668 	/* Required for logging, so cleanup last */
669 	sa->eth_dev = NULL;
670 	return 0;
671 }
672 
673 static const struct rte_pci_id pci_id_sfc_efx_map[] = {
674 	{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) },
675 	{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) },
676 	{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) },
677 	{ .vendor_id = 0 /* sentinel */ }
678 };
679 
680 static struct eth_driver sfc_efx_pmd = {
681 	.pci_drv = {
682 		.id_table = pci_id_sfc_efx_map,
683 		.drv_flags =
684 			RTE_PCI_DRV_NEED_MAPPING,
685 		.probe = rte_eth_dev_pci_probe,
686 		.remove = rte_eth_dev_pci_remove,
687 	},
688 	.eth_dev_init = sfc_eth_dev_init,
689 	.eth_dev_uninit = sfc_eth_dev_uninit,
690 	.dev_private_size = sizeof(struct sfc_adapter),
691 };
692 
693 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd.pci_drv);
694 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map);
695 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx,
696 	SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " "
697 	SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " "
698 	SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL);
699