1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright(c) 2019-2021 Xilinx, Inc. 4 * Copyright(c) 2016-2019 Solarflare Communications Inc. 5 * 6 * This software was jointly developed between OKTET Labs (under contract 7 * for Solarflare) and Solarflare Communications, Inc. 8 */ 9 10 #include <rte_dev.h> 11 #include <ethdev_driver.h> 12 #include <ethdev_pci.h> 13 #include <rte_pci.h> 14 #include <rte_bus_pci.h> 15 #include <rte_errno.h> 16 #include <rte_string_fns.h> 17 #include <rte_ether.h> 18 19 #include "efx.h" 20 21 #include "sfc.h" 22 #include "sfc_debug.h" 23 #include "sfc_log.h" 24 #include "sfc_kvargs.h" 25 #include "sfc_ev.h" 26 #include "sfc_rx.h" 27 #include "sfc_tx.h" 28 #include "sfc_flow.h" 29 #include "sfc_dp.h" 30 #include "sfc_dp_rx.h" 31 #include "sfc_repr.h" 32 #include "sfc_sw_stats.h" 33 34 #define SFC_XSTAT_ID_INVALID_VAL UINT64_MAX 35 #define SFC_XSTAT_ID_INVALID_NAME '\0' 36 37 uint32_t sfc_logtype_driver; 38 39 static struct sfc_dp_list sfc_dp_head = 40 TAILQ_HEAD_INITIALIZER(sfc_dp_head); 41 42 43 static void sfc_eth_dev_clear_ops(struct rte_eth_dev *dev); 44 45 46 static int 47 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) 48 { 49 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 50 efx_nic_fw_info_t enfi; 51 int ret; 52 int rc; 53 54 rc = efx_nic_get_fw_version(sa->nic, &enfi); 55 if (rc != 0) 56 return -rc; 57 58 ret = snprintf(fw_version, fw_size, 59 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16, 60 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1], 61 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]); 62 if (ret < 0) 63 return ret; 64 65 if (enfi.enfi_dpcpu_fw_ids_valid) { 66 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret); 67 int ret_extra; 68 69 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset, 70 fw_size - dpcpu_fw_ids_offset, 71 " rx%" PRIx16 " tx%" PRIx16, 72 enfi.enfi_rx_dpcpu_fw_id, 73 enfi.enfi_tx_dpcpu_fw_id); 74 if (ret_extra < 0) 75 return ret_extra; 76 77 ret += ret_extra; 78 } 79 80 if (fw_size < (size_t)(++ret)) 81 return ret; 82 else 83 return 0; 84 } 85 86 static int 87 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 88 { 89 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 90 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 91 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 92 struct sfc_rss *rss = &sas->rss; 93 struct sfc_mae *mae = &sa->mae; 94 uint64_t txq_offloads_def = 0; 95 96 sfc_log_init(sa, "entry"); 97 98 dev_info->min_mtu = RTE_ETHER_MIN_MTU; 99 dev_info->max_mtu = EFX_MAC_SDU_MAX; 100 101 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; 102 103 dev_info->max_vfs = sa->sriov.num_vfs; 104 105 /* Autonegotiation may be disabled */ 106 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 107 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_1000FDX)) 108 dev_info->speed_capa |= ETH_LINK_SPEED_1G; 109 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_10000FDX)) 110 dev_info->speed_capa |= ETH_LINK_SPEED_10G; 111 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_25000FDX)) 112 dev_info->speed_capa |= ETH_LINK_SPEED_25G; 113 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_40000FDX)) 114 dev_info->speed_capa |= ETH_LINK_SPEED_40G; 115 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_50000FDX)) 116 dev_info->speed_capa |= ETH_LINK_SPEED_50G; 117 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_100000FDX)) 118 dev_info->speed_capa |= ETH_LINK_SPEED_100G; 119 120 dev_info->max_rx_queues = sa->rxq_max; 121 dev_info->max_tx_queues = sa->txq_max; 122 123 /* By default packets are dropped if no descriptors are available */ 124 dev_info->default_rxconf.rx_drop_en = 1; 125 126 dev_info->rx_queue_offload_capa = sfc_rx_get_queue_offload_caps(sa); 127 128 /* 129 * rx_offload_capa includes both device and queue offloads since 130 * the latter may be requested on a per device basis which makes 131 * sense when some offloads are needed to be set on all queues. 132 */ 133 dev_info->rx_offload_capa = sfc_rx_get_dev_offload_caps(sa) | 134 dev_info->rx_queue_offload_capa; 135 136 dev_info->tx_queue_offload_capa = sfc_tx_get_queue_offload_caps(sa); 137 138 /* 139 * tx_offload_capa includes both device and queue offloads since 140 * the latter may be requested on a per device basis which makes 141 * sense when some offloads are needed to be set on all queues. 142 */ 143 dev_info->tx_offload_capa = sfc_tx_get_dev_offload_caps(sa) | 144 dev_info->tx_queue_offload_capa; 145 146 if (dev_info->tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE) 147 txq_offloads_def |= DEV_TX_OFFLOAD_MBUF_FAST_FREE; 148 149 dev_info->default_txconf.offloads |= txq_offloads_def; 150 151 if (rss->context_type != EFX_RX_SCALE_UNAVAILABLE) { 152 uint64_t rte_hf = 0; 153 unsigned int i; 154 155 for (i = 0; i < rss->hf_map_nb_entries; ++i) 156 rte_hf |= rss->hf_map[i].rte; 157 158 dev_info->reta_size = EFX_RSS_TBL_SIZE; 159 dev_info->hash_key_size = EFX_RSS_KEY_SIZE; 160 dev_info->flow_type_rss_offloads = rte_hf; 161 } 162 163 /* Initialize to hardware limits */ 164 dev_info->rx_desc_lim.nb_max = sa->rxq_max_entries; 165 dev_info->rx_desc_lim.nb_min = sa->rxq_min_entries; 166 /* The RXQ hardware requires that the descriptor count is a power 167 * of 2, but rx_desc_lim cannot properly describe that constraint. 168 */ 169 dev_info->rx_desc_lim.nb_align = sa->rxq_min_entries; 170 171 /* Initialize to hardware limits */ 172 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; 173 dev_info->tx_desc_lim.nb_min = sa->txq_min_entries; 174 /* 175 * The TXQ hardware requires that the descriptor count is a power 176 * of 2, but tx_desc_lim cannot properly describe that constraint 177 */ 178 dev_info->tx_desc_lim.nb_align = sa->txq_min_entries; 179 180 if (sap->dp_rx->get_dev_info != NULL) 181 sap->dp_rx->get_dev_info(dev_info); 182 if (sap->dp_tx->get_dev_info != NULL) 183 sap->dp_tx->get_dev_info(dev_info); 184 185 dev_info->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP | 186 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP; 187 188 if (mae->status == SFC_MAE_STATUS_SUPPORTED) { 189 dev_info->switch_info.name = dev->device->driver->name; 190 dev_info->switch_info.domain_id = mae->switch_domain_id; 191 dev_info->switch_info.port_id = mae->switch_port_id; 192 } 193 194 return 0; 195 } 196 197 static const uint32_t * 198 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) 199 { 200 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 201 202 return sap->dp_rx->supported_ptypes_get(sap->shared->tunnel_encaps); 203 } 204 205 static int 206 sfc_dev_configure(struct rte_eth_dev *dev) 207 { 208 struct rte_eth_dev_data *dev_data = dev->data; 209 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 210 int rc; 211 212 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u", 213 dev_data->nb_rx_queues, dev_data->nb_tx_queues); 214 215 sfc_adapter_lock(sa); 216 switch (sa->state) { 217 case SFC_ETHDEV_CONFIGURED: 218 /* FALLTHROUGH */ 219 case SFC_ETHDEV_INITIALIZED: 220 rc = sfc_configure(sa); 221 break; 222 default: 223 sfc_err(sa, "unexpected adapter state %u to configure", 224 sa->state); 225 rc = EINVAL; 226 break; 227 } 228 sfc_adapter_unlock(sa); 229 230 sfc_log_init(sa, "done %d", rc); 231 SFC_ASSERT(rc >= 0); 232 return -rc; 233 } 234 235 static int 236 sfc_dev_start(struct rte_eth_dev *dev) 237 { 238 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 239 int rc; 240 241 sfc_log_init(sa, "entry"); 242 243 sfc_adapter_lock(sa); 244 rc = sfc_start(sa); 245 sfc_adapter_unlock(sa); 246 247 sfc_log_init(sa, "done %d", rc); 248 SFC_ASSERT(rc >= 0); 249 return -rc; 250 } 251 252 static int 253 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 254 { 255 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 256 struct rte_eth_link current_link; 257 int ret; 258 259 sfc_log_init(sa, "entry"); 260 261 if (sa->state != SFC_ETHDEV_STARTED) { 262 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link); 263 } else if (wait_to_complete) { 264 efx_link_mode_t link_mode; 265 266 if (efx_port_poll(sa->nic, &link_mode) != 0) 267 link_mode = EFX_LINK_UNKNOWN; 268 sfc_port_link_mode_to_info(link_mode, ¤t_link); 269 270 } else { 271 sfc_ev_mgmt_qpoll(sa); 272 rte_eth_linkstatus_get(dev, ¤t_link); 273 } 274 275 ret = rte_eth_linkstatus_set(dev, ¤t_link); 276 if (ret == 0) 277 sfc_notice(sa, "Link status is %s", 278 current_link.link_status ? "UP" : "DOWN"); 279 280 return ret; 281 } 282 283 static int 284 sfc_dev_stop(struct rte_eth_dev *dev) 285 { 286 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 287 288 sfc_log_init(sa, "entry"); 289 290 sfc_adapter_lock(sa); 291 sfc_stop(sa); 292 sfc_adapter_unlock(sa); 293 294 sfc_log_init(sa, "done"); 295 296 return 0; 297 } 298 299 static int 300 sfc_dev_set_link_up(struct rte_eth_dev *dev) 301 { 302 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 303 int rc; 304 305 sfc_log_init(sa, "entry"); 306 307 sfc_adapter_lock(sa); 308 rc = sfc_start(sa); 309 sfc_adapter_unlock(sa); 310 311 SFC_ASSERT(rc >= 0); 312 return -rc; 313 } 314 315 static int 316 sfc_dev_set_link_down(struct rte_eth_dev *dev) 317 { 318 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 319 320 sfc_log_init(sa, "entry"); 321 322 sfc_adapter_lock(sa); 323 sfc_stop(sa); 324 sfc_adapter_unlock(sa); 325 326 return 0; 327 } 328 329 static void 330 sfc_eth_dev_secondary_clear_ops(struct rte_eth_dev *dev) 331 { 332 free(dev->process_private); 333 rte_eth_dev_release_port(dev); 334 } 335 336 static int 337 sfc_dev_close(struct rte_eth_dev *dev) 338 { 339 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 340 341 sfc_log_init(sa, "entry"); 342 343 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 344 sfc_eth_dev_secondary_clear_ops(dev); 345 return 0; 346 } 347 348 sfc_pre_detach(sa); 349 350 sfc_adapter_lock(sa); 351 switch (sa->state) { 352 case SFC_ETHDEV_STARTED: 353 sfc_stop(sa); 354 SFC_ASSERT(sa->state == SFC_ETHDEV_CONFIGURED); 355 /* FALLTHROUGH */ 356 case SFC_ETHDEV_CONFIGURED: 357 sfc_close(sa); 358 SFC_ASSERT(sa->state == SFC_ETHDEV_INITIALIZED); 359 /* FALLTHROUGH */ 360 case SFC_ETHDEV_INITIALIZED: 361 break; 362 default: 363 sfc_err(sa, "unexpected adapter state %u on close", sa->state); 364 break; 365 } 366 367 /* 368 * Cleanup all resources. 369 * Rollback primary process sfc_eth_dev_init() below. 370 */ 371 372 sfc_eth_dev_clear_ops(dev); 373 374 sfc_detach(sa); 375 sfc_unprobe(sa); 376 377 sfc_kvargs_cleanup(sa); 378 379 sfc_adapter_unlock(sa); 380 sfc_adapter_lock_fini(sa); 381 382 sfc_log_init(sa, "done"); 383 384 /* Required for logging, so cleanup last */ 385 sa->eth_dev = NULL; 386 387 free(sa); 388 389 return 0; 390 } 391 392 static int 393 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode, 394 boolean_t enabled) 395 { 396 struct sfc_port *port; 397 boolean_t *toggle; 398 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 399 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI); 400 const char *desc = (allmulti) ? "all-multi" : "promiscuous"; 401 int rc = 0; 402 403 sfc_adapter_lock(sa); 404 405 port = &sa->port; 406 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc); 407 408 if (*toggle != enabled) { 409 *toggle = enabled; 410 411 if (sfc_sa2shared(sa)->isolated) { 412 sfc_warn(sa, "isolated mode is active on the port"); 413 sfc_warn(sa, "the change is to be applied on the next " 414 "start provided that isolated mode is " 415 "disabled prior the next start"); 416 } else if ((sa->state == SFC_ETHDEV_STARTED) && 417 ((rc = sfc_set_rx_mode(sa)) != 0)) { 418 *toggle = !(enabled); 419 sfc_warn(sa, "Failed to %s %s mode, rc = %d", 420 ((enabled) ? "enable" : "disable"), desc, rc); 421 422 /* 423 * For promiscuous and all-multicast filters a 424 * permission failure should be reported as an 425 * unsupported filter. 426 */ 427 if (rc == EPERM) 428 rc = ENOTSUP; 429 } 430 } 431 432 sfc_adapter_unlock(sa); 433 return rc; 434 } 435 436 static int 437 sfc_dev_promisc_enable(struct rte_eth_dev *dev) 438 { 439 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE); 440 441 SFC_ASSERT(rc >= 0); 442 return -rc; 443 } 444 445 static int 446 sfc_dev_promisc_disable(struct rte_eth_dev *dev) 447 { 448 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE); 449 450 SFC_ASSERT(rc >= 0); 451 return -rc; 452 } 453 454 static int 455 sfc_dev_allmulti_enable(struct rte_eth_dev *dev) 456 { 457 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE); 458 459 SFC_ASSERT(rc >= 0); 460 return -rc; 461 } 462 463 static int 464 sfc_dev_allmulti_disable(struct rte_eth_dev *dev) 465 { 466 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE); 467 468 SFC_ASSERT(rc >= 0); 469 return -rc; 470 } 471 472 static int 473 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t ethdev_qid, 474 uint16_t nb_rx_desc, unsigned int socket_id, 475 const struct rte_eth_rxconf *rx_conf, 476 struct rte_mempool *mb_pool) 477 { 478 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 479 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 480 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 481 struct sfc_rxq_info *rxq_info; 482 sfc_sw_index_t sw_index; 483 int rc; 484 485 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u", 486 ethdev_qid, nb_rx_desc, socket_id); 487 488 sfc_adapter_lock(sa); 489 490 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 491 rc = sfc_rx_qinit(sa, sw_index, nb_rx_desc, socket_id, 492 rx_conf, mb_pool); 493 if (rc != 0) 494 goto fail_rx_qinit; 495 496 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 497 dev->data->rx_queues[ethdev_qid] = rxq_info->dp; 498 499 sfc_adapter_unlock(sa); 500 501 return 0; 502 503 fail_rx_qinit: 504 sfc_adapter_unlock(sa); 505 SFC_ASSERT(rc > 0); 506 return -rc; 507 } 508 509 static void 510 sfc_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 511 { 512 struct sfc_dp_rxq *dp_rxq = dev->data->rx_queues[qid]; 513 struct sfc_rxq *rxq; 514 struct sfc_adapter *sa; 515 sfc_sw_index_t sw_index; 516 517 if (dp_rxq == NULL) 518 return; 519 520 rxq = sfc_rxq_by_dp_rxq(dp_rxq); 521 sa = rxq->evq->sa; 522 sfc_adapter_lock(sa); 523 524 sw_index = dp_rxq->dpq.queue_id; 525 526 sfc_log_init(sa, "RxQ=%u", sw_index); 527 528 sfc_rx_qfini(sa, sw_index); 529 530 sfc_adapter_unlock(sa); 531 } 532 533 static int 534 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t ethdev_qid, 535 uint16_t nb_tx_desc, unsigned int socket_id, 536 const struct rte_eth_txconf *tx_conf) 537 { 538 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 539 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 540 struct sfc_txq_info *txq_info; 541 sfc_sw_index_t sw_index; 542 int rc; 543 544 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u", 545 ethdev_qid, nb_tx_desc, socket_id); 546 547 sfc_adapter_lock(sa); 548 549 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 550 rc = sfc_tx_qinit(sa, sw_index, nb_tx_desc, socket_id, tx_conf); 551 if (rc != 0) 552 goto fail_tx_qinit; 553 554 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 555 dev->data->tx_queues[ethdev_qid] = txq_info->dp; 556 557 sfc_adapter_unlock(sa); 558 return 0; 559 560 fail_tx_qinit: 561 sfc_adapter_unlock(sa); 562 SFC_ASSERT(rc > 0); 563 return -rc; 564 } 565 566 static void 567 sfc_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 568 { 569 struct sfc_dp_txq *dp_txq = dev->data->tx_queues[qid]; 570 struct sfc_txq *txq; 571 sfc_sw_index_t sw_index; 572 struct sfc_adapter *sa; 573 574 if (dp_txq == NULL) 575 return; 576 577 txq = sfc_txq_by_dp_txq(dp_txq); 578 sw_index = dp_txq->dpq.queue_id; 579 580 SFC_ASSERT(txq->evq != NULL); 581 sa = txq->evq->sa; 582 583 sfc_log_init(sa, "TxQ = %u", sw_index); 584 585 sfc_adapter_lock(sa); 586 587 sfc_tx_qfini(sa, sw_index); 588 589 sfc_adapter_unlock(sa); 590 } 591 592 static void 593 sfc_stats_get_dp_rx(struct sfc_adapter *sa, uint64_t *pkts, uint64_t *bytes) 594 { 595 struct sfc_adapter_shared *sas = sfc_sa2shared(sa); 596 uint64_t pkts_sum = 0; 597 uint64_t bytes_sum = 0; 598 unsigned int i; 599 600 for (i = 0; i < sas->ethdev_rxq_count; ++i) { 601 struct sfc_rxq_info *rxq_info; 602 603 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, i); 604 if (rxq_info->state & SFC_RXQ_INITIALIZED) { 605 union sfc_pkts_bytes qstats; 606 607 sfc_pkts_bytes_get(&rxq_info->dp->dpq.stats, &qstats); 608 pkts_sum += qstats.pkts - 609 sa->sw_stats.reset_rx_pkts[i]; 610 bytes_sum += qstats.bytes - 611 sa->sw_stats.reset_rx_bytes[i]; 612 } 613 } 614 615 *pkts = pkts_sum; 616 *bytes = bytes_sum; 617 } 618 619 static void 620 sfc_stats_get_dp_tx(struct sfc_adapter *sa, uint64_t *pkts, uint64_t *bytes) 621 { 622 struct sfc_adapter_shared *sas = sfc_sa2shared(sa); 623 uint64_t pkts_sum = 0; 624 uint64_t bytes_sum = 0; 625 unsigned int i; 626 627 for (i = 0; i < sas->ethdev_txq_count; ++i) { 628 struct sfc_txq_info *txq_info; 629 630 txq_info = sfc_txq_info_by_ethdev_qid(sas, i); 631 if (txq_info->state & SFC_TXQ_INITIALIZED) { 632 union sfc_pkts_bytes qstats; 633 634 sfc_pkts_bytes_get(&txq_info->dp->dpq.stats, &qstats); 635 pkts_sum += qstats.pkts - 636 sa->sw_stats.reset_tx_pkts[i]; 637 bytes_sum += qstats.bytes - 638 sa->sw_stats.reset_tx_bytes[i]; 639 } 640 } 641 642 *pkts = pkts_sum; 643 *bytes = bytes_sum; 644 } 645 646 /* 647 * Some statistics are computed as A - B where A and B each increase 648 * monotonically with some hardware counter(s) and the counters are read 649 * asynchronously. 650 * 651 * If packet X is counted in A, but not counted in B yet, computed value is 652 * greater than real. 653 * 654 * If packet X is not counted in A at the moment of reading the counter, 655 * but counted in B at the moment of reading the counter, computed value 656 * is less than real. 657 * 658 * However, counter which grows backward is worse evil than slightly wrong 659 * value. So, let's try to guarantee that it never happens except may be 660 * the case when the MAC stats are zeroed as a result of a NIC reset. 661 */ 662 static void 663 sfc_update_diff_stat(uint64_t *stat, uint64_t newval) 664 { 665 if ((int64_t)(newval - *stat) > 0 || newval == 0) 666 *stat = newval; 667 } 668 669 static int 670 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 671 { 672 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 673 bool have_dp_rx_stats = sap->dp_rx->features & SFC_DP_RX_FEAT_STATS; 674 bool have_dp_tx_stats = sap->dp_tx->features & SFC_DP_TX_FEAT_STATS; 675 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 676 struct sfc_port *port = &sa->port; 677 uint64_t *mac_stats; 678 int ret; 679 680 sfc_adapter_lock(sa); 681 682 if (have_dp_rx_stats) 683 sfc_stats_get_dp_rx(sa, &stats->ipackets, &stats->ibytes); 684 if (have_dp_tx_stats) 685 sfc_stats_get_dp_tx(sa, &stats->opackets, &stats->obytes); 686 687 ret = sfc_port_update_mac_stats(sa, B_FALSE); 688 if (ret != 0) 689 goto unlock; 690 691 mac_stats = port->mac_stats_buf; 692 693 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, 694 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) { 695 if (!have_dp_rx_stats) { 696 stats->ipackets = 697 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] + 698 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] + 699 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]; 700 stats->ibytes = 701 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] + 702 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] + 703 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]; 704 705 /* CRC is included in these stats, but shouldn't be */ 706 stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN; 707 } 708 if (!have_dp_tx_stats) { 709 stats->opackets = 710 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] + 711 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] + 712 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]; 713 stats->obytes = 714 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] + 715 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] + 716 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; 717 718 /* CRC is included in these stats, but shouldn't be */ 719 stats->obytes -= stats->opackets * RTE_ETHER_CRC_LEN; 720 } 721 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; 722 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; 723 } else { 724 if (!have_dp_tx_stats) { 725 stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; 726 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS] - 727 mac_stats[EFX_MAC_TX_PKTS] * RTE_ETHER_CRC_LEN; 728 } 729 730 /* 731 * Take into account stats which are whenever supported 732 * on EF10. If some stat is not supported by current 733 * firmware variant or HW revision, it is guaranteed 734 * to be zero in mac_stats. 735 */ 736 stats->imissed = 737 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] + 738 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] + 739 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] + 740 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] + 741 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] + 742 mac_stats[EFX_MAC_PM_TRUNC_QBB] + 743 mac_stats[EFX_MAC_PM_DISCARD_QBB] + 744 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] + 745 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] + 746 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS]; 747 stats->ierrors = 748 mac_stats[EFX_MAC_RX_FCS_ERRORS] + 749 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] + 750 mac_stats[EFX_MAC_RX_JABBER_PKTS]; 751 /* no oerrors counters supported on EF10 */ 752 753 if (!have_dp_rx_stats) { 754 /* Exclude missed, errors and pauses from Rx packets */ 755 sfc_update_diff_stat(&port->ipackets, 756 mac_stats[EFX_MAC_RX_PKTS] - 757 mac_stats[EFX_MAC_RX_PAUSE_PKTS] - 758 stats->imissed - stats->ierrors); 759 stats->ipackets = port->ipackets; 760 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS] - 761 mac_stats[EFX_MAC_RX_PKTS] * RTE_ETHER_CRC_LEN; 762 } 763 } 764 765 unlock: 766 sfc_adapter_unlock(sa); 767 SFC_ASSERT(ret >= 0); 768 return -ret; 769 } 770 771 static int 772 sfc_stats_reset(struct rte_eth_dev *dev) 773 { 774 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 775 struct sfc_port *port = &sa->port; 776 int rc; 777 778 sfc_adapter_lock(sa); 779 780 if (sa->state != SFC_ETHDEV_STARTED) { 781 /* 782 * The operation cannot be done if port is not started; it 783 * will be scheduled to be done during the next port start 784 */ 785 port->mac_stats_reset_pending = B_TRUE; 786 sfc_adapter_unlock(sa); 787 return 0; 788 } 789 790 rc = sfc_port_reset_mac_stats(sa); 791 if (rc != 0) 792 sfc_err(sa, "failed to reset statistics (rc = %d)", rc); 793 794 sfc_sw_xstats_reset(sa); 795 796 sfc_adapter_unlock(sa); 797 798 SFC_ASSERT(rc >= 0); 799 return -rc; 800 } 801 802 static unsigned int 803 sfc_xstats_get_nb_supported(struct sfc_adapter *sa) 804 { 805 struct sfc_port *port = &sa->port; 806 unsigned int nb_supported; 807 808 sfc_adapter_lock(sa); 809 nb_supported = port->mac_stats_nb_supported + 810 sfc_sw_xstats_get_nb_supported(sa); 811 sfc_adapter_unlock(sa); 812 813 return nb_supported; 814 } 815 816 static int 817 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 818 unsigned int xstats_count) 819 { 820 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 821 unsigned int nb_written = 0; 822 unsigned int nb_supported = 0; 823 int rc; 824 825 if (unlikely(xstats == NULL)) 826 return sfc_xstats_get_nb_supported(sa); 827 828 rc = sfc_port_get_mac_stats(sa, xstats, xstats_count, &nb_written); 829 if (rc < 0) 830 return rc; 831 832 nb_supported = rc; 833 sfc_sw_xstats_get_vals(sa, xstats, xstats_count, &nb_written, 834 &nb_supported); 835 836 return nb_supported; 837 } 838 839 static int 840 sfc_xstats_get_names(struct rte_eth_dev *dev, 841 struct rte_eth_xstat_name *xstats_names, 842 unsigned int xstats_count) 843 { 844 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 845 struct sfc_port *port = &sa->port; 846 unsigned int i; 847 unsigned int nstats = 0; 848 unsigned int nb_written = 0; 849 int ret; 850 851 if (unlikely(xstats_names == NULL)) 852 return sfc_xstats_get_nb_supported(sa); 853 854 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 855 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 856 if (nstats < xstats_count) { 857 strlcpy(xstats_names[nstats].name, 858 efx_mac_stat_name(sa->nic, i), 859 sizeof(xstats_names[0].name)); 860 nb_written++; 861 } 862 nstats++; 863 } 864 } 865 866 ret = sfc_sw_xstats_get_names(sa, xstats_names, xstats_count, 867 &nb_written, &nstats); 868 if (ret != 0) { 869 SFC_ASSERT(ret < 0); 870 return ret; 871 } 872 873 return nstats; 874 } 875 876 static int 877 sfc_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 878 uint64_t *values, unsigned int n) 879 { 880 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 881 struct sfc_port *port = &sa->port; 882 unsigned int nb_supported; 883 unsigned int i; 884 int rc; 885 886 if (unlikely(ids == NULL || values == NULL)) 887 return -EINVAL; 888 889 /* 890 * Values array could be filled in nonsequential order. Fill values with 891 * constant indicating invalid ID first. 892 */ 893 for (i = 0; i < n; i++) 894 values[i] = SFC_XSTAT_ID_INVALID_VAL; 895 896 rc = sfc_port_get_mac_stats_by_id(sa, ids, values, n); 897 if (rc != 0) 898 return rc; 899 900 nb_supported = port->mac_stats_nb_supported; 901 sfc_sw_xstats_get_vals_by_id(sa, ids, values, n, &nb_supported); 902 903 /* Return number of written stats before invalid ID is encountered. */ 904 for (i = 0; i < n; i++) { 905 if (values[i] == SFC_XSTAT_ID_INVALID_VAL) 906 return i; 907 } 908 909 return n; 910 } 911 912 static int 913 sfc_xstats_get_names_by_id(struct rte_eth_dev *dev, 914 const uint64_t *ids, 915 struct rte_eth_xstat_name *xstats_names, 916 unsigned int size) 917 { 918 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 919 struct sfc_port *port = &sa->port; 920 unsigned int nb_supported; 921 unsigned int i; 922 int ret; 923 924 if (unlikely(xstats_names == NULL && ids != NULL) || 925 unlikely(xstats_names != NULL && ids == NULL)) 926 return -EINVAL; 927 928 if (unlikely(xstats_names == NULL && ids == NULL)) 929 return sfc_xstats_get_nb_supported(sa); 930 931 /* 932 * Names array could be filled in nonsequential order. Fill names with 933 * string indicating invalid ID first. 934 */ 935 for (i = 0; i < size; i++) 936 xstats_names[i].name[0] = SFC_XSTAT_ID_INVALID_NAME; 937 938 sfc_adapter_lock(sa); 939 940 SFC_ASSERT(port->mac_stats_nb_supported <= 941 RTE_DIM(port->mac_stats_by_id)); 942 943 for (i = 0; i < size; i++) { 944 if (ids[i] < port->mac_stats_nb_supported) { 945 strlcpy(xstats_names[i].name, 946 efx_mac_stat_name(sa->nic, 947 port->mac_stats_by_id[ids[i]]), 948 sizeof(xstats_names[0].name)); 949 } 950 } 951 952 nb_supported = port->mac_stats_nb_supported; 953 954 sfc_adapter_unlock(sa); 955 956 ret = sfc_sw_xstats_get_names_by_id(sa, ids, xstats_names, size, 957 &nb_supported); 958 if (ret != 0) { 959 SFC_ASSERT(ret < 0); 960 return ret; 961 } 962 963 /* Return number of written names before invalid ID is encountered. */ 964 for (i = 0; i < size; i++) { 965 if (xstats_names[i].name[0] == SFC_XSTAT_ID_INVALID_NAME) 966 return i; 967 } 968 969 return size; 970 } 971 972 static int 973 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 974 { 975 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 976 unsigned int wanted_fc, link_fc; 977 978 memset(fc_conf, 0, sizeof(*fc_conf)); 979 980 sfc_adapter_lock(sa); 981 982 if (sa->state == SFC_ETHDEV_STARTED) 983 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc); 984 else 985 link_fc = sa->port.flow_ctrl; 986 987 switch (link_fc) { 988 case 0: 989 fc_conf->mode = RTE_FC_NONE; 990 break; 991 case EFX_FCNTL_RESPOND: 992 fc_conf->mode = RTE_FC_RX_PAUSE; 993 break; 994 case EFX_FCNTL_GENERATE: 995 fc_conf->mode = RTE_FC_TX_PAUSE; 996 break; 997 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE): 998 fc_conf->mode = RTE_FC_FULL; 999 break; 1000 default: 1001 sfc_err(sa, "%s: unexpected flow control value %#x", 1002 __func__, link_fc); 1003 } 1004 1005 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; 1006 1007 sfc_adapter_unlock(sa); 1008 1009 return 0; 1010 } 1011 1012 static int 1013 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1014 { 1015 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1016 struct sfc_port *port = &sa->port; 1017 unsigned int fcntl; 1018 int rc; 1019 1020 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || 1021 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || 1022 fc_conf->mac_ctrl_frame_fwd != 0) { 1023 sfc_err(sa, "unsupported flow control settings specified"); 1024 rc = EINVAL; 1025 goto fail_inval; 1026 } 1027 1028 switch (fc_conf->mode) { 1029 case RTE_FC_NONE: 1030 fcntl = 0; 1031 break; 1032 case RTE_FC_RX_PAUSE: 1033 fcntl = EFX_FCNTL_RESPOND; 1034 break; 1035 case RTE_FC_TX_PAUSE: 1036 fcntl = EFX_FCNTL_GENERATE; 1037 break; 1038 case RTE_FC_FULL: 1039 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 1040 break; 1041 default: 1042 rc = EINVAL; 1043 goto fail_inval; 1044 } 1045 1046 sfc_adapter_lock(sa); 1047 1048 if (sa->state == SFC_ETHDEV_STARTED) { 1049 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg); 1050 if (rc != 0) 1051 goto fail_mac_fcntl_set; 1052 } 1053 1054 port->flow_ctrl = fcntl; 1055 port->flow_ctrl_autoneg = fc_conf->autoneg; 1056 1057 sfc_adapter_unlock(sa); 1058 1059 return 0; 1060 1061 fail_mac_fcntl_set: 1062 sfc_adapter_unlock(sa); 1063 fail_inval: 1064 SFC_ASSERT(rc > 0); 1065 return -rc; 1066 } 1067 1068 static int 1069 sfc_check_scatter_on_all_rx_queues(struct sfc_adapter *sa, size_t pdu) 1070 { 1071 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa); 1072 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 1073 boolean_t scatter_enabled; 1074 const char *error; 1075 unsigned int i; 1076 1077 for (i = 0; i < sas->rxq_count; i++) { 1078 if ((sas->rxq_info[i].state & SFC_RXQ_INITIALIZED) == 0) 1079 continue; 1080 1081 scatter_enabled = (sas->rxq_info[i].type_flags & 1082 EFX_RXQ_FLAG_SCATTER); 1083 1084 if (!sfc_rx_check_scatter(pdu, sa->rxq_ctrl[i].buf_size, 1085 encp->enc_rx_prefix_size, 1086 scatter_enabled, 1087 encp->enc_rx_scatter_max, &error)) { 1088 sfc_err(sa, "MTU check for RxQ %u failed: %s", i, 1089 error); 1090 return EINVAL; 1091 } 1092 } 1093 1094 return 0; 1095 } 1096 1097 static int 1098 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 1099 { 1100 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1101 size_t pdu = EFX_MAC_PDU(mtu); 1102 size_t old_pdu; 1103 int rc; 1104 1105 sfc_log_init(sa, "mtu=%u", mtu); 1106 1107 rc = EINVAL; 1108 if (pdu < EFX_MAC_PDU_MIN) { 1109 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)", 1110 (unsigned int)mtu, (unsigned int)pdu, 1111 EFX_MAC_PDU_MIN); 1112 goto fail_inval; 1113 } 1114 if (pdu > EFX_MAC_PDU_MAX) { 1115 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)", 1116 (unsigned int)mtu, (unsigned int)pdu, 1117 (unsigned int)EFX_MAC_PDU_MAX); 1118 goto fail_inval; 1119 } 1120 1121 sfc_adapter_lock(sa); 1122 1123 rc = sfc_check_scatter_on_all_rx_queues(sa, pdu); 1124 if (rc != 0) 1125 goto fail_check_scatter; 1126 1127 if (pdu != sa->port.pdu) { 1128 if (sa->state == SFC_ETHDEV_STARTED) { 1129 sfc_stop(sa); 1130 1131 old_pdu = sa->port.pdu; 1132 sa->port.pdu = pdu; 1133 rc = sfc_start(sa); 1134 if (rc != 0) 1135 goto fail_start; 1136 } else { 1137 sa->port.pdu = pdu; 1138 } 1139 } 1140 1141 /* 1142 * The driver does not use it, but other PMDs update jumbo frame 1143 * flag and max_rx_pkt_len when MTU is set. 1144 */ 1145 if (mtu > RTE_ETHER_MTU) { 1146 struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode; 1147 rxmode->offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME; 1148 } 1149 1150 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu; 1151 1152 sfc_adapter_unlock(sa); 1153 1154 sfc_log_init(sa, "done"); 1155 return 0; 1156 1157 fail_start: 1158 sa->port.pdu = old_pdu; 1159 if (sfc_start(sa) != 0) 1160 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) " 1161 "PDU max size - port is stopped", 1162 (unsigned int)pdu, (unsigned int)old_pdu); 1163 1164 fail_check_scatter: 1165 sfc_adapter_unlock(sa); 1166 1167 fail_inval: 1168 sfc_log_init(sa, "failed %d", rc); 1169 SFC_ASSERT(rc > 0); 1170 return -rc; 1171 } 1172 static int 1173 sfc_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr) 1174 { 1175 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1176 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 1177 struct sfc_port *port = &sa->port; 1178 struct rte_ether_addr *old_addr = &dev->data->mac_addrs[0]; 1179 int rc = 0; 1180 1181 sfc_adapter_lock(sa); 1182 1183 if (rte_is_same_ether_addr(mac_addr, &port->default_mac_addr)) 1184 goto unlock; 1185 1186 /* 1187 * Copy the address to the device private data so that 1188 * it could be recalled in the case of adapter restart. 1189 */ 1190 rte_ether_addr_copy(mac_addr, &port->default_mac_addr); 1191 1192 /* 1193 * Neither of the two following checks can return 1194 * an error. The new MAC address is preserved in 1195 * the device private data and can be activated 1196 * on the next port start if the user prevents 1197 * isolated mode from being enabled. 1198 */ 1199 if (sfc_sa2shared(sa)->isolated) { 1200 sfc_warn(sa, "isolated mode is active on the port"); 1201 sfc_warn(sa, "will not set MAC address"); 1202 goto unlock; 1203 } 1204 1205 if (sa->state != SFC_ETHDEV_STARTED) { 1206 sfc_notice(sa, "the port is not started"); 1207 sfc_notice(sa, "the new MAC address will be set on port start"); 1208 1209 goto unlock; 1210 } 1211 1212 if (encp->enc_allow_set_mac_with_installed_filters) { 1213 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes); 1214 if (rc != 0) { 1215 sfc_err(sa, "cannot set MAC address (rc = %u)", rc); 1216 goto unlock; 1217 } 1218 1219 /* 1220 * Changing the MAC address by means of MCDI request 1221 * has no effect on received traffic, therefore 1222 * we also need to update unicast filters 1223 */ 1224 rc = sfc_set_rx_mode_unchecked(sa); 1225 if (rc != 0) { 1226 sfc_err(sa, "cannot set filter (rc = %u)", rc); 1227 /* Rollback the old address */ 1228 (void)efx_mac_addr_set(sa->nic, old_addr->addr_bytes); 1229 (void)sfc_set_rx_mode_unchecked(sa); 1230 } 1231 } else { 1232 sfc_warn(sa, "cannot set MAC address with filters installed"); 1233 sfc_warn(sa, "adapter will be restarted to pick the new MAC"); 1234 sfc_warn(sa, "(some traffic may be dropped)"); 1235 1236 /* 1237 * Since setting MAC address with filters installed is not 1238 * allowed on the adapter, the new MAC address will be set 1239 * by means of adapter restart. sfc_start() shall retrieve 1240 * the new address from the device private data and set it. 1241 */ 1242 sfc_stop(sa); 1243 rc = sfc_start(sa); 1244 if (rc != 0) 1245 sfc_err(sa, "cannot restart adapter (rc = %u)", rc); 1246 } 1247 1248 unlock: 1249 if (rc != 0) 1250 rte_ether_addr_copy(old_addr, &port->default_mac_addr); 1251 1252 sfc_adapter_unlock(sa); 1253 1254 SFC_ASSERT(rc >= 0); 1255 return -rc; 1256 } 1257 1258 1259 static int 1260 sfc_set_mc_addr_list(struct rte_eth_dev *dev, 1261 struct rte_ether_addr *mc_addr_set, uint32_t nb_mc_addr) 1262 { 1263 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1264 struct sfc_port *port = &sa->port; 1265 uint8_t *mc_addrs = port->mcast_addrs; 1266 int rc; 1267 unsigned int i; 1268 1269 if (sfc_sa2shared(sa)->isolated) { 1270 sfc_err(sa, "isolated mode is active on the port"); 1271 sfc_err(sa, "will not set multicast address list"); 1272 return -ENOTSUP; 1273 } 1274 1275 if (mc_addrs == NULL) 1276 return -ENOBUFS; 1277 1278 if (nb_mc_addr > port->max_mcast_addrs) { 1279 sfc_err(sa, "too many multicast addresses: %u > %u", 1280 nb_mc_addr, port->max_mcast_addrs); 1281 return -EINVAL; 1282 } 1283 1284 for (i = 0; i < nb_mc_addr; ++i) { 1285 rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, 1286 EFX_MAC_ADDR_LEN); 1287 mc_addrs += EFX_MAC_ADDR_LEN; 1288 } 1289 1290 port->nb_mcast_addrs = nb_mc_addr; 1291 1292 if (sa->state != SFC_ETHDEV_STARTED) 1293 return 0; 1294 1295 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, 1296 port->nb_mcast_addrs); 1297 if (rc != 0) 1298 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); 1299 1300 SFC_ASSERT(rc >= 0); 1301 return -rc; 1302 } 1303 1304 /* 1305 * The function is used by the secondary process as well. It must not 1306 * use any process-local pointers from the adapter data. 1307 */ 1308 static void 1309 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t ethdev_qid, 1310 struct rte_eth_rxq_info *qinfo) 1311 { 1312 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1313 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1314 struct sfc_rxq_info *rxq_info; 1315 1316 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1317 1318 qinfo->mp = rxq_info->refill_mb_pool; 1319 qinfo->conf.rx_free_thresh = rxq_info->refill_threshold; 1320 qinfo->conf.rx_drop_en = 1; 1321 qinfo->conf.rx_deferred_start = rxq_info->deferred_start; 1322 qinfo->conf.offloads = dev->data->dev_conf.rxmode.offloads; 1323 if (rxq_info->type_flags & EFX_RXQ_FLAG_SCATTER) { 1324 qinfo->conf.offloads |= DEV_RX_OFFLOAD_SCATTER; 1325 qinfo->scattered_rx = 1; 1326 } 1327 qinfo->nb_desc = rxq_info->entries; 1328 } 1329 1330 /* 1331 * The function is used by the secondary process as well. It must not 1332 * use any process-local pointers from the adapter data. 1333 */ 1334 static void 1335 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t ethdev_qid, 1336 struct rte_eth_txq_info *qinfo) 1337 { 1338 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1339 struct sfc_txq_info *txq_info; 1340 1341 SFC_ASSERT(ethdev_qid < sas->ethdev_txq_count); 1342 1343 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1344 1345 memset(qinfo, 0, sizeof(*qinfo)); 1346 1347 qinfo->conf.offloads = txq_info->offloads; 1348 qinfo->conf.tx_free_thresh = txq_info->free_thresh; 1349 qinfo->conf.tx_deferred_start = txq_info->deferred_start; 1350 qinfo->nb_desc = txq_info->entries; 1351 } 1352 1353 /* 1354 * The function is used by the secondary process as well. It must not 1355 * use any process-local pointers from the adapter data. 1356 */ 1357 static uint32_t 1358 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1359 { 1360 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1361 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1362 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1363 struct sfc_rxq_info *rxq_info; 1364 1365 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1366 1367 if ((rxq_info->state & SFC_RXQ_STARTED) == 0) 1368 return 0; 1369 1370 return sap->dp_rx->qdesc_npending(rxq_info->dp); 1371 } 1372 1373 /* 1374 * The function is used by the secondary process as well. It must not 1375 * use any process-local pointers from the adapter data. 1376 */ 1377 static int 1378 sfc_rx_descriptor_status(void *queue, uint16_t offset) 1379 { 1380 struct sfc_dp_rxq *dp_rxq = queue; 1381 const struct sfc_dp_rx *dp_rx; 1382 1383 dp_rx = sfc_dp_rx_by_dp_rxq(dp_rxq); 1384 1385 return dp_rx->qdesc_status(dp_rxq, offset); 1386 } 1387 1388 /* 1389 * The function is used by the secondary process as well. It must not 1390 * use any process-local pointers from the adapter data. 1391 */ 1392 static int 1393 sfc_tx_descriptor_status(void *queue, uint16_t offset) 1394 { 1395 struct sfc_dp_txq *dp_txq = queue; 1396 const struct sfc_dp_tx *dp_tx; 1397 1398 dp_tx = sfc_dp_tx_by_dp_txq(dp_txq); 1399 1400 return dp_tx->qdesc_status(dp_txq, offset); 1401 } 1402 1403 static int 1404 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1405 { 1406 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1407 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1408 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1409 struct sfc_rxq_info *rxq_info; 1410 sfc_sw_index_t sw_index; 1411 int rc; 1412 1413 sfc_log_init(sa, "RxQ=%u", ethdev_qid); 1414 1415 sfc_adapter_lock(sa); 1416 1417 rc = EINVAL; 1418 if (sa->state != SFC_ETHDEV_STARTED) 1419 goto fail_not_started; 1420 1421 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1422 if (rxq_info->state != SFC_RXQ_INITIALIZED) 1423 goto fail_not_setup; 1424 1425 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 1426 rc = sfc_rx_qstart(sa, sw_index); 1427 if (rc != 0) 1428 goto fail_rx_qstart; 1429 1430 rxq_info->deferred_started = B_TRUE; 1431 1432 sfc_adapter_unlock(sa); 1433 1434 return 0; 1435 1436 fail_rx_qstart: 1437 fail_not_setup: 1438 fail_not_started: 1439 sfc_adapter_unlock(sa); 1440 SFC_ASSERT(rc > 0); 1441 return -rc; 1442 } 1443 1444 static int 1445 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1446 { 1447 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1448 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1449 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1450 struct sfc_rxq_info *rxq_info; 1451 sfc_sw_index_t sw_index; 1452 1453 sfc_log_init(sa, "RxQ=%u", ethdev_qid); 1454 1455 sfc_adapter_lock(sa); 1456 1457 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 1458 sfc_rx_qstop(sa, sw_index); 1459 1460 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1461 rxq_info->deferred_started = B_FALSE; 1462 1463 sfc_adapter_unlock(sa); 1464 1465 return 0; 1466 } 1467 1468 static int 1469 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1470 { 1471 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1472 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1473 struct sfc_txq_info *txq_info; 1474 sfc_sw_index_t sw_index; 1475 int rc; 1476 1477 sfc_log_init(sa, "TxQ = %u", ethdev_qid); 1478 1479 sfc_adapter_lock(sa); 1480 1481 rc = EINVAL; 1482 if (sa->state != SFC_ETHDEV_STARTED) 1483 goto fail_not_started; 1484 1485 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1486 if (txq_info->state != SFC_TXQ_INITIALIZED) 1487 goto fail_not_setup; 1488 1489 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 1490 rc = sfc_tx_qstart(sa, sw_index); 1491 if (rc != 0) 1492 goto fail_tx_qstart; 1493 1494 txq_info->deferred_started = B_TRUE; 1495 1496 sfc_adapter_unlock(sa); 1497 return 0; 1498 1499 fail_tx_qstart: 1500 1501 fail_not_setup: 1502 fail_not_started: 1503 sfc_adapter_unlock(sa); 1504 SFC_ASSERT(rc > 0); 1505 return -rc; 1506 } 1507 1508 static int 1509 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1510 { 1511 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1512 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1513 struct sfc_txq_info *txq_info; 1514 sfc_sw_index_t sw_index; 1515 1516 sfc_log_init(sa, "TxQ = %u", ethdev_qid); 1517 1518 sfc_adapter_lock(sa); 1519 1520 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 1521 sfc_tx_qstop(sa, sw_index); 1522 1523 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1524 txq_info->deferred_started = B_FALSE; 1525 1526 sfc_adapter_unlock(sa); 1527 return 0; 1528 } 1529 1530 static efx_tunnel_protocol_t 1531 sfc_tunnel_rte_type_to_efx_udp_proto(enum rte_eth_tunnel_type rte_type) 1532 { 1533 switch (rte_type) { 1534 case RTE_TUNNEL_TYPE_VXLAN: 1535 return EFX_TUNNEL_PROTOCOL_VXLAN; 1536 case RTE_TUNNEL_TYPE_GENEVE: 1537 return EFX_TUNNEL_PROTOCOL_GENEVE; 1538 default: 1539 return EFX_TUNNEL_NPROTOS; 1540 } 1541 } 1542 1543 enum sfc_udp_tunnel_op_e { 1544 SFC_UDP_TUNNEL_ADD_PORT, 1545 SFC_UDP_TUNNEL_DEL_PORT, 1546 }; 1547 1548 static int 1549 sfc_dev_udp_tunnel_op(struct rte_eth_dev *dev, 1550 struct rte_eth_udp_tunnel *tunnel_udp, 1551 enum sfc_udp_tunnel_op_e op) 1552 { 1553 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1554 efx_tunnel_protocol_t tunnel_proto; 1555 int rc; 1556 1557 sfc_log_init(sa, "%s udp_port=%u prot_type=%u", 1558 (op == SFC_UDP_TUNNEL_ADD_PORT) ? "add" : 1559 (op == SFC_UDP_TUNNEL_DEL_PORT) ? "delete" : "unknown", 1560 tunnel_udp->udp_port, tunnel_udp->prot_type); 1561 1562 tunnel_proto = 1563 sfc_tunnel_rte_type_to_efx_udp_proto(tunnel_udp->prot_type); 1564 if (tunnel_proto >= EFX_TUNNEL_NPROTOS) { 1565 rc = ENOTSUP; 1566 goto fail_bad_proto; 1567 } 1568 1569 sfc_adapter_lock(sa); 1570 1571 switch (op) { 1572 case SFC_UDP_TUNNEL_ADD_PORT: 1573 rc = efx_tunnel_config_udp_add(sa->nic, 1574 tunnel_udp->udp_port, 1575 tunnel_proto); 1576 break; 1577 case SFC_UDP_TUNNEL_DEL_PORT: 1578 rc = efx_tunnel_config_udp_remove(sa->nic, 1579 tunnel_udp->udp_port, 1580 tunnel_proto); 1581 break; 1582 default: 1583 rc = EINVAL; 1584 goto fail_bad_op; 1585 } 1586 1587 if (rc != 0) 1588 goto fail_op; 1589 1590 if (sa->state == SFC_ETHDEV_STARTED) { 1591 rc = efx_tunnel_reconfigure(sa->nic); 1592 if (rc == EAGAIN) { 1593 /* 1594 * Configuration is accepted by FW and MC reboot 1595 * is initiated to apply the changes. MC reboot 1596 * will be handled in a usual way (MC reboot 1597 * event on management event queue and adapter 1598 * restart). 1599 */ 1600 rc = 0; 1601 } else if (rc != 0) { 1602 goto fail_reconfigure; 1603 } 1604 } 1605 1606 sfc_adapter_unlock(sa); 1607 return 0; 1608 1609 fail_reconfigure: 1610 /* Remove/restore entry since the change makes the trouble */ 1611 switch (op) { 1612 case SFC_UDP_TUNNEL_ADD_PORT: 1613 (void)efx_tunnel_config_udp_remove(sa->nic, 1614 tunnel_udp->udp_port, 1615 tunnel_proto); 1616 break; 1617 case SFC_UDP_TUNNEL_DEL_PORT: 1618 (void)efx_tunnel_config_udp_add(sa->nic, 1619 tunnel_udp->udp_port, 1620 tunnel_proto); 1621 break; 1622 } 1623 1624 fail_op: 1625 fail_bad_op: 1626 sfc_adapter_unlock(sa); 1627 1628 fail_bad_proto: 1629 SFC_ASSERT(rc > 0); 1630 return -rc; 1631 } 1632 1633 static int 1634 sfc_dev_udp_tunnel_port_add(struct rte_eth_dev *dev, 1635 struct rte_eth_udp_tunnel *tunnel_udp) 1636 { 1637 return sfc_dev_udp_tunnel_op(dev, tunnel_udp, SFC_UDP_TUNNEL_ADD_PORT); 1638 } 1639 1640 static int 1641 sfc_dev_udp_tunnel_port_del(struct rte_eth_dev *dev, 1642 struct rte_eth_udp_tunnel *tunnel_udp) 1643 { 1644 return sfc_dev_udp_tunnel_op(dev, tunnel_udp, SFC_UDP_TUNNEL_DEL_PORT); 1645 } 1646 1647 /* 1648 * The function is used by the secondary process as well. It must not 1649 * use any process-local pointers from the adapter data. 1650 */ 1651 static int 1652 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1653 struct rte_eth_rss_conf *rss_conf) 1654 { 1655 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1656 struct sfc_rss *rss = &sas->rss; 1657 1658 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) 1659 return -ENOTSUP; 1660 1661 /* 1662 * Mapping of hash configuration between RTE and EFX is not one-to-one, 1663 * hence, conversion is done here to derive a correct set of ETH_RSS 1664 * flags which corresponds to the active EFX configuration stored 1665 * locally in 'sfc_adapter' and kept up-to-date 1666 */ 1667 rss_conf->rss_hf = sfc_rx_hf_efx_to_rte(rss, rss->hash_types); 1668 rss_conf->rss_key_len = EFX_RSS_KEY_SIZE; 1669 if (rss_conf->rss_key != NULL) 1670 rte_memcpy(rss_conf->rss_key, rss->key, EFX_RSS_KEY_SIZE); 1671 1672 return 0; 1673 } 1674 1675 static int 1676 sfc_dev_rss_hash_update(struct rte_eth_dev *dev, 1677 struct rte_eth_rss_conf *rss_conf) 1678 { 1679 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1680 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss; 1681 unsigned int efx_hash_types; 1682 uint32_t contexts[] = {EFX_RSS_CONTEXT_DEFAULT, rss->dummy_rss_context}; 1683 unsigned int n_contexts; 1684 unsigned int mode_i = 0; 1685 unsigned int key_i = 0; 1686 unsigned int i = 0; 1687 int rc = 0; 1688 1689 n_contexts = rss->dummy_rss_context == EFX_RSS_CONTEXT_DEFAULT ? 1 : 2; 1690 1691 if (sfc_sa2shared(sa)->isolated) 1692 return -ENOTSUP; 1693 1694 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) { 1695 sfc_err(sa, "RSS is not available"); 1696 return -ENOTSUP; 1697 } 1698 1699 if (rss->channels == 0) { 1700 sfc_err(sa, "RSS is not configured"); 1701 return -EINVAL; 1702 } 1703 1704 if ((rss_conf->rss_key != NULL) && 1705 (rss_conf->rss_key_len != sizeof(rss->key))) { 1706 sfc_err(sa, "RSS key size is wrong (should be %zu)", 1707 sizeof(rss->key)); 1708 return -EINVAL; 1709 } 1710 1711 sfc_adapter_lock(sa); 1712 1713 rc = sfc_rx_hf_rte_to_efx(sa, rss_conf->rss_hf, &efx_hash_types); 1714 if (rc != 0) 1715 goto fail_rx_hf_rte_to_efx; 1716 1717 for (mode_i = 0; mode_i < n_contexts; mode_i++) { 1718 rc = efx_rx_scale_mode_set(sa->nic, contexts[mode_i], 1719 rss->hash_alg, efx_hash_types, 1720 B_TRUE); 1721 if (rc != 0) 1722 goto fail_scale_mode_set; 1723 } 1724 1725 if (rss_conf->rss_key != NULL) { 1726 if (sa->state == SFC_ETHDEV_STARTED) { 1727 for (key_i = 0; key_i < n_contexts; key_i++) { 1728 rc = efx_rx_scale_key_set(sa->nic, 1729 contexts[key_i], 1730 rss_conf->rss_key, 1731 sizeof(rss->key)); 1732 if (rc != 0) 1733 goto fail_scale_key_set; 1734 } 1735 } 1736 1737 rte_memcpy(rss->key, rss_conf->rss_key, sizeof(rss->key)); 1738 } 1739 1740 rss->hash_types = efx_hash_types; 1741 1742 sfc_adapter_unlock(sa); 1743 1744 return 0; 1745 1746 fail_scale_key_set: 1747 for (i = 0; i < key_i; i++) { 1748 if (efx_rx_scale_key_set(sa->nic, contexts[i], rss->key, 1749 sizeof(rss->key)) != 0) 1750 sfc_err(sa, "failed to restore RSS key"); 1751 } 1752 1753 fail_scale_mode_set: 1754 for (i = 0; i < mode_i; i++) { 1755 if (efx_rx_scale_mode_set(sa->nic, contexts[i], 1756 EFX_RX_HASHALG_TOEPLITZ, 1757 rss->hash_types, B_TRUE) != 0) 1758 sfc_err(sa, "failed to restore RSS mode"); 1759 } 1760 1761 fail_rx_hf_rte_to_efx: 1762 sfc_adapter_unlock(sa); 1763 return -rc; 1764 } 1765 1766 /* 1767 * The function is used by the secondary process as well. It must not 1768 * use any process-local pointers from the adapter data. 1769 */ 1770 static int 1771 sfc_dev_rss_reta_query(struct rte_eth_dev *dev, 1772 struct rte_eth_rss_reta_entry64 *reta_conf, 1773 uint16_t reta_size) 1774 { 1775 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1776 struct sfc_rss *rss = &sas->rss; 1777 int entry; 1778 1779 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE || sas->isolated) 1780 return -ENOTSUP; 1781 1782 if (rss->channels == 0) 1783 return -EINVAL; 1784 1785 if (reta_size != EFX_RSS_TBL_SIZE) 1786 return -EINVAL; 1787 1788 for (entry = 0; entry < reta_size; entry++) { 1789 int grp = entry / RTE_RETA_GROUP_SIZE; 1790 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1791 1792 if ((reta_conf[grp].mask >> grp_idx) & 1) 1793 reta_conf[grp].reta[grp_idx] = rss->tbl[entry]; 1794 } 1795 1796 return 0; 1797 } 1798 1799 static int 1800 sfc_dev_rss_reta_update(struct rte_eth_dev *dev, 1801 struct rte_eth_rss_reta_entry64 *reta_conf, 1802 uint16_t reta_size) 1803 { 1804 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1805 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss; 1806 unsigned int *rss_tbl_new; 1807 uint16_t entry; 1808 int rc = 0; 1809 1810 1811 if (sfc_sa2shared(sa)->isolated) 1812 return -ENOTSUP; 1813 1814 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) { 1815 sfc_err(sa, "RSS is not available"); 1816 return -ENOTSUP; 1817 } 1818 1819 if (rss->channels == 0) { 1820 sfc_err(sa, "RSS is not configured"); 1821 return -EINVAL; 1822 } 1823 1824 if (reta_size != EFX_RSS_TBL_SIZE) { 1825 sfc_err(sa, "RETA size is wrong (should be %u)", 1826 EFX_RSS_TBL_SIZE); 1827 return -EINVAL; 1828 } 1829 1830 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(rss->tbl), 0); 1831 if (rss_tbl_new == NULL) 1832 return -ENOMEM; 1833 1834 sfc_adapter_lock(sa); 1835 1836 rte_memcpy(rss_tbl_new, rss->tbl, sizeof(rss->tbl)); 1837 1838 for (entry = 0; entry < reta_size; entry++) { 1839 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1840 struct rte_eth_rss_reta_entry64 *grp; 1841 1842 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE]; 1843 1844 if (grp->mask & (1ull << grp_idx)) { 1845 if (grp->reta[grp_idx] >= rss->channels) { 1846 rc = EINVAL; 1847 goto bad_reta_entry; 1848 } 1849 rss_tbl_new[entry] = grp->reta[grp_idx]; 1850 } 1851 } 1852 1853 if (sa->state == SFC_ETHDEV_STARTED) { 1854 rc = efx_rx_scale_tbl_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT, 1855 rss_tbl_new, EFX_RSS_TBL_SIZE); 1856 if (rc != 0) 1857 goto fail_scale_tbl_set; 1858 } 1859 1860 rte_memcpy(rss->tbl, rss_tbl_new, sizeof(rss->tbl)); 1861 1862 fail_scale_tbl_set: 1863 bad_reta_entry: 1864 sfc_adapter_unlock(sa); 1865 1866 rte_free(rss_tbl_new); 1867 1868 SFC_ASSERT(rc >= 0); 1869 return -rc; 1870 } 1871 1872 static int 1873 sfc_dev_flow_ops_get(struct rte_eth_dev *dev __rte_unused, 1874 const struct rte_flow_ops **ops) 1875 { 1876 *ops = &sfc_flow_ops; 1877 return 0; 1878 } 1879 1880 static int 1881 sfc_pool_ops_supported(struct rte_eth_dev *dev, const char *pool) 1882 { 1883 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1884 1885 /* 1886 * If Rx datapath does not provide callback to check mempool, 1887 * all pools are supported. 1888 */ 1889 if (sap->dp_rx->pool_ops_supported == NULL) 1890 return 1; 1891 1892 return sap->dp_rx->pool_ops_supported(pool); 1893 } 1894 1895 static int 1896 sfc_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1897 { 1898 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1899 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1900 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1901 struct sfc_rxq_info *rxq_info; 1902 1903 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1904 1905 return sap->dp_rx->intr_enable(rxq_info->dp); 1906 } 1907 1908 static int 1909 sfc_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1910 { 1911 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1912 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1913 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1914 struct sfc_rxq_info *rxq_info; 1915 1916 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1917 1918 return sap->dp_rx->intr_disable(rxq_info->dp); 1919 } 1920 1921 static const struct eth_dev_ops sfc_eth_dev_ops = { 1922 .dev_configure = sfc_dev_configure, 1923 .dev_start = sfc_dev_start, 1924 .dev_stop = sfc_dev_stop, 1925 .dev_set_link_up = sfc_dev_set_link_up, 1926 .dev_set_link_down = sfc_dev_set_link_down, 1927 .dev_close = sfc_dev_close, 1928 .promiscuous_enable = sfc_dev_promisc_enable, 1929 .promiscuous_disable = sfc_dev_promisc_disable, 1930 .allmulticast_enable = sfc_dev_allmulti_enable, 1931 .allmulticast_disable = sfc_dev_allmulti_disable, 1932 .link_update = sfc_dev_link_update, 1933 .stats_get = sfc_stats_get, 1934 .stats_reset = sfc_stats_reset, 1935 .xstats_get = sfc_xstats_get, 1936 .xstats_reset = sfc_stats_reset, 1937 .xstats_get_names = sfc_xstats_get_names, 1938 .dev_infos_get = sfc_dev_infos_get, 1939 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 1940 .mtu_set = sfc_dev_set_mtu, 1941 .rx_queue_start = sfc_rx_queue_start, 1942 .rx_queue_stop = sfc_rx_queue_stop, 1943 .tx_queue_start = sfc_tx_queue_start, 1944 .tx_queue_stop = sfc_tx_queue_stop, 1945 .rx_queue_setup = sfc_rx_queue_setup, 1946 .rx_queue_release = sfc_rx_queue_release, 1947 .rx_queue_intr_enable = sfc_rx_queue_intr_enable, 1948 .rx_queue_intr_disable = sfc_rx_queue_intr_disable, 1949 .tx_queue_setup = sfc_tx_queue_setup, 1950 .tx_queue_release = sfc_tx_queue_release, 1951 .flow_ctrl_get = sfc_flow_ctrl_get, 1952 .flow_ctrl_set = sfc_flow_ctrl_set, 1953 .mac_addr_set = sfc_mac_addr_set, 1954 .udp_tunnel_port_add = sfc_dev_udp_tunnel_port_add, 1955 .udp_tunnel_port_del = sfc_dev_udp_tunnel_port_del, 1956 .reta_update = sfc_dev_rss_reta_update, 1957 .reta_query = sfc_dev_rss_reta_query, 1958 .rss_hash_update = sfc_dev_rss_hash_update, 1959 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 1960 .flow_ops_get = sfc_dev_flow_ops_get, 1961 .set_mc_addr_list = sfc_set_mc_addr_list, 1962 .rxq_info_get = sfc_rx_queue_info_get, 1963 .txq_info_get = sfc_tx_queue_info_get, 1964 .fw_version_get = sfc_fw_version_get, 1965 .xstats_get_by_id = sfc_xstats_get_by_id, 1966 .xstats_get_names_by_id = sfc_xstats_get_names_by_id, 1967 .pool_ops_supported = sfc_pool_ops_supported, 1968 }; 1969 1970 struct sfc_ethdev_init_data { 1971 uint16_t nb_representors; 1972 }; 1973 1974 /** 1975 * Duplicate a string in potentially shared memory required for 1976 * multi-process support. 1977 * 1978 * strdup() allocates from process-local heap/memory. 1979 */ 1980 static char * 1981 sfc_strdup(const char *str) 1982 { 1983 size_t size; 1984 char *copy; 1985 1986 if (str == NULL) 1987 return NULL; 1988 1989 size = strlen(str) + 1; 1990 copy = rte_malloc(__func__, size, 0); 1991 if (copy != NULL) 1992 rte_memcpy(copy, str, size); 1993 1994 return copy; 1995 } 1996 1997 static int 1998 sfc_eth_dev_set_ops(struct rte_eth_dev *dev) 1999 { 2000 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2001 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2002 const struct sfc_dp_rx *dp_rx; 2003 const struct sfc_dp_tx *dp_tx; 2004 const efx_nic_cfg_t *encp; 2005 unsigned int avail_caps = 0; 2006 const char *rx_name = NULL; 2007 const char *tx_name = NULL; 2008 int rc; 2009 2010 switch (sa->family) { 2011 case EFX_FAMILY_HUNTINGTON: 2012 case EFX_FAMILY_MEDFORD: 2013 case EFX_FAMILY_MEDFORD2: 2014 avail_caps |= SFC_DP_HW_FW_CAP_EF10; 2015 avail_caps |= SFC_DP_HW_FW_CAP_RX_EFX; 2016 avail_caps |= SFC_DP_HW_FW_CAP_TX_EFX; 2017 break; 2018 case EFX_FAMILY_RIVERHEAD: 2019 avail_caps |= SFC_DP_HW_FW_CAP_EF100; 2020 break; 2021 default: 2022 break; 2023 } 2024 2025 encp = efx_nic_cfg_get(sa->nic); 2026 if (encp->enc_rx_es_super_buffer_supported) 2027 avail_caps |= SFC_DP_HW_FW_CAP_RX_ES_SUPER_BUFFER; 2028 2029 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH, 2030 sfc_kvarg_string_handler, &rx_name); 2031 if (rc != 0) 2032 goto fail_kvarg_rx_datapath; 2033 2034 if (rx_name != NULL) { 2035 dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name); 2036 if (dp_rx == NULL) { 2037 sfc_err(sa, "Rx datapath %s not found", rx_name); 2038 rc = ENOENT; 2039 goto fail_dp_rx; 2040 } 2041 if (!sfc_dp_match_hw_fw_caps(&dp_rx->dp, avail_caps)) { 2042 sfc_err(sa, 2043 "Insufficient Hw/FW capabilities to use Rx datapath %s", 2044 rx_name); 2045 rc = EINVAL; 2046 goto fail_dp_rx_caps; 2047 } 2048 } else { 2049 dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps); 2050 if (dp_rx == NULL) { 2051 sfc_err(sa, "Rx datapath by caps %#x not found", 2052 avail_caps); 2053 rc = ENOENT; 2054 goto fail_dp_rx; 2055 } 2056 } 2057 2058 sas->dp_rx_name = sfc_strdup(dp_rx->dp.name); 2059 if (sas->dp_rx_name == NULL) { 2060 rc = ENOMEM; 2061 goto fail_dp_rx_name; 2062 } 2063 2064 sfc_notice(sa, "use %s Rx datapath", sas->dp_rx_name); 2065 2066 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH, 2067 sfc_kvarg_string_handler, &tx_name); 2068 if (rc != 0) 2069 goto fail_kvarg_tx_datapath; 2070 2071 if (tx_name != NULL) { 2072 dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name); 2073 if (dp_tx == NULL) { 2074 sfc_err(sa, "Tx datapath %s not found", tx_name); 2075 rc = ENOENT; 2076 goto fail_dp_tx; 2077 } 2078 if (!sfc_dp_match_hw_fw_caps(&dp_tx->dp, avail_caps)) { 2079 sfc_err(sa, 2080 "Insufficient Hw/FW capabilities to use Tx datapath %s", 2081 tx_name); 2082 rc = EINVAL; 2083 goto fail_dp_tx_caps; 2084 } 2085 } else { 2086 dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps); 2087 if (dp_tx == NULL) { 2088 sfc_err(sa, "Tx datapath by caps %#x not found", 2089 avail_caps); 2090 rc = ENOENT; 2091 goto fail_dp_tx; 2092 } 2093 } 2094 2095 sas->dp_tx_name = sfc_strdup(dp_tx->dp.name); 2096 if (sas->dp_tx_name == NULL) { 2097 rc = ENOMEM; 2098 goto fail_dp_tx_name; 2099 } 2100 2101 sfc_notice(sa, "use %s Tx datapath", sas->dp_tx_name); 2102 2103 sa->priv.dp_rx = dp_rx; 2104 sa->priv.dp_tx = dp_tx; 2105 2106 dev->rx_pkt_burst = dp_rx->pkt_burst; 2107 dev->tx_pkt_prepare = dp_tx->pkt_prepare; 2108 dev->tx_pkt_burst = dp_tx->pkt_burst; 2109 2110 dev->rx_queue_count = sfc_rx_queue_count; 2111 dev->rx_descriptor_status = sfc_rx_descriptor_status; 2112 dev->tx_descriptor_status = sfc_tx_descriptor_status; 2113 dev->dev_ops = &sfc_eth_dev_ops; 2114 2115 return 0; 2116 2117 fail_dp_tx_name: 2118 fail_dp_tx_caps: 2119 fail_dp_tx: 2120 fail_kvarg_tx_datapath: 2121 rte_free(sas->dp_rx_name); 2122 sas->dp_rx_name = NULL; 2123 2124 fail_dp_rx_name: 2125 fail_dp_rx_caps: 2126 fail_dp_rx: 2127 fail_kvarg_rx_datapath: 2128 return rc; 2129 } 2130 2131 static void 2132 sfc_eth_dev_clear_ops(struct rte_eth_dev *dev) 2133 { 2134 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2135 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2136 2137 dev->dev_ops = NULL; 2138 dev->tx_pkt_prepare = NULL; 2139 dev->rx_pkt_burst = NULL; 2140 dev->tx_pkt_burst = NULL; 2141 2142 rte_free(sas->dp_tx_name); 2143 sas->dp_tx_name = NULL; 2144 sa->priv.dp_tx = NULL; 2145 2146 rte_free(sas->dp_rx_name); 2147 sas->dp_rx_name = NULL; 2148 sa->priv.dp_rx = NULL; 2149 } 2150 2151 static const struct eth_dev_ops sfc_eth_dev_secondary_ops = { 2152 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 2153 .reta_query = sfc_dev_rss_reta_query, 2154 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 2155 .rxq_info_get = sfc_rx_queue_info_get, 2156 .txq_info_get = sfc_tx_queue_info_get, 2157 }; 2158 2159 static int 2160 sfc_eth_dev_secondary_init(struct rte_eth_dev *dev, uint32_t logtype_main) 2161 { 2162 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2163 struct sfc_adapter_priv *sap; 2164 const struct sfc_dp_rx *dp_rx; 2165 const struct sfc_dp_tx *dp_tx; 2166 int rc; 2167 2168 /* 2169 * Allocate process private data from heap, since it should not 2170 * be located in shared memory allocated using rte_malloc() API. 2171 */ 2172 sap = calloc(1, sizeof(*sap)); 2173 if (sap == NULL) { 2174 rc = ENOMEM; 2175 goto fail_alloc_priv; 2176 } 2177 2178 sap->logtype_main = logtype_main; 2179 2180 dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, sas->dp_rx_name); 2181 if (dp_rx == NULL) { 2182 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2183 "cannot find %s Rx datapath", sas->dp_rx_name); 2184 rc = ENOENT; 2185 goto fail_dp_rx; 2186 } 2187 if (~dp_rx->features & SFC_DP_RX_FEAT_MULTI_PROCESS) { 2188 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2189 "%s Rx datapath does not support multi-process", 2190 sas->dp_rx_name); 2191 rc = EINVAL; 2192 goto fail_dp_rx_multi_process; 2193 } 2194 2195 dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, sas->dp_tx_name); 2196 if (dp_tx == NULL) { 2197 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2198 "cannot find %s Tx datapath", sas->dp_tx_name); 2199 rc = ENOENT; 2200 goto fail_dp_tx; 2201 } 2202 if (~dp_tx->features & SFC_DP_TX_FEAT_MULTI_PROCESS) { 2203 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2204 "%s Tx datapath does not support multi-process", 2205 sas->dp_tx_name); 2206 rc = EINVAL; 2207 goto fail_dp_tx_multi_process; 2208 } 2209 2210 sap->dp_rx = dp_rx; 2211 sap->dp_tx = dp_tx; 2212 2213 dev->process_private = sap; 2214 dev->rx_pkt_burst = dp_rx->pkt_burst; 2215 dev->tx_pkt_prepare = dp_tx->pkt_prepare; 2216 dev->tx_pkt_burst = dp_tx->pkt_burst; 2217 dev->rx_queue_count = sfc_rx_queue_count; 2218 dev->rx_descriptor_status = sfc_rx_descriptor_status; 2219 dev->tx_descriptor_status = sfc_tx_descriptor_status; 2220 dev->dev_ops = &sfc_eth_dev_secondary_ops; 2221 2222 return 0; 2223 2224 fail_dp_tx_multi_process: 2225 fail_dp_tx: 2226 fail_dp_rx_multi_process: 2227 fail_dp_rx: 2228 free(sap); 2229 2230 fail_alloc_priv: 2231 return rc; 2232 } 2233 2234 static void 2235 sfc_register_dp(void) 2236 { 2237 /* Register once */ 2238 if (TAILQ_EMPTY(&sfc_dp_head)) { 2239 /* Prefer EF10 datapath */ 2240 sfc_dp_register(&sfc_dp_head, &sfc_ef100_rx.dp); 2241 sfc_dp_register(&sfc_dp_head, &sfc_ef10_essb_rx.dp); 2242 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp); 2243 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); 2244 2245 sfc_dp_register(&sfc_dp_head, &sfc_ef100_tx.dp); 2246 sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp); 2247 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp); 2248 sfc_dp_register(&sfc_dp_head, &sfc_ef10_simple_tx.dp); 2249 } 2250 } 2251 2252 static int 2253 sfc_parse_switch_mode(struct sfc_adapter *sa, bool has_representors) 2254 { 2255 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 2256 const char *switch_mode = NULL; 2257 int rc; 2258 2259 sfc_log_init(sa, "entry"); 2260 2261 rc = sfc_kvargs_process(sa, SFC_KVARG_SWITCH_MODE, 2262 sfc_kvarg_string_handler, &switch_mode); 2263 if (rc != 0) 2264 goto fail_kvargs; 2265 2266 if (switch_mode == NULL) { 2267 sa->switchdev = encp->enc_mae_supported && 2268 (!encp->enc_datapath_cap_evb || 2269 has_representors); 2270 } else if (strcasecmp(switch_mode, SFC_KVARG_SWITCH_MODE_LEGACY) == 0) { 2271 sa->switchdev = false; 2272 } else if (strcasecmp(switch_mode, 2273 SFC_KVARG_SWITCH_MODE_SWITCHDEV) == 0) { 2274 sa->switchdev = true; 2275 } else { 2276 sfc_err(sa, "invalid switch mode device argument '%s'", 2277 switch_mode); 2278 rc = EINVAL; 2279 goto fail_mode; 2280 } 2281 2282 sfc_log_init(sa, "done"); 2283 2284 return 0; 2285 2286 fail_mode: 2287 fail_kvargs: 2288 sfc_log_init(sa, "failed: %s", rte_strerror(rc)); 2289 2290 return rc; 2291 } 2292 2293 static int 2294 sfc_eth_dev_init(struct rte_eth_dev *dev, void *init_params) 2295 { 2296 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2297 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 2298 struct sfc_ethdev_init_data *init_data = init_params; 2299 uint32_t logtype_main; 2300 struct sfc_adapter *sa; 2301 int rc; 2302 const efx_nic_cfg_t *encp; 2303 const struct rte_ether_addr *from; 2304 int ret; 2305 2306 if (sfc_efx_dev_class_get(pci_dev->device.devargs) != 2307 SFC_EFX_DEV_CLASS_NET) { 2308 SFC_GENERIC_LOG(DEBUG, 2309 "Incompatible device class: skip probing, should be probed by other sfc driver."); 2310 return 1; 2311 } 2312 2313 rc = sfc_dp_mport_register(); 2314 if (rc != 0) 2315 return rc; 2316 2317 sfc_register_dp(); 2318 2319 logtype_main = sfc_register_logtype(&pci_dev->addr, 2320 SFC_LOGTYPE_MAIN_STR, 2321 RTE_LOG_NOTICE); 2322 2323 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2324 return -sfc_eth_dev_secondary_init(dev, logtype_main); 2325 2326 /* Required for logging */ 2327 ret = snprintf(sas->log_prefix, sizeof(sas->log_prefix), 2328 "PMD: sfc_efx " PCI_PRI_FMT " #%" PRIu16 ": ", 2329 pci_dev->addr.domain, pci_dev->addr.bus, 2330 pci_dev->addr.devid, pci_dev->addr.function, 2331 dev->data->port_id); 2332 if (ret < 0 || ret >= (int)sizeof(sas->log_prefix)) { 2333 SFC_GENERIC_LOG(ERR, 2334 "reserved log prefix is too short for " PCI_PRI_FMT, 2335 pci_dev->addr.domain, pci_dev->addr.bus, 2336 pci_dev->addr.devid, pci_dev->addr.function); 2337 return -EINVAL; 2338 } 2339 sas->pci_addr = pci_dev->addr; 2340 sas->port_id = dev->data->port_id; 2341 2342 /* 2343 * Allocate process private data from heap, since it should not 2344 * be located in shared memory allocated using rte_malloc() API. 2345 */ 2346 sa = calloc(1, sizeof(*sa)); 2347 if (sa == NULL) { 2348 rc = ENOMEM; 2349 goto fail_alloc_sa; 2350 } 2351 2352 dev->process_private = sa; 2353 2354 /* Required for logging */ 2355 sa->priv.shared = sas; 2356 sa->priv.logtype_main = logtype_main; 2357 2358 sa->eth_dev = dev; 2359 2360 /* Copy PCI device info to the dev->data */ 2361 rte_eth_copy_pci_info(dev, pci_dev); 2362 dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 2363 dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 2364 2365 rc = sfc_kvargs_parse(sa); 2366 if (rc != 0) 2367 goto fail_kvargs_parse; 2368 2369 sfc_log_init(sa, "entry"); 2370 2371 dev->data->mac_addrs = rte_zmalloc("sfc", RTE_ETHER_ADDR_LEN, 0); 2372 if (dev->data->mac_addrs == NULL) { 2373 rc = ENOMEM; 2374 goto fail_mac_addrs; 2375 } 2376 2377 sfc_adapter_lock_init(sa); 2378 sfc_adapter_lock(sa); 2379 2380 sfc_log_init(sa, "probing"); 2381 rc = sfc_probe(sa); 2382 if (rc != 0) 2383 goto fail_probe; 2384 2385 /* 2386 * Selecting a default switch mode requires the NIC to be probed and 2387 * to have its capabilities filled in. 2388 */ 2389 rc = sfc_parse_switch_mode(sa, init_data->nb_representors > 0); 2390 if (rc != 0) 2391 goto fail_switch_mode; 2392 2393 sfc_log_init(sa, "set device ops"); 2394 rc = sfc_eth_dev_set_ops(dev); 2395 if (rc != 0) 2396 goto fail_set_ops; 2397 2398 sfc_log_init(sa, "attaching"); 2399 rc = sfc_attach(sa); 2400 if (rc != 0) 2401 goto fail_attach; 2402 2403 if (sa->switchdev && sa->mae.status != SFC_MAE_STATUS_SUPPORTED) { 2404 sfc_err(sa, 2405 "failed to enable switchdev mode without MAE support"); 2406 rc = ENOTSUP; 2407 goto fail_switchdev_no_mae; 2408 } 2409 2410 encp = efx_nic_cfg_get(sa->nic); 2411 2412 /* 2413 * The arguments are really reverse order in comparison to 2414 * Linux kernel. Copy from NIC config to Ethernet device data. 2415 */ 2416 from = (const struct rte_ether_addr *)(encp->enc_mac_addr); 2417 rte_ether_addr_copy(from, &dev->data->mac_addrs[0]); 2418 2419 sfc_adapter_unlock(sa); 2420 2421 sfc_log_init(sa, "done"); 2422 return 0; 2423 2424 fail_switchdev_no_mae: 2425 sfc_detach(sa); 2426 2427 fail_attach: 2428 sfc_eth_dev_clear_ops(dev); 2429 2430 fail_set_ops: 2431 fail_switch_mode: 2432 sfc_unprobe(sa); 2433 2434 fail_probe: 2435 sfc_adapter_unlock(sa); 2436 sfc_adapter_lock_fini(sa); 2437 rte_free(dev->data->mac_addrs); 2438 dev->data->mac_addrs = NULL; 2439 2440 fail_mac_addrs: 2441 sfc_kvargs_cleanup(sa); 2442 2443 fail_kvargs_parse: 2444 sfc_log_init(sa, "failed %d", rc); 2445 dev->process_private = NULL; 2446 free(sa); 2447 2448 fail_alloc_sa: 2449 SFC_ASSERT(rc > 0); 2450 return -rc; 2451 } 2452 2453 static int 2454 sfc_eth_dev_uninit(struct rte_eth_dev *dev) 2455 { 2456 sfc_dev_close(dev); 2457 2458 return 0; 2459 } 2460 2461 static const struct rte_pci_id pci_id_sfc_efx_map[] = { 2462 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, 2463 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, 2464 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, 2465 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, 2466 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, 2467 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, 2468 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2) }, 2469 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2_VF) }, 2470 { RTE_PCI_DEVICE(EFX_PCI_VENID_XILINX, EFX_PCI_DEVID_RIVERHEAD) }, 2471 { .vendor_id = 0 /* sentinel */ } 2472 }; 2473 2474 static int 2475 sfc_parse_rte_devargs(const char *args, struct rte_eth_devargs *devargs) 2476 { 2477 struct rte_eth_devargs eth_da = { .nb_representor_ports = 0 }; 2478 int rc; 2479 2480 if (args != NULL) { 2481 rc = rte_eth_devargs_parse(args, ð_da); 2482 if (rc != 0) { 2483 SFC_GENERIC_LOG(ERR, 2484 "Failed to parse generic devargs '%s'", 2485 args); 2486 return rc; 2487 } 2488 } 2489 2490 *devargs = eth_da; 2491 2492 return 0; 2493 } 2494 2495 static int 2496 sfc_eth_dev_create(struct rte_pci_device *pci_dev, 2497 struct sfc_ethdev_init_data *init_data, 2498 struct rte_eth_dev **devp) 2499 { 2500 struct rte_eth_dev *dev; 2501 int rc; 2502 2503 rc = rte_eth_dev_create(&pci_dev->device, pci_dev->device.name, 2504 sizeof(struct sfc_adapter_shared), 2505 eth_dev_pci_specific_init, pci_dev, 2506 sfc_eth_dev_init, init_data); 2507 if (rc != 0) { 2508 SFC_GENERIC_LOG(ERR, "Failed to create sfc ethdev '%s'", 2509 pci_dev->device.name); 2510 return rc; 2511 } 2512 2513 dev = rte_eth_dev_allocated(pci_dev->device.name); 2514 if (dev == NULL) { 2515 SFC_GENERIC_LOG(ERR, "Failed to find allocated sfc ethdev '%s'", 2516 pci_dev->device.name); 2517 return -ENODEV; 2518 } 2519 2520 *devp = dev; 2521 2522 return 0; 2523 } 2524 2525 static int 2526 sfc_eth_dev_create_representors(struct rte_eth_dev *dev, 2527 const struct rte_eth_devargs *eth_da) 2528 { 2529 struct sfc_adapter *sa; 2530 unsigned int i; 2531 int rc; 2532 2533 if (eth_da->nb_representor_ports == 0) 2534 return 0; 2535 2536 sa = sfc_adapter_by_eth_dev(dev); 2537 2538 if (!sa->switchdev) { 2539 sfc_err(sa, "cannot create representors in non-switchdev mode"); 2540 return -EINVAL; 2541 } 2542 2543 if (!sfc_repr_available(sfc_sa2shared(sa))) { 2544 sfc_err(sa, "cannot create representors: unsupported"); 2545 2546 return -ENOTSUP; 2547 } 2548 2549 for (i = 0; i < eth_da->nb_representor_ports; ++i) { 2550 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 2551 efx_mport_sel_t mport_sel; 2552 2553 rc = efx_mae_mport_by_pcie_function(encp->enc_pf, 2554 eth_da->representor_ports[i], &mport_sel); 2555 if (rc != 0) { 2556 sfc_err(sa, 2557 "failed to get representor %u m-port: %s - ignore", 2558 eth_da->representor_ports[i], 2559 rte_strerror(-rc)); 2560 continue; 2561 } 2562 2563 rc = sfc_repr_create(dev, eth_da->representor_ports[i], 2564 sa->mae.switch_domain_id, &mport_sel); 2565 if (rc != 0) { 2566 sfc_err(sa, "cannot create representor %u: %s - ignore", 2567 eth_da->representor_ports[i], 2568 rte_strerror(-rc)); 2569 } 2570 } 2571 2572 return 0; 2573 } 2574 2575 static int sfc_eth_dev_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 2576 struct rte_pci_device *pci_dev) 2577 { 2578 struct sfc_ethdev_init_data init_data; 2579 struct rte_eth_devargs eth_da; 2580 struct rte_eth_dev *dev; 2581 int rc; 2582 2583 if (pci_dev->device.devargs != NULL) { 2584 rc = sfc_parse_rte_devargs(pci_dev->device.devargs->args, 2585 ð_da); 2586 if (rc != 0) 2587 return rc; 2588 } else { 2589 memset(ð_da, 0, sizeof(eth_da)); 2590 } 2591 2592 init_data.nb_representors = eth_da.nb_representor_ports; 2593 2594 if (eth_da.nb_representor_ports > 0 && 2595 rte_eal_process_type() != RTE_PROC_PRIMARY) { 2596 SFC_GENERIC_LOG(ERR, 2597 "Create representors from secondary process not supported, dev '%s'", 2598 pci_dev->device.name); 2599 return -ENOTSUP; 2600 } 2601 2602 rc = sfc_eth_dev_create(pci_dev, &init_data, &dev); 2603 if (rc != 0) 2604 return rc; 2605 2606 rc = sfc_eth_dev_create_representors(dev, ð_da); 2607 if (rc != 0) { 2608 (void)rte_eth_dev_destroy(dev, sfc_eth_dev_uninit); 2609 return rc; 2610 } 2611 2612 return 0; 2613 } 2614 2615 static int sfc_eth_dev_pci_remove(struct rte_pci_device *pci_dev) 2616 { 2617 return rte_eth_dev_pci_generic_remove(pci_dev, sfc_eth_dev_uninit); 2618 } 2619 2620 static struct rte_pci_driver sfc_efx_pmd = { 2621 .id_table = pci_id_sfc_efx_map, 2622 .drv_flags = 2623 RTE_PCI_DRV_INTR_LSC | 2624 RTE_PCI_DRV_NEED_MAPPING, 2625 .probe = sfc_eth_dev_pci_probe, 2626 .remove = sfc_eth_dev_pci_remove, 2627 }; 2628 2629 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd); 2630 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); 2631 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio-pci"); 2632 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, 2633 SFC_KVARG_SWITCH_MODE "=" SFC_KVARG_VALUES_SWITCH_MODE " " 2634 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " " 2635 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " " 2636 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " 2637 SFC_KVARG_FW_VARIANT "=" SFC_KVARG_VALUES_FW_VARIANT " " 2638 SFC_KVARG_RXD_WAIT_TIMEOUT_NS "=<long> " 2639 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long>"); 2640 2641 RTE_INIT(sfc_driver_register_logtype) 2642 { 2643 int ret; 2644 2645 ret = rte_log_register_type_and_pick_level(SFC_LOGTYPE_PREFIX "driver", 2646 RTE_LOG_NOTICE); 2647 sfc_logtype_driver = (ret < 0) ? RTE_LOGTYPE_PMD : ret; 2648 } 2649