1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright(c) 2019-2021 Xilinx, Inc. 4 * Copyright(c) 2016-2019 Solarflare Communications Inc. 5 * 6 * This software was jointly developed between OKTET Labs (under contract 7 * for Solarflare) and Solarflare Communications, Inc. 8 */ 9 10 #include <rte_dev.h> 11 #include <ethdev_driver.h> 12 #include <ethdev_pci.h> 13 #include <rte_pci.h> 14 #include <rte_bus_pci.h> 15 #include <rte_errno.h> 16 #include <rte_string_fns.h> 17 #include <rte_ether.h> 18 19 #include "efx.h" 20 21 #include "sfc.h" 22 #include "sfc_debug.h" 23 #include "sfc_log.h" 24 #include "sfc_kvargs.h" 25 #include "sfc_ev.h" 26 #include "sfc_rx.h" 27 #include "sfc_tx.h" 28 #include "sfc_flow.h" 29 #include "sfc_dp.h" 30 #include "sfc_dp_rx.h" 31 #include "sfc_repr.h" 32 #include "sfc_sw_stats.h" 33 #include "sfc_switch.h" 34 35 #define SFC_XSTAT_ID_INVALID_VAL UINT64_MAX 36 #define SFC_XSTAT_ID_INVALID_NAME '\0' 37 38 uint32_t sfc_logtype_driver; 39 40 static struct sfc_dp_list sfc_dp_head = 41 TAILQ_HEAD_INITIALIZER(sfc_dp_head); 42 43 44 static void sfc_eth_dev_clear_ops(struct rte_eth_dev *dev); 45 46 47 static int 48 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) 49 { 50 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 51 efx_nic_fw_info_t enfi; 52 int ret; 53 int rc; 54 55 rc = efx_nic_get_fw_version(sa->nic, &enfi); 56 if (rc != 0) 57 return -rc; 58 59 ret = snprintf(fw_version, fw_size, 60 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16, 61 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1], 62 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]); 63 if (ret < 0) 64 return ret; 65 66 if (enfi.enfi_dpcpu_fw_ids_valid) { 67 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret); 68 int ret_extra; 69 70 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset, 71 fw_size - dpcpu_fw_ids_offset, 72 " rx%" PRIx16 " tx%" PRIx16, 73 enfi.enfi_rx_dpcpu_fw_id, 74 enfi.enfi_tx_dpcpu_fw_id); 75 if (ret_extra < 0) 76 return ret_extra; 77 78 ret += ret_extra; 79 } 80 81 if (fw_size < (size_t)(++ret)) 82 return ret; 83 else 84 return 0; 85 } 86 87 static int 88 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 89 { 90 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 91 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 92 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 93 struct sfc_rss *rss = &sas->rss; 94 struct sfc_mae *mae = &sa->mae; 95 uint64_t txq_offloads_def = 0; 96 97 sfc_log_init(sa, "entry"); 98 99 dev_info->min_mtu = RTE_ETHER_MIN_MTU; 100 dev_info->max_mtu = EFX_MAC_SDU_MAX; 101 102 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; 103 104 dev_info->max_vfs = sa->sriov.num_vfs; 105 106 /* Autonegotiation may be disabled */ 107 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 108 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_1000FDX)) 109 dev_info->speed_capa |= ETH_LINK_SPEED_1G; 110 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_10000FDX)) 111 dev_info->speed_capa |= ETH_LINK_SPEED_10G; 112 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_25000FDX)) 113 dev_info->speed_capa |= ETH_LINK_SPEED_25G; 114 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_40000FDX)) 115 dev_info->speed_capa |= ETH_LINK_SPEED_40G; 116 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_50000FDX)) 117 dev_info->speed_capa |= ETH_LINK_SPEED_50G; 118 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_100000FDX)) 119 dev_info->speed_capa |= ETH_LINK_SPEED_100G; 120 121 dev_info->max_rx_queues = sa->rxq_max; 122 dev_info->max_tx_queues = sa->txq_max; 123 124 /* By default packets are dropped if no descriptors are available */ 125 dev_info->default_rxconf.rx_drop_en = 1; 126 127 dev_info->rx_queue_offload_capa = sfc_rx_get_queue_offload_caps(sa); 128 129 /* 130 * rx_offload_capa includes both device and queue offloads since 131 * the latter may be requested on a per device basis which makes 132 * sense when some offloads are needed to be set on all queues. 133 */ 134 dev_info->rx_offload_capa = sfc_rx_get_dev_offload_caps(sa) | 135 dev_info->rx_queue_offload_capa; 136 137 dev_info->tx_queue_offload_capa = sfc_tx_get_queue_offload_caps(sa); 138 139 /* 140 * tx_offload_capa includes both device and queue offloads since 141 * the latter may be requested on a per device basis which makes 142 * sense when some offloads are needed to be set on all queues. 143 */ 144 dev_info->tx_offload_capa = sfc_tx_get_dev_offload_caps(sa) | 145 dev_info->tx_queue_offload_capa; 146 147 if (dev_info->tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE) 148 txq_offloads_def |= DEV_TX_OFFLOAD_MBUF_FAST_FREE; 149 150 dev_info->default_txconf.offloads |= txq_offloads_def; 151 152 if (rss->context_type != EFX_RX_SCALE_UNAVAILABLE) { 153 uint64_t rte_hf = 0; 154 unsigned int i; 155 156 for (i = 0; i < rss->hf_map_nb_entries; ++i) 157 rte_hf |= rss->hf_map[i].rte; 158 159 dev_info->reta_size = EFX_RSS_TBL_SIZE; 160 dev_info->hash_key_size = EFX_RSS_KEY_SIZE; 161 dev_info->flow_type_rss_offloads = rte_hf; 162 } 163 164 /* Initialize to hardware limits */ 165 dev_info->rx_desc_lim.nb_max = sa->rxq_max_entries; 166 dev_info->rx_desc_lim.nb_min = sa->rxq_min_entries; 167 /* The RXQ hardware requires that the descriptor count is a power 168 * of 2, but rx_desc_lim cannot properly describe that constraint. 169 */ 170 dev_info->rx_desc_lim.nb_align = sa->rxq_min_entries; 171 172 /* Initialize to hardware limits */ 173 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; 174 dev_info->tx_desc_lim.nb_min = sa->txq_min_entries; 175 /* 176 * The TXQ hardware requires that the descriptor count is a power 177 * of 2, but tx_desc_lim cannot properly describe that constraint 178 */ 179 dev_info->tx_desc_lim.nb_align = sa->txq_min_entries; 180 181 if (sap->dp_rx->get_dev_info != NULL) 182 sap->dp_rx->get_dev_info(dev_info); 183 if (sap->dp_tx->get_dev_info != NULL) 184 sap->dp_tx->get_dev_info(dev_info); 185 186 dev_info->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP | 187 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP; 188 189 if (mae->status == SFC_MAE_STATUS_SUPPORTED) { 190 dev_info->switch_info.name = dev->device->driver->name; 191 dev_info->switch_info.domain_id = mae->switch_domain_id; 192 dev_info->switch_info.port_id = mae->switch_port_id; 193 } 194 195 return 0; 196 } 197 198 static const uint32_t * 199 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) 200 { 201 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 202 203 return sap->dp_rx->supported_ptypes_get(sap->shared->tunnel_encaps); 204 } 205 206 static int 207 sfc_dev_configure(struct rte_eth_dev *dev) 208 { 209 struct rte_eth_dev_data *dev_data = dev->data; 210 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 211 int rc; 212 213 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u", 214 dev_data->nb_rx_queues, dev_data->nb_tx_queues); 215 216 sfc_adapter_lock(sa); 217 switch (sa->state) { 218 case SFC_ETHDEV_CONFIGURED: 219 /* FALLTHROUGH */ 220 case SFC_ETHDEV_INITIALIZED: 221 rc = sfc_configure(sa); 222 break; 223 default: 224 sfc_err(sa, "unexpected adapter state %u to configure", 225 sa->state); 226 rc = EINVAL; 227 break; 228 } 229 sfc_adapter_unlock(sa); 230 231 sfc_log_init(sa, "done %d", rc); 232 SFC_ASSERT(rc >= 0); 233 return -rc; 234 } 235 236 static int 237 sfc_dev_start(struct rte_eth_dev *dev) 238 { 239 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 240 int rc; 241 242 sfc_log_init(sa, "entry"); 243 244 sfc_adapter_lock(sa); 245 rc = sfc_start(sa); 246 sfc_adapter_unlock(sa); 247 248 sfc_log_init(sa, "done %d", rc); 249 SFC_ASSERT(rc >= 0); 250 return -rc; 251 } 252 253 static int 254 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 255 { 256 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 257 struct rte_eth_link current_link; 258 int ret; 259 260 sfc_log_init(sa, "entry"); 261 262 if (sa->state != SFC_ETHDEV_STARTED) { 263 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link); 264 } else if (wait_to_complete) { 265 efx_link_mode_t link_mode; 266 267 if (efx_port_poll(sa->nic, &link_mode) != 0) 268 link_mode = EFX_LINK_UNKNOWN; 269 sfc_port_link_mode_to_info(link_mode, ¤t_link); 270 271 } else { 272 sfc_ev_mgmt_qpoll(sa); 273 rte_eth_linkstatus_get(dev, ¤t_link); 274 } 275 276 ret = rte_eth_linkstatus_set(dev, ¤t_link); 277 if (ret == 0) 278 sfc_notice(sa, "Link status is %s", 279 current_link.link_status ? "UP" : "DOWN"); 280 281 return ret; 282 } 283 284 static int 285 sfc_dev_stop(struct rte_eth_dev *dev) 286 { 287 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 288 289 sfc_log_init(sa, "entry"); 290 291 sfc_adapter_lock(sa); 292 sfc_stop(sa); 293 sfc_adapter_unlock(sa); 294 295 sfc_log_init(sa, "done"); 296 297 return 0; 298 } 299 300 static int 301 sfc_dev_set_link_up(struct rte_eth_dev *dev) 302 { 303 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 304 int rc; 305 306 sfc_log_init(sa, "entry"); 307 308 sfc_adapter_lock(sa); 309 rc = sfc_start(sa); 310 sfc_adapter_unlock(sa); 311 312 SFC_ASSERT(rc >= 0); 313 return -rc; 314 } 315 316 static int 317 sfc_dev_set_link_down(struct rte_eth_dev *dev) 318 { 319 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 320 321 sfc_log_init(sa, "entry"); 322 323 sfc_adapter_lock(sa); 324 sfc_stop(sa); 325 sfc_adapter_unlock(sa); 326 327 return 0; 328 } 329 330 static void 331 sfc_eth_dev_secondary_clear_ops(struct rte_eth_dev *dev) 332 { 333 free(dev->process_private); 334 rte_eth_dev_release_port(dev); 335 } 336 337 static int 338 sfc_dev_close(struct rte_eth_dev *dev) 339 { 340 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 341 342 sfc_log_init(sa, "entry"); 343 344 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 345 sfc_eth_dev_secondary_clear_ops(dev); 346 return 0; 347 } 348 349 sfc_pre_detach(sa); 350 351 sfc_adapter_lock(sa); 352 switch (sa->state) { 353 case SFC_ETHDEV_STARTED: 354 sfc_stop(sa); 355 SFC_ASSERT(sa->state == SFC_ETHDEV_CONFIGURED); 356 /* FALLTHROUGH */ 357 case SFC_ETHDEV_CONFIGURED: 358 sfc_close(sa); 359 SFC_ASSERT(sa->state == SFC_ETHDEV_INITIALIZED); 360 /* FALLTHROUGH */ 361 case SFC_ETHDEV_INITIALIZED: 362 break; 363 default: 364 sfc_err(sa, "unexpected adapter state %u on close", sa->state); 365 break; 366 } 367 368 /* 369 * Cleanup all resources. 370 * Rollback primary process sfc_eth_dev_init() below. 371 */ 372 373 sfc_eth_dev_clear_ops(dev); 374 375 sfc_detach(sa); 376 sfc_unprobe(sa); 377 378 sfc_kvargs_cleanup(sa); 379 380 sfc_adapter_unlock(sa); 381 sfc_adapter_lock_fini(sa); 382 383 sfc_log_init(sa, "done"); 384 385 /* Required for logging, so cleanup last */ 386 sa->eth_dev = NULL; 387 388 free(sa); 389 390 return 0; 391 } 392 393 static int 394 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode, 395 boolean_t enabled) 396 { 397 struct sfc_port *port; 398 boolean_t *toggle; 399 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 400 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI); 401 const char *desc = (allmulti) ? "all-multi" : "promiscuous"; 402 int rc = 0; 403 404 sfc_adapter_lock(sa); 405 406 port = &sa->port; 407 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc); 408 409 if (*toggle != enabled) { 410 *toggle = enabled; 411 412 if (sfc_sa2shared(sa)->isolated) { 413 sfc_warn(sa, "isolated mode is active on the port"); 414 sfc_warn(sa, "the change is to be applied on the next " 415 "start provided that isolated mode is " 416 "disabled prior the next start"); 417 } else if ((sa->state == SFC_ETHDEV_STARTED) && 418 ((rc = sfc_set_rx_mode(sa)) != 0)) { 419 *toggle = !(enabled); 420 sfc_warn(sa, "Failed to %s %s mode, rc = %d", 421 ((enabled) ? "enable" : "disable"), desc, rc); 422 423 /* 424 * For promiscuous and all-multicast filters a 425 * permission failure should be reported as an 426 * unsupported filter. 427 */ 428 if (rc == EPERM) 429 rc = ENOTSUP; 430 } 431 } 432 433 sfc_adapter_unlock(sa); 434 return rc; 435 } 436 437 static int 438 sfc_dev_promisc_enable(struct rte_eth_dev *dev) 439 { 440 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE); 441 442 SFC_ASSERT(rc >= 0); 443 return -rc; 444 } 445 446 static int 447 sfc_dev_promisc_disable(struct rte_eth_dev *dev) 448 { 449 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE); 450 451 SFC_ASSERT(rc >= 0); 452 return -rc; 453 } 454 455 static int 456 sfc_dev_allmulti_enable(struct rte_eth_dev *dev) 457 { 458 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE); 459 460 SFC_ASSERT(rc >= 0); 461 return -rc; 462 } 463 464 static int 465 sfc_dev_allmulti_disable(struct rte_eth_dev *dev) 466 { 467 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE); 468 469 SFC_ASSERT(rc >= 0); 470 return -rc; 471 } 472 473 static int 474 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t ethdev_qid, 475 uint16_t nb_rx_desc, unsigned int socket_id, 476 const struct rte_eth_rxconf *rx_conf, 477 struct rte_mempool *mb_pool) 478 { 479 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 480 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 481 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 482 struct sfc_rxq_info *rxq_info; 483 sfc_sw_index_t sw_index; 484 int rc; 485 486 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u", 487 ethdev_qid, nb_rx_desc, socket_id); 488 489 sfc_adapter_lock(sa); 490 491 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 492 rc = sfc_rx_qinit(sa, sw_index, nb_rx_desc, socket_id, 493 rx_conf, mb_pool); 494 if (rc != 0) 495 goto fail_rx_qinit; 496 497 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 498 dev->data->rx_queues[ethdev_qid] = rxq_info->dp; 499 500 sfc_adapter_unlock(sa); 501 502 return 0; 503 504 fail_rx_qinit: 505 sfc_adapter_unlock(sa); 506 SFC_ASSERT(rc > 0); 507 return -rc; 508 } 509 510 static void 511 sfc_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 512 { 513 struct sfc_dp_rxq *dp_rxq = dev->data->rx_queues[qid]; 514 struct sfc_rxq *rxq; 515 struct sfc_adapter *sa; 516 sfc_sw_index_t sw_index; 517 518 if (dp_rxq == NULL) 519 return; 520 521 rxq = sfc_rxq_by_dp_rxq(dp_rxq); 522 sa = rxq->evq->sa; 523 sfc_adapter_lock(sa); 524 525 sw_index = dp_rxq->dpq.queue_id; 526 527 sfc_log_init(sa, "RxQ=%u", sw_index); 528 529 sfc_rx_qfini(sa, sw_index); 530 531 sfc_adapter_unlock(sa); 532 } 533 534 static int 535 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t ethdev_qid, 536 uint16_t nb_tx_desc, unsigned int socket_id, 537 const struct rte_eth_txconf *tx_conf) 538 { 539 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 540 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 541 struct sfc_txq_info *txq_info; 542 sfc_sw_index_t sw_index; 543 int rc; 544 545 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u", 546 ethdev_qid, nb_tx_desc, socket_id); 547 548 sfc_adapter_lock(sa); 549 550 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 551 rc = sfc_tx_qinit(sa, sw_index, nb_tx_desc, socket_id, tx_conf); 552 if (rc != 0) 553 goto fail_tx_qinit; 554 555 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 556 dev->data->tx_queues[ethdev_qid] = txq_info->dp; 557 558 sfc_adapter_unlock(sa); 559 return 0; 560 561 fail_tx_qinit: 562 sfc_adapter_unlock(sa); 563 SFC_ASSERT(rc > 0); 564 return -rc; 565 } 566 567 static void 568 sfc_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 569 { 570 struct sfc_dp_txq *dp_txq = dev->data->tx_queues[qid]; 571 struct sfc_txq *txq; 572 sfc_sw_index_t sw_index; 573 struct sfc_adapter *sa; 574 575 if (dp_txq == NULL) 576 return; 577 578 txq = sfc_txq_by_dp_txq(dp_txq); 579 sw_index = dp_txq->dpq.queue_id; 580 581 SFC_ASSERT(txq->evq != NULL); 582 sa = txq->evq->sa; 583 584 sfc_log_init(sa, "TxQ = %u", sw_index); 585 586 sfc_adapter_lock(sa); 587 588 sfc_tx_qfini(sa, sw_index); 589 590 sfc_adapter_unlock(sa); 591 } 592 593 static void 594 sfc_stats_get_dp_rx(struct sfc_adapter *sa, uint64_t *pkts, uint64_t *bytes) 595 { 596 struct sfc_adapter_shared *sas = sfc_sa2shared(sa); 597 uint64_t pkts_sum = 0; 598 uint64_t bytes_sum = 0; 599 unsigned int i; 600 601 for (i = 0; i < sas->ethdev_rxq_count; ++i) { 602 struct sfc_rxq_info *rxq_info; 603 604 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, i); 605 if (rxq_info->state & SFC_RXQ_INITIALIZED) { 606 union sfc_pkts_bytes qstats; 607 608 sfc_pkts_bytes_get(&rxq_info->dp->dpq.stats, &qstats); 609 pkts_sum += qstats.pkts - 610 sa->sw_stats.reset_rx_pkts[i]; 611 bytes_sum += qstats.bytes - 612 sa->sw_stats.reset_rx_bytes[i]; 613 } 614 } 615 616 *pkts = pkts_sum; 617 *bytes = bytes_sum; 618 } 619 620 static void 621 sfc_stats_get_dp_tx(struct sfc_adapter *sa, uint64_t *pkts, uint64_t *bytes) 622 { 623 struct sfc_adapter_shared *sas = sfc_sa2shared(sa); 624 uint64_t pkts_sum = 0; 625 uint64_t bytes_sum = 0; 626 unsigned int i; 627 628 for (i = 0; i < sas->ethdev_txq_count; ++i) { 629 struct sfc_txq_info *txq_info; 630 631 txq_info = sfc_txq_info_by_ethdev_qid(sas, i); 632 if (txq_info->state & SFC_TXQ_INITIALIZED) { 633 union sfc_pkts_bytes qstats; 634 635 sfc_pkts_bytes_get(&txq_info->dp->dpq.stats, &qstats); 636 pkts_sum += qstats.pkts - 637 sa->sw_stats.reset_tx_pkts[i]; 638 bytes_sum += qstats.bytes - 639 sa->sw_stats.reset_tx_bytes[i]; 640 } 641 } 642 643 *pkts = pkts_sum; 644 *bytes = bytes_sum; 645 } 646 647 /* 648 * Some statistics are computed as A - B where A and B each increase 649 * monotonically with some hardware counter(s) and the counters are read 650 * asynchronously. 651 * 652 * If packet X is counted in A, but not counted in B yet, computed value is 653 * greater than real. 654 * 655 * If packet X is not counted in A at the moment of reading the counter, 656 * but counted in B at the moment of reading the counter, computed value 657 * is less than real. 658 * 659 * However, counter which grows backward is worse evil than slightly wrong 660 * value. So, let's try to guarantee that it never happens except may be 661 * the case when the MAC stats are zeroed as a result of a NIC reset. 662 */ 663 static void 664 sfc_update_diff_stat(uint64_t *stat, uint64_t newval) 665 { 666 if ((int64_t)(newval - *stat) > 0 || newval == 0) 667 *stat = newval; 668 } 669 670 static int 671 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 672 { 673 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 674 bool have_dp_rx_stats = sap->dp_rx->features & SFC_DP_RX_FEAT_STATS; 675 bool have_dp_tx_stats = sap->dp_tx->features & SFC_DP_TX_FEAT_STATS; 676 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 677 struct sfc_port *port = &sa->port; 678 uint64_t *mac_stats; 679 int ret; 680 681 sfc_adapter_lock(sa); 682 683 if (have_dp_rx_stats) 684 sfc_stats_get_dp_rx(sa, &stats->ipackets, &stats->ibytes); 685 if (have_dp_tx_stats) 686 sfc_stats_get_dp_tx(sa, &stats->opackets, &stats->obytes); 687 688 ret = sfc_port_update_mac_stats(sa, B_FALSE); 689 if (ret != 0) 690 goto unlock; 691 692 mac_stats = port->mac_stats_buf; 693 694 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, 695 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) { 696 if (!have_dp_rx_stats) { 697 stats->ipackets = 698 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] + 699 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] + 700 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]; 701 stats->ibytes = 702 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] + 703 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] + 704 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]; 705 706 /* CRC is included in these stats, but shouldn't be */ 707 stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN; 708 } 709 if (!have_dp_tx_stats) { 710 stats->opackets = 711 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] + 712 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] + 713 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]; 714 stats->obytes = 715 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] + 716 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] + 717 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; 718 719 /* CRC is included in these stats, but shouldn't be */ 720 stats->obytes -= stats->opackets * RTE_ETHER_CRC_LEN; 721 } 722 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; 723 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; 724 } else { 725 if (!have_dp_tx_stats) { 726 stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; 727 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS] - 728 mac_stats[EFX_MAC_TX_PKTS] * RTE_ETHER_CRC_LEN; 729 } 730 731 /* 732 * Take into account stats which are whenever supported 733 * on EF10. If some stat is not supported by current 734 * firmware variant or HW revision, it is guaranteed 735 * to be zero in mac_stats. 736 */ 737 stats->imissed = 738 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] + 739 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] + 740 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] + 741 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] + 742 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] + 743 mac_stats[EFX_MAC_PM_TRUNC_QBB] + 744 mac_stats[EFX_MAC_PM_DISCARD_QBB] + 745 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] + 746 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] + 747 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS]; 748 stats->ierrors = 749 mac_stats[EFX_MAC_RX_FCS_ERRORS] + 750 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] + 751 mac_stats[EFX_MAC_RX_JABBER_PKTS]; 752 /* no oerrors counters supported on EF10 */ 753 754 if (!have_dp_rx_stats) { 755 /* Exclude missed, errors and pauses from Rx packets */ 756 sfc_update_diff_stat(&port->ipackets, 757 mac_stats[EFX_MAC_RX_PKTS] - 758 mac_stats[EFX_MAC_RX_PAUSE_PKTS] - 759 stats->imissed - stats->ierrors); 760 stats->ipackets = port->ipackets; 761 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS] - 762 mac_stats[EFX_MAC_RX_PKTS] * RTE_ETHER_CRC_LEN; 763 } 764 } 765 766 unlock: 767 sfc_adapter_unlock(sa); 768 SFC_ASSERT(ret >= 0); 769 return -ret; 770 } 771 772 static int 773 sfc_stats_reset(struct rte_eth_dev *dev) 774 { 775 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 776 struct sfc_port *port = &sa->port; 777 int rc; 778 779 sfc_adapter_lock(sa); 780 781 if (sa->state != SFC_ETHDEV_STARTED) { 782 /* 783 * The operation cannot be done if port is not started; it 784 * will be scheduled to be done during the next port start 785 */ 786 port->mac_stats_reset_pending = B_TRUE; 787 sfc_adapter_unlock(sa); 788 return 0; 789 } 790 791 rc = sfc_port_reset_mac_stats(sa); 792 if (rc != 0) 793 sfc_err(sa, "failed to reset statistics (rc = %d)", rc); 794 795 sfc_sw_xstats_reset(sa); 796 797 sfc_adapter_unlock(sa); 798 799 SFC_ASSERT(rc >= 0); 800 return -rc; 801 } 802 803 static unsigned int 804 sfc_xstats_get_nb_supported(struct sfc_adapter *sa) 805 { 806 struct sfc_port *port = &sa->port; 807 unsigned int nb_supported; 808 809 sfc_adapter_lock(sa); 810 nb_supported = port->mac_stats_nb_supported + 811 sfc_sw_xstats_get_nb_supported(sa); 812 sfc_adapter_unlock(sa); 813 814 return nb_supported; 815 } 816 817 static int 818 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 819 unsigned int xstats_count) 820 { 821 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 822 unsigned int nb_written = 0; 823 unsigned int nb_supported = 0; 824 int rc; 825 826 if (unlikely(xstats == NULL)) 827 return sfc_xstats_get_nb_supported(sa); 828 829 rc = sfc_port_get_mac_stats(sa, xstats, xstats_count, &nb_written); 830 if (rc < 0) 831 return rc; 832 833 nb_supported = rc; 834 sfc_sw_xstats_get_vals(sa, xstats, xstats_count, &nb_written, 835 &nb_supported); 836 837 return nb_supported; 838 } 839 840 static int 841 sfc_xstats_get_names(struct rte_eth_dev *dev, 842 struct rte_eth_xstat_name *xstats_names, 843 unsigned int xstats_count) 844 { 845 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 846 struct sfc_port *port = &sa->port; 847 unsigned int i; 848 unsigned int nstats = 0; 849 unsigned int nb_written = 0; 850 int ret; 851 852 if (unlikely(xstats_names == NULL)) 853 return sfc_xstats_get_nb_supported(sa); 854 855 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 856 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 857 if (nstats < xstats_count) { 858 strlcpy(xstats_names[nstats].name, 859 efx_mac_stat_name(sa->nic, i), 860 sizeof(xstats_names[0].name)); 861 nb_written++; 862 } 863 nstats++; 864 } 865 } 866 867 ret = sfc_sw_xstats_get_names(sa, xstats_names, xstats_count, 868 &nb_written, &nstats); 869 if (ret != 0) { 870 SFC_ASSERT(ret < 0); 871 return ret; 872 } 873 874 return nstats; 875 } 876 877 static int 878 sfc_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 879 uint64_t *values, unsigned int n) 880 { 881 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 882 struct sfc_port *port = &sa->port; 883 unsigned int nb_supported; 884 unsigned int i; 885 int rc; 886 887 if (unlikely(ids == NULL || values == NULL)) 888 return -EINVAL; 889 890 /* 891 * Values array could be filled in nonsequential order. Fill values with 892 * constant indicating invalid ID first. 893 */ 894 for (i = 0; i < n; i++) 895 values[i] = SFC_XSTAT_ID_INVALID_VAL; 896 897 rc = sfc_port_get_mac_stats_by_id(sa, ids, values, n); 898 if (rc != 0) 899 return rc; 900 901 nb_supported = port->mac_stats_nb_supported; 902 sfc_sw_xstats_get_vals_by_id(sa, ids, values, n, &nb_supported); 903 904 /* Return number of written stats before invalid ID is encountered. */ 905 for (i = 0; i < n; i++) { 906 if (values[i] == SFC_XSTAT_ID_INVALID_VAL) 907 return i; 908 } 909 910 return n; 911 } 912 913 static int 914 sfc_xstats_get_names_by_id(struct rte_eth_dev *dev, 915 const uint64_t *ids, 916 struct rte_eth_xstat_name *xstats_names, 917 unsigned int size) 918 { 919 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 920 struct sfc_port *port = &sa->port; 921 unsigned int nb_supported; 922 unsigned int i; 923 int ret; 924 925 if (unlikely(xstats_names == NULL && ids != NULL) || 926 unlikely(xstats_names != NULL && ids == NULL)) 927 return -EINVAL; 928 929 if (unlikely(xstats_names == NULL && ids == NULL)) 930 return sfc_xstats_get_nb_supported(sa); 931 932 /* 933 * Names array could be filled in nonsequential order. Fill names with 934 * string indicating invalid ID first. 935 */ 936 for (i = 0; i < size; i++) 937 xstats_names[i].name[0] = SFC_XSTAT_ID_INVALID_NAME; 938 939 sfc_adapter_lock(sa); 940 941 SFC_ASSERT(port->mac_stats_nb_supported <= 942 RTE_DIM(port->mac_stats_by_id)); 943 944 for (i = 0; i < size; i++) { 945 if (ids[i] < port->mac_stats_nb_supported) { 946 strlcpy(xstats_names[i].name, 947 efx_mac_stat_name(sa->nic, 948 port->mac_stats_by_id[ids[i]]), 949 sizeof(xstats_names[0].name)); 950 } 951 } 952 953 nb_supported = port->mac_stats_nb_supported; 954 955 sfc_adapter_unlock(sa); 956 957 ret = sfc_sw_xstats_get_names_by_id(sa, ids, xstats_names, size, 958 &nb_supported); 959 if (ret != 0) { 960 SFC_ASSERT(ret < 0); 961 return ret; 962 } 963 964 /* Return number of written names before invalid ID is encountered. */ 965 for (i = 0; i < size; i++) { 966 if (xstats_names[i].name[0] == SFC_XSTAT_ID_INVALID_NAME) 967 return i; 968 } 969 970 return size; 971 } 972 973 static int 974 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 975 { 976 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 977 unsigned int wanted_fc, link_fc; 978 979 memset(fc_conf, 0, sizeof(*fc_conf)); 980 981 sfc_adapter_lock(sa); 982 983 if (sa->state == SFC_ETHDEV_STARTED) 984 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc); 985 else 986 link_fc = sa->port.flow_ctrl; 987 988 switch (link_fc) { 989 case 0: 990 fc_conf->mode = RTE_FC_NONE; 991 break; 992 case EFX_FCNTL_RESPOND: 993 fc_conf->mode = RTE_FC_RX_PAUSE; 994 break; 995 case EFX_FCNTL_GENERATE: 996 fc_conf->mode = RTE_FC_TX_PAUSE; 997 break; 998 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE): 999 fc_conf->mode = RTE_FC_FULL; 1000 break; 1001 default: 1002 sfc_err(sa, "%s: unexpected flow control value %#x", 1003 __func__, link_fc); 1004 } 1005 1006 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; 1007 1008 sfc_adapter_unlock(sa); 1009 1010 return 0; 1011 } 1012 1013 static int 1014 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1015 { 1016 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1017 struct sfc_port *port = &sa->port; 1018 unsigned int fcntl; 1019 int rc; 1020 1021 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || 1022 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || 1023 fc_conf->mac_ctrl_frame_fwd != 0) { 1024 sfc_err(sa, "unsupported flow control settings specified"); 1025 rc = EINVAL; 1026 goto fail_inval; 1027 } 1028 1029 switch (fc_conf->mode) { 1030 case RTE_FC_NONE: 1031 fcntl = 0; 1032 break; 1033 case RTE_FC_RX_PAUSE: 1034 fcntl = EFX_FCNTL_RESPOND; 1035 break; 1036 case RTE_FC_TX_PAUSE: 1037 fcntl = EFX_FCNTL_GENERATE; 1038 break; 1039 case RTE_FC_FULL: 1040 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 1041 break; 1042 default: 1043 rc = EINVAL; 1044 goto fail_inval; 1045 } 1046 1047 sfc_adapter_lock(sa); 1048 1049 if (sa->state == SFC_ETHDEV_STARTED) { 1050 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg); 1051 if (rc != 0) 1052 goto fail_mac_fcntl_set; 1053 } 1054 1055 port->flow_ctrl = fcntl; 1056 port->flow_ctrl_autoneg = fc_conf->autoneg; 1057 1058 sfc_adapter_unlock(sa); 1059 1060 return 0; 1061 1062 fail_mac_fcntl_set: 1063 sfc_adapter_unlock(sa); 1064 fail_inval: 1065 SFC_ASSERT(rc > 0); 1066 return -rc; 1067 } 1068 1069 static int 1070 sfc_check_scatter_on_all_rx_queues(struct sfc_adapter *sa, size_t pdu) 1071 { 1072 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa); 1073 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 1074 boolean_t scatter_enabled; 1075 const char *error; 1076 unsigned int i; 1077 1078 for (i = 0; i < sas->rxq_count; i++) { 1079 if ((sas->rxq_info[i].state & SFC_RXQ_INITIALIZED) == 0) 1080 continue; 1081 1082 scatter_enabled = (sas->rxq_info[i].type_flags & 1083 EFX_RXQ_FLAG_SCATTER); 1084 1085 if (!sfc_rx_check_scatter(pdu, sa->rxq_ctrl[i].buf_size, 1086 encp->enc_rx_prefix_size, 1087 scatter_enabled, 1088 encp->enc_rx_scatter_max, &error)) { 1089 sfc_err(sa, "MTU check for RxQ %u failed: %s", i, 1090 error); 1091 return EINVAL; 1092 } 1093 } 1094 1095 return 0; 1096 } 1097 1098 static int 1099 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 1100 { 1101 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1102 size_t pdu = EFX_MAC_PDU(mtu); 1103 size_t old_pdu; 1104 int rc; 1105 1106 sfc_log_init(sa, "mtu=%u", mtu); 1107 1108 rc = EINVAL; 1109 if (pdu < EFX_MAC_PDU_MIN) { 1110 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)", 1111 (unsigned int)mtu, (unsigned int)pdu, 1112 EFX_MAC_PDU_MIN); 1113 goto fail_inval; 1114 } 1115 if (pdu > EFX_MAC_PDU_MAX) { 1116 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)", 1117 (unsigned int)mtu, (unsigned int)pdu, 1118 (unsigned int)EFX_MAC_PDU_MAX); 1119 goto fail_inval; 1120 } 1121 1122 sfc_adapter_lock(sa); 1123 1124 rc = sfc_check_scatter_on_all_rx_queues(sa, pdu); 1125 if (rc != 0) 1126 goto fail_check_scatter; 1127 1128 if (pdu != sa->port.pdu) { 1129 if (sa->state == SFC_ETHDEV_STARTED) { 1130 sfc_stop(sa); 1131 1132 old_pdu = sa->port.pdu; 1133 sa->port.pdu = pdu; 1134 rc = sfc_start(sa); 1135 if (rc != 0) 1136 goto fail_start; 1137 } else { 1138 sa->port.pdu = pdu; 1139 } 1140 } 1141 1142 /* 1143 * The driver does not use it, but other PMDs update jumbo frame 1144 * flag and max_rx_pkt_len when MTU is set. 1145 */ 1146 if (mtu > RTE_ETHER_MTU) { 1147 struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode; 1148 rxmode->offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME; 1149 } 1150 1151 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu; 1152 1153 sfc_adapter_unlock(sa); 1154 1155 sfc_log_init(sa, "done"); 1156 return 0; 1157 1158 fail_start: 1159 sa->port.pdu = old_pdu; 1160 if (sfc_start(sa) != 0) 1161 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) " 1162 "PDU max size - port is stopped", 1163 (unsigned int)pdu, (unsigned int)old_pdu); 1164 1165 fail_check_scatter: 1166 sfc_adapter_unlock(sa); 1167 1168 fail_inval: 1169 sfc_log_init(sa, "failed %d", rc); 1170 SFC_ASSERT(rc > 0); 1171 return -rc; 1172 } 1173 static int 1174 sfc_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr) 1175 { 1176 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1177 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 1178 struct sfc_port *port = &sa->port; 1179 struct rte_ether_addr *old_addr = &dev->data->mac_addrs[0]; 1180 int rc = 0; 1181 1182 sfc_adapter_lock(sa); 1183 1184 if (rte_is_same_ether_addr(mac_addr, &port->default_mac_addr)) 1185 goto unlock; 1186 1187 /* 1188 * Copy the address to the device private data so that 1189 * it could be recalled in the case of adapter restart. 1190 */ 1191 rte_ether_addr_copy(mac_addr, &port->default_mac_addr); 1192 1193 /* 1194 * Neither of the two following checks can return 1195 * an error. The new MAC address is preserved in 1196 * the device private data and can be activated 1197 * on the next port start if the user prevents 1198 * isolated mode from being enabled. 1199 */ 1200 if (sfc_sa2shared(sa)->isolated) { 1201 sfc_warn(sa, "isolated mode is active on the port"); 1202 sfc_warn(sa, "will not set MAC address"); 1203 goto unlock; 1204 } 1205 1206 if (sa->state != SFC_ETHDEV_STARTED) { 1207 sfc_notice(sa, "the port is not started"); 1208 sfc_notice(sa, "the new MAC address will be set on port start"); 1209 1210 goto unlock; 1211 } 1212 1213 if (encp->enc_allow_set_mac_with_installed_filters) { 1214 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes); 1215 if (rc != 0) { 1216 sfc_err(sa, "cannot set MAC address (rc = %u)", rc); 1217 goto unlock; 1218 } 1219 1220 /* 1221 * Changing the MAC address by means of MCDI request 1222 * has no effect on received traffic, therefore 1223 * we also need to update unicast filters 1224 */ 1225 rc = sfc_set_rx_mode_unchecked(sa); 1226 if (rc != 0) { 1227 sfc_err(sa, "cannot set filter (rc = %u)", rc); 1228 /* Rollback the old address */ 1229 (void)efx_mac_addr_set(sa->nic, old_addr->addr_bytes); 1230 (void)sfc_set_rx_mode_unchecked(sa); 1231 } 1232 } else { 1233 sfc_warn(sa, "cannot set MAC address with filters installed"); 1234 sfc_warn(sa, "adapter will be restarted to pick the new MAC"); 1235 sfc_warn(sa, "(some traffic may be dropped)"); 1236 1237 /* 1238 * Since setting MAC address with filters installed is not 1239 * allowed on the adapter, the new MAC address will be set 1240 * by means of adapter restart. sfc_start() shall retrieve 1241 * the new address from the device private data and set it. 1242 */ 1243 sfc_stop(sa); 1244 rc = sfc_start(sa); 1245 if (rc != 0) 1246 sfc_err(sa, "cannot restart adapter (rc = %u)", rc); 1247 } 1248 1249 unlock: 1250 if (rc != 0) 1251 rte_ether_addr_copy(old_addr, &port->default_mac_addr); 1252 1253 sfc_adapter_unlock(sa); 1254 1255 SFC_ASSERT(rc >= 0); 1256 return -rc; 1257 } 1258 1259 1260 static int 1261 sfc_set_mc_addr_list(struct rte_eth_dev *dev, 1262 struct rte_ether_addr *mc_addr_set, uint32_t nb_mc_addr) 1263 { 1264 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1265 struct sfc_port *port = &sa->port; 1266 uint8_t *mc_addrs = port->mcast_addrs; 1267 int rc; 1268 unsigned int i; 1269 1270 if (sfc_sa2shared(sa)->isolated) { 1271 sfc_err(sa, "isolated mode is active on the port"); 1272 sfc_err(sa, "will not set multicast address list"); 1273 return -ENOTSUP; 1274 } 1275 1276 if (mc_addrs == NULL) 1277 return -ENOBUFS; 1278 1279 if (nb_mc_addr > port->max_mcast_addrs) { 1280 sfc_err(sa, "too many multicast addresses: %u > %u", 1281 nb_mc_addr, port->max_mcast_addrs); 1282 return -EINVAL; 1283 } 1284 1285 for (i = 0; i < nb_mc_addr; ++i) { 1286 rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, 1287 EFX_MAC_ADDR_LEN); 1288 mc_addrs += EFX_MAC_ADDR_LEN; 1289 } 1290 1291 port->nb_mcast_addrs = nb_mc_addr; 1292 1293 if (sa->state != SFC_ETHDEV_STARTED) 1294 return 0; 1295 1296 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, 1297 port->nb_mcast_addrs); 1298 if (rc != 0) 1299 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); 1300 1301 SFC_ASSERT(rc >= 0); 1302 return -rc; 1303 } 1304 1305 /* 1306 * The function is used by the secondary process as well. It must not 1307 * use any process-local pointers from the adapter data. 1308 */ 1309 static void 1310 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t ethdev_qid, 1311 struct rte_eth_rxq_info *qinfo) 1312 { 1313 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1314 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1315 struct sfc_rxq_info *rxq_info; 1316 1317 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1318 1319 qinfo->mp = rxq_info->refill_mb_pool; 1320 qinfo->conf.rx_free_thresh = rxq_info->refill_threshold; 1321 qinfo->conf.rx_drop_en = 1; 1322 qinfo->conf.rx_deferred_start = rxq_info->deferred_start; 1323 qinfo->conf.offloads = dev->data->dev_conf.rxmode.offloads; 1324 if (rxq_info->type_flags & EFX_RXQ_FLAG_SCATTER) { 1325 qinfo->conf.offloads |= DEV_RX_OFFLOAD_SCATTER; 1326 qinfo->scattered_rx = 1; 1327 } 1328 qinfo->nb_desc = rxq_info->entries; 1329 } 1330 1331 /* 1332 * The function is used by the secondary process as well. It must not 1333 * use any process-local pointers from the adapter data. 1334 */ 1335 static void 1336 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t ethdev_qid, 1337 struct rte_eth_txq_info *qinfo) 1338 { 1339 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1340 struct sfc_txq_info *txq_info; 1341 1342 SFC_ASSERT(ethdev_qid < sas->ethdev_txq_count); 1343 1344 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1345 1346 memset(qinfo, 0, sizeof(*qinfo)); 1347 1348 qinfo->conf.offloads = txq_info->offloads; 1349 qinfo->conf.tx_free_thresh = txq_info->free_thresh; 1350 qinfo->conf.tx_deferred_start = txq_info->deferred_start; 1351 qinfo->nb_desc = txq_info->entries; 1352 } 1353 1354 /* 1355 * The function is used by the secondary process as well. It must not 1356 * use any process-local pointers from the adapter data. 1357 */ 1358 static uint32_t 1359 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1360 { 1361 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1362 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1363 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1364 struct sfc_rxq_info *rxq_info; 1365 1366 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1367 1368 if ((rxq_info->state & SFC_RXQ_STARTED) == 0) 1369 return 0; 1370 1371 return sap->dp_rx->qdesc_npending(rxq_info->dp); 1372 } 1373 1374 /* 1375 * The function is used by the secondary process as well. It must not 1376 * use any process-local pointers from the adapter data. 1377 */ 1378 static int 1379 sfc_rx_descriptor_status(void *queue, uint16_t offset) 1380 { 1381 struct sfc_dp_rxq *dp_rxq = queue; 1382 const struct sfc_dp_rx *dp_rx; 1383 1384 dp_rx = sfc_dp_rx_by_dp_rxq(dp_rxq); 1385 1386 return dp_rx->qdesc_status(dp_rxq, offset); 1387 } 1388 1389 /* 1390 * The function is used by the secondary process as well. It must not 1391 * use any process-local pointers from the adapter data. 1392 */ 1393 static int 1394 sfc_tx_descriptor_status(void *queue, uint16_t offset) 1395 { 1396 struct sfc_dp_txq *dp_txq = queue; 1397 const struct sfc_dp_tx *dp_tx; 1398 1399 dp_tx = sfc_dp_tx_by_dp_txq(dp_txq); 1400 1401 return dp_tx->qdesc_status(dp_txq, offset); 1402 } 1403 1404 static int 1405 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1406 { 1407 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1408 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1409 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1410 struct sfc_rxq_info *rxq_info; 1411 sfc_sw_index_t sw_index; 1412 int rc; 1413 1414 sfc_log_init(sa, "RxQ=%u", ethdev_qid); 1415 1416 sfc_adapter_lock(sa); 1417 1418 rc = EINVAL; 1419 if (sa->state != SFC_ETHDEV_STARTED) 1420 goto fail_not_started; 1421 1422 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1423 if (rxq_info->state != SFC_RXQ_INITIALIZED) 1424 goto fail_not_setup; 1425 1426 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 1427 rc = sfc_rx_qstart(sa, sw_index); 1428 if (rc != 0) 1429 goto fail_rx_qstart; 1430 1431 rxq_info->deferred_started = B_TRUE; 1432 1433 sfc_adapter_unlock(sa); 1434 1435 return 0; 1436 1437 fail_rx_qstart: 1438 fail_not_setup: 1439 fail_not_started: 1440 sfc_adapter_unlock(sa); 1441 SFC_ASSERT(rc > 0); 1442 return -rc; 1443 } 1444 1445 static int 1446 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1447 { 1448 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1449 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1450 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1451 struct sfc_rxq_info *rxq_info; 1452 sfc_sw_index_t sw_index; 1453 1454 sfc_log_init(sa, "RxQ=%u", ethdev_qid); 1455 1456 sfc_adapter_lock(sa); 1457 1458 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 1459 sfc_rx_qstop(sa, sw_index); 1460 1461 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1462 rxq_info->deferred_started = B_FALSE; 1463 1464 sfc_adapter_unlock(sa); 1465 1466 return 0; 1467 } 1468 1469 static int 1470 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1471 { 1472 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1473 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1474 struct sfc_txq_info *txq_info; 1475 sfc_sw_index_t sw_index; 1476 int rc; 1477 1478 sfc_log_init(sa, "TxQ = %u", ethdev_qid); 1479 1480 sfc_adapter_lock(sa); 1481 1482 rc = EINVAL; 1483 if (sa->state != SFC_ETHDEV_STARTED) 1484 goto fail_not_started; 1485 1486 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1487 if (txq_info->state != SFC_TXQ_INITIALIZED) 1488 goto fail_not_setup; 1489 1490 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 1491 rc = sfc_tx_qstart(sa, sw_index); 1492 if (rc != 0) 1493 goto fail_tx_qstart; 1494 1495 txq_info->deferred_started = B_TRUE; 1496 1497 sfc_adapter_unlock(sa); 1498 return 0; 1499 1500 fail_tx_qstart: 1501 1502 fail_not_setup: 1503 fail_not_started: 1504 sfc_adapter_unlock(sa); 1505 SFC_ASSERT(rc > 0); 1506 return -rc; 1507 } 1508 1509 static int 1510 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1511 { 1512 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1513 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1514 struct sfc_txq_info *txq_info; 1515 sfc_sw_index_t sw_index; 1516 1517 sfc_log_init(sa, "TxQ = %u", ethdev_qid); 1518 1519 sfc_adapter_lock(sa); 1520 1521 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 1522 sfc_tx_qstop(sa, sw_index); 1523 1524 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1525 txq_info->deferred_started = B_FALSE; 1526 1527 sfc_adapter_unlock(sa); 1528 return 0; 1529 } 1530 1531 static efx_tunnel_protocol_t 1532 sfc_tunnel_rte_type_to_efx_udp_proto(enum rte_eth_tunnel_type rte_type) 1533 { 1534 switch (rte_type) { 1535 case RTE_TUNNEL_TYPE_VXLAN: 1536 return EFX_TUNNEL_PROTOCOL_VXLAN; 1537 case RTE_TUNNEL_TYPE_GENEVE: 1538 return EFX_TUNNEL_PROTOCOL_GENEVE; 1539 default: 1540 return EFX_TUNNEL_NPROTOS; 1541 } 1542 } 1543 1544 enum sfc_udp_tunnel_op_e { 1545 SFC_UDP_TUNNEL_ADD_PORT, 1546 SFC_UDP_TUNNEL_DEL_PORT, 1547 }; 1548 1549 static int 1550 sfc_dev_udp_tunnel_op(struct rte_eth_dev *dev, 1551 struct rte_eth_udp_tunnel *tunnel_udp, 1552 enum sfc_udp_tunnel_op_e op) 1553 { 1554 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1555 efx_tunnel_protocol_t tunnel_proto; 1556 int rc; 1557 1558 sfc_log_init(sa, "%s udp_port=%u prot_type=%u", 1559 (op == SFC_UDP_TUNNEL_ADD_PORT) ? "add" : 1560 (op == SFC_UDP_TUNNEL_DEL_PORT) ? "delete" : "unknown", 1561 tunnel_udp->udp_port, tunnel_udp->prot_type); 1562 1563 tunnel_proto = 1564 sfc_tunnel_rte_type_to_efx_udp_proto(tunnel_udp->prot_type); 1565 if (tunnel_proto >= EFX_TUNNEL_NPROTOS) { 1566 rc = ENOTSUP; 1567 goto fail_bad_proto; 1568 } 1569 1570 sfc_adapter_lock(sa); 1571 1572 switch (op) { 1573 case SFC_UDP_TUNNEL_ADD_PORT: 1574 rc = efx_tunnel_config_udp_add(sa->nic, 1575 tunnel_udp->udp_port, 1576 tunnel_proto); 1577 break; 1578 case SFC_UDP_TUNNEL_DEL_PORT: 1579 rc = efx_tunnel_config_udp_remove(sa->nic, 1580 tunnel_udp->udp_port, 1581 tunnel_proto); 1582 break; 1583 default: 1584 rc = EINVAL; 1585 goto fail_bad_op; 1586 } 1587 1588 if (rc != 0) 1589 goto fail_op; 1590 1591 if (sa->state == SFC_ETHDEV_STARTED) { 1592 rc = efx_tunnel_reconfigure(sa->nic); 1593 if (rc == EAGAIN) { 1594 /* 1595 * Configuration is accepted by FW and MC reboot 1596 * is initiated to apply the changes. MC reboot 1597 * will be handled in a usual way (MC reboot 1598 * event on management event queue and adapter 1599 * restart). 1600 */ 1601 rc = 0; 1602 } else if (rc != 0) { 1603 goto fail_reconfigure; 1604 } 1605 } 1606 1607 sfc_adapter_unlock(sa); 1608 return 0; 1609 1610 fail_reconfigure: 1611 /* Remove/restore entry since the change makes the trouble */ 1612 switch (op) { 1613 case SFC_UDP_TUNNEL_ADD_PORT: 1614 (void)efx_tunnel_config_udp_remove(sa->nic, 1615 tunnel_udp->udp_port, 1616 tunnel_proto); 1617 break; 1618 case SFC_UDP_TUNNEL_DEL_PORT: 1619 (void)efx_tunnel_config_udp_add(sa->nic, 1620 tunnel_udp->udp_port, 1621 tunnel_proto); 1622 break; 1623 } 1624 1625 fail_op: 1626 fail_bad_op: 1627 sfc_adapter_unlock(sa); 1628 1629 fail_bad_proto: 1630 SFC_ASSERT(rc > 0); 1631 return -rc; 1632 } 1633 1634 static int 1635 sfc_dev_udp_tunnel_port_add(struct rte_eth_dev *dev, 1636 struct rte_eth_udp_tunnel *tunnel_udp) 1637 { 1638 return sfc_dev_udp_tunnel_op(dev, tunnel_udp, SFC_UDP_TUNNEL_ADD_PORT); 1639 } 1640 1641 static int 1642 sfc_dev_udp_tunnel_port_del(struct rte_eth_dev *dev, 1643 struct rte_eth_udp_tunnel *tunnel_udp) 1644 { 1645 return sfc_dev_udp_tunnel_op(dev, tunnel_udp, SFC_UDP_TUNNEL_DEL_PORT); 1646 } 1647 1648 /* 1649 * The function is used by the secondary process as well. It must not 1650 * use any process-local pointers from the adapter data. 1651 */ 1652 static int 1653 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1654 struct rte_eth_rss_conf *rss_conf) 1655 { 1656 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1657 struct sfc_rss *rss = &sas->rss; 1658 1659 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) 1660 return -ENOTSUP; 1661 1662 /* 1663 * Mapping of hash configuration between RTE and EFX is not one-to-one, 1664 * hence, conversion is done here to derive a correct set of ETH_RSS 1665 * flags which corresponds to the active EFX configuration stored 1666 * locally in 'sfc_adapter' and kept up-to-date 1667 */ 1668 rss_conf->rss_hf = sfc_rx_hf_efx_to_rte(rss, rss->hash_types); 1669 rss_conf->rss_key_len = EFX_RSS_KEY_SIZE; 1670 if (rss_conf->rss_key != NULL) 1671 rte_memcpy(rss_conf->rss_key, rss->key, EFX_RSS_KEY_SIZE); 1672 1673 return 0; 1674 } 1675 1676 static int 1677 sfc_dev_rss_hash_update(struct rte_eth_dev *dev, 1678 struct rte_eth_rss_conf *rss_conf) 1679 { 1680 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1681 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss; 1682 unsigned int efx_hash_types; 1683 uint32_t contexts[] = {EFX_RSS_CONTEXT_DEFAULT, rss->dummy_rss_context}; 1684 unsigned int n_contexts; 1685 unsigned int mode_i = 0; 1686 unsigned int key_i = 0; 1687 unsigned int i = 0; 1688 int rc = 0; 1689 1690 n_contexts = rss->dummy_rss_context == EFX_RSS_CONTEXT_DEFAULT ? 1 : 2; 1691 1692 if (sfc_sa2shared(sa)->isolated) 1693 return -ENOTSUP; 1694 1695 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) { 1696 sfc_err(sa, "RSS is not available"); 1697 return -ENOTSUP; 1698 } 1699 1700 if (rss->channels == 0) { 1701 sfc_err(sa, "RSS is not configured"); 1702 return -EINVAL; 1703 } 1704 1705 if ((rss_conf->rss_key != NULL) && 1706 (rss_conf->rss_key_len != sizeof(rss->key))) { 1707 sfc_err(sa, "RSS key size is wrong (should be %zu)", 1708 sizeof(rss->key)); 1709 return -EINVAL; 1710 } 1711 1712 sfc_adapter_lock(sa); 1713 1714 rc = sfc_rx_hf_rte_to_efx(sa, rss_conf->rss_hf, &efx_hash_types); 1715 if (rc != 0) 1716 goto fail_rx_hf_rte_to_efx; 1717 1718 for (mode_i = 0; mode_i < n_contexts; mode_i++) { 1719 rc = efx_rx_scale_mode_set(sa->nic, contexts[mode_i], 1720 rss->hash_alg, efx_hash_types, 1721 B_TRUE); 1722 if (rc != 0) 1723 goto fail_scale_mode_set; 1724 } 1725 1726 if (rss_conf->rss_key != NULL) { 1727 if (sa->state == SFC_ETHDEV_STARTED) { 1728 for (key_i = 0; key_i < n_contexts; key_i++) { 1729 rc = efx_rx_scale_key_set(sa->nic, 1730 contexts[key_i], 1731 rss_conf->rss_key, 1732 sizeof(rss->key)); 1733 if (rc != 0) 1734 goto fail_scale_key_set; 1735 } 1736 } 1737 1738 rte_memcpy(rss->key, rss_conf->rss_key, sizeof(rss->key)); 1739 } 1740 1741 rss->hash_types = efx_hash_types; 1742 1743 sfc_adapter_unlock(sa); 1744 1745 return 0; 1746 1747 fail_scale_key_set: 1748 for (i = 0; i < key_i; i++) { 1749 if (efx_rx_scale_key_set(sa->nic, contexts[i], rss->key, 1750 sizeof(rss->key)) != 0) 1751 sfc_err(sa, "failed to restore RSS key"); 1752 } 1753 1754 fail_scale_mode_set: 1755 for (i = 0; i < mode_i; i++) { 1756 if (efx_rx_scale_mode_set(sa->nic, contexts[i], 1757 EFX_RX_HASHALG_TOEPLITZ, 1758 rss->hash_types, B_TRUE) != 0) 1759 sfc_err(sa, "failed to restore RSS mode"); 1760 } 1761 1762 fail_rx_hf_rte_to_efx: 1763 sfc_adapter_unlock(sa); 1764 return -rc; 1765 } 1766 1767 /* 1768 * The function is used by the secondary process as well. It must not 1769 * use any process-local pointers from the adapter data. 1770 */ 1771 static int 1772 sfc_dev_rss_reta_query(struct rte_eth_dev *dev, 1773 struct rte_eth_rss_reta_entry64 *reta_conf, 1774 uint16_t reta_size) 1775 { 1776 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1777 struct sfc_rss *rss = &sas->rss; 1778 int entry; 1779 1780 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE || sas->isolated) 1781 return -ENOTSUP; 1782 1783 if (rss->channels == 0) 1784 return -EINVAL; 1785 1786 if (reta_size != EFX_RSS_TBL_SIZE) 1787 return -EINVAL; 1788 1789 for (entry = 0; entry < reta_size; entry++) { 1790 int grp = entry / RTE_RETA_GROUP_SIZE; 1791 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1792 1793 if ((reta_conf[grp].mask >> grp_idx) & 1) 1794 reta_conf[grp].reta[grp_idx] = rss->tbl[entry]; 1795 } 1796 1797 return 0; 1798 } 1799 1800 static int 1801 sfc_dev_rss_reta_update(struct rte_eth_dev *dev, 1802 struct rte_eth_rss_reta_entry64 *reta_conf, 1803 uint16_t reta_size) 1804 { 1805 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1806 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss; 1807 unsigned int *rss_tbl_new; 1808 uint16_t entry; 1809 int rc = 0; 1810 1811 1812 if (sfc_sa2shared(sa)->isolated) 1813 return -ENOTSUP; 1814 1815 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) { 1816 sfc_err(sa, "RSS is not available"); 1817 return -ENOTSUP; 1818 } 1819 1820 if (rss->channels == 0) { 1821 sfc_err(sa, "RSS is not configured"); 1822 return -EINVAL; 1823 } 1824 1825 if (reta_size != EFX_RSS_TBL_SIZE) { 1826 sfc_err(sa, "RETA size is wrong (should be %u)", 1827 EFX_RSS_TBL_SIZE); 1828 return -EINVAL; 1829 } 1830 1831 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(rss->tbl), 0); 1832 if (rss_tbl_new == NULL) 1833 return -ENOMEM; 1834 1835 sfc_adapter_lock(sa); 1836 1837 rte_memcpy(rss_tbl_new, rss->tbl, sizeof(rss->tbl)); 1838 1839 for (entry = 0; entry < reta_size; entry++) { 1840 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1841 struct rte_eth_rss_reta_entry64 *grp; 1842 1843 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE]; 1844 1845 if (grp->mask & (1ull << grp_idx)) { 1846 if (grp->reta[grp_idx] >= rss->channels) { 1847 rc = EINVAL; 1848 goto bad_reta_entry; 1849 } 1850 rss_tbl_new[entry] = grp->reta[grp_idx]; 1851 } 1852 } 1853 1854 if (sa->state == SFC_ETHDEV_STARTED) { 1855 rc = efx_rx_scale_tbl_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT, 1856 rss_tbl_new, EFX_RSS_TBL_SIZE); 1857 if (rc != 0) 1858 goto fail_scale_tbl_set; 1859 } 1860 1861 rte_memcpy(rss->tbl, rss_tbl_new, sizeof(rss->tbl)); 1862 1863 fail_scale_tbl_set: 1864 bad_reta_entry: 1865 sfc_adapter_unlock(sa); 1866 1867 rte_free(rss_tbl_new); 1868 1869 SFC_ASSERT(rc >= 0); 1870 return -rc; 1871 } 1872 1873 static int 1874 sfc_dev_flow_ops_get(struct rte_eth_dev *dev __rte_unused, 1875 const struct rte_flow_ops **ops) 1876 { 1877 *ops = &sfc_flow_ops; 1878 return 0; 1879 } 1880 1881 static int 1882 sfc_pool_ops_supported(struct rte_eth_dev *dev, const char *pool) 1883 { 1884 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1885 1886 /* 1887 * If Rx datapath does not provide callback to check mempool, 1888 * all pools are supported. 1889 */ 1890 if (sap->dp_rx->pool_ops_supported == NULL) 1891 return 1; 1892 1893 return sap->dp_rx->pool_ops_supported(pool); 1894 } 1895 1896 static int 1897 sfc_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1898 { 1899 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1900 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1901 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1902 struct sfc_rxq_info *rxq_info; 1903 1904 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1905 1906 return sap->dp_rx->intr_enable(rxq_info->dp); 1907 } 1908 1909 static int 1910 sfc_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1911 { 1912 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1913 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1914 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1915 struct sfc_rxq_info *rxq_info; 1916 1917 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1918 1919 return sap->dp_rx->intr_disable(rxq_info->dp); 1920 } 1921 1922 struct sfc_mport_journal_ctx { 1923 struct sfc_adapter *sa; 1924 uint16_t switch_domain_id; 1925 uint32_t mcdi_handle; 1926 bool controllers_assigned; 1927 efx_pcie_interface_t *controllers; 1928 size_t nb_controllers; 1929 }; 1930 1931 static int 1932 sfc_journal_ctx_add_controller(struct sfc_mport_journal_ctx *ctx, 1933 efx_pcie_interface_t intf) 1934 { 1935 efx_pcie_interface_t *new_controllers; 1936 size_t i, target; 1937 size_t new_size; 1938 1939 if (ctx->controllers == NULL) { 1940 ctx->controllers = rte_malloc("sfc_controller_mapping", 1941 sizeof(ctx->controllers[0]), 0); 1942 if (ctx->controllers == NULL) 1943 return ENOMEM; 1944 1945 ctx->controllers[0] = intf; 1946 ctx->nb_controllers = 1; 1947 1948 return 0; 1949 } 1950 1951 for (i = 0; i < ctx->nb_controllers; i++) { 1952 if (ctx->controllers[i] == intf) 1953 return 0; 1954 if (ctx->controllers[i] > intf) 1955 break; 1956 } 1957 target = i; 1958 1959 ctx->nb_controllers += 1; 1960 new_size = ctx->nb_controllers * sizeof(ctx->controllers[0]); 1961 1962 new_controllers = rte_realloc(ctx->controllers, new_size, 0); 1963 if (new_controllers == NULL) { 1964 rte_free(ctx->controllers); 1965 return ENOMEM; 1966 } 1967 ctx->controllers = new_controllers; 1968 1969 for (i = target + 1; i < ctx->nb_controllers; i++) 1970 ctx->controllers[i] = ctx->controllers[i - 1]; 1971 1972 ctx->controllers[target] = intf; 1973 1974 return 0; 1975 } 1976 1977 static efx_rc_t 1978 sfc_process_mport_journal_entry(struct sfc_mport_journal_ctx *ctx, 1979 efx_mport_desc_t *mport) 1980 { 1981 struct sfc_mae_switch_port_request req; 1982 efx_mport_sel_t entity_selector; 1983 efx_mport_sel_t ethdev_mport; 1984 uint16_t switch_port_id; 1985 efx_rc_t efx_rc; 1986 int rc; 1987 1988 sfc_dbg(ctx->sa, 1989 "processing mport id %u (controller %u pf %u vf %u)", 1990 mport->emd_id.id, mport->emd_vnic.ev_intf, 1991 mport->emd_vnic.ev_pf, mport->emd_vnic.ev_vf); 1992 efx_mae_mport_invalid(ðdev_mport); 1993 1994 if (!ctx->controllers_assigned) { 1995 rc = sfc_journal_ctx_add_controller(ctx, 1996 mport->emd_vnic.ev_intf); 1997 if (rc != 0) 1998 return rc; 1999 } 2000 2001 /* Build Mport selector */ 2002 efx_rc = efx_mae_mport_by_pcie_mh_function(mport->emd_vnic.ev_intf, 2003 mport->emd_vnic.ev_pf, 2004 mport->emd_vnic.ev_vf, 2005 &entity_selector); 2006 if (efx_rc != 0) { 2007 sfc_err(ctx->sa, "failed to build entity mport selector for c%upf%uvf%u", 2008 mport->emd_vnic.ev_intf, 2009 mport->emd_vnic.ev_pf, 2010 mport->emd_vnic.ev_vf); 2011 return efx_rc; 2012 } 2013 2014 rc = sfc_mae_switch_port_id_by_entity(ctx->switch_domain_id, 2015 &entity_selector, 2016 SFC_MAE_SWITCH_PORT_REPRESENTOR, 2017 &switch_port_id); 2018 switch (rc) { 2019 case 0: 2020 /* Already registered */ 2021 break; 2022 case ENOENT: 2023 /* 2024 * No representor has been created for this entity. 2025 * Create a dummy switch registry entry with an invalid ethdev 2026 * mport selector. When a corresponding representor is created, 2027 * this entry will be updated. 2028 */ 2029 req.type = SFC_MAE_SWITCH_PORT_REPRESENTOR; 2030 req.entity_mportp = &entity_selector; 2031 req.ethdev_mportp = ðdev_mport; 2032 req.ethdev_port_id = RTE_MAX_ETHPORTS; 2033 req.port_data.repr.intf = mport->emd_vnic.ev_intf; 2034 req.port_data.repr.pf = mport->emd_vnic.ev_pf; 2035 req.port_data.repr.vf = mport->emd_vnic.ev_vf; 2036 2037 rc = sfc_mae_assign_switch_port(ctx->switch_domain_id, 2038 &req, &switch_port_id); 2039 if (rc != 0) { 2040 sfc_err(ctx->sa, 2041 "failed to assign MAE switch port for c%upf%uvf%u: %s", 2042 mport->emd_vnic.ev_intf, 2043 mport->emd_vnic.ev_pf, 2044 mport->emd_vnic.ev_vf, 2045 rte_strerror(rc)); 2046 return rc; 2047 } 2048 break; 2049 default: 2050 sfc_err(ctx->sa, "failed to find MAE switch port for c%upf%uvf%u: %s", 2051 mport->emd_vnic.ev_intf, 2052 mport->emd_vnic.ev_pf, 2053 mport->emd_vnic.ev_vf, 2054 rte_strerror(rc)); 2055 return rc; 2056 } 2057 2058 return 0; 2059 } 2060 2061 static efx_rc_t 2062 sfc_process_mport_journal_cb(void *data, efx_mport_desc_t *mport, 2063 size_t mport_len) 2064 { 2065 struct sfc_mport_journal_ctx *ctx = data; 2066 2067 if (ctx == NULL || ctx->sa == NULL) { 2068 sfc_err(ctx->sa, "received NULL context or SFC adapter"); 2069 return EINVAL; 2070 } 2071 2072 if (mport_len != sizeof(*mport)) { 2073 sfc_err(ctx->sa, "actual and expected mport buffer sizes differ"); 2074 return EINVAL; 2075 } 2076 2077 SFC_ASSERT(sfc_adapter_is_locked(ctx->sa)); 2078 2079 /* 2080 * If a zombie flag is set, it means the mport has been marked for 2081 * deletion and cannot be used for any new operations. The mport will 2082 * be destroyed completely once all references to it are released. 2083 */ 2084 if (mport->emd_zombie) { 2085 sfc_dbg(ctx->sa, "mport is a zombie, skipping"); 2086 return 0; 2087 } 2088 if (mport->emd_type != EFX_MPORT_TYPE_VNIC) { 2089 sfc_dbg(ctx->sa, "mport is not a VNIC, skipping"); 2090 return 0; 2091 } 2092 if (mport->emd_vnic.ev_client_type != EFX_MPORT_VNIC_CLIENT_FUNCTION) { 2093 sfc_dbg(ctx->sa, "mport is not a function, skipping"); 2094 return 0; 2095 } 2096 if (mport->emd_vnic.ev_handle == ctx->mcdi_handle) { 2097 sfc_dbg(ctx->sa, "mport is this driver instance, skipping"); 2098 return 0; 2099 } 2100 2101 return sfc_process_mport_journal_entry(ctx, mport); 2102 } 2103 2104 static int 2105 sfc_process_mport_journal(struct sfc_adapter *sa) 2106 { 2107 struct sfc_mport_journal_ctx ctx; 2108 const efx_pcie_interface_t *controllers; 2109 size_t nb_controllers; 2110 efx_rc_t efx_rc; 2111 int rc; 2112 2113 memset(&ctx, 0, sizeof(ctx)); 2114 ctx.sa = sa; 2115 ctx.switch_domain_id = sa->mae.switch_domain_id; 2116 2117 efx_rc = efx_mcdi_get_own_client_handle(sa->nic, &ctx.mcdi_handle); 2118 if (efx_rc != 0) { 2119 sfc_err(sa, "failed to get own MCDI handle"); 2120 SFC_ASSERT(efx_rc > 0); 2121 return efx_rc; 2122 } 2123 2124 rc = sfc_mae_switch_domain_controllers(ctx.switch_domain_id, 2125 &controllers, &nb_controllers); 2126 if (rc != 0) { 2127 sfc_err(sa, "failed to get controller mapping"); 2128 return rc; 2129 } 2130 2131 ctx.controllers_assigned = controllers != NULL; 2132 ctx.controllers = NULL; 2133 ctx.nb_controllers = 0; 2134 2135 efx_rc = efx_mae_read_mport_journal(sa->nic, 2136 sfc_process_mport_journal_cb, &ctx); 2137 if (efx_rc != 0) { 2138 sfc_err(sa, "failed to process MAE mport journal"); 2139 SFC_ASSERT(efx_rc > 0); 2140 return efx_rc; 2141 } 2142 2143 if (controllers == NULL) { 2144 rc = sfc_mae_switch_domain_map_controllers(ctx.switch_domain_id, 2145 ctx.controllers, 2146 ctx.nb_controllers); 2147 if (rc != 0) 2148 return rc; 2149 } 2150 2151 return 0; 2152 } 2153 2154 static void 2155 sfc_count_representors_cb(enum sfc_mae_switch_port_type type, 2156 const efx_mport_sel_t *ethdev_mportp __rte_unused, 2157 uint16_t ethdev_port_id __rte_unused, 2158 const efx_mport_sel_t *entity_mportp __rte_unused, 2159 uint16_t switch_port_id __rte_unused, 2160 union sfc_mae_switch_port_data *port_datap 2161 __rte_unused, 2162 void *user_datap) 2163 { 2164 int *counter = user_datap; 2165 2166 SFC_ASSERT(counter != NULL); 2167 2168 if (type == SFC_MAE_SWITCH_PORT_REPRESENTOR) 2169 (*counter)++; 2170 } 2171 2172 struct sfc_get_representors_ctx { 2173 struct rte_eth_representor_info *info; 2174 struct sfc_adapter *sa; 2175 uint16_t switch_domain_id; 2176 const efx_pcie_interface_t *controllers; 2177 size_t nb_controllers; 2178 }; 2179 2180 static void 2181 sfc_get_representors_cb(enum sfc_mae_switch_port_type type, 2182 const efx_mport_sel_t *ethdev_mportp __rte_unused, 2183 uint16_t ethdev_port_id __rte_unused, 2184 const efx_mport_sel_t *entity_mportp __rte_unused, 2185 uint16_t switch_port_id, 2186 union sfc_mae_switch_port_data *port_datap, 2187 void *user_datap) 2188 { 2189 struct sfc_get_representors_ctx *ctx = user_datap; 2190 struct rte_eth_representor_range *range; 2191 int ret; 2192 int rc; 2193 2194 SFC_ASSERT(ctx != NULL); 2195 SFC_ASSERT(ctx->info != NULL); 2196 SFC_ASSERT(ctx->sa != NULL); 2197 2198 if (type != SFC_MAE_SWITCH_PORT_REPRESENTOR) { 2199 sfc_dbg(ctx->sa, "not a representor, skipping"); 2200 return; 2201 } 2202 if (ctx->info->nb_ranges >= ctx->info->nb_ranges_alloc) { 2203 sfc_dbg(ctx->sa, "info structure is full already"); 2204 return; 2205 } 2206 2207 range = &ctx->info->ranges[ctx->info->nb_ranges]; 2208 rc = sfc_mae_switch_controller_from_mapping(ctx->controllers, 2209 ctx->nb_controllers, 2210 port_datap->repr.intf, 2211 &range->controller); 2212 if (rc != 0) { 2213 sfc_err(ctx->sa, "invalid representor controller: %d", 2214 port_datap->repr.intf); 2215 range->controller = -1; 2216 } 2217 range->pf = port_datap->repr.pf; 2218 range->id_base = switch_port_id; 2219 range->id_end = switch_port_id; 2220 2221 if (port_datap->repr.vf != EFX_PCI_VF_INVALID) { 2222 range->type = RTE_ETH_REPRESENTOR_VF; 2223 range->vf = port_datap->repr.vf; 2224 ret = snprintf(range->name, RTE_DEV_NAME_MAX_LEN, 2225 "c%dpf%dvf%d", range->controller, range->pf, 2226 range->vf); 2227 } else { 2228 range->type = RTE_ETH_REPRESENTOR_PF; 2229 ret = snprintf(range->name, RTE_DEV_NAME_MAX_LEN, 2230 "c%dpf%d", range->controller, range->pf); 2231 } 2232 if (ret >= RTE_DEV_NAME_MAX_LEN) { 2233 sfc_err(ctx->sa, "representor name has been truncated: %s", 2234 range->name); 2235 } 2236 2237 ctx->info->nb_ranges++; 2238 } 2239 2240 static int 2241 sfc_representor_info_get(struct rte_eth_dev *dev, 2242 struct rte_eth_representor_info *info) 2243 { 2244 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2245 struct sfc_get_representors_ctx get_repr_ctx; 2246 const efx_nic_cfg_t *nic_cfg; 2247 uint16_t switch_domain_id; 2248 uint32_t nb_repr; 2249 int controller; 2250 int rc; 2251 2252 sfc_adapter_lock(sa); 2253 2254 if (sa->mae.status != SFC_MAE_STATUS_SUPPORTED) { 2255 sfc_adapter_unlock(sa); 2256 return -ENOTSUP; 2257 } 2258 2259 rc = sfc_process_mport_journal(sa); 2260 if (rc != 0) { 2261 sfc_adapter_unlock(sa); 2262 SFC_ASSERT(rc > 0); 2263 return -rc; 2264 } 2265 2266 switch_domain_id = sa->mae.switch_domain_id; 2267 2268 nb_repr = 0; 2269 rc = sfc_mae_switch_ports_iterate(switch_domain_id, 2270 sfc_count_representors_cb, 2271 &nb_repr); 2272 if (rc != 0) { 2273 sfc_adapter_unlock(sa); 2274 SFC_ASSERT(rc > 0); 2275 return -rc; 2276 } 2277 2278 if (info == NULL) { 2279 sfc_adapter_unlock(sa); 2280 return nb_repr; 2281 } 2282 2283 rc = sfc_mae_switch_domain_controllers(switch_domain_id, 2284 &get_repr_ctx.controllers, 2285 &get_repr_ctx.nb_controllers); 2286 if (rc != 0) { 2287 sfc_adapter_unlock(sa); 2288 SFC_ASSERT(rc > 0); 2289 return -rc; 2290 } 2291 2292 nic_cfg = efx_nic_cfg_get(sa->nic); 2293 2294 rc = sfc_mae_switch_domain_get_controller(switch_domain_id, 2295 nic_cfg->enc_intf, 2296 &controller); 2297 if (rc != 0) { 2298 sfc_err(sa, "invalid controller: %d", nic_cfg->enc_intf); 2299 controller = -1; 2300 } 2301 2302 info->controller = controller; 2303 info->pf = nic_cfg->enc_pf; 2304 2305 get_repr_ctx.info = info; 2306 get_repr_ctx.sa = sa; 2307 get_repr_ctx.switch_domain_id = switch_domain_id; 2308 rc = sfc_mae_switch_ports_iterate(switch_domain_id, 2309 sfc_get_representors_cb, 2310 &get_repr_ctx); 2311 if (rc != 0) { 2312 sfc_adapter_unlock(sa); 2313 SFC_ASSERT(rc > 0); 2314 return -rc; 2315 } 2316 2317 sfc_adapter_unlock(sa); 2318 return nb_repr; 2319 } 2320 2321 static int 2322 sfc_rx_metadata_negotiate(struct rte_eth_dev *dev, uint64_t *features) 2323 { 2324 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2325 uint64_t supported = 0; 2326 2327 sfc_adapter_lock(sa); 2328 2329 if ((sa->priv.dp_rx->features & SFC_DP_RX_FEAT_FLOW_FLAG) != 0) 2330 supported |= RTE_ETH_RX_METADATA_USER_FLAG; 2331 2332 if ((sa->priv.dp_rx->features & SFC_DP_RX_FEAT_FLOW_MARK) != 0) 2333 supported |= RTE_ETH_RX_METADATA_USER_MARK; 2334 2335 sa->negotiated_rx_metadata = supported & *features; 2336 *features = sa->negotiated_rx_metadata; 2337 2338 sfc_adapter_unlock(sa); 2339 2340 return 0; 2341 } 2342 2343 static const struct eth_dev_ops sfc_eth_dev_ops = { 2344 .dev_configure = sfc_dev_configure, 2345 .dev_start = sfc_dev_start, 2346 .dev_stop = sfc_dev_stop, 2347 .dev_set_link_up = sfc_dev_set_link_up, 2348 .dev_set_link_down = sfc_dev_set_link_down, 2349 .dev_close = sfc_dev_close, 2350 .promiscuous_enable = sfc_dev_promisc_enable, 2351 .promiscuous_disable = sfc_dev_promisc_disable, 2352 .allmulticast_enable = sfc_dev_allmulti_enable, 2353 .allmulticast_disable = sfc_dev_allmulti_disable, 2354 .link_update = sfc_dev_link_update, 2355 .stats_get = sfc_stats_get, 2356 .stats_reset = sfc_stats_reset, 2357 .xstats_get = sfc_xstats_get, 2358 .xstats_reset = sfc_stats_reset, 2359 .xstats_get_names = sfc_xstats_get_names, 2360 .dev_infos_get = sfc_dev_infos_get, 2361 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 2362 .mtu_set = sfc_dev_set_mtu, 2363 .rx_queue_start = sfc_rx_queue_start, 2364 .rx_queue_stop = sfc_rx_queue_stop, 2365 .tx_queue_start = sfc_tx_queue_start, 2366 .tx_queue_stop = sfc_tx_queue_stop, 2367 .rx_queue_setup = sfc_rx_queue_setup, 2368 .rx_queue_release = sfc_rx_queue_release, 2369 .rx_queue_intr_enable = sfc_rx_queue_intr_enable, 2370 .rx_queue_intr_disable = sfc_rx_queue_intr_disable, 2371 .tx_queue_setup = sfc_tx_queue_setup, 2372 .tx_queue_release = sfc_tx_queue_release, 2373 .flow_ctrl_get = sfc_flow_ctrl_get, 2374 .flow_ctrl_set = sfc_flow_ctrl_set, 2375 .mac_addr_set = sfc_mac_addr_set, 2376 .udp_tunnel_port_add = sfc_dev_udp_tunnel_port_add, 2377 .udp_tunnel_port_del = sfc_dev_udp_tunnel_port_del, 2378 .reta_update = sfc_dev_rss_reta_update, 2379 .reta_query = sfc_dev_rss_reta_query, 2380 .rss_hash_update = sfc_dev_rss_hash_update, 2381 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 2382 .flow_ops_get = sfc_dev_flow_ops_get, 2383 .set_mc_addr_list = sfc_set_mc_addr_list, 2384 .rxq_info_get = sfc_rx_queue_info_get, 2385 .txq_info_get = sfc_tx_queue_info_get, 2386 .fw_version_get = sfc_fw_version_get, 2387 .xstats_get_by_id = sfc_xstats_get_by_id, 2388 .xstats_get_names_by_id = sfc_xstats_get_names_by_id, 2389 .pool_ops_supported = sfc_pool_ops_supported, 2390 .representor_info_get = sfc_representor_info_get, 2391 .rx_metadata_negotiate = sfc_rx_metadata_negotiate, 2392 }; 2393 2394 struct sfc_ethdev_init_data { 2395 uint16_t nb_representors; 2396 }; 2397 2398 /** 2399 * Duplicate a string in potentially shared memory required for 2400 * multi-process support. 2401 * 2402 * strdup() allocates from process-local heap/memory. 2403 */ 2404 static char * 2405 sfc_strdup(const char *str) 2406 { 2407 size_t size; 2408 char *copy; 2409 2410 if (str == NULL) 2411 return NULL; 2412 2413 size = strlen(str) + 1; 2414 copy = rte_malloc(__func__, size, 0); 2415 if (copy != NULL) 2416 rte_memcpy(copy, str, size); 2417 2418 return copy; 2419 } 2420 2421 static int 2422 sfc_eth_dev_set_ops(struct rte_eth_dev *dev) 2423 { 2424 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2425 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2426 const struct sfc_dp_rx *dp_rx; 2427 const struct sfc_dp_tx *dp_tx; 2428 const efx_nic_cfg_t *encp; 2429 unsigned int avail_caps = 0; 2430 const char *rx_name = NULL; 2431 const char *tx_name = NULL; 2432 int rc; 2433 2434 switch (sa->family) { 2435 case EFX_FAMILY_HUNTINGTON: 2436 case EFX_FAMILY_MEDFORD: 2437 case EFX_FAMILY_MEDFORD2: 2438 avail_caps |= SFC_DP_HW_FW_CAP_EF10; 2439 avail_caps |= SFC_DP_HW_FW_CAP_RX_EFX; 2440 avail_caps |= SFC_DP_HW_FW_CAP_TX_EFX; 2441 break; 2442 case EFX_FAMILY_RIVERHEAD: 2443 avail_caps |= SFC_DP_HW_FW_CAP_EF100; 2444 break; 2445 default: 2446 break; 2447 } 2448 2449 encp = efx_nic_cfg_get(sa->nic); 2450 if (encp->enc_rx_es_super_buffer_supported) 2451 avail_caps |= SFC_DP_HW_FW_CAP_RX_ES_SUPER_BUFFER; 2452 2453 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH, 2454 sfc_kvarg_string_handler, &rx_name); 2455 if (rc != 0) 2456 goto fail_kvarg_rx_datapath; 2457 2458 if (rx_name != NULL) { 2459 dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name); 2460 if (dp_rx == NULL) { 2461 sfc_err(sa, "Rx datapath %s not found", rx_name); 2462 rc = ENOENT; 2463 goto fail_dp_rx; 2464 } 2465 if (!sfc_dp_match_hw_fw_caps(&dp_rx->dp, avail_caps)) { 2466 sfc_err(sa, 2467 "Insufficient Hw/FW capabilities to use Rx datapath %s", 2468 rx_name); 2469 rc = EINVAL; 2470 goto fail_dp_rx_caps; 2471 } 2472 } else { 2473 dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps); 2474 if (dp_rx == NULL) { 2475 sfc_err(sa, "Rx datapath by caps %#x not found", 2476 avail_caps); 2477 rc = ENOENT; 2478 goto fail_dp_rx; 2479 } 2480 } 2481 2482 sas->dp_rx_name = sfc_strdup(dp_rx->dp.name); 2483 if (sas->dp_rx_name == NULL) { 2484 rc = ENOMEM; 2485 goto fail_dp_rx_name; 2486 } 2487 2488 if (strcmp(dp_rx->dp.name, SFC_KVARG_DATAPATH_EF10_ESSB) == 0) { 2489 /* FLAG and MARK are always available from Rx prefix. */ 2490 sa->negotiated_rx_metadata |= RTE_ETH_RX_METADATA_USER_FLAG; 2491 sa->negotiated_rx_metadata |= RTE_ETH_RX_METADATA_USER_MARK; 2492 } 2493 2494 sfc_notice(sa, "use %s Rx datapath", sas->dp_rx_name); 2495 2496 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH, 2497 sfc_kvarg_string_handler, &tx_name); 2498 if (rc != 0) 2499 goto fail_kvarg_tx_datapath; 2500 2501 if (tx_name != NULL) { 2502 dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name); 2503 if (dp_tx == NULL) { 2504 sfc_err(sa, "Tx datapath %s not found", tx_name); 2505 rc = ENOENT; 2506 goto fail_dp_tx; 2507 } 2508 if (!sfc_dp_match_hw_fw_caps(&dp_tx->dp, avail_caps)) { 2509 sfc_err(sa, 2510 "Insufficient Hw/FW capabilities to use Tx datapath %s", 2511 tx_name); 2512 rc = EINVAL; 2513 goto fail_dp_tx_caps; 2514 } 2515 } else { 2516 dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps); 2517 if (dp_tx == NULL) { 2518 sfc_err(sa, "Tx datapath by caps %#x not found", 2519 avail_caps); 2520 rc = ENOENT; 2521 goto fail_dp_tx; 2522 } 2523 } 2524 2525 sas->dp_tx_name = sfc_strdup(dp_tx->dp.name); 2526 if (sas->dp_tx_name == NULL) { 2527 rc = ENOMEM; 2528 goto fail_dp_tx_name; 2529 } 2530 2531 sfc_notice(sa, "use %s Tx datapath", sas->dp_tx_name); 2532 2533 sa->priv.dp_rx = dp_rx; 2534 sa->priv.dp_tx = dp_tx; 2535 2536 dev->rx_pkt_burst = dp_rx->pkt_burst; 2537 dev->tx_pkt_prepare = dp_tx->pkt_prepare; 2538 dev->tx_pkt_burst = dp_tx->pkt_burst; 2539 2540 dev->rx_queue_count = sfc_rx_queue_count; 2541 dev->rx_descriptor_status = sfc_rx_descriptor_status; 2542 dev->tx_descriptor_status = sfc_tx_descriptor_status; 2543 dev->dev_ops = &sfc_eth_dev_ops; 2544 2545 return 0; 2546 2547 fail_dp_tx_name: 2548 fail_dp_tx_caps: 2549 fail_dp_tx: 2550 fail_kvarg_tx_datapath: 2551 rte_free(sas->dp_rx_name); 2552 sas->dp_rx_name = NULL; 2553 2554 fail_dp_rx_name: 2555 fail_dp_rx_caps: 2556 fail_dp_rx: 2557 fail_kvarg_rx_datapath: 2558 return rc; 2559 } 2560 2561 static void 2562 sfc_eth_dev_clear_ops(struct rte_eth_dev *dev) 2563 { 2564 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2565 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2566 2567 dev->dev_ops = NULL; 2568 dev->tx_pkt_prepare = NULL; 2569 dev->rx_pkt_burst = NULL; 2570 dev->tx_pkt_burst = NULL; 2571 2572 rte_free(sas->dp_tx_name); 2573 sas->dp_tx_name = NULL; 2574 sa->priv.dp_tx = NULL; 2575 2576 rte_free(sas->dp_rx_name); 2577 sas->dp_rx_name = NULL; 2578 sa->priv.dp_rx = NULL; 2579 } 2580 2581 static const struct eth_dev_ops sfc_eth_dev_secondary_ops = { 2582 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 2583 .reta_query = sfc_dev_rss_reta_query, 2584 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 2585 .rxq_info_get = sfc_rx_queue_info_get, 2586 .txq_info_get = sfc_tx_queue_info_get, 2587 }; 2588 2589 static int 2590 sfc_eth_dev_secondary_init(struct rte_eth_dev *dev, uint32_t logtype_main) 2591 { 2592 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2593 struct sfc_adapter_priv *sap; 2594 const struct sfc_dp_rx *dp_rx; 2595 const struct sfc_dp_tx *dp_tx; 2596 int rc; 2597 2598 /* 2599 * Allocate process private data from heap, since it should not 2600 * be located in shared memory allocated using rte_malloc() API. 2601 */ 2602 sap = calloc(1, sizeof(*sap)); 2603 if (sap == NULL) { 2604 rc = ENOMEM; 2605 goto fail_alloc_priv; 2606 } 2607 2608 sap->logtype_main = logtype_main; 2609 2610 dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, sas->dp_rx_name); 2611 if (dp_rx == NULL) { 2612 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2613 "cannot find %s Rx datapath", sas->dp_rx_name); 2614 rc = ENOENT; 2615 goto fail_dp_rx; 2616 } 2617 if (~dp_rx->features & SFC_DP_RX_FEAT_MULTI_PROCESS) { 2618 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2619 "%s Rx datapath does not support multi-process", 2620 sas->dp_rx_name); 2621 rc = EINVAL; 2622 goto fail_dp_rx_multi_process; 2623 } 2624 2625 dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, sas->dp_tx_name); 2626 if (dp_tx == NULL) { 2627 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2628 "cannot find %s Tx datapath", sas->dp_tx_name); 2629 rc = ENOENT; 2630 goto fail_dp_tx; 2631 } 2632 if (~dp_tx->features & SFC_DP_TX_FEAT_MULTI_PROCESS) { 2633 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2634 "%s Tx datapath does not support multi-process", 2635 sas->dp_tx_name); 2636 rc = EINVAL; 2637 goto fail_dp_tx_multi_process; 2638 } 2639 2640 sap->dp_rx = dp_rx; 2641 sap->dp_tx = dp_tx; 2642 2643 dev->process_private = sap; 2644 dev->rx_pkt_burst = dp_rx->pkt_burst; 2645 dev->tx_pkt_prepare = dp_tx->pkt_prepare; 2646 dev->tx_pkt_burst = dp_tx->pkt_burst; 2647 dev->rx_queue_count = sfc_rx_queue_count; 2648 dev->rx_descriptor_status = sfc_rx_descriptor_status; 2649 dev->tx_descriptor_status = sfc_tx_descriptor_status; 2650 dev->dev_ops = &sfc_eth_dev_secondary_ops; 2651 2652 return 0; 2653 2654 fail_dp_tx_multi_process: 2655 fail_dp_tx: 2656 fail_dp_rx_multi_process: 2657 fail_dp_rx: 2658 free(sap); 2659 2660 fail_alloc_priv: 2661 return rc; 2662 } 2663 2664 static void 2665 sfc_register_dp(void) 2666 { 2667 /* Register once */ 2668 if (TAILQ_EMPTY(&sfc_dp_head)) { 2669 /* Prefer EF10 datapath */ 2670 sfc_dp_register(&sfc_dp_head, &sfc_ef100_rx.dp); 2671 sfc_dp_register(&sfc_dp_head, &sfc_ef10_essb_rx.dp); 2672 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp); 2673 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); 2674 2675 sfc_dp_register(&sfc_dp_head, &sfc_ef100_tx.dp); 2676 sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp); 2677 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp); 2678 sfc_dp_register(&sfc_dp_head, &sfc_ef10_simple_tx.dp); 2679 } 2680 } 2681 2682 static int 2683 sfc_parse_switch_mode(struct sfc_adapter *sa, bool has_representors) 2684 { 2685 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 2686 const char *switch_mode = NULL; 2687 int rc; 2688 2689 sfc_log_init(sa, "entry"); 2690 2691 rc = sfc_kvargs_process(sa, SFC_KVARG_SWITCH_MODE, 2692 sfc_kvarg_string_handler, &switch_mode); 2693 if (rc != 0) 2694 goto fail_kvargs; 2695 2696 if (switch_mode == NULL) { 2697 sa->switchdev = encp->enc_mae_supported && 2698 (!encp->enc_datapath_cap_evb || 2699 has_representors); 2700 } else if (strcasecmp(switch_mode, SFC_KVARG_SWITCH_MODE_LEGACY) == 0) { 2701 sa->switchdev = false; 2702 } else if (strcasecmp(switch_mode, 2703 SFC_KVARG_SWITCH_MODE_SWITCHDEV) == 0) { 2704 sa->switchdev = true; 2705 } else { 2706 sfc_err(sa, "invalid switch mode device argument '%s'", 2707 switch_mode); 2708 rc = EINVAL; 2709 goto fail_mode; 2710 } 2711 2712 sfc_log_init(sa, "done"); 2713 2714 return 0; 2715 2716 fail_mode: 2717 fail_kvargs: 2718 sfc_log_init(sa, "failed: %s", rte_strerror(rc)); 2719 2720 return rc; 2721 } 2722 2723 static int 2724 sfc_eth_dev_init(struct rte_eth_dev *dev, void *init_params) 2725 { 2726 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2727 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 2728 struct sfc_ethdev_init_data *init_data = init_params; 2729 uint32_t logtype_main; 2730 struct sfc_adapter *sa; 2731 int rc; 2732 const efx_nic_cfg_t *encp; 2733 const struct rte_ether_addr *from; 2734 int ret; 2735 2736 if (sfc_efx_dev_class_get(pci_dev->device.devargs) != 2737 SFC_EFX_DEV_CLASS_NET) { 2738 SFC_GENERIC_LOG(DEBUG, 2739 "Incompatible device class: skip probing, should be probed by other sfc driver."); 2740 return 1; 2741 } 2742 2743 rc = sfc_dp_mport_register(); 2744 if (rc != 0) 2745 return rc; 2746 2747 sfc_register_dp(); 2748 2749 logtype_main = sfc_register_logtype(&pci_dev->addr, 2750 SFC_LOGTYPE_MAIN_STR, 2751 RTE_LOG_NOTICE); 2752 2753 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2754 return -sfc_eth_dev_secondary_init(dev, logtype_main); 2755 2756 /* Required for logging */ 2757 ret = snprintf(sas->log_prefix, sizeof(sas->log_prefix), 2758 "PMD: sfc_efx " PCI_PRI_FMT " #%" PRIu16 ": ", 2759 pci_dev->addr.domain, pci_dev->addr.bus, 2760 pci_dev->addr.devid, pci_dev->addr.function, 2761 dev->data->port_id); 2762 if (ret < 0 || ret >= (int)sizeof(sas->log_prefix)) { 2763 SFC_GENERIC_LOG(ERR, 2764 "reserved log prefix is too short for " PCI_PRI_FMT, 2765 pci_dev->addr.domain, pci_dev->addr.bus, 2766 pci_dev->addr.devid, pci_dev->addr.function); 2767 return -EINVAL; 2768 } 2769 sas->pci_addr = pci_dev->addr; 2770 sas->port_id = dev->data->port_id; 2771 2772 /* 2773 * Allocate process private data from heap, since it should not 2774 * be located in shared memory allocated using rte_malloc() API. 2775 */ 2776 sa = calloc(1, sizeof(*sa)); 2777 if (sa == NULL) { 2778 rc = ENOMEM; 2779 goto fail_alloc_sa; 2780 } 2781 2782 dev->process_private = sa; 2783 2784 /* Required for logging */ 2785 sa->priv.shared = sas; 2786 sa->priv.logtype_main = logtype_main; 2787 2788 sa->eth_dev = dev; 2789 2790 /* Copy PCI device info to the dev->data */ 2791 rte_eth_copy_pci_info(dev, pci_dev); 2792 dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 2793 dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 2794 2795 rc = sfc_kvargs_parse(sa); 2796 if (rc != 0) 2797 goto fail_kvargs_parse; 2798 2799 sfc_log_init(sa, "entry"); 2800 2801 dev->data->mac_addrs = rte_zmalloc("sfc", RTE_ETHER_ADDR_LEN, 0); 2802 if (dev->data->mac_addrs == NULL) { 2803 rc = ENOMEM; 2804 goto fail_mac_addrs; 2805 } 2806 2807 sfc_adapter_lock_init(sa); 2808 sfc_adapter_lock(sa); 2809 2810 sfc_log_init(sa, "probing"); 2811 rc = sfc_probe(sa); 2812 if (rc != 0) 2813 goto fail_probe; 2814 2815 /* 2816 * Selecting a default switch mode requires the NIC to be probed and 2817 * to have its capabilities filled in. 2818 */ 2819 rc = sfc_parse_switch_mode(sa, init_data->nb_representors > 0); 2820 if (rc != 0) 2821 goto fail_switch_mode; 2822 2823 sfc_log_init(sa, "set device ops"); 2824 rc = sfc_eth_dev_set_ops(dev); 2825 if (rc != 0) 2826 goto fail_set_ops; 2827 2828 sfc_log_init(sa, "attaching"); 2829 rc = sfc_attach(sa); 2830 if (rc != 0) 2831 goto fail_attach; 2832 2833 if (sa->switchdev && sa->mae.status != SFC_MAE_STATUS_SUPPORTED) { 2834 sfc_err(sa, 2835 "failed to enable switchdev mode without MAE support"); 2836 rc = ENOTSUP; 2837 goto fail_switchdev_no_mae; 2838 } 2839 2840 encp = efx_nic_cfg_get(sa->nic); 2841 2842 /* 2843 * The arguments are really reverse order in comparison to 2844 * Linux kernel. Copy from NIC config to Ethernet device data. 2845 */ 2846 from = (const struct rte_ether_addr *)(encp->enc_mac_addr); 2847 rte_ether_addr_copy(from, &dev->data->mac_addrs[0]); 2848 2849 sfc_adapter_unlock(sa); 2850 2851 sfc_log_init(sa, "done"); 2852 return 0; 2853 2854 fail_switchdev_no_mae: 2855 sfc_detach(sa); 2856 2857 fail_attach: 2858 sfc_eth_dev_clear_ops(dev); 2859 2860 fail_set_ops: 2861 fail_switch_mode: 2862 sfc_unprobe(sa); 2863 2864 fail_probe: 2865 sfc_adapter_unlock(sa); 2866 sfc_adapter_lock_fini(sa); 2867 rte_free(dev->data->mac_addrs); 2868 dev->data->mac_addrs = NULL; 2869 2870 fail_mac_addrs: 2871 sfc_kvargs_cleanup(sa); 2872 2873 fail_kvargs_parse: 2874 sfc_log_init(sa, "failed %d", rc); 2875 dev->process_private = NULL; 2876 free(sa); 2877 2878 fail_alloc_sa: 2879 SFC_ASSERT(rc > 0); 2880 return -rc; 2881 } 2882 2883 static int 2884 sfc_eth_dev_uninit(struct rte_eth_dev *dev) 2885 { 2886 sfc_dev_close(dev); 2887 2888 return 0; 2889 } 2890 2891 static const struct rte_pci_id pci_id_sfc_efx_map[] = { 2892 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, 2893 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, 2894 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, 2895 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, 2896 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, 2897 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, 2898 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2) }, 2899 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2_VF) }, 2900 { RTE_PCI_DEVICE(EFX_PCI_VENID_XILINX, EFX_PCI_DEVID_RIVERHEAD) }, 2901 { .vendor_id = 0 /* sentinel */ } 2902 }; 2903 2904 static int 2905 sfc_parse_rte_devargs(const char *args, struct rte_eth_devargs *devargs) 2906 { 2907 struct rte_eth_devargs eth_da = { .nb_representor_ports = 0 }; 2908 int rc; 2909 2910 if (args != NULL) { 2911 rc = rte_eth_devargs_parse(args, ð_da); 2912 if (rc != 0) { 2913 SFC_GENERIC_LOG(ERR, 2914 "Failed to parse generic devargs '%s'", 2915 args); 2916 return rc; 2917 } 2918 } 2919 2920 *devargs = eth_da; 2921 2922 return 0; 2923 } 2924 2925 static int 2926 sfc_eth_dev_find_or_create(struct rte_pci_device *pci_dev, 2927 struct sfc_ethdev_init_data *init_data, 2928 struct rte_eth_dev **devp, 2929 bool *dev_created) 2930 { 2931 struct rte_eth_dev *dev; 2932 bool created = false; 2933 int rc; 2934 2935 dev = rte_eth_dev_allocated(pci_dev->device.name); 2936 if (dev == NULL) { 2937 rc = rte_eth_dev_create(&pci_dev->device, pci_dev->device.name, 2938 sizeof(struct sfc_adapter_shared), 2939 eth_dev_pci_specific_init, pci_dev, 2940 sfc_eth_dev_init, init_data); 2941 if (rc != 0) { 2942 SFC_GENERIC_LOG(ERR, "Failed to create sfc ethdev '%s'", 2943 pci_dev->device.name); 2944 return rc; 2945 } 2946 2947 created = true; 2948 2949 dev = rte_eth_dev_allocated(pci_dev->device.name); 2950 if (dev == NULL) { 2951 SFC_GENERIC_LOG(ERR, 2952 "Failed to find allocated sfc ethdev '%s'", 2953 pci_dev->device.name); 2954 return -ENODEV; 2955 } 2956 } 2957 2958 *devp = dev; 2959 *dev_created = created; 2960 2961 return 0; 2962 } 2963 2964 static int 2965 sfc_eth_dev_create_repr(struct sfc_adapter *sa, 2966 efx_pcie_interface_t controller, 2967 uint16_t port, 2968 uint16_t repr_port, 2969 enum rte_eth_representor_type type) 2970 { 2971 struct sfc_repr_entity_info entity; 2972 efx_mport_sel_t mport_sel; 2973 int rc; 2974 2975 switch (type) { 2976 case RTE_ETH_REPRESENTOR_NONE: 2977 return 0; 2978 case RTE_ETH_REPRESENTOR_VF: 2979 case RTE_ETH_REPRESENTOR_PF: 2980 break; 2981 case RTE_ETH_REPRESENTOR_SF: 2982 sfc_err(sa, "SF representors are not supported"); 2983 return ENOTSUP; 2984 default: 2985 sfc_err(sa, "unknown representor type: %d", type); 2986 return ENOTSUP; 2987 } 2988 2989 rc = efx_mae_mport_by_pcie_mh_function(controller, 2990 port, 2991 repr_port, 2992 &mport_sel); 2993 if (rc != 0) { 2994 sfc_err(sa, 2995 "failed to get m-port selector for controller %u port %u repr_port %u: %s", 2996 controller, port, repr_port, rte_strerror(-rc)); 2997 return rc; 2998 } 2999 3000 memset(&entity, 0, sizeof(entity)); 3001 entity.type = type; 3002 entity.intf = controller; 3003 entity.pf = port; 3004 entity.vf = repr_port; 3005 3006 rc = sfc_repr_create(sa->eth_dev, &entity, sa->mae.switch_domain_id, 3007 &mport_sel); 3008 if (rc != 0) { 3009 sfc_err(sa, 3010 "failed to create representor for controller %u port %u repr_port %u: %s", 3011 controller, port, repr_port, rte_strerror(-rc)); 3012 return rc; 3013 } 3014 3015 return 0; 3016 } 3017 3018 static int 3019 sfc_eth_dev_create_repr_port(struct sfc_adapter *sa, 3020 const struct rte_eth_devargs *eth_da, 3021 efx_pcie_interface_t controller, 3022 uint16_t port) 3023 { 3024 int first_error = 0; 3025 uint16_t i; 3026 int rc; 3027 3028 if (eth_da->type == RTE_ETH_REPRESENTOR_PF) { 3029 return sfc_eth_dev_create_repr(sa, controller, port, 3030 EFX_PCI_VF_INVALID, 3031 eth_da->type); 3032 } 3033 3034 for (i = 0; i < eth_da->nb_representor_ports; i++) { 3035 rc = sfc_eth_dev_create_repr(sa, controller, port, 3036 eth_da->representor_ports[i], 3037 eth_da->type); 3038 if (rc != 0 && first_error == 0) 3039 first_error = rc; 3040 } 3041 3042 return first_error; 3043 } 3044 3045 static int 3046 sfc_eth_dev_create_repr_controller(struct sfc_adapter *sa, 3047 const struct rte_eth_devargs *eth_da, 3048 efx_pcie_interface_t controller) 3049 { 3050 const efx_nic_cfg_t *encp; 3051 int first_error = 0; 3052 uint16_t default_port; 3053 uint16_t i; 3054 int rc; 3055 3056 if (eth_da->nb_ports == 0) { 3057 encp = efx_nic_cfg_get(sa->nic); 3058 default_port = encp->enc_intf == controller ? encp->enc_pf : 0; 3059 return sfc_eth_dev_create_repr_port(sa, eth_da, controller, 3060 default_port); 3061 } 3062 3063 for (i = 0; i < eth_da->nb_ports; i++) { 3064 rc = sfc_eth_dev_create_repr_port(sa, eth_da, controller, 3065 eth_da->ports[i]); 3066 if (rc != 0 && first_error == 0) 3067 first_error = rc; 3068 } 3069 3070 return first_error; 3071 } 3072 3073 static int 3074 sfc_eth_dev_create_representors(struct rte_eth_dev *dev, 3075 const struct rte_eth_devargs *eth_da) 3076 { 3077 efx_pcie_interface_t intf; 3078 const efx_nic_cfg_t *encp; 3079 struct sfc_adapter *sa; 3080 uint16_t switch_domain_id; 3081 uint16_t i; 3082 int rc; 3083 3084 sa = sfc_adapter_by_eth_dev(dev); 3085 switch_domain_id = sa->mae.switch_domain_id; 3086 3087 switch (eth_da->type) { 3088 case RTE_ETH_REPRESENTOR_NONE: 3089 return 0; 3090 case RTE_ETH_REPRESENTOR_PF: 3091 case RTE_ETH_REPRESENTOR_VF: 3092 break; 3093 case RTE_ETH_REPRESENTOR_SF: 3094 sfc_err(sa, "SF representors are not supported"); 3095 return -ENOTSUP; 3096 default: 3097 sfc_err(sa, "unknown representor type: %d", 3098 eth_da->type); 3099 return -ENOTSUP; 3100 } 3101 3102 if (!sa->switchdev) { 3103 sfc_err(sa, "cannot create representors in non-switchdev mode"); 3104 return -EINVAL; 3105 } 3106 3107 if (!sfc_repr_available(sfc_sa2shared(sa))) { 3108 sfc_err(sa, "cannot create representors: unsupported"); 3109 3110 return -ENOTSUP; 3111 } 3112 3113 /* 3114 * This is needed to construct the DPDK controller -> EFX interface 3115 * mapping. 3116 */ 3117 sfc_adapter_lock(sa); 3118 rc = sfc_process_mport_journal(sa); 3119 sfc_adapter_unlock(sa); 3120 if (rc != 0) { 3121 SFC_ASSERT(rc > 0); 3122 return -rc; 3123 } 3124 3125 if (eth_da->nb_mh_controllers > 0) { 3126 for (i = 0; i < eth_da->nb_mh_controllers; i++) { 3127 rc = sfc_mae_switch_domain_get_intf(switch_domain_id, 3128 eth_da->mh_controllers[i], 3129 &intf); 3130 if (rc != 0) { 3131 sfc_err(sa, "failed to get representor"); 3132 continue; 3133 } 3134 sfc_eth_dev_create_repr_controller(sa, eth_da, intf); 3135 } 3136 } else { 3137 encp = efx_nic_cfg_get(sa->nic); 3138 sfc_eth_dev_create_repr_controller(sa, eth_da, encp->enc_intf); 3139 } 3140 3141 return 0; 3142 } 3143 3144 static int sfc_eth_dev_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 3145 struct rte_pci_device *pci_dev) 3146 { 3147 struct sfc_ethdev_init_data init_data; 3148 struct rte_eth_devargs eth_da; 3149 struct rte_eth_dev *dev; 3150 bool dev_created; 3151 int rc; 3152 3153 if (pci_dev->device.devargs != NULL) { 3154 rc = sfc_parse_rte_devargs(pci_dev->device.devargs->args, 3155 ð_da); 3156 if (rc != 0) 3157 return rc; 3158 } else { 3159 memset(ð_da, 0, sizeof(eth_da)); 3160 } 3161 3162 /* If no VF representors specified, check for PF ones */ 3163 if (eth_da.nb_representor_ports > 0) 3164 init_data.nb_representors = eth_da.nb_representor_ports; 3165 else 3166 init_data.nb_representors = eth_da.nb_ports; 3167 3168 if (init_data.nb_representors > 0 && 3169 rte_eal_process_type() != RTE_PROC_PRIMARY) { 3170 SFC_GENERIC_LOG(ERR, 3171 "Create representors from secondary process not supported, dev '%s'", 3172 pci_dev->device.name); 3173 return -ENOTSUP; 3174 } 3175 3176 /* 3177 * Driver supports RTE_PCI_DRV_PROBE_AGAIN. Hence create device only 3178 * if it does not already exist. Re-probing an existing device is 3179 * expected to allow additional representors to be configured. 3180 */ 3181 rc = sfc_eth_dev_find_or_create(pci_dev, &init_data, &dev, 3182 &dev_created); 3183 if (rc != 0) 3184 return rc; 3185 3186 rc = sfc_eth_dev_create_representors(dev, ð_da); 3187 if (rc != 0) { 3188 if (dev_created) 3189 (void)rte_eth_dev_destroy(dev, sfc_eth_dev_uninit); 3190 3191 return rc; 3192 } 3193 3194 return 0; 3195 } 3196 3197 static int sfc_eth_dev_pci_remove(struct rte_pci_device *pci_dev) 3198 { 3199 return rte_eth_dev_pci_generic_remove(pci_dev, sfc_eth_dev_uninit); 3200 } 3201 3202 static struct rte_pci_driver sfc_efx_pmd = { 3203 .id_table = pci_id_sfc_efx_map, 3204 .drv_flags = 3205 RTE_PCI_DRV_INTR_LSC | 3206 RTE_PCI_DRV_NEED_MAPPING | 3207 RTE_PCI_DRV_PROBE_AGAIN, 3208 .probe = sfc_eth_dev_pci_probe, 3209 .remove = sfc_eth_dev_pci_remove, 3210 }; 3211 3212 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd); 3213 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); 3214 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio-pci"); 3215 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, 3216 SFC_KVARG_SWITCH_MODE "=" SFC_KVARG_VALUES_SWITCH_MODE " " 3217 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " " 3218 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " " 3219 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " 3220 SFC_KVARG_FW_VARIANT "=" SFC_KVARG_VALUES_FW_VARIANT " " 3221 SFC_KVARG_RXD_WAIT_TIMEOUT_NS "=<long> " 3222 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long>"); 3223 3224 RTE_INIT(sfc_driver_register_logtype) 3225 { 3226 int ret; 3227 3228 ret = rte_log_register_type_and_pick_level(SFC_LOGTYPE_PREFIX "driver", 3229 RTE_LOG_NOTICE); 3230 sfc_logtype_driver = (ret < 0) ? RTE_LOGTYPE_PMD : ret; 3231 } 3232