1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) 2016-2017 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * This software was jointly developed between OKTET Labs (under contract 8 * for Solarflare) and Solarflare Communications, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <rte_dev.h> 33 #include <rte_ethdev.h> 34 #include <rte_ethdev_pci.h> 35 #include <rte_pci.h> 36 #include <rte_errno.h> 37 38 #include "efx.h" 39 40 #include "sfc.h" 41 #include "sfc_debug.h" 42 #include "sfc_log.h" 43 #include "sfc_kvargs.h" 44 #include "sfc_ev.h" 45 #include "sfc_rx.h" 46 #include "sfc_tx.h" 47 #include "sfc_flow.h" 48 #include "sfc_dp.h" 49 #include "sfc_dp_rx.h" 50 51 static struct sfc_dp_list sfc_dp_head = 52 TAILQ_HEAD_INITIALIZER(sfc_dp_head); 53 54 static int 55 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) 56 { 57 struct sfc_adapter *sa = dev->data->dev_private; 58 efx_nic_fw_info_t enfi; 59 int ret; 60 int rc; 61 62 /* 63 * Return value of the callback is likely supposed to be 64 * equal to or greater than 0, nevertheless, if an error 65 * occurs, it will be desirable to pass it to the caller 66 */ 67 if ((fw_version == NULL) || (fw_size == 0)) 68 return -EINVAL; 69 70 rc = efx_nic_get_fw_version(sa->nic, &enfi); 71 if (rc != 0) 72 return -rc; 73 74 ret = snprintf(fw_version, fw_size, 75 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16, 76 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1], 77 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]); 78 if (ret < 0) 79 return ret; 80 81 if (enfi.enfi_dpcpu_fw_ids_valid) { 82 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret); 83 int ret_extra; 84 85 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset, 86 fw_size - dpcpu_fw_ids_offset, 87 " rx%" PRIx16 " tx%" PRIx16, 88 enfi.enfi_rx_dpcpu_fw_id, 89 enfi.enfi_tx_dpcpu_fw_id); 90 if (ret_extra < 0) 91 return ret_extra; 92 93 ret += ret_extra; 94 } 95 96 if (fw_size < (size_t)(++ret)) 97 return ret; 98 else 99 return 0; 100 } 101 102 static void 103 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 104 { 105 struct sfc_adapter *sa = dev->data->dev_private; 106 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 107 108 sfc_log_init(sa, "entry"); 109 110 dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev); 111 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; 112 113 /* Autonegotiation may be disabled */ 114 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 115 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX) 116 dev_info->speed_capa |= ETH_LINK_SPEED_1G; 117 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX) 118 dev_info->speed_capa |= ETH_LINK_SPEED_10G; 119 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX) 120 dev_info->speed_capa |= ETH_LINK_SPEED_40G; 121 122 dev_info->max_rx_queues = sa->rxq_max; 123 dev_info->max_tx_queues = sa->txq_max; 124 125 /* By default packets are dropped if no descriptors are available */ 126 dev_info->default_rxconf.rx_drop_en = 1; 127 128 dev_info->rx_offload_capa = 129 DEV_RX_OFFLOAD_IPV4_CKSUM | 130 DEV_RX_OFFLOAD_UDP_CKSUM | 131 DEV_RX_OFFLOAD_TCP_CKSUM; 132 133 dev_info->tx_offload_capa = 134 DEV_TX_OFFLOAD_IPV4_CKSUM | 135 DEV_TX_OFFLOAD_UDP_CKSUM | 136 DEV_TX_OFFLOAD_TCP_CKSUM; 137 138 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP; 139 if ((~sa->dp_tx->features & SFC_DP_TX_FEAT_VLAN_INSERT) || 140 !encp->enc_hw_tx_insert_vlan_enabled) 141 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL; 142 else 143 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT; 144 145 if (~sa->dp_tx->features & SFC_DP_TX_FEAT_MULTI_SEG) 146 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOMULTSEGS; 147 148 #if EFSYS_OPT_RX_SCALE 149 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) { 150 dev_info->reta_size = EFX_RSS_TBL_SIZE; 151 dev_info->hash_key_size = SFC_RSS_KEY_SIZE; 152 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS; 153 } 154 #endif 155 156 if (sa->tso) 157 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO; 158 159 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS; 160 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS; 161 /* The RXQ hardware requires that the descriptor count is a power 162 * of 2, but rx_desc_lim cannot properly describe that constraint. 163 */ 164 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS; 165 166 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; 167 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS; 168 /* 169 * The TXQ hardware requires that the descriptor count is a power 170 * of 2, but tx_desc_lim cannot properly describe that constraint 171 */ 172 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS; 173 } 174 175 static const uint32_t * 176 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) 177 { 178 struct sfc_adapter *sa = dev->data->dev_private; 179 180 return sa->dp_rx->supported_ptypes_get(); 181 } 182 183 static int 184 sfc_dev_configure(struct rte_eth_dev *dev) 185 { 186 struct rte_eth_dev_data *dev_data = dev->data; 187 struct sfc_adapter *sa = dev_data->dev_private; 188 int rc; 189 190 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u", 191 dev_data->nb_rx_queues, dev_data->nb_tx_queues); 192 193 sfc_adapter_lock(sa); 194 switch (sa->state) { 195 case SFC_ADAPTER_CONFIGURED: 196 /* FALLTHROUGH */ 197 case SFC_ADAPTER_INITIALIZED: 198 rc = sfc_configure(sa); 199 break; 200 default: 201 sfc_err(sa, "unexpected adapter state %u to configure", 202 sa->state); 203 rc = EINVAL; 204 break; 205 } 206 sfc_adapter_unlock(sa); 207 208 sfc_log_init(sa, "done %d", rc); 209 SFC_ASSERT(rc >= 0); 210 return -rc; 211 } 212 213 static int 214 sfc_dev_start(struct rte_eth_dev *dev) 215 { 216 struct sfc_adapter *sa = dev->data->dev_private; 217 int rc; 218 219 sfc_log_init(sa, "entry"); 220 221 sfc_adapter_lock(sa); 222 rc = sfc_start(sa); 223 sfc_adapter_unlock(sa); 224 225 sfc_log_init(sa, "done %d", rc); 226 SFC_ASSERT(rc >= 0); 227 return -rc; 228 } 229 230 static int 231 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 232 { 233 struct sfc_adapter *sa = dev->data->dev_private; 234 struct rte_eth_link *dev_link = &dev->data->dev_link; 235 struct rte_eth_link old_link; 236 struct rte_eth_link current_link; 237 238 sfc_log_init(sa, "entry"); 239 240 retry: 241 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t)); 242 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link); 243 244 if (sa->state != SFC_ADAPTER_STARTED) { 245 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link); 246 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 247 *(uint64_t *)&old_link, 248 *(uint64_t *)¤t_link)) 249 goto retry; 250 } else if (wait_to_complete) { 251 efx_link_mode_t link_mode; 252 253 if (efx_port_poll(sa->nic, &link_mode) != 0) 254 link_mode = EFX_LINK_UNKNOWN; 255 sfc_port_link_mode_to_info(link_mode, ¤t_link); 256 257 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 258 *(uint64_t *)&old_link, 259 *(uint64_t *)¤t_link)) 260 goto retry; 261 } else { 262 sfc_ev_mgmt_qpoll(sa); 263 *(int64_t *)¤t_link = 264 rte_atomic64_read((rte_atomic64_t *)dev_link); 265 } 266 267 if (old_link.link_status != current_link.link_status) 268 sfc_info(sa, "Link status is %s", 269 current_link.link_status ? "UP" : "DOWN"); 270 271 return old_link.link_status == current_link.link_status ? 0 : -1; 272 } 273 274 static void 275 sfc_dev_stop(struct rte_eth_dev *dev) 276 { 277 struct sfc_adapter *sa = dev->data->dev_private; 278 279 sfc_log_init(sa, "entry"); 280 281 sfc_adapter_lock(sa); 282 sfc_stop(sa); 283 sfc_adapter_unlock(sa); 284 285 sfc_log_init(sa, "done"); 286 } 287 288 static int 289 sfc_dev_set_link_up(struct rte_eth_dev *dev) 290 { 291 struct sfc_adapter *sa = dev->data->dev_private; 292 int rc; 293 294 sfc_log_init(sa, "entry"); 295 296 sfc_adapter_lock(sa); 297 rc = sfc_start(sa); 298 sfc_adapter_unlock(sa); 299 300 SFC_ASSERT(rc >= 0); 301 return -rc; 302 } 303 304 static int 305 sfc_dev_set_link_down(struct rte_eth_dev *dev) 306 { 307 struct sfc_adapter *sa = dev->data->dev_private; 308 309 sfc_log_init(sa, "entry"); 310 311 sfc_adapter_lock(sa); 312 sfc_stop(sa); 313 sfc_adapter_unlock(sa); 314 315 return 0; 316 } 317 318 static void 319 sfc_dev_close(struct rte_eth_dev *dev) 320 { 321 struct sfc_adapter *sa = dev->data->dev_private; 322 323 sfc_log_init(sa, "entry"); 324 325 sfc_adapter_lock(sa); 326 switch (sa->state) { 327 case SFC_ADAPTER_STARTED: 328 sfc_stop(sa); 329 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED); 330 /* FALLTHROUGH */ 331 case SFC_ADAPTER_CONFIGURED: 332 sfc_close(sa); 333 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED); 334 /* FALLTHROUGH */ 335 case SFC_ADAPTER_INITIALIZED: 336 break; 337 default: 338 sfc_err(sa, "unexpected adapter state %u on close", sa->state); 339 break; 340 } 341 sfc_adapter_unlock(sa); 342 343 sfc_log_init(sa, "done"); 344 } 345 346 static void 347 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode, 348 boolean_t enabled) 349 { 350 struct sfc_port *port; 351 boolean_t *toggle; 352 struct sfc_adapter *sa = dev->data->dev_private; 353 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI); 354 const char *desc = (allmulti) ? "all-multi" : "promiscuous"; 355 356 sfc_adapter_lock(sa); 357 358 port = &sa->port; 359 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc); 360 361 if (*toggle != enabled) { 362 *toggle = enabled; 363 364 if (port->isolated) { 365 sfc_warn(sa, "isolated mode is active on the port"); 366 sfc_warn(sa, "the change is to be applied on the next " 367 "start provided that isolated mode is " 368 "disabled prior the next start"); 369 } else if ((sa->state == SFC_ADAPTER_STARTED) && 370 (sfc_set_rx_mode(sa) != 0)) { 371 *toggle = !(enabled); 372 sfc_warn(sa, "Failed to %s %s mode", 373 ((enabled) ? "enable" : "disable"), desc); 374 } 375 } 376 377 sfc_adapter_unlock(sa); 378 } 379 380 static void 381 sfc_dev_promisc_enable(struct rte_eth_dev *dev) 382 { 383 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE); 384 } 385 386 static void 387 sfc_dev_promisc_disable(struct rte_eth_dev *dev) 388 { 389 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE); 390 } 391 392 static void 393 sfc_dev_allmulti_enable(struct rte_eth_dev *dev) 394 { 395 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE); 396 } 397 398 static void 399 sfc_dev_allmulti_disable(struct rte_eth_dev *dev) 400 { 401 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE); 402 } 403 404 static int 405 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, 406 uint16_t nb_rx_desc, unsigned int socket_id, 407 const struct rte_eth_rxconf *rx_conf, 408 struct rte_mempool *mb_pool) 409 { 410 struct sfc_adapter *sa = dev->data->dev_private; 411 int rc; 412 413 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u", 414 rx_queue_id, nb_rx_desc, socket_id); 415 416 sfc_adapter_lock(sa); 417 418 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id, 419 rx_conf, mb_pool); 420 if (rc != 0) 421 goto fail_rx_qinit; 422 423 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq->dp; 424 425 sfc_adapter_unlock(sa); 426 427 return 0; 428 429 fail_rx_qinit: 430 sfc_adapter_unlock(sa); 431 SFC_ASSERT(rc > 0); 432 return -rc; 433 } 434 435 static void 436 sfc_rx_queue_release(void *queue) 437 { 438 struct sfc_dp_rxq *dp_rxq = queue; 439 struct sfc_rxq *rxq; 440 struct sfc_adapter *sa; 441 unsigned int sw_index; 442 443 if (dp_rxq == NULL) 444 return; 445 446 rxq = sfc_rxq_by_dp_rxq(dp_rxq); 447 sa = rxq->evq->sa; 448 sfc_adapter_lock(sa); 449 450 sw_index = sfc_rxq_sw_index(rxq); 451 452 sfc_log_init(sa, "RxQ=%u", sw_index); 453 454 sa->eth_dev->data->rx_queues[sw_index] = NULL; 455 456 sfc_rx_qfini(sa, sw_index); 457 458 sfc_adapter_unlock(sa); 459 } 460 461 static int 462 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, 463 uint16_t nb_tx_desc, unsigned int socket_id, 464 const struct rte_eth_txconf *tx_conf) 465 { 466 struct sfc_adapter *sa = dev->data->dev_private; 467 int rc; 468 469 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u", 470 tx_queue_id, nb_tx_desc, socket_id); 471 472 sfc_adapter_lock(sa); 473 474 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf); 475 if (rc != 0) 476 goto fail_tx_qinit; 477 478 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq->dp; 479 480 sfc_adapter_unlock(sa); 481 return 0; 482 483 fail_tx_qinit: 484 sfc_adapter_unlock(sa); 485 SFC_ASSERT(rc > 0); 486 return -rc; 487 } 488 489 static void 490 sfc_tx_queue_release(void *queue) 491 { 492 struct sfc_dp_txq *dp_txq = queue; 493 struct sfc_txq *txq; 494 unsigned int sw_index; 495 struct sfc_adapter *sa; 496 497 if (dp_txq == NULL) 498 return; 499 500 txq = sfc_txq_by_dp_txq(dp_txq); 501 sw_index = sfc_txq_sw_index(txq); 502 503 SFC_ASSERT(txq->evq != NULL); 504 sa = txq->evq->sa; 505 506 sfc_log_init(sa, "TxQ = %u", sw_index); 507 508 sfc_adapter_lock(sa); 509 510 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues); 511 sa->eth_dev->data->tx_queues[sw_index] = NULL; 512 513 sfc_tx_qfini(sa, sw_index); 514 515 sfc_adapter_unlock(sa); 516 } 517 518 static void 519 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 520 { 521 struct sfc_adapter *sa = dev->data->dev_private; 522 struct sfc_port *port = &sa->port; 523 uint64_t *mac_stats; 524 525 rte_spinlock_lock(&port->mac_stats_lock); 526 527 if (sfc_port_update_mac_stats(sa) != 0) 528 goto unlock; 529 530 mac_stats = port->mac_stats_buf; 531 532 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, 533 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) { 534 stats->ipackets = 535 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] + 536 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] + 537 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]; 538 stats->opackets = 539 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] + 540 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] + 541 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]; 542 stats->ibytes = 543 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] + 544 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] + 545 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]; 546 stats->obytes = 547 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] + 548 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] + 549 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; 550 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW]; 551 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; 552 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; 553 } else { 554 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS]; 555 stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; 556 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS]; 557 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS]; 558 /* 559 * Take into account stats which are whenever supported 560 * on EF10. If some stat is not supported by current 561 * firmware variant or HW revision, it is guaranteed 562 * to be zero in mac_stats. 563 */ 564 stats->imissed = 565 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] + 566 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] + 567 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] + 568 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] + 569 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] + 570 mac_stats[EFX_MAC_PM_TRUNC_QBB] + 571 mac_stats[EFX_MAC_PM_DISCARD_QBB] + 572 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] + 573 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] + 574 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS]; 575 stats->ierrors = 576 mac_stats[EFX_MAC_RX_FCS_ERRORS] + 577 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] + 578 mac_stats[EFX_MAC_RX_JABBER_PKTS]; 579 /* no oerrors counters supported on EF10 */ 580 } 581 582 unlock: 583 rte_spinlock_unlock(&port->mac_stats_lock); 584 } 585 586 static void 587 sfc_stats_reset(struct rte_eth_dev *dev) 588 { 589 struct sfc_adapter *sa = dev->data->dev_private; 590 struct sfc_port *port = &sa->port; 591 int rc; 592 593 if (sa->state != SFC_ADAPTER_STARTED) { 594 /* 595 * The operation cannot be done if port is not started; it 596 * will be scheduled to be done during the next port start 597 */ 598 port->mac_stats_reset_pending = B_TRUE; 599 return; 600 } 601 602 rc = sfc_port_reset_mac_stats(sa); 603 if (rc != 0) 604 sfc_err(sa, "failed to reset statistics (rc = %d)", rc); 605 } 606 607 static int 608 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 609 unsigned int xstats_count) 610 { 611 struct sfc_adapter *sa = dev->data->dev_private; 612 struct sfc_port *port = &sa->port; 613 uint64_t *mac_stats; 614 int rc; 615 unsigned int i; 616 int nstats = 0; 617 618 rte_spinlock_lock(&port->mac_stats_lock); 619 620 rc = sfc_port_update_mac_stats(sa); 621 if (rc != 0) { 622 SFC_ASSERT(rc > 0); 623 nstats = -rc; 624 goto unlock; 625 } 626 627 mac_stats = port->mac_stats_buf; 628 629 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 630 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 631 if (xstats != NULL && nstats < (int)xstats_count) { 632 xstats[nstats].id = nstats; 633 xstats[nstats].value = mac_stats[i]; 634 } 635 nstats++; 636 } 637 } 638 639 unlock: 640 rte_spinlock_unlock(&port->mac_stats_lock); 641 642 return nstats; 643 } 644 645 static int 646 sfc_xstats_get_names(struct rte_eth_dev *dev, 647 struct rte_eth_xstat_name *xstats_names, 648 unsigned int xstats_count) 649 { 650 struct sfc_adapter *sa = dev->data->dev_private; 651 struct sfc_port *port = &sa->port; 652 unsigned int i; 653 unsigned int nstats = 0; 654 655 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 656 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 657 if (xstats_names != NULL && nstats < xstats_count) 658 strncpy(xstats_names[nstats].name, 659 efx_mac_stat_name(sa->nic, i), 660 sizeof(xstats_names[0].name)); 661 nstats++; 662 } 663 } 664 665 return nstats; 666 } 667 668 static int 669 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 670 { 671 struct sfc_adapter *sa = dev->data->dev_private; 672 unsigned int wanted_fc, link_fc; 673 674 memset(fc_conf, 0, sizeof(*fc_conf)); 675 676 sfc_adapter_lock(sa); 677 678 if (sa->state == SFC_ADAPTER_STARTED) 679 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc); 680 else 681 link_fc = sa->port.flow_ctrl; 682 683 switch (link_fc) { 684 case 0: 685 fc_conf->mode = RTE_FC_NONE; 686 break; 687 case EFX_FCNTL_RESPOND: 688 fc_conf->mode = RTE_FC_RX_PAUSE; 689 break; 690 case EFX_FCNTL_GENERATE: 691 fc_conf->mode = RTE_FC_TX_PAUSE; 692 break; 693 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE): 694 fc_conf->mode = RTE_FC_FULL; 695 break; 696 default: 697 sfc_err(sa, "%s: unexpected flow control value %#x", 698 __func__, link_fc); 699 } 700 701 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; 702 703 sfc_adapter_unlock(sa); 704 705 return 0; 706 } 707 708 static int 709 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 710 { 711 struct sfc_adapter *sa = dev->data->dev_private; 712 struct sfc_port *port = &sa->port; 713 unsigned int fcntl; 714 int rc; 715 716 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || 717 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || 718 fc_conf->mac_ctrl_frame_fwd != 0) { 719 sfc_err(sa, "unsupported flow control settings specified"); 720 rc = EINVAL; 721 goto fail_inval; 722 } 723 724 switch (fc_conf->mode) { 725 case RTE_FC_NONE: 726 fcntl = 0; 727 break; 728 case RTE_FC_RX_PAUSE: 729 fcntl = EFX_FCNTL_RESPOND; 730 break; 731 case RTE_FC_TX_PAUSE: 732 fcntl = EFX_FCNTL_GENERATE; 733 break; 734 case RTE_FC_FULL: 735 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 736 break; 737 default: 738 rc = EINVAL; 739 goto fail_inval; 740 } 741 742 sfc_adapter_lock(sa); 743 744 if (sa->state == SFC_ADAPTER_STARTED) { 745 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg); 746 if (rc != 0) 747 goto fail_mac_fcntl_set; 748 } 749 750 port->flow_ctrl = fcntl; 751 port->flow_ctrl_autoneg = fc_conf->autoneg; 752 753 sfc_adapter_unlock(sa); 754 755 return 0; 756 757 fail_mac_fcntl_set: 758 sfc_adapter_unlock(sa); 759 fail_inval: 760 SFC_ASSERT(rc > 0); 761 return -rc; 762 } 763 764 static int 765 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 766 { 767 struct sfc_adapter *sa = dev->data->dev_private; 768 size_t pdu = EFX_MAC_PDU(mtu); 769 size_t old_pdu; 770 int rc; 771 772 sfc_log_init(sa, "mtu=%u", mtu); 773 774 rc = EINVAL; 775 if (pdu < EFX_MAC_PDU_MIN) { 776 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)", 777 (unsigned int)mtu, (unsigned int)pdu, 778 EFX_MAC_PDU_MIN); 779 goto fail_inval; 780 } 781 if (pdu > EFX_MAC_PDU_MAX) { 782 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)", 783 (unsigned int)mtu, (unsigned int)pdu, 784 EFX_MAC_PDU_MAX); 785 goto fail_inval; 786 } 787 788 sfc_adapter_lock(sa); 789 790 if (pdu != sa->port.pdu) { 791 if (sa->state == SFC_ADAPTER_STARTED) { 792 sfc_stop(sa); 793 794 old_pdu = sa->port.pdu; 795 sa->port.pdu = pdu; 796 rc = sfc_start(sa); 797 if (rc != 0) 798 goto fail_start; 799 } else { 800 sa->port.pdu = pdu; 801 } 802 } 803 804 /* 805 * The driver does not use it, but other PMDs update jumbo_frame 806 * flag and max_rx_pkt_len when MTU is set. 807 */ 808 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN); 809 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu; 810 811 sfc_adapter_unlock(sa); 812 813 sfc_log_init(sa, "done"); 814 return 0; 815 816 fail_start: 817 sa->port.pdu = old_pdu; 818 if (sfc_start(sa) != 0) 819 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) " 820 "PDU max size - port is stopped", 821 (unsigned int)pdu, (unsigned int)old_pdu); 822 sfc_adapter_unlock(sa); 823 824 fail_inval: 825 sfc_log_init(sa, "failed %d", rc); 826 SFC_ASSERT(rc > 0); 827 return -rc; 828 } 829 static void 830 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr) 831 { 832 struct sfc_adapter *sa = dev->data->dev_private; 833 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 834 struct sfc_port *port = &sa->port; 835 int rc; 836 837 sfc_adapter_lock(sa); 838 839 if (port->isolated) { 840 sfc_err(sa, "isolated mode is active on the port"); 841 sfc_err(sa, "will not set MAC address"); 842 goto unlock; 843 } 844 845 if (sa->state != SFC_ADAPTER_STARTED) { 846 sfc_info(sa, "the port is not started"); 847 sfc_info(sa, "the new MAC address will be set on port start"); 848 849 goto unlock; 850 } 851 852 if (encp->enc_allow_set_mac_with_installed_filters) { 853 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes); 854 if (rc != 0) { 855 sfc_err(sa, "cannot set MAC address (rc = %u)", rc); 856 goto unlock; 857 } 858 859 /* 860 * Changing the MAC address by means of MCDI request 861 * has no effect on received traffic, therefore 862 * we also need to update unicast filters 863 */ 864 rc = sfc_set_rx_mode(sa); 865 if (rc != 0) 866 sfc_err(sa, "cannot set filter (rc = %u)", rc); 867 } else { 868 sfc_warn(sa, "cannot set MAC address with filters installed"); 869 sfc_warn(sa, "adapter will be restarted to pick the new MAC"); 870 sfc_warn(sa, "(some traffic may be dropped)"); 871 872 /* 873 * Since setting MAC address with filters installed is not 874 * allowed on the adapter, one needs to simply restart adapter 875 * so that the new MAC address will be taken from an outer 876 * storage and set flawlessly by means of sfc_start() call 877 */ 878 sfc_stop(sa); 879 rc = sfc_start(sa); 880 if (rc != 0) 881 sfc_err(sa, "cannot restart adapter (rc = %u)", rc); 882 } 883 884 unlock: 885 sfc_adapter_unlock(sa); 886 } 887 888 889 static int 890 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set, 891 uint32_t nb_mc_addr) 892 { 893 struct sfc_adapter *sa = dev->data->dev_private; 894 struct sfc_port *port = &sa->port; 895 uint8_t *mc_addrs = port->mcast_addrs; 896 int rc; 897 unsigned int i; 898 899 if (port->isolated) { 900 sfc_err(sa, "isolated mode is active on the port"); 901 sfc_err(sa, "will not set multicast address list"); 902 return -ENOTSUP; 903 } 904 905 if (mc_addrs == NULL) 906 return -ENOBUFS; 907 908 if (nb_mc_addr > port->max_mcast_addrs) { 909 sfc_err(sa, "too many multicast addresses: %u > %u", 910 nb_mc_addr, port->max_mcast_addrs); 911 return -EINVAL; 912 } 913 914 for (i = 0; i < nb_mc_addr; ++i) { 915 (void)rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, 916 EFX_MAC_ADDR_LEN); 917 mc_addrs += EFX_MAC_ADDR_LEN; 918 } 919 920 port->nb_mcast_addrs = nb_mc_addr; 921 922 if (sa->state != SFC_ADAPTER_STARTED) 923 return 0; 924 925 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, 926 port->nb_mcast_addrs); 927 if (rc != 0) 928 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); 929 930 SFC_ASSERT(rc > 0); 931 return -rc; 932 } 933 934 /* 935 * The function is used by the secondary process as well. It must not 936 * use any process-local pointers from the adapter data. 937 */ 938 static void 939 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id, 940 struct rte_eth_rxq_info *qinfo) 941 { 942 struct sfc_adapter *sa = dev->data->dev_private; 943 struct sfc_rxq_info *rxq_info; 944 struct sfc_rxq *rxq; 945 946 sfc_adapter_lock(sa); 947 948 SFC_ASSERT(rx_queue_id < sa->rxq_count); 949 950 rxq_info = &sa->rxq_info[rx_queue_id]; 951 rxq = rxq_info->rxq; 952 SFC_ASSERT(rxq != NULL); 953 954 qinfo->mp = rxq->refill_mb_pool; 955 qinfo->conf.rx_free_thresh = rxq->refill_threshold; 956 qinfo->conf.rx_drop_en = 1; 957 qinfo->conf.rx_deferred_start = rxq_info->deferred_start; 958 qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER); 959 qinfo->nb_desc = rxq_info->entries; 960 961 sfc_adapter_unlock(sa); 962 } 963 964 /* 965 * The function is used by the secondary process as well. It must not 966 * use any process-local pointers from the adapter data. 967 */ 968 static void 969 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id, 970 struct rte_eth_txq_info *qinfo) 971 { 972 struct sfc_adapter *sa = dev->data->dev_private; 973 struct sfc_txq_info *txq_info; 974 975 sfc_adapter_lock(sa); 976 977 SFC_ASSERT(tx_queue_id < sa->txq_count); 978 979 txq_info = &sa->txq_info[tx_queue_id]; 980 SFC_ASSERT(txq_info->txq != NULL); 981 982 memset(qinfo, 0, sizeof(*qinfo)); 983 984 qinfo->conf.txq_flags = txq_info->txq->flags; 985 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh; 986 qinfo->conf.tx_deferred_start = txq_info->deferred_start; 987 qinfo->nb_desc = txq_info->entries; 988 989 sfc_adapter_unlock(sa); 990 } 991 992 static uint32_t 993 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) 994 { 995 struct sfc_adapter *sa = dev->data->dev_private; 996 997 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 998 999 return sfc_rx_qdesc_npending(sa, rx_queue_id); 1000 } 1001 1002 static int 1003 sfc_rx_descriptor_done(void *queue, uint16_t offset) 1004 { 1005 struct sfc_dp_rxq *dp_rxq = queue; 1006 1007 return sfc_rx_qdesc_done(dp_rxq, offset); 1008 } 1009 1010 static int 1011 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) 1012 { 1013 struct sfc_adapter *sa = dev->data->dev_private; 1014 int rc; 1015 1016 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 1017 1018 sfc_adapter_lock(sa); 1019 1020 rc = EINVAL; 1021 if (sa->state != SFC_ADAPTER_STARTED) 1022 goto fail_not_started; 1023 1024 rc = sfc_rx_qstart(sa, rx_queue_id); 1025 if (rc != 0) 1026 goto fail_rx_qstart; 1027 1028 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE; 1029 1030 sfc_adapter_unlock(sa); 1031 1032 return 0; 1033 1034 fail_rx_qstart: 1035 fail_not_started: 1036 sfc_adapter_unlock(sa); 1037 SFC_ASSERT(rc > 0); 1038 return -rc; 1039 } 1040 1041 static int 1042 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) 1043 { 1044 struct sfc_adapter *sa = dev->data->dev_private; 1045 1046 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 1047 1048 sfc_adapter_lock(sa); 1049 sfc_rx_qstop(sa, rx_queue_id); 1050 1051 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE; 1052 1053 sfc_adapter_unlock(sa); 1054 1055 return 0; 1056 } 1057 1058 static int 1059 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1060 { 1061 struct sfc_adapter *sa = dev->data->dev_private; 1062 int rc; 1063 1064 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1065 1066 sfc_adapter_lock(sa); 1067 1068 rc = EINVAL; 1069 if (sa->state != SFC_ADAPTER_STARTED) 1070 goto fail_not_started; 1071 1072 rc = sfc_tx_qstart(sa, tx_queue_id); 1073 if (rc != 0) 1074 goto fail_tx_qstart; 1075 1076 sa->txq_info[tx_queue_id].deferred_started = B_TRUE; 1077 1078 sfc_adapter_unlock(sa); 1079 return 0; 1080 1081 fail_tx_qstart: 1082 1083 fail_not_started: 1084 sfc_adapter_unlock(sa); 1085 SFC_ASSERT(rc > 0); 1086 return -rc; 1087 } 1088 1089 static int 1090 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1091 { 1092 struct sfc_adapter *sa = dev->data->dev_private; 1093 1094 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1095 1096 sfc_adapter_lock(sa); 1097 1098 sfc_tx_qstop(sa, tx_queue_id); 1099 1100 sa->txq_info[tx_queue_id].deferred_started = B_FALSE; 1101 1102 sfc_adapter_unlock(sa); 1103 return 0; 1104 } 1105 1106 #if EFSYS_OPT_RX_SCALE 1107 static int 1108 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1109 struct rte_eth_rss_conf *rss_conf) 1110 { 1111 struct sfc_adapter *sa = dev->data->dev_private; 1112 struct sfc_port *port = &sa->port; 1113 1114 if ((sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) || port->isolated) 1115 return -ENOTSUP; 1116 1117 if (sa->rss_channels == 0) 1118 return -EINVAL; 1119 1120 sfc_adapter_lock(sa); 1121 1122 /* 1123 * Mapping of hash configuration between RTE and EFX is not one-to-one, 1124 * hence, conversion is done here to derive a correct set of ETH_RSS 1125 * flags which corresponds to the active EFX configuration stored 1126 * locally in 'sfc_adapter' and kept up-to-date 1127 */ 1128 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types); 1129 rss_conf->rss_key_len = SFC_RSS_KEY_SIZE; 1130 if (rss_conf->rss_key != NULL) 1131 rte_memcpy(rss_conf->rss_key, sa->rss_key, SFC_RSS_KEY_SIZE); 1132 1133 sfc_adapter_unlock(sa); 1134 1135 return 0; 1136 } 1137 1138 static int 1139 sfc_dev_rss_hash_update(struct rte_eth_dev *dev, 1140 struct rte_eth_rss_conf *rss_conf) 1141 { 1142 struct sfc_adapter *sa = dev->data->dev_private; 1143 struct sfc_port *port = &sa->port; 1144 unsigned int efx_hash_types; 1145 int rc = 0; 1146 1147 if (port->isolated) 1148 return -ENOTSUP; 1149 1150 if (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) { 1151 sfc_err(sa, "RSS is not available"); 1152 return -ENOTSUP; 1153 } 1154 1155 if (sa->rss_channels == 0) { 1156 sfc_err(sa, "RSS is not configured"); 1157 return -EINVAL; 1158 } 1159 1160 if ((rss_conf->rss_key != NULL) && 1161 (rss_conf->rss_key_len != sizeof(sa->rss_key))) { 1162 sfc_err(sa, "RSS key size is wrong (should be %lu)", 1163 sizeof(sa->rss_key)); 1164 return -EINVAL; 1165 } 1166 1167 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) { 1168 sfc_err(sa, "unsupported hash functions requested"); 1169 return -EINVAL; 1170 } 1171 1172 sfc_adapter_lock(sa); 1173 1174 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf); 1175 1176 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, 1177 efx_hash_types, B_TRUE); 1178 if (rc != 0) 1179 goto fail_scale_mode_set; 1180 1181 if (rss_conf->rss_key != NULL) { 1182 if (sa->state == SFC_ADAPTER_STARTED) { 1183 rc = efx_rx_scale_key_set(sa->nic, rss_conf->rss_key, 1184 sizeof(sa->rss_key)); 1185 if (rc != 0) 1186 goto fail_scale_key_set; 1187 } 1188 1189 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key)); 1190 } 1191 1192 sa->rss_hash_types = efx_hash_types; 1193 1194 sfc_adapter_unlock(sa); 1195 1196 return 0; 1197 1198 fail_scale_key_set: 1199 if (efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, 1200 sa->rss_hash_types, B_TRUE) != 0) 1201 sfc_err(sa, "failed to restore RSS mode"); 1202 1203 fail_scale_mode_set: 1204 sfc_adapter_unlock(sa); 1205 return -rc; 1206 } 1207 1208 static int 1209 sfc_dev_rss_reta_query(struct rte_eth_dev *dev, 1210 struct rte_eth_rss_reta_entry64 *reta_conf, 1211 uint16_t reta_size) 1212 { 1213 struct sfc_adapter *sa = dev->data->dev_private; 1214 struct sfc_port *port = &sa->port; 1215 int entry; 1216 1217 if ((sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) || port->isolated) 1218 return -ENOTSUP; 1219 1220 if (sa->rss_channels == 0) 1221 return -EINVAL; 1222 1223 if (reta_size != EFX_RSS_TBL_SIZE) 1224 return -EINVAL; 1225 1226 sfc_adapter_lock(sa); 1227 1228 for (entry = 0; entry < reta_size; entry++) { 1229 int grp = entry / RTE_RETA_GROUP_SIZE; 1230 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1231 1232 if ((reta_conf[grp].mask >> grp_idx) & 1) 1233 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry]; 1234 } 1235 1236 sfc_adapter_unlock(sa); 1237 1238 return 0; 1239 } 1240 1241 static int 1242 sfc_dev_rss_reta_update(struct rte_eth_dev *dev, 1243 struct rte_eth_rss_reta_entry64 *reta_conf, 1244 uint16_t reta_size) 1245 { 1246 struct sfc_adapter *sa = dev->data->dev_private; 1247 struct sfc_port *port = &sa->port; 1248 unsigned int *rss_tbl_new; 1249 uint16_t entry; 1250 int rc; 1251 1252 1253 if (port->isolated) 1254 return -ENOTSUP; 1255 1256 if (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) { 1257 sfc_err(sa, "RSS is not available"); 1258 return -ENOTSUP; 1259 } 1260 1261 if (sa->rss_channels == 0) { 1262 sfc_err(sa, "RSS is not configured"); 1263 return -EINVAL; 1264 } 1265 1266 if (reta_size != EFX_RSS_TBL_SIZE) { 1267 sfc_err(sa, "RETA size is wrong (should be %u)", 1268 EFX_RSS_TBL_SIZE); 1269 return -EINVAL; 1270 } 1271 1272 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0); 1273 if (rss_tbl_new == NULL) 1274 return -ENOMEM; 1275 1276 sfc_adapter_lock(sa); 1277 1278 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl)); 1279 1280 for (entry = 0; entry < reta_size; entry++) { 1281 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1282 struct rte_eth_rss_reta_entry64 *grp; 1283 1284 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE]; 1285 1286 if (grp->mask & (1ull << grp_idx)) { 1287 if (grp->reta[grp_idx] >= sa->rss_channels) { 1288 rc = EINVAL; 1289 goto bad_reta_entry; 1290 } 1291 rss_tbl_new[entry] = grp->reta[grp_idx]; 1292 } 1293 } 1294 1295 rc = efx_rx_scale_tbl_set(sa->nic, rss_tbl_new, EFX_RSS_TBL_SIZE); 1296 if (rc == 0) 1297 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl)); 1298 1299 bad_reta_entry: 1300 sfc_adapter_unlock(sa); 1301 1302 rte_free(rss_tbl_new); 1303 1304 SFC_ASSERT(rc >= 0); 1305 return -rc; 1306 } 1307 #endif 1308 1309 static int 1310 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type, 1311 enum rte_filter_op filter_op, 1312 void *arg) 1313 { 1314 struct sfc_adapter *sa = dev->data->dev_private; 1315 int rc = ENOTSUP; 1316 1317 sfc_log_init(sa, "entry"); 1318 1319 switch (filter_type) { 1320 case RTE_ETH_FILTER_NONE: 1321 sfc_err(sa, "Global filters configuration not supported"); 1322 break; 1323 case RTE_ETH_FILTER_MACVLAN: 1324 sfc_err(sa, "MACVLAN filters not supported"); 1325 break; 1326 case RTE_ETH_FILTER_ETHERTYPE: 1327 sfc_err(sa, "EtherType filters not supported"); 1328 break; 1329 case RTE_ETH_FILTER_FLEXIBLE: 1330 sfc_err(sa, "Flexible filters not supported"); 1331 break; 1332 case RTE_ETH_FILTER_SYN: 1333 sfc_err(sa, "SYN filters not supported"); 1334 break; 1335 case RTE_ETH_FILTER_NTUPLE: 1336 sfc_err(sa, "NTUPLE filters not supported"); 1337 break; 1338 case RTE_ETH_FILTER_TUNNEL: 1339 sfc_err(sa, "Tunnel filters not supported"); 1340 break; 1341 case RTE_ETH_FILTER_FDIR: 1342 sfc_err(sa, "Flow Director filters not supported"); 1343 break; 1344 case RTE_ETH_FILTER_HASH: 1345 sfc_err(sa, "Hash filters not supported"); 1346 break; 1347 case RTE_ETH_FILTER_GENERIC: 1348 if (filter_op != RTE_ETH_FILTER_GET) { 1349 rc = EINVAL; 1350 } else { 1351 *(const void **)arg = &sfc_flow_ops; 1352 rc = 0; 1353 } 1354 break; 1355 default: 1356 sfc_err(sa, "Unknown filter type %u", filter_type); 1357 break; 1358 } 1359 1360 sfc_log_init(sa, "exit: %d", -rc); 1361 SFC_ASSERT(rc >= 0); 1362 return -rc; 1363 } 1364 1365 static const struct eth_dev_ops sfc_eth_dev_ops = { 1366 .dev_configure = sfc_dev_configure, 1367 .dev_start = sfc_dev_start, 1368 .dev_stop = sfc_dev_stop, 1369 .dev_set_link_up = sfc_dev_set_link_up, 1370 .dev_set_link_down = sfc_dev_set_link_down, 1371 .dev_close = sfc_dev_close, 1372 .promiscuous_enable = sfc_dev_promisc_enable, 1373 .promiscuous_disable = sfc_dev_promisc_disable, 1374 .allmulticast_enable = sfc_dev_allmulti_enable, 1375 .allmulticast_disable = sfc_dev_allmulti_disable, 1376 .link_update = sfc_dev_link_update, 1377 .stats_get = sfc_stats_get, 1378 .stats_reset = sfc_stats_reset, 1379 .xstats_get = sfc_xstats_get, 1380 .xstats_reset = sfc_stats_reset, 1381 .xstats_get_names = sfc_xstats_get_names, 1382 .dev_infos_get = sfc_dev_infos_get, 1383 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 1384 .mtu_set = sfc_dev_set_mtu, 1385 .rx_queue_start = sfc_rx_queue_start, 1386 .rx_queue_stop = sfc_rx_queue_stop, 1387 .tx_queue_start = sfc_tx_queue_start, 1388 .tx_queue_stop = sfc_tx_queue_stop, 1389 .rx_queue_setup = sfc_rx_queue_setup, 1390 .rx_queue_release = sfc_rx_queue_release, 1391 .rx_queue_count = sfc_rx_queue_count, 1392 .rx_descriptor_done = sfc_rx_descriptor_done, 1393 .tx_queue_setup = sfc_tx_queue_setup, 1394 .tx_queue_release = sfc_tx_queue_release, 1395 .flow_ctrl_get = sfc_flow_ctrl_get, 1396 .flow_ctrl_set = sfc_flow_ctrl_set, 1397 .mac_addr_set = sfc_mac_addr_set, 1398 #if EFSYS_OPT_RX_SCALE 1399 .reta_update = sfc_dev_rss_reta_update, 1400 .reta_query = sfc_dev_rss_reta_query, 1401 .rss_hash_update = sfc_dev_rss_hash_update, 1402 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 1403 #endif 1404 .filter_ctrl = sfc_dev_filter_ctrl, 1405 .set_mc_addr_list = sfc_set_mc_addr_list, 1406 .rxq_info_get = sfc_rx_queue_info_get, 1407 .txq_info_get = sfc_tx_queue_info_get, 1408 .fw_version_get = sfc_fw_version_get, 1409 }; 1410 1411 /** 1412 * Duplicate a string in potentially shared memory required for 1413 * multi-process support. 1414 * 1415 * strdup() allocates from process-local heap/memory. 1416 */ 1417 static char * 1418 sfc_strdup(const char *str) 1419 { 1420 size_t size; 1421 char *copy; 1422 1423 if (str == NULL) 1424 return NULL; 1425 1426 size = strlen(str) + 1; 1427 copy = rte_malloc(__func__, size, 0); 1428 if (copy != NULL) 1429 rte_memcpy(copy, str, size); 1430 1431 return copy; 1432 } 1433 1434 static int 1435 sfc_eth_dev_set_ops(struct rte_eth_dev *dev) 1436 { 1437 struct sfc_adapter *sa = dev->data->dev_private; 1438 unsigned int avail_caps = 0; 1439 const char *rx_name = NULL; 1440 const char *tx_name = NULL; 1441 int rc; 1442 1443 switch (sa->family) { 1444 case EFX_FAMILY_HUNTINGTON: 1445 case EFX_FAMILY_MEDFORD: 1446 avail_caps |= SFC_DP_HW_FW_CAP_EF10; 1447 break; 1448 default: 1449 break; 1450 } 1451 1452 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH, 1453 sfc_kvarg_string_handler, &rx_name); 1454 if (rc != 0) 1455 goto fail_kvarg_rx_datapath; 1456 1457 if (rx_name != NULL) { 1458 sa->dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name); 1459 if (sa->dp_rx == NULL) { 1460 sfc_err(sa, "Rx datapath %s not found", rx_name); 1461 rc = ENOENT; 1462 goto fail_dp_rx; 1463 } 1464 if (!sfc_dp_match_hw_fw_caps(&sa->dp_rx->dp, avail_caps)) { 1465 sfc_err(sa, 1466 "Insufficient Hw/FW capabilities to use Rx datapath %s", 1467 rx_name); 1468 rc = EINVAL; 1469 goto fail_dp_rx_caps; 1470 } 1471 } else { 1472 sa->dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps); 1473 if (sa->dp_rx == NULL) { 1474 sfc_err(sa, "Rx datapath by caps %#x not found", 1475 avail_caps); 1476 rc = ENOENT; 1477 goto fail_dp_rx; 1478 } 1479 } 1480 1481 sa->dp_rx_name = sfc_strdup(sa->dp_rx->dp.name); 1482 if (sa->dp_rx_name == NULL) { 1483 rc = ENOMEM; 1484 goto fail_dp_rx_name; 1485 } 1486 1487 sfc_info(sa, "use %s Rx datapath", sa->dp_rx_name); 1488 1489 dev->rx_pkt_burst = sa->dp_rx->pkt_burst; 1490 1491 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH, 1492 sfc_kvarg_string_handler, &tx_name); 1493 if (rc != 0) 1494 goto fail_kvarg_tx_datapath; 1495 1496 if (tx_name != NULL) { 1497 sa->dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name); 1498 if (sa->dp_tx == NULL) { 1499 sfc_err(sa, "Tx datapath %s not found", tx_name); 1500 rc = ENOENT; 1501 goto fail_dp_tx; 1502 } 1503 if (!sfc_dp_match_hw_fw_caps(&sa->dp_tx->dp, avail_caps)) { 1504 sfc_err(sa, 1505 "Insufficient Hw/FW capabilities to use Tx datapath %s", 1506 tx_name); 1507 rc = EINVAL; 1508 goto fail_dp_tx_caps; 1509 } 1510 } else { 1511 sa->dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps); 1512 if (sa->dp_tx == NULL) { 1513 sfc_err(sa, "Tx datapath by caps %#x not found", 1514 avail_caps); 1515 rc = ENOENT; 1516 goto fail_dp_tx; 1517 } 1518 } 1519 1520 sa->dp_tx_name = sfc_strdup(sa->dp_tx->dp.name); 1521 if (sa->dp_tx_name == NULL) { 1522 rc = ENOMEM; 1523 goto fail_dp_tx_name; 1524 } 1525 1526 sfc_info(sa, "use %s Tx datapath", sa->dp_tx_name); 1527 1528 dev->tx_pkt_burst = sa->dp_tx->pkt_burst; 1529 1530 dev->dev_ops = &sfc_eth_dev_ops; 1531 1532 return 0; 1533 1534 fail_dp_tx_name: 1535 fail_dp_tx_caps: 1536 sa->dp_tx = NULL; 1537 1538 fail_dp_tx: 1539 fail_kvarg_tx_datapath: 1540 rte_free(sa->dp_rx_name); 1541 sa->dp_rx_name = NULL; 1542 1543 fail_dp_rx_name: 1544 fail_dp_rx_caps: 1545 sa->dp_rx = NULL; 1546 1547 fail_dp_rx: 1548 fail_kvarg_rx_datapath: 1549 return rc; 1550 } 1551 1552 static void 1553 sfc_eth_dev_clear_ops(struct rte_eth_dev *dev) 1554 { 1555 struct sfc_adapter *sa = dev->data->dev_private; 1556 1557 dev->dev_ops = NULL; 1558 dev->rx_pkt_burst = NULL; 1559 dev->tx_pkt_burst = NULL; 1560 1561 rte_free(sa->dp_tx_name); 1562 sa->dp_tx_name = NULL; 1563 sa->dp_tx = NULL; 1564 1565 rte_free(sa->dp_rx_name); 1566 sa->dp_rx_name = NULL; 1567 sa->dp_rx = NULL; 1568 } 1569 1570 static const struct eth_dev_ops sfc_eth_dev_secondary_ops = { 1571 .rxq_info_get = sfc_rx_queue_info_get, 1572 .txq_info_get = sfc_tx_queue_info_get, 1573 }; 1574 1575 static int 1576 sfc_eth_dev_secondary_set_ops(struct rte_eth_dev *dev) 1577 { 1578 /* 1579 * Device private data has really many process-local pointers. 1580 * Below code should be extremely careful to use data located 1581 * in shared memory only. 1582 */ 1583 struct sfc_adapter *sa = dev->data->dev_private; 1584 const struct sfc_dp_rx *dp_rx; 1585 const struct sfc_dp_tx *dp_tx; 1586 int rc; 1587 1588 dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, sa->dp_rx_name); 1589 if (dp_rx == NULL) { 1590 sfc_err(sa, "cannot find %s Rx datapath", sa->dp_tx_name); 1591 rc = ENOENT; 1592 goto fail_dp_rx; 1593 } 1594 if (~dp_rx->features & SFC_DP_RX_FEAT_MULTI_PROCESS) { 1595 sfc_err(sa, "%s Rx datapath does not support multi-process", 1596 sa->dp_tx_name); 1597 rc = EINVAL; 1598 goto fail_dp_rx_multi_process; 1599 } 1600 1601 dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, sa->dp_tx_name); 1602 if (dp_tx == NULL) { 1603 sfc_err(sa, "cannot find %s Tx datapath", sa->dp_tx_name); 1604 rc = ENOENT; 1605 goto fail_dp_tx; 1606 } 1607 if (~dp_tx->features & SFC_DP_TX_FEAT_MULTI_PROCESS) { 1608 sfc_err(sa, "%s Tx datapath does not support multi-process", 1609 sa->dp_tx_name); 1610 rc = EINVAL; 1611 goto fail_dp_tx_multi_process; 1612 } 1613 1614 dev->rx_pkt_burst = dp_rx->pkt_burst; 1615 dev->tx_pkt_burst = dp_tx->pkt_burst; 1616 dev->dev_ops = &sfc_eth_dev_secondary_ops; 1617 1618 return 0; 1619 1620 fail_dp_tx_multi_process: 1621 fail_dp_tx: 1622 fail_dp_rx_multi_process: 1623 fail_dp_rx: 1624 return rc; 1625 } 1626 1627 static void 1628 sfc_eth_dev_secondary_clear_ops(struct rte_eth_dev *dev) 1629 { 1630 dev->dev_ops = NULL; 1631 dev->tx_pkt_burst = NULL; 1632 dev->rx_pkt_burst = NULL; 1633 } 1634 1635 static void 1636 sfc_register_dp(void) 1637 { 1638 /* Register once */ 1639 if (TAILQ_EMPTY(&sfc_dp_head)) { 1640 /* Prefer EF10 datapath */ 1641 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp); 1642 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); 1643 1644 sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp); 1645 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp); 1646 sfc_dp_register(&sfc_dp_head, &sfc_ef10_simple_tx.dp); 1647 } 1648 } 1649 1650 static int 1651 sfc_eth_dev_init(struct rte_eth_dev *dev) 1652 { 1653 struct sfc_adapter *sa = dev->data->dev_private; 1654 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1655 int rc; 1656 const efx_nic_cfg_t *encp; 1657 const struct ether_addr *from; 1658 1659 sfc_register_dp(); 1660 1661 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1662 return -sfc_eth_dev_secondary_set_ops(dev); 1663 1664 /* Required for logging */ 1665 sa->pci_addr = pci_dev->addr; 1666 sa->port_id = dev->data->port_id; 1667 1668 sa->eth_dev = dev; 1669 1670 /* Copy PCI device info to the dev->data */ 1671 rte_eth_copy_pci_info(dev, pci_dev); 1672 1673 dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE; 1674 1675 rc = sfc_kvargs_parse(sa); 1676 if (rc != 0) 1677 goto fail_kvargs_parse; 1678 1679 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT, 1680 sfc_kvarg_bool_handler, &sa->debug_init); 1681 if (rc != 0) 1682 goto fail_kvarg_debug_init; 1683 1684 sfc_log_init(sa, "entry"); 1685 1686 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0); 1687 if (dev->data->mac_addrs == NULL) { 1688 rc = ENOMEM; 1689 goto fail_mac_addrs; 1690 } 1691 1692 sfc_adapter_lock_init(sa); 1693 sfc_adapter_lock(sa); 1694 1695 sfc_log_init(sa, "probing"); 1696 rc = sfc_probe(sa); 1697 if (rc != 0) 1698 goto fail_probe; 1699 1700 sfc_log_init(sa, "set device ops"); 1701 rc = sfc_eth_dev_set_ops(dev); 1702 if (rc != 0) 1703 goto fail_set_ops; 1704 1705 sfc_log_init(sa, "attaching"); 1706 rc = sfc_attach(sa); 1707 if (rc != 0) 1708 goto fail_attach; 1709 1710 encp = efx_nic_cfg_get(sa->nic); 1711 1712 /* 1713 * The arguments are really reverse order in comparison to 1714 * Linux kernel. Copy from NIC config to Ethernet device data. 1715 */ 1716 from = (const struct ether_addr *)(encp->enc_mac_addr); 1717 ether_addr_copy(from, &dev->data->mac_addrs[0]); 1718 1719 sfc_adapter_unlock(sa); 1720 1721 sfc_log_init(sa, "done"); 1722 return 0; 1723 1724 fail_attach: 1725 sfc_eth_dev_clear_ops(dev); 1726 1727 fail_set_ops: 1728 sfc_unprobe(sa); 1729 1730 fail_probe: 1731 sfc_adapter_unlock(sa); 1732 sfc_adapter_lock_fini(sa); 1733 rte_free(dev->data->mac_addrs); 1734 dev->data->mac_addrs = NULL; 1735 1736 fail_mac_addrs: 1737 fail_kvarg_debug_init: 1738 sfc_kvargs_cleanup(sa); 1739 1740 fail_kvargs_parse: 1741 sfc_log_init(sa, "failed %d", rc); 1742 SFC_ASSERT(rc > 0); 1743 return -rc; 1744 } 1745 1746 static int 1747 sfc_eth_dev_uninit(struct rte_eth_dev *dev) 1748 { 1749 struct sfc_adapter *sa; 1750 1751 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1752 sfc_eth_dev_secondary_clear_ops(dev); 1753 return 0; 1754 } 1755 1756 sa = dev->data->dev_private; 1757 sfc_log_init(sa, "entry"); 1758 1759 sfc_adapter_lock(sa); 1760 1761 sfc_eth_dev_clear_ops(dev); 1762 1763 sfc_detach(sa); 1764 sfc_unprobe(sa); 1765 1766 rte_free(dev->data->mac_addrs); 1767 dev->data->mac_addrs = NULL; 1768 1769 sfc_kvargs_cleanup(sa); 1770 1771 sfc_adapter_unlock(sa); 1772 sfc_adapter_lock_fini(sa); 1773 1774 sfc_log_init(sa, "done"); 1775 1776 /* Required for logging, so cleanup last */ 1777 sa->eth_dev = NULL; 1778 return 0; 1779 } 1780 1781 static const struct rte_pci_id pci_id_sfc_efx_map[] = { 1782 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, 1783 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, 1784 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, 1785 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, 1786 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, 1787 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, 1788 { .vendor_id = 0 /* sentinel */ } 1789 }; 1790 1791 static int sfc_eth_dev_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 1792 struct rte_pci_device *pci_dev) 1793 { 1794 return rte_eth_dev_pci_generic_probe(pci_dev, 1795 sizeof(struct sfc_adapter), sfc_eth_dev_init); 1796 } 1797 1798 static int sfc_eth_dev_pci_remove(struct rte_pci_device *pci_dev) 1799 { 1800 return rte_eth_dev_pci_generic_remove(pci_dev, sfc_eth_dev_uninit); 1801 } 1802 1803 static struct rte_pci_driver sfc_efx_pmd = { 1804 .id_table = pci_id_sfc_efx_map, 1805 .drv_flags = 1806 RTE_PCI_DRV_INTR_LSC | 1807 RTE_PCI_DRV_NEED_MAPPING, 1808 .probe = sfc_eth_dev_pci_probe, 1809 .remove = sfc_eth_dev_pci_remove, 1810 }; 1811 1812 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd); 1813 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); 1814 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio-pci"); 1815 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, 1816 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " " 1817 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " " 1818 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " 1819 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> " 1820 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " " 1821 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL); 1822