1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright(c) 2019-2021 Xilinx, Inc. 4 * Copyright(c) 2016-2019 Solarflare Communications Inc. 5 * 6 * This software was jointly developed between OKTET Labs (under contract 7 * for Solarflare) and Solarflare Communications, Inc. 8 */ 9 10 #include <rte_dev.h> 11 #include <ethdev_driver.h> 12 #include <ethdev_pci.h> 13 #include <rte_pci.h> 14 #include <rte_bus_pci.h> 15 #include <rte_errno.h> 16 #include <rte_string_fns.h> 17 #include <rte_ether.h> 18 19 #include "efx.h" 20 21 #include "sfc.h" 22 #include "sfc_debug.h" 23 #include "sfc_log.h" 24 #include "sfc_kvargs.h" 25 #include "sfc_ev.h" 26 #include "sfc_rx.h" 27 #include "sfc_tx.h" 28 #include "sfc_flow.h" 29 #include "sfc_flow_tunnel.h" 30 #include "sfc_dp.h" 31 #include "sfc_dp_rx.h" 32 #include "sfc_repr.h" 33 #include "sfc_sw_stats.h" 34 #include "sfc_switch.h" 35 #include "sfc_nic_dma.h" 36 37 #define SFC_XSTAT_ID_INVALID_VAL UINT64_MAX 38 #define SFC_XSTAT_ID_INVALID_NAME '\0' 39 40 uint32_t sfc_logtype_driver; 41 42 static struct sfc_dp_list sfc_dp_head = 43 TAILQ_HEAD_INITIALIZER(sfc_dp_head); 44 45 46 static void sfc_eth_dev_clear_ops(struct rte_eth_dev *dev); 47 48 49 static int 50 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) 51 { 52 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 53 efx_nic_fw_info_t enfi; 54 int ret; 55 int rc; 56 57 rc = efx_nic_get_fw_version(sa->nic, &enfi); 58 if (rc != 0) 59 return -rc; 60 61 ret = snprintf(fw_version, fw_size, 62 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16, 63 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1], 64 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]); 65 if (ret < 0) 66 return ret; 67 68 if (enfi.enfi_dpcpu_fw_ids_valid) { 69 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret); 70 int ret_extra; 71 72 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset, 73 fw_size - dpcpu_fw_ids_offset, 74 " rx%" PRIx16 " tx%" PRIx16, 75 enfi.enfi_rx_dpcpu_fw_id, 76 enfi.enfi_tx_dpcpu_fw_id); 77 if (ret_extra < 0) 78 return ret_extra; 79 80 ret += ret_extra; 81 } 82 83 if (fw_size < (size_t)(++ret)) 84 return ret; 85 else 86 return 0; 87 } 88 89 static int 90 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 91 { 92 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 93 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 94 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 95 struct sfc_rss *rss = &sas->rss; 96 struct sfc_mae *mae = &sa->mae; 97 uint64_t txq_offloads_def = 0; 98 99 sfc_log_init(sa, "entry"); 100 101 dev_info->min_mtu = RTE_ETHER_MIN_MTU; 102 dev_info->max_mtu = EFX_MAC_SDU_MAX; 103 104 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; 105 106 dev_info->max_vfs = sa->sriov.num_vfs; 107 108 /* Autonegotiation may be disabled */ 109 dev_info->speed_capa = RTE_ETH_LINK_SPEED_FIXED; 110 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_1000FDX)) 111 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_1G; 112 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_10000FDX)) 113 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_10G; 114 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_25000FDX)) 115 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_25G; 116 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_40000FDX)) 117 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_40G; 118 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_50000FDX)) 119 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_50G; 120 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_100000FDX)) 121 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_100G; 122 123 dev_info->max_rx_queues = sa->rxq_max; 124 dev_info->max_tx_queues = sa->txq_max; 125 126 /* By default packets are dropped if no descriptors are available */ 127 dev_info->default_rxconf.rx_drop_en = 1; 128 129 dev_info->rx_queue_offload_capa = sfc_rx_get_queue_offload_caps(sa); 130 131 /* 132 * rx_offload_capa includes both device and queue offloads since 133 * the latter may be requested on a per device basis which makes 134 * sense when some offloads are needed to be set on all queues. 135 */ 136 dev_info->rx_offload_capa = sfc_rx_get_dev_offload_caps(sa) | 137 dev_info->rx_queue_offload_capa; 138 139 dev_info->tx_queue_offload_capa = sfc_tx_get_queue_offload_caps(sa); 140 141 /* 142 * tx_offload_capa includes both device and queue offloads since 143 * the latter may be requested on a per device basis which makes 144 * sense when some offloads are needed to be set on all queues. 145 */ 146 dev_info->tx_offload_capa = sfc_tx_get_dev_offload_caps(sa) | 147 dev_info->tx_queue_offload_capa; 148 149 if (dev_info->tx_offload_capa & RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE) 150 txq_offloads_def |= RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE; 151 152 dev_info->default_txconf.offloads |= txq_offloads_def; 153 154 if (rss->context_type != EFX_RX_SCALE_UNAVAILABLE) { 155 uint64_t rte_hf = 0; 156 unsigned int i; 157 158 for (i = 0; i < rss->hf_map_nb_entries; ++i) 159 rte_hf |= rss->hf_map[i].rte; 160 161 dev_info->reta_size = EFX_RSS_TBL_SIZE; 162 dev_info->hash_key_size = EFX_RSS_KEY_SIZE; 163 dev_info->flow_type_rss_offloads = rte_hf; 164 } 165 166 /* Initialize to hardware limits */ 167 dev_info->rx_desc_lim.nb_max = sa->rxq_max_entries; 168 dev_info->rx_desc_lim.nb_min = sa->rxq_min_entries; 169 /* The RXQ hardware requires that the descriptor count is a power 170 * of 2, but rx_desc_lim cannot properly describe that constraint. 171 */ 172 dev_info->rx_desc_lim.nb_align = sa->rxq_min_entries; 173 174 /* Initialize to hardware limits */ 175 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; 176 dev_info->tx_desc_lim.nb_min = sa->txq_min_entries; 177 /* 178 * The TXQ hardware requires that the descriptor count is a power 179 * of 2, but tx_desc_lim cannot properly describe that constraint 180 */ 181 dev_info->tx_desc_lim.nb_align = sa->txq_min_entries; 182 183 if (sap->dp_rx->get_dev_info != NULL) 184 sap->dp_rx->get_dev_info(dev_info); 185 if (sap->dp_tx->get_dev_info != NULL) 186 sap->dp_tx->get_dev_info(dev_info); 187 188 dev_info->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP | 189 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP; 190 dev_info->dev_capa &= ~RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP; 191 192 if (mae->status == SFC_MAE_STATUS_SUPPORTED || 193 mae->status == SFC_MAE_STATUS_ADMIN) { 194 dev_info->switch_info.name = dev->device->driver->name; 195 dev_info->switch_info.domain_id = mae->switch_domain_id; 196 dev_info->switch_info.port_id = mae->switch_port_id; 197 } 198 199 return 0; 200 } 201 202 static const uint32_t * 203 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) 204 { 205 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 206 207 return sap->dp_rx->supported_ptypes_get(sap->shared->tunnel_encaps); 208 } 209 210 static int 211 sfc_dev_configure(struct rte_eth_dev *dev) 212 { 213 struct rte_eth_dev_data *dev_data = dev->data; 214 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 215 int rc; 216 217 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u", 218 dev_data->nb_rx_queues, dev_data->nb_tx_queues); 219 220 sfc_adapter_lock(sa); 221 switch (sa->state) { 222 case SFC_ETHDEV_CONFIGURED: 223 /* FALLTHROUGH */ 224 case SFC_ETHDEV_INITIALIZED: 225 rc = sfc_configure(sa); 226 break; 227 default: 228 sfc_err(sa, "unexpected adapter state %u to configure", 229 sa->state); 230 rc = EINVAL; 231 break; 232 } 233 sfc_adapter_unlock(sa); 234 235 sfc_log_init(sa, "done %d", rc); 236 SFC_ASSERT(rc >= 0); 237 return -rc; 238 } 239 240 static int 241 sfc_dev_start(struct rte_eth_dev *dev) 242 { 243 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 244 int rc; 245 246 sfc_log_init(sa, "entry"); 247 248 sfc_adapter_lock(sa); 249 rc = sfc_start(sa); 250 sfc_adapter_unlock(sa); 251 252 sfc_log_init(sa, "done %d", rc); 253 SFC_ASSERT(rc >= 0); 254 return -rc; 255 } 256 257 static int 258 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 259 { 260 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 261 struct rte_eth_link current_link; 262 int ret; 263 264 sfc_log_init(sa, "entry"); 265 266 if (sa->state != SFC_ETHDEV_STARTED) { 267 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link); 268 } else if (wait_to_complete) { 269 efx_link_mode_t link_mode; 270 271 if (efx_port_poll(sa->nic, &link_mode) != 0) 272 link_mode = EFX_LINK_UNKNOWN; 273 sfc_port_link_mode_to_info(link_mode, ¤t_link); 274 275 } else { 276 sfc_ev_mgmt_qpoll(sa); 277 rte_eth_linkstatus_get(dev, ¤t_link); 278 } 279 280 ret = rte_eth_linkstatus_set(dev, ¤t_link); 281 if (ret == 0) 282 sfc_notice(sa, "Link status is %s", 283 current_link.link_status ? "UP" : "DOWN"); 284 285 return ret; 286 } 287 288 static int 289 sfc_dev_stop(struct rte_eth_dev *dev) 290 { 291 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 292 293 sfc_log_init(sa, "entry"); 294 295 sfc_adapter_lock(sa); 296 sfc_stop(sa); 297 sfc_adapter_unlock(sa); 298 299 sfc_log_init(sa, "done"); 300 301 return 0; 302 } 303 304 static int 305 sfc_dev_set_link_up(struct rte_eth_dev *dev) 306 { 307 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 308 int rc; 309 310 sfc_log_init(sa, "entry"); 311 312 sfc_adapter_lock(sa); 313 rc = sfc_start(sa); 314 sfc_adapter_unlock(sa); 315 316 SFC_ASSERT(rc >= 0); 317 return -rc; 318 } 319 320 static int 321 sfc_dev_set_link_down(struct rte_eth_dev *dev) 322 { 323 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 324 325 sfc_log_init(sa, "entry"); 326 327 sfc_adapter_lock(sa); 328 sfc_stop(sa); 329 sfc_adapter_unlock(sa); 330 331 return 0; 332 } 333 334 static void 335 sfc_eth_dev_secondary_clear_ops(struct rte_eth_dev *dev) 336 { 337 free(dev->process_private); 338 rte_eth_dev_release_port(dev); 339 } 340 341 static int 342 sfc_dev_close(struct rte_eth_dev *dev) 343 { 344 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 345 346 sfc_log_init(sa, "entry"); 347 348 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 349 sfc_eth_dev_secondary_clear_ops(dev); 350 return 0; 351 } 352 353 sfc_pre_detach(sa); 354 355 sfc_adapter_lock(sa); 356 switch (sa->state) { 357 case SFC_ETHDEV_STARTED: 358 sfc_stop(sa); 359 SFC_ASSERT(sa->state == SFC_ETHDEV_CONFIGURED); 360 /* FALLTHROUGH */ 361 case SFC_ETHDEV_CONFIGURED: 362 sfc_close(sa); 363 SFC_ASSERT(sa->state == SFC_ETHDEV_INITIALIZED); 364 /* FALLTHROUGH */ 365 case SFC_ETHDEV_INITIALIZED: 366 break; 367 default: 368 sfc_err(sa, "unexpected adapter state %u on close", sa->state); 369 break; 370 } 371 372 /* 373 * Cleanup all resources. 374 * Rollback primary process sfc_eth_dev_init() below. 375 */ 376 377 sfc_eth_dev_clear_ops(dev); 378 379 sfc_nic_dma_detach(sa); 380 sfc_detach(sa); 381 sfc_unprobe(sa); 382 383 sfc_kvargs_cleanup(sa); 384 385 sfc_adapter_unlock(sa); 386 sfc_adapter_lock_fini(sa); 387 388 sfc_log_init(sa, "done"); 389 390 /* Required for logging, so cleanup last */ 391 sa->eth_dev = NULL; 392 393 free(sa); 394 395 return 0; 396 } 397 398 static int 399 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode, 400 boolean_t enabled) 401 { 402 struct sfc_port *port; 403 boolean_t *toggle; 404 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 405 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI); 406 const char *desc = (allmulti) ? "all-multi" : "promiscuous"; 407 int rc = 0; 408 409 sfc_adapter_lock(sa); 410 411 port = &sa->port; 412 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc); 413 414 if (*toggle != enabled) { 415 *toggle = enabled; 416 417 if (sfc_sa2shared(sa)->isolated) { 418 sfc_warn(sa, "isolated mode is active on the port"); 419 sfc_warn(sa, "the change is to be applied on the next " 420 "start provided that isolated mode is " 421 "disabled prior the next start"); 422 } else if ((sa->state == SFC_ETHDEV_STARTED) && 423 ((rc = sfc_set_rx_mode(sa)) != 0)) { 424 *toggle = !(enabled); 425 sfc_warn(sa, "Failed to %s %s mode, rc = %d", 426 ((enabled) ? "enable" : "disable"), desc, rc); 427 428 /* 429 * For promiscuous and all-multicast filters a 430 * permission failure should be reported as an 431 * unsupported filter. 432 */ 433 if (rc == EPERM) 434 rc = ENOTSUP; 435 } 436 } 437 438 sfc_adapter_unlock(sa); 439 return rc; 440 } 441 442 static int 443 sfc_dev_promisc_enable(struct rte_eth_dev *dev) 444 { 445 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE); 446 447 SFC_ASSERT(rc >= 0); 448 return -rc; 449 } 450 451 static int 452 sfc_dev_promisc_disable(struct rte_eth_dev *dev) 453 { 454 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE); 455 456 SFC_ASSERT(rc >= 0); 457 return -rc; 458 } 459 460 static int 461 sfc_dev_allmulti_enable(struct rte_eth_dev *dev) 462 { 463 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE); 464 465 SFC_ASSERT(rc >= 0); 466 return -rc; 467 } 468 469 static int 470 sfc_dev_allmulti_disable(struct rte_eth_dev *dev) 471 { 472 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE); 473 474 SFC_ASSERT(rc >= 0); 475 return -rc; 476 } 477 478 static int 479 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t ethdev_qid, 480 uint16_t nb_rx_desc, unsigned int socket_id, 481 const struct rte_eth_rxconf *rx_conf, 482 struct rte_mempool *mb_pool) 483 { 484 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 485 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 486 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 487 struct sfc_rxq_info *rxq_info; 488 sfc_sw_index_t sw_index; 489 int rc; 490 491 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u", 492 ethdev_qid, nb_rx_desc, socket_id); 493 494 sfc_adapter_lock(sa); 495 496 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 497 rc = sfc_rx_qinit(sa, sw_index, nb_rx_desc, socket_id, 498 rx_conf, mb_pool); 499 if (rc != 0) 500 goto fail_rx_qinit; 501 502 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 503 dev->data->rx_queues[ethdev_qid] = rxq_info->dp; 504 505 sfc_adapter_unlock(sa); 506 507 return 0; 508 509 fail_rx_qinit: 510 sfc_adapter_unlock(sa); 511 SFC_ASSERT(rc > 0); 512 return -rc; 513 } 514 515 static void 516 sfc_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 517 { 518 struct sfc_dp_rxq *dp_rxq = dev->data->rx_queues[qid]; 519 struct sfc_rxq *rxq; 520 struct sfc_adapter *sa; 521 sfc_sw_index_t sw_index; 522 523 if (dp_rxq == NULL) 524 return; 525 526 rxq = sfc_rxq_by_dp_rxq(dp_rxq); 527 sa = rxq->evq->sa; 528 sfc_adapter_lock(sa); 529 530 sw_index = dp_rxq->dpq.queue_id; 531 532 sfc_log_init(sa, "RxQ=%u", sw_index); 533 534 sfc_rx_qfini(sa, sw_index); 535 536 sfc_adapter_unlock(sa); 537 } 538 539 static int 540 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t ethdev_qid, 541 uint16_t nb_tx_desc, unsigned int socket_id, 542 const struct rte_eth_txconf *tx_conf) 543 { 544 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 545 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 546 struct sfc_txq_info *txq_info; 547 sfc_sw_index_t sw_index; 548 int rc; 549 550 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u", 551 ethdev_qid, nb_tx_desc, socket_id); 552 553 sfc_adapter_lock(sa); 554 555 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 556 rc = sfc_tx_qinit(sa, sw_index, nb_tx_desc, socket_id, tx_conf); 557 if (rc != 0) 558 goto fail_tx_qinit; 559 560 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 561 dev->data->tx_queues[ethdev_qid] = txq_info->dp; 562 563 sfc_adapter_unlock(sa); 564 return 0; 565 566 fail_tx_qinit: 567 sfc_adapter_unlock(sa); 568 SFC_ASSERT(rc > 0); 569 return -rc; 570 } 571 572 static void 573 sfc_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 574 { 575 struct sfc_dp_txq *dp_txq = dev->data->tx_queues[qid]; 576 struct sfc_txq *txq; 577 sfc_sw_index_t sw_index; 578 struct sfc_adapter *sa; 579 580 if (dp_txq == NULL) 581 return; 582 583 txq = sfc_txq_by_dp_txq(dp_txq); 584 sw_index = dp_txq->dpq.queue_id; 585 586 SFC_ASSERT(txq->evq != NULL); 587 sa = txq->evq->sa; 588 589 sfc_log_init(sa, "TxQ = %u", sw_index); 590 591 sfc_adapter_lock(sa); 592 593 sfc_tx_qfini(sa, sw_index); 594 595 sfc_adapter_unlock(sa); 596 } 597 598 static void 599 sfc_stats_get_dp_rx(struct sfc_adapter *sa, uint64_t *pkts, uint64_t *bytes) 600 { 601 struct sfc_adapter_shared *sas = sfc_sa2shared(sa); 602 uint64_t pkts_sum = 0; 603 uint64_t bytes_sum = 0; 604 unsigned int i; 605 606 for (i = 0; i < sas->ethdev_rxq_count; ++i) { 607 struct sfc_rxq_info *rxq_info; 608 609 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, i); 610 if (rxq_info->state & SFC_RXQ_INITIALIZED) { 611 union sfc_pkts_bytes qstats; 612 613 sfc_pkts_bytes_get(&rxq_info->dp->dpq.stats, &qstats); 614 pkts_sum += qstats.pkts - 615 sa->sw_stats.reset_rx_pkts[i]; 616 bytes_sum += qstats.bytes - 617 sa->sw_stats.reset_rx_bytes[i]; 618 } 619 } 620 621 *pkts = pkts_sum; 622 *bytes = bytes_sum; 623 } 624 625 static void 626 sfc_stats_get_dp_tx(struct sfc_adapter *sa, uint64_t *pkts, uint64_t *bytes) 627 { 628 struct sfc_adapter_shared *sas = sfc_sa2shared(sa); 629 uint64_t pkts_sum = 0; 630 uint64_t bytes_sum = 0; 631 unsigned int i; 632 633 for (i = 0; i < sas->ethdev_txq_count; ++i) { 634 struct sfc_txq_info *txq_info; 635 636 txq_info = sfc_txq_info_by_ethdev_qid(sas, i); 637 if (txq_info->state & SFC_TXQ_INITIALIZED) { 638 union sfc_pkts_bytes qstats; 639 640 sfc_pkts_bytes_get(&txq_info->dp->dpq.stats, &qstats); 641 pkts_sum += qstats.pkts - 642 sa->sw_stats.reset_tx_pkts[i]; 643 bytes_sum += qstats.bytes - 644 sa->sw_stats.reset_tx_bytes[i]; 645 } 646 } 647 648 *pkts = pkts_sum; 649 *bytes = bytes_sum; 650 } 651 652 /* 653 * Some statistics are computed as A - B where A and B each increase 654 * monotonically with some hardware counter(s) and the counters are read 655 * asynchronously. 656 * 657 * If packet X is counted in A, but not counted in B yet, computed value is 658 * greater than real. 659 * 660 * If packet X is not counted in A at the moment of reading the counter, 661 * but counted in B at the moment of reading the counter, computed value 662 * is less than real. 663 * 664 * However, counter which grows backward is worse evil than slightly wrong 665 * value. So, let's try to guarantee that it never happens except may be 666 * the case when the MAC stats are zeroed as a result of a NIC reset. 667 */ 668 static void 669 sfc_update_diff_stat(uint64_t *stat, uint64_t newval) 670 { 671 if ((int64_t)(newval - *stat) > 0 || newval == 0) 672 *stat = newval; 673 } 674 675 static int 676 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 677 { 678 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 679 bool have_dp_rx_stats = sap->dp_rx->features & SFC_DP_RX_FEAT_STATS; 680 bool have_dp_tx_stats = sap->dp_tx->features & SFC_DP_TX_FEAT_STATS; 681 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 682 struct sfc_port *port = &sa->port; 683 uint64_t *mac_stats; 684 int ret; 685 686 sfc_adapter_lock(sa); 687 688 if (have_dp_rx_stats) 689 sfc_stats_get_dp_rx(sa, &stats->ipackets, &stats->ibytes); 690 if (have_dp_tx_stats) 691 sfc_stats_get_dp_tx(sa, &stats->opackets, &stats->obytes); 692 693 ret = sfc_port_update_mac_stats(sa, B_FALSE); 694 if (ret != 0) 695 goto unlock; 696 697 mac_stats = port->mac_stats_buf; 698 699 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, 700 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) { 701 if (!have_dp_rx_stats) { 702 stats->ipackets = 703 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] + 704 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] + 705 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]; 706 stats->ibytes = 707 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] + 708 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] + 709 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]; 710 711 /* CRC is included in these stats, but shouldn't be */ 712 stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN; 713 } 714 if (!have_dp_tx_stats) { 715 stats->opackets = 716 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] + 717 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] + 718 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]; 719 stats->obytes = 720 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] + 721 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] + 722 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; 723 724 /* CRC is included in these stats, but shouldn't be */ 725 stats->obytes -= stats->opackets * RTE_ETHER_CRC_LEN; 726 } 727 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; 728 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; 729 } else { 730 if (!have_dp_tx_stats) { 731 stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; 732 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS] - 733 mac_stats[EFX_MAC_TX_PKTS] * RTE_ETHER_CRC_LEN; 734 } 735 736 /* 737 * Take into account stats which are whenever supported 738 * on EF10. If some stat is not supported by current 739 * firmware variant or HW revision, it is guaranteed 740 * to be zero in mac_stats. 741 */ 742 stats->imissed = 743 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] + 744 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] + 745 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] + 746 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] + 747 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] + 748 mac_stats[EFX_MAC_PM_TRUNC_QBB] + 749 mac_stats[EFX_MAC_PM_DISCARD_QBB] + 750 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] + 751 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] + 752 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS]; 753 stats->ierrors = 754 mac_stats[EFX_MAC_RX_FCS_ERRORS] + 755 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] + 756 mac_stats[EFX_MAC_RX_JABBER_PKTS]; 757 /* no oerrors counters supported on EF10 */ 758 759 if (!have_dp_rx_stats) { 760 /* Exclude missed, errors and pauses from Rx packets */ 761 sfc_update_diff_stat(&port->ipackets, 762 mac_stats[EFX_MAC_RX_PKTS] - 763 mac_stats[EFX_MAC_RX_PAUSE_PKTS] - 764 stats->imissed - stats->ierrors); 765 stats->ipackets = port->ipackets; 766 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS] - 767 mac_stats[EFX_MAC_RX_PKTS] * RTE_ETHER_CRC_LEN; 768 } 769 } 770 771 unlock: 772 sfc_adapter_unlock(sa); 773 SFC_ASSERT(ret >= 0); 774 return -ret; 775 } 776 777 static int 778 sfc_stats_reset(struct rte_eth_dev *dev) 779 { 780 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 781 struct sfc_port *port = &sa->port; 782 int rc; 783 784 sfc_adapter_lock(sa); 785 786 if (sa->state != SFC_ETHDEV_STARTED) { 787 /* 788 * The operation cannot be done if port is not started; it 789 * will be scheduled to be done during the next port start 790 */ 791 port->mac_stats_reset_pending = B_TRUE; 792 sfc_adapter_unlock(sa); 793 return 0; 794 } 795 796 rc = sfc_port_reset_mac_stats(sa); 797 if (rc != 0) 798 sfc_err(sa, "failed to reset statistics (rc = %d)", rc); 799 800 sfc_sw_xstats_reset(sa); 801 802 sfc_adapter_unlock(sa); 803 804 SFC_ASSERT(rc >= 0); 805 return -rc; 806 } 807 808 static unsigned int 809 sfc_xstats_get_nb_supported(struct sfc_adapter *sa) 810 { 811 struct sfc_port *port = &sa->port; 812 unsigned int nb_supported; 813 814 sfc_adapter_lock(sa); 815 nb_supported = port->mac_stats_nb_supported + 816 sfc_sw_xstats_get_nb_supported(sa); 817 sfc_adapter_unlock(sa); 818 819 return nb_supported; 820 } 821 822 static int 823 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 824 unsigned int xstats_count) 825 { 826 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 827 unsigned int nb_written = 0; 828 unsigned int nb_supported = 0; 829 int rc; 830 831 if (unlikely(xstats == NULL)) 832 return sfc_xstats_get_nb_supported(sa); 833 834 rc = sfc_port_get_mac_stats(sa, xstats, xstats_count, &nb_written); 835 if (rc < 0) 836 return rc; 837 838 nb_supported = rc; 839 sfc_sw_xstats_get_vals(sa, xstats, xstats_count, &nb_written, 840 &nb_supported); 841 842 return nb_supported; 843 } 844 845 static int 846 sfc_xstats_get_names(struct rte_eth_dev *dev, 847 struct rte_eth_xstat_name *xstats_names, 848 unsigned int xstats_count) 849 { 850 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 851 struct sfc_port *port = &sa->port; 852 unsigned int i; 853 unsigned int nstats = 0; 854 unsigned int nb_written = 0; 855 int ret; 856 857 if (unlikely(xstats_names == NULL)) 858 return sfc_xstats_get_nb_supported(sa); 859 860 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 861 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 862 if (nstats < xstats_count) { 863 strlcpy(xstats_names[nstats].name, 864 efx_mac_stat_name(sa->nic, i), 865 sizeof(xstats_names[0].name)); 866 nb_written++; 867 } 868 nstats++; 869 } 870 } 871 872 ret = sfc_sw_xstats_get_names(sa, xstats_names, xstats_count, 873 &nb_written, &nstats); 874 if (ret != 0) { 875 SFC_ASSERT(ret < 0); 876 return ret; 877 } 878 879 return nstats; 880 } 881 882 static int 883 sfc_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 884 uint64_t *values, unsigned int n) 885 { 886 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 887 struct sfc_port *port = &sa->port; 888 unsigned int nb_supported; 889 unsigned int i; 890 int rc; 891 892 if (unlikely(ids == NULL || values == NULL)) 893 return -EINVAL; 894 895 /* 896 * Values array could be filled in nonsequential order. Fill values with 897 * constant indicating invalid ID first. 898 */ 899 for (i = 0; i < n; i++) 900 values[i] = SFC_XSTAT_ID_INVALID_VAL; 901 902 rc = sfc_port_get_mac_stats_by_id(sa, ids, values, n); 903 if (rc != 0) 904 return rc; 905 906 nb_supported = port->mac_stats_nb_supported; 907 sfc_sw_xstats_get_vals_by_id(sa, ids, values, n, &nb_supported); 908 909 /* Return number of written stats before invalid ID is encountered. */ 910 for (i = 0; i < n; i++) { 911 if (values[i] == SFC_XSTAT_ID_INVALID_VAL) 912 return i; 913 } 914 915 return n; 916 } 917 918 static int 919 sfc_xstats_get_names_by_id(struct rte_eth_dev *dev, 920 const uint64_t *ids, 921 struct rte_eth_xstat_name *xstats_names, 922 unsigned int size) 923 { 924 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 925 struct sfc_port *port = &sa->port; 926 unsigned int nb_supported; 927 unsigned int i; 928 int ret; 929 930 if (unlikely(xstats_names == NULL && ids != NULL) || 931 unlikely(xstats_names != NULL && ids == NULL)) 932 return -EINVAL; 933 934 if (unlikely(xstats_names == NULL && ids == NULL)) 935 return sfc_xstats_get_nb_supported(sa); 936 937 /* 938 * Names array could be filled in nonsequential order. Fill names with 939 * string indicating invalid ID first. 940 */ 941 for (i = 0; i < size; i++) 942 xstats_names[i].name[0] = SFC_XSTAT_ID_INVALID_NAME; 943 944 sfc_adapter_lock(sa); 945 946 SFC_ASSERT(port->mac_stats_nb_supported <= 947 RTE_DIM(port->mac_stats_by_id)); 948 949 for (i = 0; i < size; i++) { 950 if (ids[i] < port->mac_stats_nb_supported) { 951 strlcpy(xstats_names[i].name, 952 efx_mac_stat_name(sa->nic, 953 port->mac_stats_by_id[ids[i]]), 954 sizeof(xstats_names[0].name)); 955 } 956 } 957 958 nb_supported = port->mac_stats_nb_supported; 959 960 sfc_adapter_unlock(sa); 961 962 ret = sfc_sw_xstats_get_names_by_id(sa, ids, xstats_names, size, 963 &nb_supported); 964 if (ret != 0) { 965 SFC_ASSERT(ret < 0); 966 return ret; 967 } 968 969 /* Return number of written names before invalid ID is encountered. */ 970 for (i = 0; i < size; i++) { 971 if (xstats_names[i].name[0] == SFC_XSTAT_ID_INVALID_NAME) 972 return i; 973 } 974 975 return size; 976 } 977 978 static int 979 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 980 { 981 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 982 unsigned int wanted_fc, link_fc; 983 984 memset(fc_conf, 0, sizeof(*fc_conf)); 985 986 sfc_adapter_lock(sa); 987 988 if (sa->state == SFC_ETHDEV_STARTED) 989 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc); 990 else 991 link_fc = sa->port.flow_ctrl; 992 993 switch (link_fc) { 994 case 0: 995 fc_conf->mode = RTE_ETH_FC_NONE; 996 break; 997 case EFX_FCNTL_RESPOND: 998 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; 999 break; 1000 case EFX_FCNTL_GENERATE: 1001 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; 1002 break; 1003 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE): 1004 fc_conf->mode = RTE_ETH_FC_FULL; 1005 break; 1006 default: 1007 sfc_err(sa, "%s: unexpected flow control value %#x", 1008 __func__, link_fc); 1009 } 1010 1011 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; 1012 1013 sfc_adapter_unlock(sa); 1014 1015 return 0; 1016 } 1017 1018 static int 1019 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1020 { 1021 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1022 struct sfc_port *port = &sa->port; 1023 unsigned int fcntl; 1024 int rc; 1025 1026 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || 1027 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || 1028 fc_conf->mac_ctrl_frame_fwd != 0) { 1029 sfc_err(sa, "unsupported flow control settings specified"); 1030 rc = EINVAL; 1031 goto fail_inval; 1032 } 1033 1034 switch (fc_conf->mode) { 1035 case RTE_ETH_FC_NONE: 1036 fcntl = 0; 1037 break; 1038 case RTE_ETH_FC_RX_PAUSE: 1039 fcntl = EFX_FCNTL_RESPOND; 1040 break; 1041 case RTE_ETH_FC_TX_PAUSE: 1042 fcntl = EFX_FCNTL_GENERATE; 1043 break; 1044 case RTE_ETH_FC_FULL: 1045 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 1046 break; 1047 default: 1048 rc = EINVAL; 1049 goto fail_inval; 1050 } 1051 1052 sfc_adapter_lock(sa); 1053 1054 if (sa->state == SFC_ETHDEV_STARTED) { 1055 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg); 1056 if (rc != 0) 1057 goto fail_mac_fcntl_set; 1058 } 1059 1060 port->flow_ctrl = fcntl; 1061 port->flow_ctrl_autoneg = fc_conf->autoneg; 1062 1063 sfc_adapter_unlock(sa); 1064 1065 return 0; 1066 1067 fail_mac_fcntl_set: 1068 sfc_adapter_unlock(sa); 1069 fail_inval: 1070 SFC_ASSERT(rc > 0); 1071 return -rc; 1072 } 1073 1074 static int 1075 sfc_check_scatter_on_all_rx_queues(struct sfc_adapter *sa, size_t pdu) 1076 { 1077 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa); 1078 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 1079 boolean_t scatter_enabled; 1080 const char *error; 1081 unsigned int i; 1082 1083 for (i = 0; i < sas->rxq_count; i++) { 1084 if ((sas->rxq_info[i].state & SFC_RXQ_INITIALIZED) == 0) 1085 continue; 1086 1087 scatter_enabled = (sas->rxq_info[i].type_flags & 1088 EFX_RXQ_FLAG_SCATTER); 1089 1090 if (!sfc_rx_check_scatter(pdu, sa->rxq_ctrl[i].buf_size, 1091 encp->enc_rx_prefix_size, 1092 scatter_enabled, 1093 encp->enc_rx_scatter_max, &error)) { 1094 sfc_err(sa, "MTU check for RxQ %u failed: %s", i, 1095 error); 1096 return EINVAL; 1097 } 1098 } 1099 1100 return 0; 1101 } 1102 1103 static int 1104 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 1105 { 1106 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1107 size_t pdu = EFX_MAC_PDU(mtu); 1108 size_t old_pdu; 1109 int rc; 1110 1111 sfc_log_init(sa, "mtu=%u", mtu); 1112 1113 rc = EINVAL; 1114 if (pdu < EFX_MAC_PDU_MIN) { 1115 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)", 1116 (unsigned int)mtu, (unsigned int)pdu, 1117 EFX_MAC_PDU_MIN); 1118 goto fail_inval; 1119 } 1120 if (pdu > EFX_MAC_PDU_MAX) { 1121 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)", 1122 (unsigned int)mtu, (unsigned int)pdu, 1123 (unsigned int)EFX_MAC_PDU_MAX); 1124 goto fail_inval; 1125 } 1126 1127 sfc_adapter_lock(sa); 1128 1129 rc = sfc_check_scatter_on_all_rx_queues(sa, pdu); 1130 if (rc != 0) 1131 goto fail_check_scatter; 1132 1133 if (pdu != sa->port.pdu) { 1134 if (sa->state == SFC_ETHDEV_STARTED) { 1135 sfc_stop(sa); 1136 1137 old_pdu = sa->port.pdu; 1138 sa->port.pdu = pdu; 1139 rc = sfc_start(sa); 1140 if (rc != 0) 1141 goto fail_start; 1142 } else { 1143 sa->port.pdu = pdu; 1144 } 1145 } 1146 1147 sfc_adapter_unlock(sa); 1148 1149 sfc_log_init(sa, "done"); 1150 return 0; 1151 1152 fail_start: 1153 sa->port.pdu = old_pdu; 1154 if (sfc_start(sa) != 0) 1155 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) " 1156 "PDU max size - port is stopped", 1157 (unsigned int)pdu, (unsigned int)old_pdu); 1158 1159 fail_check_scatter: 1160 sfc_adapter_unlock(sa); 1161 1162 fail_inval: 1163 sfc_log_init(sa, "failed %d", rc); 1164 SFC_ASSERT(rc > 0); 1165 return -rc; 1166 } 1167 static int 1168 sfc_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr) 1169 { 1170 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1171 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 1172 struct sfc_port *port = &sa->port; 1173 struct rte_ether_addr *old_addr = &dev->data->mac_addrs[0]; 1174 int rc = 0; 1175 1176 sfc_adapter_lock(sa); 1177 1178 if (rte_is_same_ether_addr(mac_addr, &port->default_mac_addr)) 1179 goto unlock; 1180 1181 /* 1182 * Copy the address to the device private data so that 1183 * it could be recalled in the case of adapter restart. 1184 */ 1185 rte_ether_addr_copy(mac_addr, &port->default_mac_addr); 1186 1187 /* 1188 * Neither of the two following checks can return 1189 * an error. The new MAC address is preserved in 1190 * the device private data and can be activated 1191 * on the next port start if the user prevents 1192 * isolated mode from being enabled. 1193 */ 1194 if (sfc_sa2shared(sa)->isolated) { 1195 sfc_warn(sa, "isolated mode is active on the port"); 1196 sfc_warn(sa, "will not set MAC address"); 1197 goto unlock; 1198 } 1199 1200 if (sa->state != SFC_ETHDEV_STARTED) { 1201 sfc_notice(sa, "the port is not started"); 1202 sfc_notice(sa, "the new MAC address will be set on port start"); 1203 1204 goto unlock; 1205 } 1206 1207 if (encp->enc_allow_set_mac_with_installed_filters) { 1208 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes); 1209 if (rc != 0) { 1210 sfc_err(sa, "cannot set MAC address (rc = %u)", rc); 1211 goto unlock; 1212 } 1213 1214 /* 1215 * Changing the MAC address by means of MCDI request 1216 * has no effect on received traffic, therefore 1217 * we also need to update unicast filters 1218 */ 1219 rc = sfc_set_rx_mode_unchecked(sa); 1220 if (rc != 0) { 1221 sfc_err(sa, "cannot set filter (rc = %u)", rc); 1222 /* Rollback the old address */ 1223 (void)efx_mac_addr_set(sa->nic, old_addr->addr_bytes); 1224 (void)sfc_set_rx_mode_unchecked(sa); 1225 } 1226 } else { 1227 sfc_warn(sa, "cannot set MAC address with filters installed"); 1228 sfc_warn(sa, "adapter will be restarted to pick the new MAC"); 1229 sfc_warn(sa, "(some traffic may be dropped)"); 1230 1231 /* 1232 * Since setting MAC address with filters installed is not 1233 * allowed on the adapter, the new MAC address will be set 1234 * by means of adapter restart. sfc_start() shall retrieve 1235 * the new address from the device private data and set it. 1236 */ 1237 sfc_stop(sa); 1238 rc = sfc_start(sa); 1239 if (rc != 0) 1240 sfc_err(sa, "cannot restart adapter (rc = %u)", rc); 1241 } 1242 1243 unlock: 1244 if (rc != 0) 1245 rte_ether_addr_copy(old_addr, &port->default_mac_addr); 1246 1247 sfc_adapter_unlock(sa); 1248 1249 SFC_ASSERT(rc >= 0); 1250 return -rc; 1251 } 1252 1253 1254 static int 1255 sfc_set_mc_addr_list(struct rte_eth_dev *dev, 1256 struct rte_ether_addr *mc_addr_set, uint32_t nb_mc_addr) 1257 { 1258 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1259 struct sfc_port *port = &sa->port; 1260 uint8_t *mc_addrs = port->mcast_addrs; 1261 int rc; 1262 unsigned int i; 1263 1264 if (sfc_sa2shared(sa)->isolated) { 1265 sfc_err(sa, "isolated mode is active on the port"); 1266 sfc_err(sa, "will not set multicast address list"); 1267 return -ENOTSUP; 1268 } 1269 1270 if (mc_addrs == NULL) 1271 return -ENOBUFS; 1272 1273 if (nb_mc_addr > port->max_mcast_addrs) { 1274 sfc_err(sa, "too many multicast addresses: %u > %u", 1275 nb_mc_addr, port->max_mcast_addrs); 1276 return -EINVAL; 1277 } 1278 1279 for (i = 0; i < nb_mc_addr; ++i) { 1280 rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, 1281 EFX_MAC_ADDR_LEN); 1282 mc_addrs += EFX_MAC_ADDR_LEN; 1283 } 1284 1285 port->nb_mcast_addrs = nb_mc_addr; 1286 1287 if (sa->state != SFC_ETHDEV_STARTED) 1288 return 0; 1289 1290 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, 1291 port->nb_mcast_addrs); 1292 if (rc != 0) 1293 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); 1294 1295 SFC_ASSERT(rc >= 0); 1296 return -rc; 1297 } 1298 1299 /* 1300 * The function is used by the secondary process as well. It must not 1301 * use any process-local pointers from the adapter data. 1302 */ 1303 static void 1304 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t ethdev_qid, 1305 struct rte_eth_rxq_info *qinfo) 1306 { 1307 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1308 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1309 struct sfc_rxq_info *rxq_info; 1310 1311 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1312 1313 qinfo->mp = rxq_info->refill_mb_pool; 1314 qinfo->conf.rx_free_thresh = rxq_info->refill_threshold; 1315 qinfo->conf.rx_drop_en = 1; 1316 qinfo->conf.rx_deferred_start = rxq_info->deferred_start; 1317 qinfo->conf.offloads = dev->data->dev_conf.rxmode.offloads; 1318 if (rxq_info->type_flags & EFX_RXQ_FLAG_SCATTER) { 1319 qinfo->conf.offloads |= RTE_ETH_RX_OFFLOAD_SCATTER; 1320 qinfo->scattered_rx = 1; 1321 } 1322 qinfo->nb_desc = rxq_info->entries; 1323 } 1324 1325 /* 1326 * The function is used by the secondary process as well. It must not 1327 * use any process-local pointers from the adapter data. 1328 */ 1329 static void 1330 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t ethdev_qid, 1331 struct rte_eth_txq_info *qinfo) 1332 { 1333 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1334 struct sfc_txq_info *txq_info; 1335 1336 SFC_ASSERT(ethdev_qid < sas->ethdev_txq_count); 1337 1338 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1339 1340 memset(qinfo, 0, sizeof(*qinfo)); 1341 1342 qinfo->conf.offloads = txq_info->offloads; 1343 qinfo->conf.tx_free_thresh = txq_info->free_thresh; 1344 qinfo->conf.tx_deferred_start = txq_info->deferred_start; 1345 qinfo->nb_desc = txq_info->entries; 1346 } 1347 1348 /* 1349 * The function is used by the secondary process as well. It must not 1350 * use any process-local pointers from the adapter data. 1351 */ 1352 static uint32_t 1353 sfc_rx_queue_count(void *rx_queue) 1354 { 1355 struct sfc_dp_rxq *dp_rxq = rx_queue; 1356 const struct sfc_dp_rx *dp_rx; 1357 struct sfc_rxq_info *rxq_info; 1358 1359 dp_rx = sfc_dp_rx_by_dp_rxq(dp_rxq); 1360 rxq_info = sfc_rxq_info_by_dp_rxq(dp_rxq); 1361 1362 if ((rxq_info->state & SFC_RXQ_STARTED) == 0) 1363 return 0; 1364 1365 return dp_rx->qdesc_npending(dp_rxq); 1366 } 1367 1368 /* 1369 * The function is used by the secondary process as well. It must not 1370 * use any process-local pointers from the adapter data. 1371 */ 1372 static int 1373 sfc_rx_descriptor_status(void *queue, uint16_t offset) 1374 { 1375 struct sfc_dp_rxq *dp_rxq = queue; 1376 const struct sfc_dp_rx *dp_rx; 1377 1378 dp_rx = sfc_dp_rx_by_dp_rxq(dp_rxq); 1379 1380 return dp_rx->qdesc_status(dp_rxq, offset); 1381 } 1382 1383 /* 1384 * The function is used by the secondary process as well. It must not 1385 * use any process-local pointers from the adapter data. 1386 */ 1387 static int 1388 sfc_tx_descriptor_status(void *queue, uint16_t offset) 1389 { 1390 struct sfc_dp_txq *dp_txq = queue; 1391 const struct sfc_dp_tx *dp_tx; 1392 1393 dp_tx = sfc_dp_tx_by_dp_txq(dp_txq); 1394 1395 return dp_tx->qdesc_status(dp_txq, offset); 1396 } 1397 1398 static int 1399 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1400 { 1401 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1402 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1403 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1404 struct sfc_rxq_info *rxq_info; 1405 sfc_sw_index_t sw_index; 1406 int rc; 1407 1408 sfc_log_init(sa, "RxQ=%u", ethdev_qid); 1409 1410 sfc_adapter_lock(sa); 1411 1412 rc = EINVAL; 1413 if (sa->state != SFC_ETHDEV_STARTED) 1414 goto fail_not_started; 1415 1416 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1417 if (rxq_info->state != SFC_RXQ_INITIALIZED) 1418 goto fail_not_setup; 1419 1420 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 1421 rc = sfc_rx_qstart(sa, sw_index); 1422 if (rc != 0) 1423 goto fail_rx_qstart; 1424 1425 rxq_info->deferred_started = B_TRUE; 1426 1427 sfc_adapter_unlock(sa); 1428 1429 return 0; 1430 1431 fail_rx_qstart: 1432 fail_not_setup: 1433 fail_not_started: 1434 sfc_adapter_unlock(sa); 1435 SFC_ASSERT(rc > 0); 1436 return -rc; 1437 } 1438 1439 static int 1440 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1441 { 1442 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1443 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1444 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1445 struct sfc_rxq_info *rxq_info; 1446 sfc_sw_index_t sw_index; 1447 1448 sfc_log_init(sa, "RxQ=%u", ethdev_qid); 1449 1450 sfc_adapter_lock(sa); 1451 1452 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 1453 sfc_rx_qstop(sa, sw_index); 1454 1455 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1456 rxq_info->deferred_started = B_FALSE; 1457 1458 sfc_adapter_unlock(sa); 1459 1460 return 0; 1461 } 1462 1463 static int 1464 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1465 { 1466 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1467 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1468 struct sfc_txq_info *txq_info; 1469 sfc_sw_index_t sw_index; 1470 int rc; 1471 1472 sfc_log_init(sa, "TxQ = %u", ethdev_qid); 1473 1474 sfc_adapter_lock(sa); 1475 1476 rc = EINVAL; 1477 if (sa->state != SFC_ETHDEV_STARTED) 1478 goto fail_not_started; 1479 1480 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1481 if (txq_info->state != SFC_TXQ_INITIALIZED) 1482 goto fail_not_setup; 1483 1484 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 1485 rc = sfc_tx_qstart(sa, sw_index); 1486 if (rc != 0) 1487 goto fail_tx_qstart; 1488 1489 txq_info->deferred_started = B_TRUE; 1490 1491 sfc_adapter_unlock(sa); 1492 return 0; 1493 1494 fail_tx_qstart: 1495 1496 fail_not_setup: 1497 fail_not_started: 1498 sfc_adapter_unlock(sa); 1499 SFC_ASSERT(rc > 0); 1500 return -rc; 1501 } 1502 1503 static int 1504 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1505 { 1506 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1507 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1508 struct sfc_txq_info *txq_info; 1509 sfc_sw_index_t sw_index; 1510 1511 sfc_log_init(sa, "TxQ = %u", ethdev_qid); 1512 1513 sfc_adapter_lock(sa); 1514 1515 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 1516 sfc_tx_qstop(sa, sw_index); 1517 1518 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1519 txq_info->deferred_started = B_FALSE; 1520 1521 sfc_adapter_unlock(sa); 1522 return 0; 1523 } 1524 1525 static efx_tunnel_protocol_t 1526 sfc_tunnel_rte_type_to_efx_udp_proto(enum rte_eth_tunnel_type rte_type) 1527 { 1528 switch (rte_type) { 1529 case RTE_ETH_TUNNEL_TYPE_VXLAN: 1530 return EFX_TUNNEL_PROTOCOL_VXLAN; 1531 case RTE_ETH_TUNNEL_TYPE_GENEVE: 1532 return EFX_TUNNEL_PROTOCOL_GENEVE; 1533 default: 1534 return EFX_TUNNEL_NPROTOS; 1535 } 1536 } 1537 1538 enum sfc_udp_tunnel_op_e { 1539 SFC_UDP_TUNNEL_ADD_PORT, 1540 SFC_UDP_TUNNEL_DEL_PORT, 1541 }; 1542 1543 static int 1544 sfc_dev_udp_tunnel_op(struct rte_eth_dev *dev, 1545 struct rte_eth_udp_tunnel *tunnel_udp, 1546 enum sfc_udp_tunnel_op_e op) 1547 { 1548 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1549 efx_tunnel_protocol_t tunnel_proto; 1550 int rc; 1551 1552 sfc_log_init(sa, "%s udp_port=%u prot_type=%u", 1553 (op == SFC_UDP_TUNNEL_ADD_PORT) ? "add" : 1554 (op == SFC_UDP_TUNNEL_DEL_PORT) ? "delete" : "unknown", 1555 tunnel_udp->udp_port, tunnel_udp->prot_type); 1556 1557 tunnel_proto = 1558 sfc_tunnel_rte_type_to_efx_udp_proto(tunnel_udp->prot_type); 1559 if (tunnel_proto >= EFX_TUNNEL_NPROTOS) { 1560 rc = ENOTSUP; 1561 goto fail_bad_proto; 1562 } 1563 1564 sfc_adapter_lock(sa); 1565 1566 switch (op) { 1567 case SFC_UDP_TUNNEL_ADD_PORT: 1568 rc = efx_tunnel_config_udp_add(sa->nic, 1569 tunnel_udp->udp_port, 1570 tunnel_proto); 1571 break; 1572 case SFC_UDP_TUNNEL_DEL_PORT: 1573 rc = efx_tunnel_config_udp_remove(sa->nic, 1574 tunnel_udp->udp_port, 1575 tunnel_proto); 1576 break; 1577 default: 1578 rc = EINVAL; 1579 goto fail_bad_op; 1580 } 1581 1582 if (rc != 0) 1583 goto fail_op; 1584 1585 if (sa->state == SFC_ETHDEV_STARTED) { 1586 rc = efx_tunnel_reconfigure(sa->nic); 1587 if (rc == EAGAIN) { 1588 /* 1589 * Configuration is accepted by FW and MC reboot 1590 * is initiated to apply the changes. MC reboot 1591 * will be handled in a usual way (MC reboot 1592 * event on management event queue and adapter 1593 * restart). 1594 */ 1595 rc = 0; 1596 } else if (rc != 0) { 1597 goto fail_reconfigure; 1598 } 1599 } 1600 1601 sfc_adapter_unlock(sa); 1602 return 0; 1603 1604 fail_reconfigure: 1605 /* Remove/restore entry since the change makes the trouble */ 1606 switch (op) { 1607 case SFC_UDP_TUNNEL_ADD_PORT: 1608 (void)efx_tunnel_config_udp_remove(sa->nic, 1609 tunnel_udp->udp_port, 1610 tunnel_proto); 1611 break; 1612 case SFC_UDP_TUNNEL_DEL_PORT: 1613 (void)efx_tunnel_config_udp_add(sa->nic, 1614 tunnel_udp->udp_port, 1615 tunnel_proto); 1616 break; 1617 } 1618 1619 fail_op: 1620 fail_bad_op: 1621 sfc_adapter_unlock(sa); 1622 1623 fail_bad_proto: 1624 SFC_ASSERT(rc > 0); 1625 return -rc; 1626 } 1627 1628 static int 1629 sfc_dev_udp_tunnel_port_add(struct rte_eth_dev *dev, 1630 struct rte_eth_udp_tunnel *tunnel_udp) 1631 { 1632 return sfc_dev_udp_tunnel_op(dev, tunnel_udp, SFC_UDP_TUNNEL_ADD_PORT); 1633 } 1634 1635 static int 1636 sfc_dev_udp_tunnel_port_del(struct rte_eth_dev *dev, 1637 struct rte_eth_udp_tunnel *tunnel_udp) 1638 { 1639 return sfc_dev_udp_tunnel_op(dev, tunnel_udp, SFC_UDP_TUNNEL_DEL_PORT); 1640 } 1641 1642 /* 1643 * The function is used by the secondary process as well. It must not 1644 * use any process-local pointers from the adapter data. 1645 */ 1646 static int 1647 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1648 struct rte_eth_rss_conf *rss_conf) 1649 { 1650 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1651 struct sfc_rss *rss = &sas->rss; 1652 1653 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) 1654 return -ENOTSUP; 1655 1656 /* 1657 * Mapping of hash configuration between RTE and EFX is not one-to-one, 1658 * hence, conversion is done here to derive a correct set of RTE_ETH_RSS 1659 * flags which corresponds to the active EFX configuration stored 1660 * locally in 'sfc_adapter' and kept up-to-date 1661 */ 1662 rss_conf->rss_hf = sfc_rx_hf_efx_to_rte(rss, rss->hash_types); 1663 rss_conf->rss_key_len = EFX_RSS_KEY_SIZE; 1664 if (rss_conf->rss_key != NULL) 1665 rte_memcpy(rss_conf->rss_key, rss->key, EFX_RSS_KEY_SIZE); 1666 1667 return 0; 1668 } 1669 1670 static int 1671 sfc_dev_rss_hash_update(struct rte_eth_dev *dev, 1672 struct rte_eth_rss_conf *rss_conf) 1673 { 1674 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1675 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss; 1676 unsigned int efx_hash_types; 1677 unsigned int n_contexts; 1678 unsigned int mode_i = 0; 1679 unsigned int key_i = 0; 1680 uint32_t contexts[2]; 1681 unsigned int i = 0; 1682 int rc = 0; 1683 1684 if (sfc_sa2shared(sa)->isolated) 1685 return -ENOTSUP; 1686 1687 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) { 1688 sfc_err(sa, "RSS is not available"); 1689 return -ENOTSUP; 1690 } 1691 1692 if (rss->channels == 0) { 1693 sfc_err(sa, "RSS is not configured"); 1694 return -EINVAL; 1695 } 1696 1697 if ((rss_conf->rss_key != NULL) && 1698 (rss_conf->rss_key_len != sizeof(rss->key))) { 1699 sfc_err(sa, "RSS key size is wrong (should be %zu)", 1700 sizeof(rss->key)); 1701 return -EINVAL; 1702 } 1703 1704 sfc_adapter_lock(sa); 1705 1706 rc = sfc_rx_hf_rte_to_efx(sa, rss_conf->rss_hf, &efx_hash_types); 1707 if (rc != 0) 1708 goto fail_rx_hf_rte_to_efx; 1709 1710 contexts[0] = EFX_RSS_CONTEXT_DEFAULT; 1711 contexts[1] = rss->dummy_ctx.nic_handle; 1712 n_contexts = (rss->dummy_ctx.nic_handle_refcnt == 0) ? 1 : 2; 1713 1714 for (mode_i = 0; mode_i < n_contexts; mode_i++) { 1715 rc = efx_rx_scale_mode_set(sa->nic, contexts[mode_i], 1716 rss->hash_alg, efx_hash_types, 1717 B_TRUE); 1718 if (rc != 0) 1719 goto fail_scale_mode_set; 1720 } 1721 1722 if (rss_conf->rss_key != NULL) { 1723 if (sa->state == SFC_ETHDEV_STARTED) { 1724 for (key_i = 0; key_i < n_contexts; key_i++) { 1725 rc = efx_rx_scale_key_set(sa->nic, 1726 contexts[key_i], 1727 rss_conf->rss_key, 1728 sizeof(rss->key)); 1729 if (rc != 0) 1730 goto fail_scale_key_set; 1731 } 1732 } 1733 1734 rte_memcpy(rss->key, rss_conf->rss_key, sizeof(rss->key)); 1735 } 1736 1737 rss->hash_types = efx_hash_types; 1738 1739 sfc_adapter_unlock(sa); 1740 1741 return 0; 1742 1743 fail_scale_key_set: 1744 for (i = 0; i < key_i; i++) { 1745 if (efx_rx_scale_key_set(sa->nic, contexts[i], rss->key, 1746 sizeof(rss->key)) != 0) 1747 sfc_err(sa, "failed to restore RSS key"); 1748 } 1749 1750 fail_scale_mode_set: 1751 for (i = 0; i < mode_i; i++) { 1752 if (efx_rx_scale_mode_set(sa->nic, contexts[i], 1753 EFX_RX_HASHALG_TOEPLITZ, 1754 rss->hash_types, B_TRUE) != 0) 1755 sfc_err(sa, "failed to restore RSS mode"); 1756 } 1757 1758 fail_rx_hf_rte_to_efx: 1759 sfc_adapter_unlock(sa); 1760 return -rc; 1761 } 1762 1763 /* 1764 * The function is used by the secondary process as well. It must not 1765 * use any process-local pointers from the adapter data. 1766 */ 1767 static int 1768 sfc_dev_rss_reta_query(struct rte_eth_dev *dev, 1769 struct rte_eth_rss_reta_entry64 *reta_conf, 1770 uint16_t reta_size) 1771 { 1772 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1773 struct sfc_rss *rss = &sas->rss; 1774 int entry; 1775 1776 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE || sas->isolated) 1777 return -ENOTSUP; 1778 1779 if (rss->channels == 0) 1780 return -EINVAL; 1781 1782 if (reta_size != EFX_RSS_TBL_SIZE) 1783 return -EINVAL; 1784 1785 for (entry = 0; entry < reta_size; entry++) { 1786 int grp = entry / RTE_ETH_RETA_GROUP_SIZE; 1787 int grp_idx = entry % RTE_ETH_RETA_GROUP_SIZE; 1788 1789 if ((reta_conf[grp].mask >> grp_idx) & 1) 1790 reta_conf[grp].reta[grp_idx] = rss->tbl[entry]; 1791 } 1792 1793 return 0; 1794 } 1795 1796 static int 1797 sfc_dev_rss_reta_update(struct rte_eth_dev *dev, 1798 struct rte_eth_rss_reta_entry64 *reta_conf, 1799 uint16_t reta_size) 1800 { 1801 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1802 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss; 1803 unsigned int *rss_tbl_new; 1804 uint16_t entry; 1805 int rc = 0; 1806 1807 1808 if (sfc_sa2shared(sa)->isolated) 1809 return -ENOTSUP; 1810 1811 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) { 1812 sfc_err(sa, "RSS is not available"); 1813 return -ENOTSUP; 1814 } 1815 1816 if (rss->channels == 0) { 1817 sfc_err(sa, "RSS is not configured"); 1818 return -EINVAL; 1819 } 1820 1821 if (reta_size != EFX_RSS_TBL_SIZE) { 1822 sfc_err(sa, "RETA size is wrong (should be %u)", 1823 EFX_RSS_TBL_SIZE); 1824 return -EINVAL; 1825 } 1826 1827 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(rss->tbl), 0); 1828 if (rss_tbl_new == NULL) 1829 return -ENOMEM; 1830 1831 sfc_adapter_lock(sa); 1832 1833 rte_memcpy(rss_tbl_new, rss->tbl, sizeof(rss->tbl)); 1834 1835 for (entry = 0; entry < reta_size; entry++) { 1836 int grp_idx = entry % RTE_ETH_RETA_GROUP_SIZE; 1837 struct rte_eth_rss_reta_entry64 *grp; 1838 1839 grp = &reta_conf[entry / RTE_ETH_RETA_GROUP_SIZE]; 1840 1841 if (grp->mask & (1ull << grp_idx)) { 1842 if (grp->reta[grp_idx] >= rss->channels) { 1843 rc = EINVAL; 1844 goto bad_reta_entry; 1845 } 1846 rss_tbl_new[entry] = grp->reta[grp_idx]; 1847 } 1848 } 1849 1850 if (sa->state == SFC_ETHDEV_STARTED) { 1851 rc = efx_rx_scale_tbl_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT, 1852 rss_tbl_new, EFX_RSS_TBL_SIZE); 1853 if (rc != 0) 1854 goto fail_scale_tbl_set; 1855 } 1856 1857 rte_memcpy(rss->tbl, rss_tbl_new, sizeof(rss->tbl)); 1858 1859 fail_scale_tbl_set: 1860 bad_reta_entry: 1861 sfc_adapter_unlock(sa); 1862 1863 rte_free(rss_tbl_new); 1864 1865 SFC_ASSERT(rc >= 0); 1866 return -rc; 1867 } 1868 1869 static int 1870 sfc_dev_flow_ops_get(struct rte_eth_dev *dev __rte_unused, 1871 const struct rte_flow_ops **ops) 1872 { 1873 *ops = &sfc_flow_ops; 1874 return 0; 1875 } 1876 1877 static int 1878 sfc_pool_ops_supported(struct rte_eth_dev *dev, const char *pool) 1879 { 1880 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1881 1882 /* 1883 * If Rx datapath does not provide callback to check mempool, 1884 * all pools are supported. 1885 */ 1886 if (sap->dp_rx->pool_ops_supported == NULL) 1887 return 1; 1888 1889 return sap->dp_rx->pool_ops_supported(pool); 1890 } 1891 1892 static int 1893 sfc_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1894 { 1895 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1896 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1897 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1898 struct sfc_rxq_info *rxq_info; 1899 1900 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1901 1902 return sap->dp_rx->intr_enable(rxq_info->dp); 1903 } 1904 1905 static int 1906 sfc_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1907 { 1908 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1909 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1910 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1911 struct sfc_rxq_info *rxq_info; 1912 1913 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1914 1915 return sap->dp_rx->intr_disable(rxq_info->dp); 1916 } 1917 1918 struct sfc_mport_journal_ctx { 1919 struct sfc_adapter *sa; 1920 uint16_t switch_domain_id; 1921 uint32_t mcdi_handle; 1922 bool controllers_assigned; 1923 efx_pcie_interface_t *controllers; 1924 size_t nb_controllers; 1925 }; 1926 1927 static int 1928 sfc_journal_ctx_add_controller(struct sfc_mport_journal_ctx *ctx, 1929 efx_pcie_interface_t intf) 1930 { 1931 efx_pcie_interface_t *new_controllers; 1932 size_t i, target; 1933 size_t new_size; 1934 1935 if (ctx->controllers == NULL) { 1936 ctx->controllers = rte_malloc("sfc_controller_mapping", 1937 sizeof(ctx->controllers[0]), 0); 1938 if (ctx->controllers == NULL) 1939 return ENOMEM; 1940 1941 ctx->controllers[0] = intf; 1942 ctx->nb_controllers = 1; 1943 1944 return 0; 1945 } 1946 1947 for (i = 0; i < ctx->nb_controllers; i++) { 1948 if (ctx->controllers[i] == intf) 1949 return 0; 1950 if (ctx->controllers[i] > intf) 1951 break; 1952 } 1953 target = i; 1954 1955 ctx->nb_controllers += 1; 1956 new_size = ctx->nb_controllers * sizeof(ctx->controllers[0]); 1957 1958 new_controllers = rte_realloc(ctx->controllers, new_size, 0); 1959 if (new_controllers == NULL) { 1960 rte_free(ctx->controllers); 1961 return ENOMEM; 1962 } 1963 ctx->controllers = new_controllers; 1964 1965 for (i = target + 1; i < ctx->nb_controllers; i++) 1966 ctx->controllers[i] = ctx->controllers[i - 1]; 1967 1968 ctx->controllers[target] = intf; 1969 1970 return 0; 1971 } 1972 1973 static efx_rc_t 1974 sfc_process_mport_journal_entry(struct sfc_mport_journal_ctx *ctx, 1975 efx_mport_desc_t *mport) 1976 { 1977 struct sfc_mae_switch_port_request req; 1978 efx_mport_sel_t entity_selector; 1979 efx_mport_sel_t ethdev_mport; 1980 uint16_t switch_port_id; 1981 efx_rc_t efx_rc; 1982 int rc; 1983 1984 sfc_dbg(ctx->sa, 1985 "processing mport id %u (controller %u pf %u vf %u)", 1986 mport->emd_id.id, mport->emd_vnic.ev_intf, 1987 mport->emd_vnic.ev_pf, mport->emd_vnic.ev_vf); 1988 efx_mae_mport_invalid(ðdev_mport); 1989 1990 if (!ctx->controllers_assigned) { 1991 rc = sfc_journal_ctx_add_controller(ctx, 1992 mport->emd_vnic.ev_intf); 1993 if (rc != 0) 1994 return rc; 1995 } 1996 1997 /* Build Mport selector */ 1998 efx_rc = efx_mae_mport_by_pcie_mh_function(mport->emd_vnic.ev_intf, 1999 mport->emd_vnic.ev_pf, 2000 mport->emd_vnic.ev_vf, 2001 &entity_selector); 2002 if (efx_rc != 0) { 2003 sfc_err(ctx->sa, "failed to build entity mport selector for c%upf%uvf%u", 2004 mport->emd_vnic.ev_intf, 2005 mport->emd_vnic.ev_pf, 2006 mport->emd_vnic.ev_vf); 2007 return efx_rc; 2008 } 2009 2010 rc = sfc_mae_switch_port_id_by_entity(ctx->switch_domain_id, 2011 &entity_selector, 2012 SFC_MAE_SWITCH_PORT_REPRESENTOR, 2013 &switch_port_id); 2014 switch (rc) { 2015 case 0: 2016 /* Already registered */ 2017 break; 2018 case ENOENT: 2019 /* 2020 * No representor has been created for this entity. 2021 * Create a dummy switch registry entry with an invalid ethdev 2022 * mport selector. When a corresponding representor is created, 2023 * this entry will be updated. 2024 */ 2025 req.type = SFC_MAE_SWITCH_PORT_REPRESENTOR; 2026 req.entity_mportp = &entity_selector; 2027 req.ethdev_mportp = ðdev_mport; 2028 req.ethdev_port_id = RTE_MAX_ETHPORTS; 2029 req.port_data.repr.intf = mport->emd_vnic.ev_intf; 2030 req.port_data.repr.pf = mport->emd_vnic.ev_pf; 2031 req.port_data.repr.vf = mport->emd_vnic.ev_vf; 2032 2033 rc = sfc_mae_assign_switch_port(ctx->switch_domain_id, 2034 &req, &switch_port_id); 2035 if (rc != 0) { 2036 sfc_err(ctx->sa, 2037 "failed to assign MAE switch port for c%upf%uvf%u: %s", 2038 mport->emd_vnic.ev_intf, 2039 mport->emd_vnic.ev_pf, 2040 mport->emd_vnic.ev_vf, 2041 rte_strerror(rc)); 2042 return rc; 2043 } 2044 break; 2045 default: 2046 sfc_err(ctx->sa, "failed to find MAE switch port for c%upf%uvf%u: %s", 2047 mport->emd_vnic.ev_intf, 2048 mport->emd_vnic.ev_pf, 2049 mport->emd_vnic.ev_vf, 2050 rte_strerror(rc)); 2051 return rc; 2052 } 2053 2054 return 0; 2055 } 2056 2057 static efx_rc_t 2058 sfc_process_mport_journal_cb(void *data, efx_mport_desc_t *mport, 2059 size_t mport_len) 2060 { 2061 struct sfc_mport_journal_ctx *ctx = data; 2062 2063 if (ctx == NULL || ctx->sa == NULL) { 2064 sfc_err(ctx->sa, "received NULL context or SFC adapter"); 2065 return EINVAL; 2066 } 2067 2068 if (mport_len != sizeof(*mport)) { 2069 sfc_err(ctx->sa, "actual and expected mport buffer sizes differ"); 2070 return EINVAL; 2071 } 2072 2073 SFC_ASSERT(sfc_adapter_is_locked(ctx->sa)); 2074 2075 /* 2076 * If a zombie flag is set, it means the mport has been marked for 2077 * deletion and cannot be used for any new operations. The mport will 2078 * be destroyed completely once all references to it are released. 2079 */ 2080 if (mport->emd_zombie) { 2081 sfc_dbg(ctx->sa, "mport is a zombie, skipping"); 2082 return 0; 2083 } 2084 if (mport->emd_type != EFX_MPORT_TYPE_VNIC) { 2085 sfc_dbg(ctx->sa, "mport is not a VNIC, skipping"); 2086 return 0; 2087 } 2088 if (mport->emd_vnic.ev_client_type != EFX_MPORT_VNIC_CLIENT_FUNCTION) { 2089 sfc_dbg(ctx->sa, "mport is not a function, skipping"); 2090 return 0; 2091 } 2092 if (mport->emd_vnic.ev_handle == ctx->mcdi_handle) { 2093 sfc_dbg(ctx->sa, "mport is this driver instance, skipping"); 2094 return 0; 2095 } 2096 2097 return sfc_process_mport_journal_entry(ctx, mport); 2098 } 2099 2100 static int 2101 sfc_process_mport_journal(struct sfc_adapter *sa) 2102 { 2103 struct sfc_mport_journal_ctx ctx; 2104 const efx_pcie_interface_t *controllers; 2105 size_t nb_controllers; 2106 efx_rc_t efx_rc; 2107 int rc; 2108 2109 memset(&ctx, 0, sizeof(ctx)); 2110 ctx.sa = sa; 2111 ctx.switch_domain_id = sa->mae.switch_domain_id; 2112 2113 efx_rc = efx_mcdi_get_own_client_handle(sa->nic, &ctx.mcdi_handle); 2114 if (efx_rc != 0) { 2115 sfc_err(sa, "failed to get own MCDI handle"); 2116 SFC_ASSERT(efx_rc > 0); 2117 return efx_rc; 2118 } 2119 2120 rc = sfc_mae_switch_domain_controllers(ctx.switch_domain_id, 2121 &controllers, &nb_controllers); 2122 if (rc != 0) { 2123 sfc_err(sa, "failed to get controller mapping"); 2124 return rc; 2125 } 2126 2127 ctx.controllers_assigned = controllers != NULL; 2128 ctx.controllers = NULL; 2129 ctx.nb_controllers = 0; 2130 2131 efx_rc = efx_mae_read_mport_journal(sa->nic, 2132 sfc_process_mport_journal_cb, &ctx); 2133 if (efx_rc != 0) { 2134 sfc_err(sa, "failed to process MAE mport journal"); 2135 SFC_ASSERT(efx_rc > 0); 2136 return efx_rc; 2137 } 2138 2139 if (controllers == NULL) { 2140 rc = sfc_mae_switch_domain_map_controllers(ctx.switch_domain_id, 2141 ctx.controllers, 2142 ctx.nb_controllers); 2143 if (rc != 0) 2144 return rc; 2145 } 2146 2147 return 0; 2148 } 2149 2150 static void 2151 sfc_count_representors_cb(enum sfc_mae_switch_port_type type, 2152 const efx_mport_sel_t *ethdev_mportp __rte_unused, 2153 uint16_t ethdev_port_id __rte_unused, 2154 const efx_mport_sel_t *entity_mportp __rte_unused, 2155 uint16_t switch_port_id __rte_unused, 2156 union sfc_mae_switch_port_data *port_datap 2157 __rte_unused, 2158 void *user_datap) 2159 { 2160 int *counter = user_datap; 2161 2162 SFC_ASSERT(counter != NULL); 2163 2164 if (type == SFC_MAE_SWITCH_PORT_REPRESENTOR) 2165 (*counter)++; 2166 } 2167 2168 struct sfc_get_representors_ctx { 2169 struct rte_eth_representor_info *info; 2170 struct sfc_adapter *sa; 2171 uint16_t switch_domain_id; 2172 const efx_pcie_interface_t *controllers; 2173 size_t nb_controllers; 2174 }; 2175 2176 static void 2177 sfc_get_representors_cb(enum sfc_mae_switch_port_type type, 2178 const efx_mport_sel_t *ethdev_mportp __rte_unused, 2179 uint16_t ethdev_port_id __rte_unused, 2180 const efx_mport_sel_t *entity_mportp __rte_unused, 2181 uint16_t switch_port_id, 2182 union sfc_mae_switch_port_data *port_datap, 2183 void *user_datap) 2184 { 2185 struct sfc_get_representors_ctx *ctx = user_datap; 2186 struct rte_eth_representor_range *range; 2187 int ret; 2188 int rc; 2189 2190 SFC_ASSERT(ctx != NULL); 2191 SFC_ASSERT(ctx->info != NULL); 2192 SFC_ASSERT(ctx->sa != NULL); 2193 2194 if (type != SFC_MAE_SWITCH_PORT_REPRESENTOR) { 2195 sfc_dbg(ctx->sa, "not a representor, skipping"); 2196 return; 2197 } 2198 if (ctx->info->nb_ranges >= ctx->info->nb_ranges_alloc) { 2199 sfc_dbg(ctx->sa, "info structure is full already"); 2200 return; 2201 } 2202 2203 range = &ctx->info->ranges[ctx->info->nb_ranges]; 2204 rc = sfc_mae_switch_controller_from_mapping(ctx->controllers, 2205 ctx->nb_controllers, 2206 port_datap->repr.intf, 2207 &range->controller); 2208 if (rc != 0) { 2209 sfc_err(ctx->sa, "invalid representor controller: %d", 2210 port_datap->repr.intf); 2211 range->controller = -1; 2212 } 2213 range->pf = port_datap->repr.pf; 2214 range->id_base = switch_port_id; 2215 range->id_end = switch_port_id; 2216 2217 if (port_datap->repr.vf != EFX_PCI_VF_INVALID) { 2218 range->type = RTE_ETH_REPRESENTOR_VF; 2219 range->vf = port_datap->repr.vf; 2220 ret = snprintf(range->name, RTE_DEV_NAME_MAX_LEN, 2221 "c%dpf%dvf%d", range->controller, range->pf, 2222 range->vf); 2223 } else { 2224 range->type = RTE_ETH_REPRESENTOR_PF; 2225 ret = snprintf(range->name, RTE_DEV_NAME_MAX_LEN, 2226 "c%dpf%d", range->controller, range->pf); 2227 } 2228 if (ret >= RTE_DEV_NAME_MAX_LEN) { 2229 sfc_err(ctx->sa, "representor name has been truncated: %s", 2230 range->name); 2231 } 2232 2233 ctx->info->nb_ranges++; 2234 } 2235 2236 static int 2237 sfc_representor_info_get(struct rte_eth_dev *dev, 2238 struct rte_eth_representor_info *info) 2239 { 2240 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2241 struct sfc_get_representors_ctx get_repr_ctx; 2242 const efx_nic_cfg_t *nic_cfg; 2243 uint16_t switch_domain_id; 2244 uint32_t nb_repr; 2245 int controller; 2246 int rc; 2247 2248 sfc_adapter_lock(sa); 2249 2250 if (sa->mae.status != SFC_MAE_STATUS_ADMIN) { 2251 sfc_adapter_unlock(sa); 2252 return -ENOTSUP; 2253 } 2254 2255 rc = sfc_process_mport_journal(sa); 2256 if (rc != 0) { 2257 sfc_adapter_unlock(sa); 2258 SFC_ASSERT(rc > 0); 2259 return -rc; 2260 } 2261 2262 switch_domain_id = sa->mae.switch_domain_id; 2263 2264 nb_repr = 0; 2265 rc = sfc_mae_switch_ports_iterate(switch_domain_id, 2266 sfc_count_representors_cb, 2267 &nb_repr); 2268 if (rc != 0) { 2269 sfc_adapter_unlock(sa); 2270 SFC_ASSERT(rc > 0); 2271 return -rc; 2272 } 2273 2274 if (info == NULL) { 2275 sfc_adapter_unlock(sa); 2276 return nb_repr; 2277 } 2278 2279 rc = sfc_mae_switch_domain_controllers(switch_domain_id, 2280 &get_repr_ctx.controllers, 2281 &get_repr_ctx.nb_controllers); 2282 if (rc != 0) { 2283 sfc_adapter_unlock(sa); 2284 SFC_ASSERT(rc > 0); 2285 return -rc; 2286 } 2287 2288 nic_cfg = efx_nic_cfg_get(sa->nic); 2289 2290 rc = sfc_mae_switch_domain_get_controller(switch_domain_id, 2291 nic_cfg->enc_intf, 2292 &controller); 2293 if (rc != 0) { 2294 sfc_err(sa, "invalid controller: %d", nic_cfg->enc_intf); 2295 controller = -1; 2296 } 2297 2298 info->controller = controller; 2299 info->pf = nic_cfg->enc_pf; 2300 2301 get_repr_ctx.info = info; 2302 get_repr_ctx.sa = sa; 2303 get_repr_ctx.switch_domain_id = switch_domain_id; 2304 rc = sfc_mae_switch_ports_iterate(switch_domain_id, 2305 sfc_get_representors_cb, 2306 &get_repr_ctx); 2307 if (rc != 0) { 2308 sfc_adapter_unlock(sa); 2309 SFC_ASSERT(rc > 0); 2310 return -rc; 2311 } 2312 2313 sfc_adapter_unlock(sa); 2314 return nb_repr; 2315 } 2316 2317 static int 2318 sfc_rx_metadata_negotiate(struct rte_eth_dev *dev, uint64_t *features) 2319 { 2320 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2321 uint64_t supported = 0; 2322 2323 sfc_adapter_lock(sa); 2324 2325 if ((sa->priv.dp_rx->features & SFC_DP_RX_FEAT_FLOW_FLAG) != 0) 2326 supported |= RTE_ETH_RX_METADATA_USER_FLAG; 2327 2328 if ((sa->priv.dp_rx->features & SFC_DP_RX_FEAT_FLOW_MARK) != 0) 2329 supported |= RTE_ETH_RX_METADATA_USER_MARK; 2330 2331 if (sfc_flow_tunnel_is_supported(sa)) 2332 supported |= RTE_ETH_RX_METADATA_TUNNEL_ID; 2333 2334 sa->negotiated_rx_metadata = supported & *features; 2335 *features = sa->negotiated_rx_metadata; 2336 2337 sfc_adapter_unlock(sa); 2338 2339 return 0; 2340 } 2341 2342 static const struct eth_dev_ops sfc_eth_dev_ops = { 2343 .dev_configure = sfc_dev_configure, 2344 .dev_start = sfc_dev_start, 2345 .dev_stop = sfc_dev_stop, 2346 .dev_set_link_up = sfc_dev_set_link_up, 2347 .dev_set_link_down = sfc_dev_set_link_down, 2348 .dev_close = sfc_dev_close, 2349 .promiscuous_enable = sfc_dev_promisc_enable, 2350 .promiscuous_disable = sfc_dev_promisc_disable, 2351 .allmulticast_enable = sfc_dev_allmulti_enable, 2352 .allmulticast_disable = sfc_dev_allmulti_disable, 2353 .link_update = sfc_dev_link_update, 2354 .stats_get = sfc_stats_get, 2355 .stats_reset = sfc_stats_reset, 2356 .xstats_get = sfc_xstats_get, 2357 .xstats_reset = sfc_stats_reset, 2358 .xstats_get_names = sfc_xstats_get_names, 2359 .dev_infos_get = sfc_dev_infos_get, 2360 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 2361 .mtu_set = sfc_dev_set_mtu, 2362 .rx_queue_start = sfc_rx_queue_start, 2363 .rx_queue_stop = sfc_rx_queue_stop, 2364 .tx_queue_start = sfc_tx_queue_start, 2365 .tx_queue_stop = sfc_tx_queue_stop, 2366 .rx_queue_setup = sfc_rx_queue_setup, 2367 .rx_queue_release = sfc_rx_queue_release, 2368 .rx_queue_intr_enable = sfc_rx_queue_intr_enable, 2369 .rx_queue_intr_disable = sfc_rx_queue_intr_disable, 2370 .tx_queue_setup = sfc_tx_queue_setup, 2371 .tx_queue_release = sfc_tx_queue_release, 2372 .flow_ctrl_get = sfc_flow_ctrl_get, 2373 .flow_ctrl_set = sfc_flow_ctrl_set, 2374 .mac_addr_set = sfc_mac_addr_set, 2375 .udp_tunnel_port_add = sfc_dev_udp_tunnel_port_add, 2376 .udp_tunnel_port_del = sfc_dev_udp_tunnel_port_del, 2377 .reta_update = sfc_dev_rss_reta_update, 2378 .reta_query = sfc_dev_rss_reta_query, 2379 .rss_hash_update = sfc_dev_rss_hash_update, 2380 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 2381 .flow_ops_get = sfc_dev_flow_ops_get, 2382 .set_mc_addr_list = sfc_set_mc_addr_list, 2383 .rxq_info_get = sfc_rx_queue_info_get, 2384 .txq_info_get = sfc_tx_queue_info_get, 2385 .fw_version_get = sfc_fw_version_get, 2386 .xstats_get_by_id = sfc_xstats_get_by_id, 2387 .xstats_get_names_by_id = sfc_xstats_get_names_by_id, 2388 .pool_ops_supported = sfc_pool_ops_supported, 2389 .representor_info_get = sfc_representor_info_get, 2390 .rx_metadata_negotiate = sfc_rx_metadata_negotiate, 2391 }; 2392 2393 struct sfc_ethdev_init_data { 2394 uint16_t nb_representors; 2395 }; 2396 2397 /** 2398 * Duplicate a string in potentially shared memory required for 2399 * multi-process support. 2400 * 2401 * strdup() allocates from process-local heap/memory. 2402 */ 2403 static char * 2404 sfc_strdup(const char *str) 2405 { 2406 size_t size; 2407 char *copy; 2408 2409 if (str == NULL) 2410 return NULL; 2411 2412 size = strlen(str) + 1; 2413 copy = rte_malloc(__func__, size, 0); 2414 if (copy != NULL) 2415 rte_memcpy(copy, str, size); 2416 2417 return copy; 2418 } 2419 2420 static int 2421 sfc_eth_dev_set_ops(struct rte_eth_dev *dev) 2422 { 2423 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2424 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2425 const struct sfc_dp_rx *dp_rx; 2426 const struct sfc_dp_tx *dp_tx; 2427 const efx_nic_cfg_t *encp; 2428 unsigned int avail_caps = 0; 2429 const char *rx_name = NULL; 2430 const char *tx_name = NULL; 2431 int rc; 2432 2433 switch (sa->family) { 2434 case EFX_FAMILY_HUNTINGTON: 2435 case EFX_FAMILY_MEDFORD: 2436 case EFX_FAMILY_MEDFORD2: 2437 avail_caps |= SFC_DP_HW_FW_CAP_EF10; 2438 avail_caps |= SFC_DP_HW_FW_CAP_RX_EFX; 2439 avail_caps |= SFC_DP_HW_FW_CAP_TX_EFX; 2440 break; 2441 case EFX_FAMILY_RIVERHEAD: 2442 avail_caps |= SFC_DP_HW_FW_CAP_EF100; 2443 break; 2444 default: 2445 break; 2446 } 2447 2448 encp = efx_nic_cfg_get(sa->nic); 2449 if (encp->enc_rx_es_super_buffer_supported) 2450 avail_caps |= SFC_DP_HW_FW_CAP_RX_ES_SUPER_BUFFER; 2451 2452 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH, 2453 sfc_kvarg_string_handler, &rx_name); 2454 if (rc != 0) 2455 goto fail_kvarg_rx_datapath; 2456 2457 if (rx_name != NULL) { 2458 dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name); 2459 if (dp_rx == NULL) { 2460 sfc_err(sa, "Rx datapath %s not found", rx_name); 2461 rc = ENOENT; 2462 goto fail_dp_rx; 2463 } 2464 if (!sfc_dp_match_hw_fw_caps(&dp_rx->dp, avail_caps)) { 2465 sfc_err(sa, 2466 "Insufficient Hw/FW capabilities to use Rx datapath %s", 2467 rx_name); 2468 rc = EINVAL; 2469 goto fail_dp_rx_caps; 2470 } 2471 } else { 2472 dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps); 2473 if (dp_rx == NULL) { 2474 sfc_err(sa, "Rx datapath by caps %#x not found", 2475 avail_caps); 2476 rc = ENOENT; 2477 goto fail_dp_rx; 2478 } 2479 } 2480 2481 sas->dp_rx_name = sfc_strdup(dp_rx->dp.name); 2482 if (sas->dp_rx_name == NULL) { 2483 rc = ENOMEM; 2484 goto fail_dp_rx_name; 2485 } 2486 2487 if (strcmp(dp_rx->dp.name, SFC_KVARG_DATAPATH_EF10_ESSB) == 0) { 2488 /* FLAG and MARK are always available from Rx prefix. */ 2489 sa->negotiated_rx_metadata |= RTE_ETH_RX_METADATA_USER_FLAG; 2490 sa->negotiated_rx_metadata |= RTE_ETH_RX_METADATA_USER_MARK; 2491 } 2492 2493 sfc_notice(sa, "use %s Rx datapath", sas->dp_rx_name); 2494 2495 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH, 2496 sfc_kvarg_string_handler, &tx_name); 2497 if (rc != 0) 2498 goto fail_kvarg_tx_datapath; 2499 2500 if (tx_name != NULL) { 2501 dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name); 2502 if (dp_tx == NULL) { 2503 sfc_err(sa, "Tx datapath %s not found", tx_name); 2504 rc = ENOENT; 2505 goto fail_dp_tx; 2506 } 2507 if (!sfc_dp_match_hw_fw_caps(&dp_tx->dp, avail_caps)) { 2508 sfc_err(sa, 2509 "Insufficient Hw/FW capabilities to use Tx datapath %s", 2510 tx_name); 2511 rc = EINVAL; 2512 goto fail_dp_tx_caps; 2513 } 2514 } else { 2515 dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps); 2516 if (dp_tx == NULL) { 2517 sfc_err(sa, "Tx datapath by caps %#x not found", 2518 avail_caps); 2519 rc = ENOENT; 2520 goto fail_dp_tx; 2521 } 2522 } 2523 2524 sas->dp_tx_name = sfc_strdup(dp_tx->dp.name); 2525 if (sas->dp_tx_name == NULL) { 2526 rc = ENOMEM; 2527 goto fail_dp_tx_name; 2528 } 2529 2530 sfc_notice(sa, "use %s Tx datapath", sas->dp_tx_name); 2531 2532 sa->priv.dp_rx = dp_rx; 2533 sa->priv.dp_tx = dp_tx; 2534 2535 dev->rx_pkt_burst = dp_rx->pkt_burst; 2536 dev->tx_pkt_prepare = dp_tx->pkt_prepare; 2537 dev->tx_pkt_burst = dp_tx->pkt_burst; 2538 2539 dev->rx_queue_count = sfc_rx_queue_count; 2540 dev->rx_descriptor_status = sfc_rx_descriptor_status; 2541 dev->tx_descriptor_status = sfc_tx_descriptor_status; 2542 dev->dev_ops = &sfc_eth_dev_ops; 2543 2544 return 0; 2545 2546 fail_dp_tx_name: 2547 fail_dp_tx_caps: 2548 fail_dp_tx: 2549 fail_kvarg_tx_datapath: 2550 rte_free(sas->dp_rx_name); 2551 sas->dp_rx_name = NULL; 2552 2553 fail_dp_rx_name: 2554 fail_dp_rx_caps: 2555 fail_dp_rx: 2556 fail_kvarg_rx_datapath: 2557 return rc; 2558 } 2559 2560 static void 2561 sfc_eth_dev_clear_ops(struct rte_eth_dev *dev) 2562 { 2563 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2564 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2565 2566 dev->dev_ops = NULL; 2567 dev->tx_pkt_prepare = NULL; 2568 dev->rx_pkt_burst = NULL; 2569 dev->tx_pkt_burst = NULL; 2570 2571 rte_free(sas->dp_tx_name); 2572 sas->dp_tx_name = NULL; 2573 sa->priv.dp_tx = NULL; 2574 2575 rte_free(sas->dp_rx_name); 2576 sas->dp_rx_name = NULL; 2577 sa->priv.dp_rx = NULL; 2578 } 2579 2580 static const struct eth_dev_ops sfc_eth_dev_secondary_ops = { 2581 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 2582 .reta_query = sfc_dev_rss_reta_query, 2583 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 2584 .rxq_info_get = sfc_rx_queue_info_get, 2585 .txq_info_get = sfc_tx_queue_info_get, 2586 }; 2587 2588 static int 2589 sfc_eth_dev_secondary_init(struct rte_eth_dev *dev, uint32_t logtype_main) 2590 { 2591 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2592 struct sfc_adapter_priv *sap; 2593 const struct sfc_dp_rx *dp_rx; 2594 const struct sfc_dp_tx *dp_tx; 2595 int rc; 2596 2597 /* 2598 * Allocate process private data from heap, since it should not 2599 * be located in shared memory allocated using rte_malloc() API. 2600 */ 2601 sap = calloc(1, sizeof(*sap)); 2602 if (sap == NULL) { 2603 rc = ENOMEM; 2604 goto fail_alloc_priv; 2605 } 2606 2607 sap->logtype_main = logtype_main; 2608 2609 dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, sas->dp_rx_name); 2610 if (dp_rx == NULL) { 2611 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2612 "cannot find %s Rx datapath", sas->dp_rx_name); 2613 rc = ENOENT; 2614 goto fail_dp_rx; 2615 } 2616 if (~dp_rx->features & SFC_DP_RX_FEAT_MULTI_PROCESS) { 2617 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2618 "%s Rx datapath does not support multi-process", 2619 sas->dp_rx_name); 2620 rc = EINVAL; 2621 goto fail_dp_rx_multi_process; 2622 } 2623 2624 dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, sas->dp_tx_name); 2625 if (dp_tx == NULL) { 2626 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2627 "cannot find %s Tx datapath", sas->dp_tx_name); 2628 rc = ENOENT; 2629 goto fail_dp_tx; 2630 } 2631 if (~dp_tx->features & SFC_DP_TX_FEAT_MULTI_PROCESS) { 2632 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2633 "%s Tx datapath does not support multi-process", 2634 sas->dp_tx_name); 2635 rc = EINVAL; 2636 goto fail_dp_tx_multi_process; 2637 } 2638 2639 sap->dp_rx = dp_rx; 2640 sap->dp_tx = dp_tx; 2641 2642 dev->process_private = sap; 2643 dev->rx_pkt_burst = dp_rx->pkt_burst; 2644 dev->tx_pkt_prepare = dp_tx->pkt_prepare; 2645 dev->tx_pkt_burst = dp_tx->pkt_burst; 2646 dev->rx_queue_count = sfc_rx_queue_count; 2647 dev->rx_descriptor_status = sfc_rx_descriptor_status; 2648 dev->tx_descriptor_status = sfc_tx_descriptor_status; 2649 dev->dev_ops = &sfc_eth_dev_secondary_ops; 2650 2651 return 0; 2652 2653 fail_dp_tx_multi_process: 2654 fail_dp_tx: 2655 fail_dp_rx_multi_process: 2656 fail_dp_rx: 2657 free(sap); 2658 2659 fail_alloc_priv: 2660 return rc; 2661 } 2662 2663 static void 2664 sfc_register_dp(void) 2665 { 2666 /* Register once */ 2667 if (TAILQ_EMPTY(&sfc_dp_head)) { 2668 /* Prefer EF10 datapath */ 2669 sfc_dp_register(&sfc_dp_head, &sfc_ef100_rx.dp); 2670 sfc_dp_register(&sfc_dp_head, &sfc_ef10_essb_rx.dp); 2671 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp); 2672 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); 2673 2674 sfc_dp_register(&sfc_dp_head, &sfc_ef100_tx.dp); 2675 sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp); 2676 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp); 2677 sfc_dp_register(&sfc_dp_head, &sfc_ef10_simple_tx.dp); 2678 } 2679 } 2680 2681 static int 2682 sfc_parse_switch_mode(struct sfc_adapter *sa, bool has_representors) 2683 { 2684 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 2685 const char *switch_mode = NULL; 2686 int rc; 2687 2688 sfc_log_init(sa, "entry"); 2689 2690 rc = sfc_kvargs_process(sa, SFC_KVARG_SWITCH_MODE, 2691 sfc_kvarg_string_handler, &switch_mode); 2692 if (rc != 0) 2693 goto fail_kvargs; 2694 2695 if (switch_mode == NULL) { 2696 sa->switchdev = encp->enc_mae_admin && 2697 (!encp->enc_datapath_cap_evb || 2698 has_representors); 2699 } else if (strcasecmp(switch_mode, SFC_KVARG_SWITCH_MODE_LEGACY) == 0) { 2700 sa->switchdev = false; 2701 } else if (strcasecmp(switch_mode, 2702 SFC_KVARG_SWITCH_MODE_SWITCHDEV) == 0) { 2703 sa->switchdev = true; 2704 } else { 2705 sfc_err(sa, "invalid switch mode device argument '%s'", 2706 switch_mode); 2707 rc = EINVAL; 2708 goto fail_mode; 2709 } 2710 2711 sfc_log_init(sa, "done"); 2712 2713 return 0; 2714 2715 fail_mode: 2716 fail_kvargs: 2717 sfc_log_init(sa, "failed: %s", rte_strerror(rc)); 2718 2719 return rc; 2720 } 2721 2722 static int 2723 sfc_eth_dev_init(struct rte_eth_dev *dev, void *init_params) 2724 { 2725 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2726 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 2727 struct sfc_ethdev_init_data *init_data = init_params; 2728 uint32_t logtype_main; 2729 struct sfc_adapter *sa; 2730 int rc; 2731 const efx_nic_cfg_t *encp; 2732 const struct rte_ether_addr *from; 2733 int ret; 2734 2735 if (sfc_efx_dev_class_get(pci_dev->device.devargs) != 2736 SFC_EFX_DEV_CLASS_NET) { 2737 SFC_GENERIC_LOG(DEBUG, 2738 "Incompatible device class: skip probing, should be probed by other sfc driver."); 2739 return 1; 2740 } 2741 2742 rc = sfc_dp_mport_register(); 2743 if (rc != 0) 2744 return rc; 2745 2746 sfc_register_dp(); 2747 2748 logtype_main = sfc_register_logtype(&pci_dev->addr, 2749 SFC_LOGTYPE_MAIN_STR, 2750 RTE_LOG_NOTICE); 2751 2752 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2753 return -sfc_eth_dev_secondary_init(dev, logtype_main); 2754 2755 /* Required for logging */ 2756 ret = snprintf(sas->log_prefix, sizeof(sas->log_prefix), 2757 "PMD: sfc_efx " PCI_PRI_FMT " #%" PRIu16 ": ", 2758 pci_dev->addr.domain, pci_dev->addr.bus, 2759 pci_dev->addr.devid, pci_dev->addr.function, 2760 dev->data->port_id); 2761 if (ret < 0 || ret >= (int)sizeof(sas->log_prefix)) { 2762 SFC_GENERIC_LOG(ERR, 2763 "reserved log prefix is too short for " PCI_PRI_FMT, 2764 pci_dev->addr.domain, pci_dev->addr.bus, 2765 pci_dev->addr.devid, pci_dev->addr.function); 2766 return -EINVAL; 2767 } 2768 sas->pci_addr = pci_dev->addr; 2769 sas->port_id = dev->data->port_id; 2770 2771 /* 2772 * Allocate process private data from heap, since it should not 2773 * be located in shared memory allocated using rte_malloc() API. 2774 */ 2775 sa = calloc(1, sizeof(*sa)); 2776 if (sa == NULL) { 2777 rc = ENOMEM; 2778 goto fail_alloc_sa; 2779 } 2780 2781 dev->process_private = sa; 2782 2783 /* Required for logging */ 2784 sa->priv.shared = sas; 2785 sa->priv.logtype_main = logtype_main; 2786 2787 sa->eth_dev = dev; 2788 2789 /* Copy PCI device info to the dev->data */ 2790 rte_eth_copy_pci_info(dev, pci_dev); 2791 dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 2792 2793 rc = sfc_kvargs_parse(sa); 2794 if (rc != 0) 2795 goto fail_kvargs_parse; 2796 2797 sfc_log_init(sa, "entry"); 2798 2799 dev->data->mac_addrs = rte_zmalloc("sfc", RTE_ETHER_ADDR_LEN, 0); 2800 if (dev->data->mac_addrs == NULL) { 2801 rc = ENOMEM; 2802 goto fail_mac_addrs; 2803 } 2804 2805 sfc_adapter_lock_init(sa); 2806 sfc_adapter_lock(sa); 2807 2808 sfc_log_init(sa, "probing"); 2809 rc = sfc_probe(sa); 2810 if (rc != 0) 2811 goto fail_probe; 2812 2813 /* 2814 * Selecting a default switch mode requires the NIC to be probed and 2815 * to have its capabilities filled in. 2816 */ 2817 rc = sfc_parse_switch_mode(sa, init_data->nb_representors > 0); 2818 if (rc != 0) 2819 goto fail_switch_mode; 2820 2821 sfc_log_init(sa, "set device ops"); 2822 rc = sfc_eth_dev_set_ops(dev); 2823 if (rc != 0) 2824 goto fail_set_ops; 2825 2826 sfc_log_init(sa, "attaching"); 2827 rc = sfc_attach(sa); 2828 if (rc != 0) 2829 goto fail_attach; 2830 2831 if (sa->switchdev && sa->mae.status != SFC_MAE_STATUS_ADMIN) { 2832 sfc_err(sa, 2833 "failed to enable switchdev mode without admin MAE privilege"); 2834 rc = ENOTSUP; 2835 goto fail_switchdev_no_mae; 2836 } 2837 2838 encp = efx_nic_cfg_get(sa->nic); 2839 2840 /* 2841 * The arguments are really reverse order in comparison to 2842 * Linux kernel. Copy from NIC config to Ethernet device data. 2843 */ 2844 from = (const struct rte_ether_addr *)(encp->enc_mac_addr); 2845 rte_ether_addr_copy(from, &dev->data->mac_addrs[0]); 2846 2847 /* 2848 * Setup the NIC DMA mapping handler. All internal mempools 2849 * MUST be created on attach before this point, and the 2850 * adapter MUST NOT create mempools with the adapter lock 2851 * held after this point. 2852 */ 2853 rc = sfc_nic_dma_attach(sa); 2854 if (rc != 0) 2855 goto fail_nic_dma_attach; 2856 2857 sfc_adapter_unlock(sa); 2858 2859 sfc_log_init(sa, "done"); 2860 return 0; 2861 2862 fail_nic_dma_attach: 2863 fail_switchdev_no_mae: 2864 sfc_detach(sa); 2865 2866 fail_attach: 2867 sfc_eth_dev_clear_ops(dev); 2868 2869 fail_set_ops: 2870 fail_switch_mode: 2871 sfc_unprobe(sa); 2872 2873 fail_probe: 2874 sfc_adapter_unlock(sa); 2875 sfc_adapter_lock_fini(sa); 2876 rte_free(dev->data->mac_addrs); 2877 dev->data->mac_addrs = NULL; 2878 2879 fail_mac_addrs: 2880 sfc_kvargs_cleanup(sa); 2881 2882 fail_kvargs_parse: 2883 sfc_log_init(sa, "failed %d", rc); 2884 dev->process_private = NULL; 2885 free(sa); 2886 2887 fail_alloc_sa: 2888 SFC_ASSERT(rc > 0); 2889 return -rc; 2890 } 2891 2892 static int 2893 sfc_eth_dev_uninit(struct rte_eth_dev *dev) 2894 { 2895 sfc_dev_close(dev); 2896 2897 return 0; 2898 } 2899 2900 static const struct rte_pci_id pci_id_sfc_efx_map[] = { 2901 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, 2902 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, 2903 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, 2904 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, 2905 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, 2906 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, 2907 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2) }, 2908 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2_VF) }, 2909 { RTE_PCI_DEVICE(EFX_PCI_VENID_XILINX, EFX_PCI_DEVID_RIVERHEAD) }, 2910 { RTE_PCI_DEVICE(EFX_PCI_VENID_XILINX, EFX_PCI_DEVID_RIVERHEAD_VF) }, 2911 { .vendor_id = 0 /* sentinel */ } 2912 }; 2913 2914 static int 2915 sfc_parse_rte_devargs(const char *args, struct rte_eth_devargs *devargs) 2916 { 2917 struct rte_eth_devargs eth_da = { .nb_representor_ports = 0 }; 2918 int rc; 2919 2920 if (args != NULL) { 2921 rc = rte_eth_devargs_parse(args, ð_da); 2922 if (rc != 0) { 2923 SFC_GENERIC_LOG(ERR, 2924 "Failed to parse generic devargs '%s'", 2925 args); 2926 return rc; 2927 } 2928 } 2929 2930 *devargs = eth_da; 2931 2932 return 0; 2933 } 2934 2935 static int 2936 sfc_eth_dev_find_or_create(struct rte_pci_device *pci_dev, 2937 struct sfc_ethdev_init_data *init_data, 2938 struct rte_eth_dev **devp, 2939 bool *dev_created) 2940 { 2941 struct rte_eth_dev *dev; 2942 bool created = false; 2943 int rc; 2944 2945 dev = rte_eth_dev_allocated(pci_dev->device.name); 2946 if (dev == NULL) { 2947 rc = rte_eth_dev_create(&pci_dev->device, pci_dev->device.name, 2948 sizeof(struct sfc_adapter_shared), 2949 eth_dev_pci_specific_init, pci_dev, 2950 sfc_eth_dev_init, init_data); 2951 if (rc != 0) { 2952 SFC_GENERIC_LOG(ERR, "Failed to create sfc ethdev '%s'", 2953 pci_dev->device.name); 2954 return rc; 2955 } 2956 2957 created = true; 2958 2959 dev = rte_eth_dev_allocated(pci_dev->device.name); 2960 if (dev == NULL) { 2961 SFC_GENERIC_LOG(ERR, 2962 "Failed to find allocated sfc ethdev '%s'", 2963 pci_dev->device.name); 2964 return -ENODEV; 2965 } 2966 } 2967 2968 *devp = dev; 2969 *dev_created = created; 2970 2971 return 0; 2972 } 2973 2974 static int 2975 sfc_eth_dev_create_repr(struct sfc_adapter *sa, 2976 efx_pcie_interface_t controller, 2977 uint16_t port, 2978 uint16_t repr_port, 2979 enum rte_eth_representor_type type) 2980 { 2981 struct sfc_repr_entity_info entity; 2982 efx_mport_sel_t mport_sel; 2983 int rc; 2984 2985 switch (type) { 2986 case RTE_ETH_REPRESENTOR_NONE: 2987 return 0; 2988 case RTE_ETH_REPRESENTOR_VF: 2989 case RTE_ETH_REPRESENTOR_PF: 2990 break; 2991 case RTE_ETH_REPRESENTOR_SF: 2992 sfc_err(sa, "SF representors are not supported"); 2993 return ENOTSUP; 2994 default: 2995 sfc_err(sa, "unknown representor type: %d", type); 2996 return ENOTSUP; 2997 } 2998 2999 rc = efx_mae_mport_by_pcie_mh_function(controller, 3000 port, 3001 repr_port, 3002 &mport_sel); 3003 if (rc != 0) { 3004 sfc_err(sa, 3005 "failed to get m-port selector for controller %u port %u repr_port %u: %s", 3006 controller, port, repr_port, rte_strerror(-rc)); 3007 return rc; 3008 } 3009 3010 memset(&entity, 0, sizeof(entity)); 3011 entity.type = type; 3012 entity.intf = controller; 3013 entity.pf = port; 3014 entity.vf = repr_port; 3015 3016 rc = sfc_repr_create(sa->eth_dev, &entity, sa->mae.switch_domain_id, 3017 &mport_sel); 3018 if (rc != 0) { 3019 sfc_err(sa, 3020 "failed to create representor for controller %u port %u repr_port %u: %s", 3021 controller, port, repr_port, rte_strerror(-rc)); 3022 return rc; 3023 } 3024 3025 return 0; 3026 } 3027 3028 static int 3029 sfc_eth_dev_create_repr_port(struct sfc_adapter *sa, 3030 const struct rte_eth_devargs *eth_da, 3031 efx_pcie_interface_t controller, 3032 uint16_t port) 3033 { 3034 int first_error = 0; 3035 uint16_t i; 3036 int rc; 3037 3038 if (eth_da->type == RTE_ETH_REPRESENTOR_PF) { 3039 return sfc_eth_dev_create_repr(sa, controller, port, 3040 EFX_PCI_VF_INVALID, 3041 eth_da->type); 3042 } 3043 3044 for (i = 0; i < eth_da->nb_representor_ports; i++) { 3045 rc = sfc_eth_dev_create_repr(sa, controller, port, 3046 eth_da->representor_ports[i], 3047 eth_da->type); 3048 if (rc != 0 && first_error == 0) 3049 first_error = rc; 3050 } 3051 3052 return first_error; 3053 } 3054 3055 static int 3056 sfc_eth_dev_create_repr_controller(struct sfc_adapter *sa, 3057 const struct rte_eth_devargs *eth_da, 3058 efx_pcie_interface_t controller) 3059 { 3060 const efx_nic_cfg_t *encp; 3061 int first_error = 0; 3062 uint16_t default_port; 3063 uint16_t i; 3064 int rc; 3065 3066 if (eth_da->nb_ports == 0) { 3067 encp = efx_nic_cfg_get(sa->nic); 3068 default_port = encp->enc_intf == controller ? encp->enc_pf : 0; 3069 return sfc_eth_dev_create_repr_port(sa, eth_da, controller, 3070 default_port); 3071 } 3072 3073 for (i = 0; i < eth_da->nb_ports; i++) { 3074 rc = sfc_eth_dev_create_repr_port(sa, eth_da, controller, 3075 eth_da->ports[i]); 3076 if (rc != 0 && first_error == 0) 3077 first_error = rc; 3078 } 3079 3080 return first_error; 3081 } 3082 3083 static int 3084 sfc_eth_dev_create_representors(struct rte_eth_dev *dev, 3085 const struct rte_eth_devargs *eth_da) 3086 { 3087 efx_pcie_interface_t intf; 3088 const efx_nic_cfg_t *encp; 3089 struct sfc_adapter *sa; 3090 uint16_t switch_domain_id; 3091 uint16_t i; 3092 int rc; 3093 3094 sa = sfc_adapter_by_eth_dev(dev); 3095 switch_domain_id = sa->mae.switch_domain_id; 3096 3097 switch (eth_da->type) { 3098 case RTE_ETH_REPRESENTOR_NONE: 3099 return 0; 3100 case RTE_ETH_REPRESENTOR_PF: 3101 case RTE_ETH_REPRESENTOR_VF: 3102 break; 3103 case RTE_ETH_REPRESENTOR_SF: 3104 sfc_err(sa, "SF representors are not supported"); 3105 return -ENOTSUP; 3106 default: 3107 sfc_err(sa, "unknown representor type: %d", 3108 eth_da->type); 3109 return -ENOTSUP; 3110 } 3111 3112 if (!sa->switchdev) { 3113 sfc_err(sa, "cannot create representors in non-switchdev mode"); 3114 return -EINVAL; 3115 } 3116 3117 if (!sfc_repr_available(sfc_sa2shared(sa))) { 3118 sfc_err(sa, "cannot create representors: unsupported"); 3119 3120 return -ENOTSUP; 3121 } 3122 3123 /* 3124 * This is needed to construct the DPDK controller -> EFX interface 3125 * mapping. 3126 */ 3127 sfc_adapter_lock(sa); 3128 rc = sfc_process_mport_journal(sa); 3129 sfc_adapter_unlock(sa); 3130 if (rc != 0) { 3131 SFC_ASSERT(rc > 0); 3132 return -rc; 3133 } 3134 3135 if (eth_da->nb_mh_controllers > 0) { 3136 for (i = 0; i < eth_da->nb_mh_controllers; i++) { 3137 rc = sfc_mae_switch_domain_get_intf(switch_domain_id, 3138 eth_da->mh_controllers[i], 3139 &intf); 3140 if (rc != 0) { 3141 sfc_err(sa, "failed to get representor"); 3142 continue; 3143 } 3144 sfc_eth_dev_create_repr_controller(sa, eth_da, intf); 3145 } 3146 } else { 3147 encp = efx_nic_cfg_get(sa->nic); 3148 sfc_eth_dev_create_repr_controller(sa, eth_da, encp->enc_intf); 3149 } 3150 3151 return 0; 3152 } 3153 3154 static int sfc_eth_dev_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 3155 struct rte_pci_device *pci_dev) 3156 { 3157 struct sfc_ethdev_init_data init_data; 3158 struct rte_eth_devargs eth_da; 3159 struct rte_eth_dev *dev; 3160 bool dev_created; 3161 int rc; 3162 3163 if (pci_dev->device.devargs != NULL) { 3164 rc = sfc_parse_rte_devargs(pci_dev->device.devargs->args, 3165 ð_da); 3166 if (rc != 0) 3167 return rc; 3168 } else { 3169 memset(ð_da, 0, sizeof(eth_da)); 3170 } 3171 3172 /* If no VF representors specified, check for PF ones */ 3173 if (eth_da.nb_representor_ports > 0) 3174 init_data.nb_representors = eth_da.nb_representor_ports; 3175 else 3176 init_data.nb_representors = eth_da.nb_ports; 3177 3178 if (init_data.nb_representors > 0 && 3179 rte_eal_process_type() != RTE_PROC_PRIMARY) { 3180 SFC_GENERIC_LOG(ERR, 3181 "Create representors from secondary process not supported, dev '%s'", 3182 pci_dev->device.name); 3183 return -ENOTSUP; 3184 } 3185 3186 /* 3187 * Driver supports RTE_PCI_DRV_PROBE_AGAIN. Hence create device only 3188 * if it does not already exist. Re-probing an existing device is 3189 * expected to allow additional representors to be configured. 3190 */ 3191 rc = sfc_eth_dev_find_or_create(pci_dev, &init_data, &dev, 3192 &dev_created); 3193 if (rc != 0) 3194 return rc; 3195 3196 rc = sfc_eth_dev_create_representors(dev, ð_da); 3197 if (rc != 0) { 3198 if (dev_created) 3199 (void)rte_eth_dev_destroy(dev, sfc_eth_dev_uninit); 3200 3201 return rc; 3202 } 3203 3204 return 0; 3205 } 3206 3207 static int sfc_eth_dev_pci_remove(struct rte_pci_device *pci_dev) 3208 { 3209 return rte_eth_dev_pci_generic_remove(pci_dev, sfc_eth_dev_uninit); 3210 } 3211 3212 static struct rte_pci_driver sfc_efx_pmd = { 3213 .id_table = pci_id_sfc_efx_map, 3214 .drv_flags = 3215 RTE_PCI_DRV_INTR_LSC | 3216 RTE_PCI_DRV_NEED_MAPPING | 3217 RTE_PCI_DRV_PROBE_AGAIN, 3218 .probe = sfc_eth_dev_pci_probe, 3219 .remove = sfc_eth_dev_pci_remove, 3220 }; 3221 3222 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd); 3223 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); 3224 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio-pci"); 3225 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, 3226 SFC_KVARG_SWITCH_MODE "=" SFC_KVARG_VALUES_SWITCH_MODE " " 3227 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " " 3228 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " " 3229 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " 3230 SFC_KVARG_FW_VARIANT "=" SFC_KVARG_VALUES_FW_VARIANT " " 3231 SFC_KVARG_RXD_WAIT_TIMEOUT_NS "=<long> " 3232 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long>"); 3233 3234 RTE_INIT(sfc_driver_register_logtype) 3235 { 3236 int ret; 3237 3238 ret = rte_log_register_type_and_pick_level(SFC_LOGTYPE_PREFIX "driver", 3239 RTE_LOG_NOTICE); 3240 sfc_logtype_driver = (ret < 0) ? RTE_LOGTYPE_PMD : ret; 3241 } 3242