1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright(c) 2019-2021 Xilinx, Inc. 4 * Copyright(c) 2016-2019 Solarflare Communications Inc. 5 * 6 * This software was jointly developed between OKTET Labs (under contract 7 * for Solarflare) and Solarflare Communications, Inc. 8 */ 9 10 #include <rte_dev.h> 11 #include <ethdev_driver.h> 12 #include <ethdev_pci.h> 13 #include <rte_pci.h> 14 #include <rte_bus_pci.h> 15 #include <rte_errno.h> 16 #include <rte_string_fns.h> 17 #include <rte_ether.h> 18 19 #include "efx.h" 20 21 #include "sfc.h" 22 #include "sfc_debug.h" 23 #include "sfc_log.h" 24 #include "sfc_kvargs.h" 25 #include "sfc_ev.h" 26 #include "sfc_rx.h" 27 #include "sfc_tx.h" 28 #include "sfc_flow.h" 29 #include "sfc_flow_tunnel.h" 30 #include "sfc_dp.h" 31 #include "sfc_dp_rx.h" 32 #include "sfc_repr.h" 33 #include "sfc_sw_stats.h" 34 #include "sfc_switch.h" 35 36 #define SFC_XSTAT_ID_INVALID_VAL UINT64_MAX 37 #define SFC_XSTAT_ID_INVALID_NAME '\0' 38 39 uint32_t sfc_logtype_driver; 40 41 static struct sfc_dp_list sfc_dp_head = 42 TAILQ_HEAD_INITIALIZER(sfc_dp_head); 43 44 45 static void sfc_eth_dev_clear_ops(struct rte_eth_dev *dev); 46 47 48 static int 49 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) 50 { 51 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 52 efx_nic_fw_info_t enfi; 53 int ret; 54 int rc; 55 56 rc = efx_nic_get_fw_version(sa->nic, &enfi); 57 if (rc != 0) 58 return -rc; 59 60 ret = snprintf(fw_version, fw_size, 61 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16, 62 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1], 63 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]); 64 if (ret < 0) 65 return ret; 66 67 if (enfi.enfi_dpcpu_fw_ids_valid) { 68 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret); 69 int ret_extra; 70 71 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset, 72 fw_size - dpcpu_fw_ids_offset, 73 " rx%" PRIx16 " tx%" PRIx16, 74 enfi.enfi_rx_dpcpu_fw_id, 75 enfi.enfi_tx_dpcpu_fw_id); 76 if (ret_extra < 0) 77 return ret_extra; 78 79 ret += ret_extra; 80 } 81 82 if (fw_size < (size_t)(++ret)) 83 return ret; 84 else 85 return 0; 86 } 87 88 static int 89 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 90 { 91 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 92 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 93 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 94 struct sfc_rss *rss = &sas->rss; 95 struct sfc_mae *mae = &sa->mae; 96 uint64_t txq_offloads_def = 0; 97 98 sfc_log_init(sa, "entry"); 99 100 dev_info->min_mtu = RTE_ETHER_MIN_MTU; 101 dev_info->max_mtu = EFX_MAC_SDU_MAX; 102 103 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; 104 105 dev_info->max_vfs = sa->sriov.num_vfs; 106 107 /* Autonegotiation may be disabled */ 108 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 109 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_1000FDX)) 110 dev_info->speed_capa |= ETH_LINK_SPEED_1G; 111 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_10000FDX)) 112 dev_info->speed_capa |= ETH_LINK_SPEED_10G; 113 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_25000FDX)) 114 dev_info->speed_capa |= ETH_LINK_SPEED_25G; 115 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_40000FDX)) 116 dev_info->speed_capa |= ETH_LINK_SPEED_40G; 117 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_50000FDX)) 118 dev_info->speed_capa |= ETH_LINK_SPEED_50G; 119 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_100000FDX)) 120 dev_info->speed_capa |= ETH_LINK_SPEED_100G; 121 122 dev_info->max_rx_queues = sa->rxq_max; 123 dev_info->max_tx_queues = sa->txq_max; 124 125 /* By default packets are dropped if no descriptors are available */ 126 dev_info->default_rxconf.rx_drop_en = 1; 127 128 dev_info->rx_queue_offload_capa = sfc_rx_get_queue_offload_caps(sa); 129 130 /* 131 * rx_offload_capa includes both device and queue offloads since 132 * the latter may be requested on a per device basis which makes 133 * sense when some offloads are needed to be set on all queues. 134 */ 135 dev_info->rx_offload_capa = sfc_rx_get_dev_offload_caps(sa) | 136 dev_info->rx_queue_offload_capa; 137 138 dev_info->tx_queue_offload_capa = sfc_tx_get_queue_offload_caps(sa); 139 140 /* 141 * tx_offload_capa includes both device and queue offloads since 142 * the latter may be requested on a per device basis which makes 143 * sense when some offloads are needed to be set on all queues. 144 */ 145 dev_info->tx_offload_capa = sfc_tx_get_dev_offload_caps(sa) | 146 dev_info->tx_queue_offload_capa; 147 148 if (dev_info->tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE) 149 txq_offloads_def |= DEV_TX_OFFLOAD_MBUF_FAST_FREE; 150 151 dev_info->default_txconf.offloads |= txq_offloads_def; 152 153 if (rss->context_type != EFX_RX_SCALE_UNAVAILABLE) { 154 uint64_t rte_hf = 0; 155 unsigned int i; 156 157 for (i = 0; i < rss->hf_map_nb_entries; ++i) 158 rte_hf |= rss->hf_map[i].rte; 159 160 dev_info->reta_size = EFX_RSS_TBL_SIZE; 161 dev_info->hash_key_size = EFX_RSS_KEY_SIZE; 162 dev_info->flow_type_rss_offloads = rte_hf; 163 } 164 165 /* Initialize to hardware limits */ 166 dev_info->rx_desc_lim.nb_max = sa->rxq_max_entries; 167 dev_info->rx_desc_lim.nb_min = sa->rxq_min_entries; 168 /* The RXQ hardware requires that the descriptor count is a power 169 * of 2, but rx_desc_lim cannot properly describe that constraint. 170 */ 171 dev_info->rx_desc_lim.nb_align = sa->rxq_min_entries; 172 173 /* Initialize to hardware limits */ 174 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; 175 dev_info->tx_desc_lim.nb_min = sa->txq_min_entries; 176 /* 177 * The TXQ hardware requires that the descriptor count is a power 178 * of 2, but tx_desc_lim cannot properly describe that constraint 179 */ 180 dev_info->tx_desc_lim.nb_align = sa->txq_min_entries; 181 182 if (sap->dp_rx->get_dev_info != NULL) 183 sap->dp_rx->get_dev_info(dev_info); 184 if (sap->dp_tx->get_dev_info != NULL) 185 sap->dp_tx->get_dev_info(dev_info); 186 187 dev_info->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP | 188 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP; 189 190 if (mae->status == SFC_MAE_STATUS_SUPPORTED) { 191 dev_info->switch_info.name = dev->device->driver->name; 192 dev_info->switch_info.domain_id = mae->switch_domain_id; 193 dev_info->switch_info.port_id = mae->switch_port_id; 194 } 195 196 return 0; 197 } 198 199 static const uint32_t * 200 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) 201 { 202 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 203 204 return sap->dp_rx->supported_ptypes_get(sap->shared->tunnel_encaps); 205 } 206 207 static int 208 sfc_dev_configure(struct rte_eth_dev *dev) 209 { 210 struct rte_eth_dev_data *dev_data = dev->data; 211 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 212 int rc; 213 214 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u", 215 dev_data->nb_rx_queues, dev_data->nb_tx_queues); 216 217 sfc_adapter_lock(sa); 218 switch (sa->state) { 219 case SFC_ETHDEV_CONFIGURED: 220 /* FALLTHROUGH */ 221 case SFC_ETHDEV_INITIALIZED: 222 rc = sfc_configure(sa); 223 break; 224 default: 225 sfc_err(sa, "unexpected adapter state %u to configure", 226 sa->state); 227 rc = EINVAL; 228 break; 229 } 230 sfc_adapter_unlock(sa); 231 232 sfc_log_init(sa, "done %d", rc); 233 SFC_ASSERT(rc >= 0); 234 return -rc; 235 } 236 237 static int 238 sfc_dev_start(struct rte_eth_dev *dev) 239 { 240 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 241 int rc; 242 243 sfc_log_init(sa, "entry"); 244 245 sfc_adapter_lock(sa); 246 rc = sfc_start(sa); 247 sfc_adapter_unlock(sa); 248 249 sfc_log_init(sa, "done %d", rc); 250 SFC_ASSERT(rc >= 0); 251 return -rc; 252 } 253 254 static int 255 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 256 { 257 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 258 struct rte_eth_link current_link; 259 int ret; 260 261 sfc_log_init(sa, "entry"); 262 263 if (sa->state != SFC_ETHDEV_STARTED) { 264 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link); 265 } else if (wait_to_complete) { 266 efx_link_mode_t link_mode; 267 268 if (efx_port_poll(sa->nic, &link_mode) != 0) 269 link_mode = EFX_LINK_UNKNOWN; 270 sfc_port_link_mode_to_info(link_mode, ¤t_link); 271 272 } else { 273 sfc_ev_mgmt_qpoll(sa); 274 rte_eth_linkstatus_get(dev, ¤t_link); 275 } 276 277 ret = rte_eth_linkstatus_set(dev, ¤t_link); 278 if (ret == 0) 279 sfc_notice(sa, "Link status is %s", 280 current_link.link_status ? "UP" : "DOWN"); 281 282 return ret; 283 } 284 285 static int 286 sfc_dev_stop(struct rte_eth_dev *dev) 287 { 288 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 289 290 sfc_log_init(sa, "entry"); 291 292 sfc_adapter_lock(sa); 293 sfc_stop(sa); 294 sfc_adapter_unlock(sa); 295 296 sfc_log_init(sa, "done"); 297 298 return 0; 299 } 300 301 static int 302 sfc_dev_set_link_up(struct rte_eth_dev *dev) 303 { 304 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 305 int rc; 306 307 sfc_log_init(sa, "entry"); 308 309 sfc_adapter_lock(sa); 310 rc = sfc_start(sa); 311 sfc_adapter_unlock(sa); 312 313 SFC_ASSERT(rc >= 0); 314 return -rc; 315 } 316 317 static int 318 sfc_dev_set_link_down(struct rte_eth_dev *dev) 319 { 320 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 321 322 sfc_log_init(sa, "entry"); 323 324 sfc_adapter_lock(sa); 325 sfc_stop(sa); 326 sfc_adapter_unlock(sa); 327 328 return 0; 329 } 330 331 static void 332 sfc_eth_dev_secondary_clear_ops(struct rte_eth_dev *dev) 333 { 334 free(dev->process_private); 335 rte_eth_dev_release_port(dev); 336 } 337 338 static int 339 sfc_dev_close(struct rte_eth_dev *dev) 340 { 341 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 342 343 sfc_log_init(sa, "entry"); 344 345 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 346 sfc_eth_dev_secondary_clear_ops(dev); 347 return 0; 348 } 349 350 sfc_pre_detach(sa); 351 352 sfc_adapter_lock(sa); 353 switch (sa->state) { 354 case SFC_ETHDEV_STARTED: 355 sfc_stop(sa); 356 SFC_ASSERT(sa->state == SFC_ETHDEV_CONFIGURED); 357 /* FALLTHROUGH */ 358 case SFC_ETHDEV_CONFIGURED: 359 sfc_close(sa); 360 SFC_ASSERT(sa->state == SFC_ETHDEV_INITIALIZED); 361 /* FALLTHROUGH */ 362 case SFC_ETHDEV_INITIALIZED: 363 break; 364 default: 365 sfc_err(sa, "unexpected adapter state %u on close", sa->state); 366 break; 367 } 368 369 /* 370 * Cleanup all resources. 371 * Rollback primary process sfc_eth_dev_init() below. 372 */ 373 374 sfc_eth_dev_clear_ops(dev); 375 376 sfc_detach(sa); 377 sfc_unprobe(sa); 378 379 sfc_kvargs_cleanup(sa); 380 381 sfc_adapter_unlock(sa); 382 sfc_adapter_lock_fini(sa); 383 384 sfc_log_init(sa, "done"); 385 386 /* Required for logging, so cleanup last */ 387 sa->eth_dev = NULL; 388 389 free(sa); 390 391 return 0; 392 } 393 394 static int 395 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode, 396 boolean_t enabled) 397 { 398 struct sfc_port *port; 399 boolean_t *toggle; 400 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 401 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI); 402 const char *desc = (allmulti) ? "all-multi" : "promiscuous"; 403 int rc = 0; 404 405 sfc_adapter_lock(sa); 406 407 port = &sa->port; 408 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc); 409 410 if (*toggle != enabled) { 411 *toggle = enabled; 412 413 if (sfc_sa2shared(sa)->isolated) { 414 sfc_warn(sa, "isolated mode is active on the port"); 415 sfc_warn(sa, "the change is to be applied on the next " 416 "start provided that isolated mode is " 417 "disabled prior the next start"); 418 } else if ((sa->state == SFC_ETHDEV_STARTED) && 419 ((rc = sfc_set_rx_mode(sa)) != 0)) { 420 *toggle = !(enabled); 421 sfc_warn(sa, "Failed to %s %s mode, rc = %d", 422 ((enabled) ? "enable" : "disable"), desc, rc); 423 424 /* 425 * For promiscuous and all-multicast filters a 426 * permission failure should be reported as an 427 * unsupported filter. 428 */ 429 if (rc == EPERM) 430 rc = ENOTSUP; 431 } 432 } 433 434 sfc_adapter_unlock(sa); 435 return rc; 436 } 437 438 static int 439 sfc_dev_promisc_enable(struct rte_eth_dev *dev) 440 { 441 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE); 442 443 SFC_ASSERT(rc >= 0); 444 return -rc; 445 } 446 447 static int 448 sfc_dev_promisc_disable(struct rte_eth_dev *dev) 449 { 450 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE); 451 452 SFC_ASSERT(rc >= 0); 453 return -rc; 454 } 455 456 static int 457 sfc_dev_allmulti_enable(struct rte_eth_dev *dev) 458 { 459 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE); 460 461 SFC_ASSERT(rc >= 0); 462 return -rc; 463 } 464 465 static int 466 sfc_dev_allmulti_disable(struct rte_eth_dev *dev) 467 { 468 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE); 469 470 SFC_ASSERT(rc >= 0); 471 return -rc; 472 } 473 474 static int 475 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t ethdev_qid, 476 uint16_t nb_rx_desc, unsigned int socket_id, 477 const struct rte_eth_rxconf *rx_conf, 478 struct rte_mempool *mb_pool) 479 { 480 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 481 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 482 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 483 struct sfc_rxq_info *rxq_info; 484 sfc_sw_index_t sw_index; 485 int rc; 486 487 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u", 488 ethdev_qid, nb_rx_desc, socket_id); 489 490 sfc_adapter_lock(sa); 491 492 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 493 rc = sfc_rx_qinit(sa, sw_index, nb_rx_desc, socket_id, 494 rx_conf, mb_pool); 495 if (rc != 0) 496 goto fail_rx_qinit; 497 498 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 499 dev->data->rx_queues[ethdev_qid] = rxq_info->dp; 500 501 sfc_adapter_unlock(sa); 502 503 return 0; 504 505 fail_rx_qinit: 506 sfc_adapter_unlock(sa); 507 SFC_ASSERT(rc > 0); 508 return -rc; 509 } 510 511 static void 512 sfc_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 513 { 514 struct sfc_dp_rxq *dp_rxq = dev->data->rx_queues[qid]; 515 struct sfc_rxq *rxq; 516 struct sfc_adapter *sa; 517 sfc_sw_index_t sw_index; 518 519 if (dp_rxq == NULL) 520 return; 521 522 rxq = sfc_rxq_by_dp_rxq(dp_rxq); 523 sa = rxq->evq->sa; 524 sfc_adapter_lock(sa); 525 526 sw_index = dp_rxq->dpq.queue_id; 527 528 sfc_log_init(sa, "RxQ=%u", sw_index); 529 530 sfc_rx_qfini(sa, sw_index); 531 532 sfc_adapter_unlock(sa); 533 } 534 535 static int 536 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t ethdev_qid, 537 uint16_t nb_tx_desc, unsigned int socket_id, 538 const struct rte_eth_txconf *tx_conf) 539 { 540 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 541 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 542 struct sfc_txq_info *txq_info; 543 sfc_sw_index_t sw_index; 544 int rc; 545 546 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u", 547 ethdev_qid, nb_tx_desc, socket_id); 548 549 sfc_adapter_lock(sa); 550 551 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 552 rc = sfc_tx_qinit(sa, sw_index, nb_tx_desc, socket_id, tx_conf); 553 if (rc != 0) 554 goto fail_tx_qinit; 555 556 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 557 dev->data->tx_queues[ethdev_qid] = txq_info->dp; 558 559 sfc_adapter_unlock(sa); 560 return 0; 561 562 fail_tx_qinit: 563 sfc_adapter_unlock(sa); 564 SFC_ASSERT(rc > 0); 565 return -rc; 566 } 567 568 static void 569 sfc_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 570 { 571 struct sfc_dp_txq *dp_txq = dev->data->tx_queues[qid]; 572 struct sfc_txq *txq; 573 sfc_sw_index_t sw_index; 574 struct sfc_adapter *sa; 575 576 if (dp_txq == NULL) 577 return; 578 579 txq = sfc_txq_by_dp_txq(dp_txq); 580 sw_index = dp_txq->dpq.queue_id; 581 582 SFC_ASSERT(txq->evq != NULL); 583 sa = txq->evq->sa; 584 585 sfc_log_init(sa, "TxQ = %u", sw_index); 586 587 sfc_adapter_lock(sa); 588 589 sfc_tx_qfini(sa, sw_index); 590 591 sfc_adapter_unlock(sa); 592 } 593 594 static void 595 sfc_stats_get_dp_rx(struct sfc_adapter *sa, uint64_t *pkts, uint64_t *bytes) 596 { 597 struct sfc_adapter_shared *sas = sfc_sa2shared(sa); 598 uint64_t pkts_sum = 0; 599 uint64_t bytes_sum = 0; 600 unsigned int i; 601 602 for (i = 0; i < sas->ethdev_rxq_count; ++i) { 603 struct sfc_rxq_info *rxq_info; 604 605 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, i); 606 if (rxq_info->state & SFC_RXQ_INITIALIZED) { 607 union sfc_pkts_bytes qstats; 608 609 sfc_pkts_bytes_get(&rxq_info->dp->dpq.stats, &qstats); 610 pkts_sum += qstats.pkts - 611 sa->sw_stats.reset_rx_pkts[i]; 612 bytes_sum += qstats.bytes - 613 sa->sw_stats.reset_rx_bytes[i]; 614 } 615 } 616 617 *pkts = pkts_sum; 618 *bytes = bytes_sum; 619 } 620 621 static void 622 sfc_stats_get_dp_tx(struct sfc_adapter *sa, uint64_t *pkts, uint64_t *bytes) 623 { 624 struct sfc_adapter_shared *sas = sfc_sa2shared(sa); 625 uint64_t pkts_sum = 0; 626 uint64_t bytes_sum = 0; 627 unsigned int i; 628 629 for (i = 0; i < sas->ethdev_txq_count; ++i) { 630 struct sfc_txq_info *txq_info; 631 632 txq_info = sfc_txq_info_by_ethdev_qid(sas, i); 633 if (txq_info->state & SFC_TXQ_INITIALIZED) { 634 union sfc_pkts_bytes qstats; 635 636 sfc_pkts_bytes_get(&txq_info->dp->dpq.stats, &qstats); 637 pkts_sum += qstats.pkts - 638 sa->sw_stats.reset_tx_pkts[i]; 639 bytes_sum += qstats.bytes - 640 sa->sw_stats.reset_tx_bytes[i]; 641 } 642 } 643 644 *pkts = pkts_sum; 645 *bytes = bytes_sum; 646 } 647 648 /* 649 * Some statistics are computed as A - B where A and B each increase 650 * monotonically with some hardware counter(s) and the counters are read 651 * asynchronously. 652 * 653 * If packet X is counted in A, but not counted in B yet, computed value is 654 * greater than real. 655 * 656 * If packet X is not counted in A at the moment of reading the counter, 657 * but counted in B at the moment of reading the counter, computed value 658 * is less than real. 659 * 660 * However, counter which grows backward is worse evil than slightly wrong 661 * value. So, let's try to guarantee that it never happens except may be 662 * the case when the MAC stats are zeroed as a result of a NIC reset. 663 */ 664 static void 665 sfc_update_diff_stat(uint64_t *stat, uint64_t newval) 666 { 667 if ((int64_t)(newval - *stat) > 0 || newval == 0) 668 *stat = newval; 669 } 670 671 static int 672 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 673 { 674 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 675 bool have_dp_rx_stats = sap->dp_rx->features & SFC_DP_RX_FEAT_STATS; 676 bool have_dp_tx_stats = sap->dp_tx->features & SFC_DP_TX_FEAT_STATS; 677 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 678 struct sfc_port *port = &sa->port; 679 uint64_t *mac_stats; 680 int ret; 681 682 sfc_adapter_lock(sa); 683 684 if (have_dp_rx_stats) 685 sfc_stats_get_dp_rx(sa, &stats->ipackets, &stats->ibytes); 686 if (have_dp_tx_stats) 687 sfc_stats_get_dp_tx(sa, &stats->opackets, &stats->obytes); 688 689 ret = sfc_port_update_mac_stats(sa, B_FALSE); 690 if (ret != 0) 691 goto unlock; 692 693 mac_stats = port->mac_stats_buf; 694 695 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, 696 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) { 697 if (!have_dp_rx_stats) { 698 stats->ipackets = 699 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] + 700 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] + 701 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]; 702 stats->ibytes = 703 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] + 704 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] + 705 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]; 706 707 /* CRC is included in these stats, but shouldn't be */ 708 stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN; 709 } 710 if (!have_dp_tx_stats) { 711 stats->opackets = 712 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] + 713 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] + 714 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]; 715 stats->obytes = 716 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] + 717 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] + 718 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; 719 720 /* CRC is included in these stats, but shouldn't be */ 721 stats->obytes -= stats->opackets * RTE_ETHER_CRC_LEN; 722 } 723 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; 724 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; 725 } else { 726 if (!have_dp_tx_stats) { 727 stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; 728 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS] - 729 mac_stats[EFX_MAC_TX_PKTS] * RTE_ETHER_CRC_LEN; 730 } 731 732 /* 733 * Take into account stats which are whenever supported 734 * on EF10. If some stat is not supported by current 735 * firmware variant or HW revision, it is guaranteed 736 * to be zero in mac_stats. 737 */ 738 stats->imissed = 739 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] + 740 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] + 741 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] + 742 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] + 743 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] + 744 mac_stats[EFX_MAC_PM_TRUNC_QBB] + 745 mac_stats[EFX_MAC_PM_DISCARD_QBB] + 746 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] + 747 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] + 748 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS]; 749 stats->ierrors = 750 mac_stats[EFX_MAC_RX_FCS_ERRORS] + 751 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] + 752 mac_stats[EFX_MAC_RX_JABBER_PKTS]; 753 /* no oerrors counters supported on EF10 */ 754 755 if (!have_dp_rx_stats) { 756 /* Exclude missed, errors and pauses from Rx packets */ 757 sfc_update_diff_stat(&port->ipackets, 758 mac_stats[EFX_MAC_RX_PKTS] - 759 mac_stats[EFX_MAC_RX_PAUSE_PKTS] - 760 stats->imissed - stats->ierrors); 761 stats->ipackets = port->ipackets; 762 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS] - 763 mac_stats[EFX_MAC_RX_PKTS] * RTE_ETHER_CRC_LEN; 764 } 765 } 766 767 unlock: 768 sfc_adapter_unlock(sa); 769 SFC_ASSERT(ret >= 0); 770 return -ret; 771 } 772 773 static int 774 sfc_stats_reset(struct rte_eth_dev *dev) 775 { 776 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 777 struct sfc_port *port = &sa->port; 778 int rc; 779 780 sfc_adapter_lock(sa); 781 782 if (sa->state != SFC_ETHDEV_STARTED) { 783 /* 784 * The operation cannot be done if port is not started; it 785 * will be scheduled to be done during the next port start 786 */ 787 port->mac_stats_reset_pending = B_TRUE; 788 sfc_adapter_unlock(sa); 789 return 0; 790 } 791 792 rc = sfc_port_reset_mac_stats(sa); 793 if (rc != 0) 794 sfc_err(sa, "failed to reset statistics (rc = %d)", rc); 795 796 sfc_sw_xstats_reset(sa); 797 798 sfc_adapter_unlock(sa); 799 800 SFC_ASSERT(rc >= 0); 801 return -rc; 802 } 803 804 static unsigned int 805 sfc_xstats_get_nb_supported(struct sfc_adapter *sa) 806 { 807 struct sfc_port *port = &sa->port; 808 unsigned int nb_supported; 809 810 sfc_adapter_lock(sa); 811 nb_supported = port->mac_stats_nb_supported + 812 sfc_sw_xstats_get_nb_supported(sa); 813 sfc_adapter_unlock(sa); 814 815 return nb_supported; 816 } 817 818 static int 819 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 820 unsigned int xstats_count) 821 { 822 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 823 unsigned int nb_written = 0; 824 unsigned int nb_supported = 0; 825 int rc; 826 827 if (unlikely(xstats == NULL)) 828 return sfc_xstats_get_nb_supported(sa); 829 830 rc = sfc_port_get_mac_stats(sa, xstats, xstats_count, &nb_written); 831 if (rc < 0) 832 return rc; 833 834 nb_supported = rc; 835 sfc_sw_xstats_get_vals(sa, xstats, xstats_count, &nb_written, 836 &nb_supported); 837 838 return nb_supported; 839 } 840 841 static int 842 sfc_xstats_get_names(struct rte_eth_dev *dev, 843 struct rte_eth_xstat_name *xstats_names, 844 unsigned int xstats_count) 845 { 846 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 847 struct sfc_port *port = &sa->port; 848 unsigned int i; 849 unsigned int nstats = 0; 850 unsigned int nb_written = 0; 851 int ret; 852 853 if (unlikely(xstats_names == NULL)) 854 return sfc_xstats_get_nb_supported(sa); 855 856 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 857 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 858 if (nstats < xstats_count) { 859 strlcpy(xstats_names[nstats].name, 860 efx_mac_stat_name(sa->nic, i), 861 sizeof(xstats_names[0].name)); 862 nb_written++; 863 } 864 nstats++; 865 } 866 } 867 868 ret = sfc_sw_xstats_get_names(sa, xstats_names, xstats_count, 869 &nb_written, &nstats); 870 if (ret != 0) { 871 SFC_ASSERT(ret < 0); 872 return ret; 873 } 874 875 return nstats; 876 } 877 878 static int 879 sfc_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 880 uint64_t *values, unsigned int n) 881 { 882 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 883 struct sfc_port *port = &sa->port; 884 unsigned int nb_supported; 885 unsigned int i; 886 int rc; 887 888 if (unlikely(ids == NULL || values == NULL)) 889 return -EINVAL; 890 891 /* 892 * Values array could be filled in nonsequential order. Fill values with 893 * constant indicating invalid ID first. 894 */ 895 for (i = 0; i < n; i++) 896 values[i] = SFC_XSTAT_ID_INVALID_VAL; 897 898 rc = sfc_port_get_mac_stats_by_id(sa, ids, values, n); 899 if (rc != 0) 900 return rc; 901 902 nb_supported = port->mac_stats_nb_supported; 903 sfc_sw_xstats_get_vals_by_id(sa, ids, values, n, &nb_supported); 904 905 /* Return number of written stats before invalid ID is encountered. */ 906 for (i = 0; i < n; i++) { 907 if (values[i] == SFC_XSTAT_ID_INVALID_VAL) 908 return i; 909 } 910 911 return n; 912 } 913 914 static int 915 sfc_xstats_get_names_by_id(struct rte_eth_dev *dev, 916 const uint64_t *ids, 917 struct rte_eth_xstat_name *xstats_names, 918 unsigned int size) 919 { 920 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 921 struct sfc_port *port = &sa->port; 922 unsigned int nb_supported; 923 unsigned int i; 924 int ret; 925 926 if (unlikely(xstats_names == NULL && ids != NULL) || 927 unlikely(xstats_names != NULL && ids == NULL)) 928 return -EINVAL; 929 930 if (unlikely(xstats_names == NULL && ids == NULL)) 931 return sfc_xstats_get_nb_supported(sa); 932 933 /* 934 * Names array could be filled in nonsequential order. Fill names with 935 * string indicating invalid ID first. 936 */ 937 for (i = 0; i < size; i++) 938 xstats_names[i].name[0] = SFC_XSTAT_ID_INVALID_NAME; 939 940 sfc_adapter_lock(sa); 941 942 SFC_ASSERT(port->mac_stats_nb_supported <= 943 RTE_DIM(port->mac_stats_by_id)); 944 945 for (i = 0; i < size; i++) { 946 if (ids[i] < port->mac_stats_nb_supported) { 947 strlcpy(xstats_names[i].name, 948 efx_mac_stat_name(sa->nic, 949 port->mac_stats_by_id[ids[i]]), 950 sizeof(xstats_names[0].name)); 951 } 952 } 953 954 nb_supported = port->mac_stats_nb_supported; 955 956 sfc_adapter_unlock(sa); 957 958 ret = sfc_sw_xstats_get_names_by_id(sa, ids, xstats_names, size, 959 &nb_supported); 960 if (ret != 0) { 961 SFC_ASSERT(ret < 0); 962 return ret; 963 } 964 965 /* Return number of written names before invalid ID is encountered. */ 966 for (i = 0; i < size; i++) { 967 if (xstats_names[i].name[0] == SFC_XSTAT_ID_INVALID_NAME) 968 return i; 969 } 970 971 return size; 972 } 973 974 static int 975 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 976 { 977 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 978 unsigned int wanted_fc, link_fc; 979 980 memset(fc_conf, 0, sizeof(*fc_conf)); 981 982 sfc_adapter_lock(sa); 983 984 if (sa->state == SFC_ETHDEV_STARTED) 985 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc); 986 else 987 link_fc = sa->port.flow_ctrl; 988 989 switch (link_fc) { 990 case 0: 991 fc_conf->mode = RTE_FC_NONE; 992 break; 993 case EFX_FCNTL_RESPOND: 994 fc_conf->mode = RTE_FC_RX_PAUSE; 995 break; 996 case EFX_FCNTL_GENERATE: 997 fc_conf->mode = RTE_FC_TX_PAUSE; 998 break; 999 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE): 1000 fc_conf->mode = RTE_FC_FULL; 1001 break; 1002 default: 1003 sfc_err(sa, "%s: unexpected flow control value %#x", 1004 __func__, link_fc); 1005 } 1006 1007 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; 1008 1009 sfc_adapter_unlock(sa); 1010 1011 return 0; 1012 } 1013 1014 static int 1015 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1016 { 1017 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1018 struct sfc_port *port = &sa->port; 1019 unsigned int fcntl; 1020 int rc; 1021 1022 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || 1023 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || 1024 fc_conf->mac_ctrl_frame_fwd != 0) { 1025 sfc_err(sa, "unsupported flow control settings specified"); 1026 rc = EINVAL; 1027 goto fail_inval; 1028 } 1029 1030 switch (fc_conf->mode) { 1031 case RTE_FC_NONE: 1032 fcntl = 0; 1033 break; 1034 case RTE_FC_RX_PAUSE: 1035 fcntl = EFX_FCNTL_RESPOND; 1036 break; 1037 case RTE_FC_TX_PAUSE: 1038 fcntl = EFX_FCNTL_GENERATE; 1039 break; 1040 case RTE_FC_FULL: 1041 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 1042 break; 1043 default: 1044 rc = EINVAL; 1045 goto fail_inval; 1046 } 1047 1048 sfc_adapter_lock(sa); 1049 1050 if (sa->state == SFC_ETHDEV_STARTED) { 1051 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg); 1052 if (rc != 0) 1053 goto fail_mac_fcntl_set; 1054 } 1055 1056 port->flow_ctrl = fcntl; 1057 port->flow_ctrl_autoneg = fc_conf->autoneg; 1058 1059 sfc_adapter_unlock(sa); 1060 1061 return 0; 1062 1063 fail_mac_fcntl_set: 1064 sfc_adapter_unlock(sa); 1065 fail_inval: 1066 SFC_ASSERT(rc > 0); 1067 return -rc; 1068 } 1069 1070 static int 1071 sfc_check_scatter_on_all_rx_queues(struct sfc_adapter *sa, size_t pdu) 1072 { 1073 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa); 1074 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 1075 boolean_t scatter_enabled; 1076 const char *error; 1077 unsigned int i; 1078 1079 for (i = 0; i < sas->rxq_count; i++) { 1080 if ((sas->rxq_info[i].state & SFC_RXQ_INITIALIZED) == 0) 1081 continue; 1082 1083 scatter_enabled = (sas->rxq_info[i].type_flags & 1084 EFX_RXQ_FLAG_SCATTER); 1085 1086 if (!sfc_rx_check_scatter(pdu, sa->rxq_ctrl[i].buf_size, 1087 encp->enc_rx_prefix_size, 1088 scatter_enabled, 1089 encp->enc_rx_scatter_max, &error)) { 1090 sfc_err(sa, "MTU check for RxQ %u failed: %s", i, 1091 error); 1092 return EINVAL; 1093 } 1094 } 1095 1096 return 0; 1097 } 1098 1099 static int 1100 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 1101 { 1102 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1103 size_t pdu = EFX_MAC_PDU(mtu); 1104 size_t old_pdu; 1105 int rc; 1106 1107 sfc_log_init(sa, "mtu=%u", mtu); 1108 1109 rc = EINVAL; 1110 if (pdu < EFX_MAC_PDU_MIN) { 1111 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)", 1112 (unsigned int)mtu, (unsigned int)pdu, 1113 EFX_MAC_PDU_MIN); 1114 goto fail_inval; 1115 } 1116 if (pdu > EFX_MAC_PDU_MAX) { 1117 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)", 1118 (unsigned int)mtu, (unsigned int)pdu, 1119 (unsigned int)EFX_MAC_PDU_MAX); 1120 goto fail_inval; 1121 } 1122 1123 sfc_adapter_lock(sa); 1124 1125 rc = sfc_check_scatter_on_all_rx_queues(sa, pdu); 1126 if (rc != 0) 1127 goto fail_check_scatter; 1128 1129 if (pdu != sa->port.pdu) { 1130 if (sa->state == SFC_ETHDEV_STARTED) { 1131 sfc_stop(sa); 1132 1133 old_pdu = sa->port.pdu; 1134 sa->port.pdu = pdu; 1135 rc = sfc_start(sa); 1136 if (rc != 0) 1137 goto fail_start; 1138 } else { 1139 sa->port.pdu = pdu; 1140 } 1141 } 1142 1143 /* 1144 * The driver does not use it, but other PMDs update jumbo frame 1145 * flag and max_rx_pkt_len when MTU is set. 1146 */ 1147 if (mtu > RTE_ETHER_MTU) { 1148 struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode; 1149 rxmode->offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME; 1150 } 1151 1152 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu; 1153 1154 sfc_adapter_unlock(sa); 1155 1156 sfc_log_init(sa, "done"); 1157 return 0; 1158 1159 fail_start: 1160 sa->port.pdu = old_pdu; 1161 if (sfc_start(sa) != 0) 1162 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) " 1163 "PDU max size - port is stopped", 1164 (unsigned int)pdu, (unsigned int)old_pdu); 1165 1166 fail_check_scatter: 1167 sfc_adapter_unlock(sa); 1168 1169 fail_inval: 1170 sfc_log_init(sa, "failed %d", rc); 1171 SFC_ASSERT(rc > 0); 1172 return -rc; 1173 } 1174 static int 1175 sfc_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr) 1176 { 1177 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1178 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 1179 struct sfc_port *port = &sa->port; 1180 struct rte_ether_addr *old_addr = &dev->data->mac_addrs[0]; 1181 int rc = 0; 1182 1183 sfc_adapter_lock(sa); 1184 1185 if (rte_is_same_ether_addr(mac_addr, &port->default_mac_addr)) 1186 goto unlock; 1187 1188 /* 1189 * Copy the address to the device private data so that 1190 * it could be recalled in the case of adapter restart. 1191 */ 1192 rte_ether_addr_copy(mac_addr, &port->default_mac_addr); 1193 1194 /* 1195 * Neither of the two following checks can return 1196 * an error. The new MAC address is preserved in 1197 * the device private data and can be activated 1198 * on the next port start if the user prevents 1199 * isolated mode from being enabled. 1200 */ 1201 if (sfc_sa2shared(sa)->isolated) { 1202 sfc_warn(sa, "isolated mode is active on the port"); 1203 sfc_warn(sa, "will not set MAC address"); 1204 goto unlock; 1205 } 1206 1207 if (sa->state != SFC_ETHDEV_STARTED) { 1208 sfc_notice(sa, "the port is not started"); 1209 sfc_notice(sa, "the new MAC address will be set on port start"); 1210 1211 goto unlock; 1212 } 1213 1214 if (encp->enc_allow_set_mac_with_installed_filters) { 1215 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes); 1216 if (rc != 0) { 1217 sfc_err(sa, "cannot set MAC address (rc = %u)", rc); 1218 goto unlock; 1219 } 1220 1221 /* 1222 * Changing the MAC address by means of MCDI request 1223 * has no effect on received traffic, therefore 1224 * we also need to update unicast filters 1225 */ 1226 rc = sfc_set_rx_mode_unchecked(sa); 1227 if (rc != 0) { 1228 sfc_err(sa, "cannot set filter (rc = %u)", rc); 1229 /* Rollback the old address */ 1230 (void)efx_mac_addr_set(sa->nic, old_addr->addr_bytes); 1231 (void)sfc_set_rx_mode_unchecked(sa); 1232 } 1233 } else { 1234 sfc_warn(sa, "cannot set MAC address with filters installed"); 1235 sfc_warn(sa, "adapter will be restarted to pick the new MAC"); 1236 sfc_warn(sa, "(some traffic may be dropped)"); 1237 1238 /* 1239 * Since setting MAC address with filters installed is not 1240 * allowed on the adapter, the new MAC address will be set 1241 * by means of adapter restart. sfc_start() shall retrieve 1242 * the new address from the device private data and set it. 1243 */ 1244 sfc_stop(sa); 1245 rc = sfc_start(sa); 1246 if (rc != 0) 1247 sfc_err(sa, "cannot restart adapter (rc = %u)", rc); 1248 } 1249 1250 unlock: 1251 if (rc != 0) 1252 rte_ether_addr_copy(old_addr, &port->default_mac_addr); 1253 1254 sfc_adapter_unlock(sa); 1255 1256 SFC_ASSERT(rc >= 0); 1257 return -rc; 1258 } 1259 1260 1261 static int 1262 sfc_set_mc_addr_list(struct rte_eth_dev *dev, 1263 struct rte_ether_addr *mc_addr_set, uint32_t nb_mc_addr) 1264 { 1265 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1266 struct sfc_port *port = &sa->port; 1267 uint8_t *mc_addrs = port->mcast_addrs; 1268 int rc; 1269 unsigned int i; 1270 1271 if (sfc_sa2shared(sa)->isolated) { 1272 sfc_err(sa, "isolated mode is active on the port"); 1273 sfc_err(sa, "will not set multicast address list"); 1274 return -ENOTSUP; 1275 } 1276 1277 if (mc_addrs == NULL) 1278 return -ENOBUFS; 1279 1280 if (nb_mc_addr > port->max_mcast_addrs) { 1281 sfc_err(sa, "too many multicast addresses: %u > %u", 1282 nb_mc_addr, port->max_mcast_addrs); 1283 return -EINVAL; 1284 } 1285 1286 for (i = 0; i < nb_mc_addr; ++i) { 1287 rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, 1288 EFX_MAC_ADDR_LEN); 1289 mc_addrs += EFX_MAC_ADDR_LEN; 1290 } 1291 1292 port->nb_mcast_addrs = nb_mc_addr; 1293 1294 if (sa->state != SFC_ETHDEV_STARTED) 1295 return 0; 1296 1297 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, 1298 port->nb_mcast_addrs); 1299 if (rc != 0) 1300 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); 1301 1302 SFC_ASSERT(rc >= 0); 1303 return -rc; 1304 } 1305 1306 /* 1307 * The function is used by the secondary process as well. It must not 1308 * use any process-local pointers from the adapter data. 1309 */ 1310 static void 1311 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t ethdev_qid, 1312 struct rte_eth_rxq_info *qinfo) 1313 { 1314 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1315 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1316 struct sfc_rxq_info *rxq_info; 1317 1318 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1319 1320 qinfo->mp = rxq_info->refill_mb_pool; 1321 qinfo->conf.rx_free_thresh = rxq_info->refill_threshold; 1322 qinfo->conf.rx_drop_en = 1; 1323 qinfo->conf.rx_deferred_start = rxq_info->deferred_start; 1324 qinfo->conf.offloads = dev->data->dev_conf.rxmode.offloads; 1325 if (rxq_info->type_flags & EFX_RXQ_FLAG_SCATTER) { 1326 qinfo->conf.offloads |= DEV_RX_OFFLOAD_SCATTER; 1327 qinfo->scattered_rx = 1; 1328 } 1329 qinfo->nb_desc = rxq_info->entries; 1330 } 1331 1332 /* 1333 * The function is used by the secondary process as well. It must not 1334 * use any process-local pointers from the adapter data. 1335 */ 1336 static void 1337 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t ethdev_qid, 1338 struct rte_eth_txq_info *qinfo) 1339 { 1340 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1341 struct sfc_txq_info *txq_info; 1342 1343 SFC_ASSERT(ethdev_qid < sas->ethdev_txq_count); 1344 1345 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1346 1347 memset(qinfo, 0, sizeof(*qinfo)); 1348 1349 qinfo->conf.offloads = txq_info->offloads; 1350 qinfo->conf.tx_free_thresh = txq_info->free_thresh; 1351 qinfo->conf.tx_deferred_start = txq_info->deferred_start; 1352 qinfo->nb_desc = txq_info->entries; 1353 } 1354 1355 /* 1356 * The function is used by the secondary process as well. It must not 1357 * use any process-local pointers from the adapter data. 1358 */ 1359 static uint32_t 1360 sfc_rx_queue_count(void *rx_queue) 1361 { 1362 struct sfc_dp_rxq *dp_rxq = rx_queue; 1363 const struct sfc_dp_rx *dp_rx; 1364 struct sfc_rxq_info *rxq_info; 1365 1366 dp_rx = sfc_dp_rx_by_dp_rxq(dp_rxq); 1367 rxq_info = sfc_rxq_info_by_dp_rxq(dp_rxq); 1368 1369 if ((rxq_info->state & SFC_RXQ_STARTED) == 0) 1370 return 0; 1371 1372 return dp_rx->qdesc_npending(dp_rxq); 1373 } 1374 1375 /* 1376 * The function is used by the secondary process as well. It must not 1377 * use any process-local pointers from the adapter data. 1378 */ 1379 static int 1380 sfc_rx_descriptor_status(void *queue, uint16_t offset) 1381 { 1382 struct sfc_dp_rxq *dp_rxq = queue; 1383 const struct sfc_dp_rx *dp_rx; 1384 1385 dp_rx = sfc_dp_rx_by_dp_rxq(dp_rxq); 1386 1387 return dp_rx->qdesc_status(dp_rxq, offset); 1388 } 1389 1390 /* 1391 * The function is used by the secondary process as well. It must not 1392 * use any process-local pointers from the adapter data. 1393 */ 1394 static int 1395 sfc_tx_descriptor_status(void *queue, uint16_t offset) 1396 { 1397 struct sfc_dp_txq *dp_txq = queue; 1398 const struct sfc_dp_tx *dp_tx; 1399 1400 dp_tx = sfc_dp_tx_by_dp_txq(dp_txq); 1401 1402 return dp_tx->qdesc_status(dp_txq, offset); 1403 } 1404 1405 static int 1406 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1407 { 1408 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1409 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1410 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1411 struct sfc_rxq_info *rxq_info; 1412 sfc_sw_index_t sw_index; 1413 int rc; 1414 1415 sfc_log_init(sa, "RxQ=%u", ethdev_qid); 1416 1417 sfc_adapter_lock(sa); 1418 1419 rc = EINVAL; 1420 if (sa->state != SFC_ETHDEV_STARTED) 1421 goto fail_not_started; 1422 1423 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1424 if (rxq_info->state != SFC_RXQ_INITIALIZED) 1425 goto fail_not_setup; 1426 1427 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 1428 rc = sfc_rx_qstart(sa, sw_index); 1429 if (rc != 0) 1430 goto fail_rx_qstart; 1431 1432 rxq_info->deferred_started = B_TRUE; 1433 1434 sfc_adapter_unlock(sa); 1435 1436 return 0; 1437 1438 fail_rx_qstart: 1439 fail_not_setup: 1440 fail_not_started: 1441 sfc_adapter_unlock(sa); 1442 SFC_ASSERT(rc > 0); 1443 return -rc; 1444 } 1445 1446 static int 1447 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1448 { 1449 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1450 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1451 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1452 struct sfc_rxq_info *rxq_info; 1453 sfc_sw_index_t sw_index; 1454 1455 sfc_log_init(sa, "RxQ=%u", ethdev_qid); 1456 1457 sfc_adapter_lock(sa); 1458 1459 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 1460 sfc_rx_qstop(sa, sw_index); 1461 1462 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1463 rxq_info->deferred_started = B_FALSE; 1464 1465 sfc_adapter_unlock(sa); 1466 1467 return 0; 1468 } 1469 1470 static int 1471 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1472 { 1473 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1474 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1475 struct sfc_txq_info *txq_info; 1476 sfc_sw_index_t sw_index; 1477 int rc; 1478 1479 sfc_log_init(sa, "TxQ = %u", ethdev_qid); 1480 1481 sfc_adapter_lock(sa); 1482 1483 rc = EINVAL; 1484 if (sa->state != SFC_ETHDEV_STARTED) 1485 goto fail_not_started; 1486 1487 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1488 if (txq_info->state != SFC_TXQ_INITIALIZED) 1489 goto fail_not_setup; 1490 1491 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 1492 rc = sfc_tx_qstart(sa, sw_index); 1493 if (rc != 0) 1494 goto fail_tx_qstart; 1495 1496 txq_info->deferred_started = B_TRUE; 1497 1498 sfc_adapter_unlock(sa); 1499 return 0; 1500 1501 fail_tx_qstart: 1502 1503 fail_not_setup: 1504 fail_not_started: 1505 sfc_adapter_unlock(sa); 1506 SFC_ASSERT(rc > 0); 1507 return -rc; 1508 } 1509 1510 static int 1511 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1512 { 1513 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1514 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1515 struct sfc_txq_info *txq_info; 1516 sfc_sw_index_t sw_index; 1517 1518 sfc_log_init(sa, "TxQ = %u", ethdev_qid); 1519 1520 sfc_adapter_lock(sa); 1521 1522 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 1523 sfc_tx_qstop(sa, sw_index); 1524 1525 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1526 txq_info->deferred_started = B_FALSE; 1527 1528 sfc_adapter_unlock(sa); 1529 return 0; 1530 } 1531 1532 static efx_tunnel_protocol_t 1533 sfc_tunnel_rte_type_to_efx_udp_proto(enum rte_eth_tunnel_type rte_type) 1534 { 1535 switch (rte_type) { 1536 case RTE_TUNNEL_TYPE_VXLAN: 1537 return EFX_TUNNEL_PROTOCOL_VXLAN; 1538 case RTE_TUNNEL_TYPE_GENEVE: 1539 return EFX_TUNNEL_PROTOCOL_GENEVE; 1540 default: 1541 return EFX_TUNNEL_NPROTOS; 1542 } 1543 } 1544 1545 enum sfc_udp_tunnel_op_e { 1546 SFC_UDP_TUNNEL_ADD_PORT, 1547 SFC_UDP_TUNNEL_DEL_PORT, 1548 }; 1549 1550 static int 1551 sfc_dev_udp_tunnel_op(struct rte_eth_dev *dev, 1552 struct rte_eth_udp_tunnel *tunnel_udp, 1553 enum sfc_udp_tunnel_op_e op) 1554 { 1555 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1556 efx_tunnel_protocol_t tunnel_proto; 1557 int rc; 1558 1559 sfc_log_init(sa, "%s udp_port=%u prot_type=%u", 1560 (op == SFC_UDP_TUNNEL_ADD_PORT) ? "add" : 1561 (op == SFC_UDP_TUNNEL_DEL_PORT) ? "delete" : "unknown", 1562 tunnel_udp->udp_port, tunnel_udp->prot_type); 1563 1564 tunnel_proto = 1565 sfc_tunnel_rte_type_to_efx_udp_proto(tunnel_udp->prot_type); 1566 if (tunnel_proto >= EFX_TUNNEL_NPROTOS) { 1567 rc = ENOTSUP; 1568 goto fail_bad_proto; 1569 } 1570 1571 sfc_adapter_lock(sa); 1572 1573 switch (op) { 1574 case SFC_UDP_TUNNEL_ADD_PORT: 1575 rc = efx_tunnel_config_udp_add(sa->nic, 1576 tunnel_udp->udp_port, 1577 tunnel_proto); 1578 break; 1579 case SFC_UDP_TUNNEL_DEL_PORT: 1580 rc = efx_tunnel_config_udp_remove(sa->nic, 1581 tunnel_udp->udp_port, 1582 tunnel_proto); 1583 break; 1584 default: 1585 rc = EINVAL; 1586 goto fail_bad_op; 1587 } 1588 1589 if (rc != 0) 1590 goto fail_op; 1591 1592 if (sa->state == SFC_ETHDEV_STARTED) { 1593 rc = efx_tunnel_reconfigure(sa->nic); 1594 if (rc == EAGAIN) { 1595 /* 1596 * Configuration is accepted by FW and MC reboot 1597 * is initiated to apply the changes. MC reboot 1598 * will be handled in a usual way (MC reboot 1599 * event on management event queue and adapter 1600 * restart). 1601 */ 1602 rc = 0; 1603 } else if (rc != 0) { 1604 goto fail_reconfigure; 1605 } 1606 } 1607 1608 sfc_adapter_unlock(sa); 1609 return 0; 1610 1611 fail_reconfigure: 1612 /* Remove/restore entry since the change makes the trouble */ 1613 switch (op) { 1614 case SFC_UDP_TUNNEL_ADD_PORT: 1615 (void)efx_tunnel_config_udp_remove(sa->nic, 1616 tunnel_udp->udp_port, 1617 tunnel_proto); 1618 break; 1619 case SFC_UDP_TUNNEL_DEL_PORT: 1620 (void)efx_tunnel_config_udp_add(sa->nic, 1621 tunnel_udp->udp_port, 1622 tunnel_proto); 1623 break; 1624 } 1625 1626 fail_op: 1627 fail_bad_op: 1628 sfc_adapter_unlock(sa); 1629 1630 fail_bad_proto: 1631 SFC_ASSERT(rc > 0); 1632 return -rc; 1633 } 1634 1635 static int 1636 sfc_dev_udp_tunnel_port_add(struct rte_eth_dev *dev, 1637 struct rte_eth_udp_tunnel *tunnel_udp) 1638 { 1639 return sfc_dev_udp_tunnel_op(dev, tunnel_udp, SFC_UDP_TUNNEL_ADD_PORT); 1640 } 1641 1642 static int 1643 sfc_dev_udp_tunnel_port_del(struct rte_eth_dev *dev, 1644 struct rte_eth_udp_tunnel *tunnel_udp) 1645 { 1646 return sfc_dev_udp_tunnel_op(dev, tunnel_udp, SFC_UDP_TUNNEL_DEL_PORT); 1647 } 1648 1649 /* 1650 * The function is used by the secondary process as well. It must not 1651 * use any process-local pointers from the adapter data. 1652 */ 1653 static int 1654 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1655 struct rte_eth_rss_conf *rss_conf) 1656 { 1657 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1658 struct sfc_rss *rss = &sas->rss; 1659 1660 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) 1661 return -ENOTSUP; 1662 1663 /* 1664 * Mapping of hash configuration between RTE and EFX is not one-to-one, 1665 * hence, conversion is done here to derive a correct set of ETH_RSS 1666 * flags which corresponds to the active EFX configuration stored 1667 * locally in 'sfc_adapter' and kept up-to-date 1668 */ 1669 rss_conf->rss_hf = sfc_rx_hf_efx_to_rte(rss, rss->hash_types); 1670 rss_conf->rss_key_len = EFX_RSS_KEY_SIZE; 1671 if (rss_conf->rss_key != NULL) 1672 rte_memcpy(rss_conf->rss_key, rss->key, EFX_RSS_KEY_SIZE); 1673 1674 return 0; 1675 } 1676 1677 static int 1678 sfc_dev_rss_hash_update(struct rte_eth_dev *dev, 1679 struct rte_eth_rss_conf *rss_conf) 1680 { 1681 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1682 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss; 1683 unsigned int efx_hash_types; 1684 uint32_t contexts[] = {EFX_RSS_CONTEXT_DEFAULT, rss->dummy_rss_context}; 1685 unsigned int n_contexts; 1686 unsigned int mode_i = 0; 1687 unsigned int key_i = 0; 1688 unsigned int i = 0; 1689 int rc = 0; 1690 1691 n_contexts = rss->dummy_rss_context == EFX_RSS_CONTEXT_DEFAULT ? 1 : 2; 1692 1693 if (sfc_sa2shared(sa)->isolated) 1694 return -ENOTSUP; 1695 1696 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) { 1697 sfc_err(sa, "RSS is not available"); 1698 return -ENOTSUP; 1699 } 1700 1701 if (rss->channels == 0) { 1702 sfc_err(sa, "RSS is not configured"); 1703 return -EINVAL; 1704 } 1705 1706 if ((rss_conf->rss_key != NULL) && 1707 (rss_conf->rss_key_len != sizeof(rss->key))) { 1708 sfc_err(sa, "RSS key size is wrong (should be %zu)", 1709 sizeof(rss->key)); 1710 return -EINVAL; 1711 } 1712 1713 sfc_adapter_lock(sa); 1714 1715 rc = sfc_rx_hf_rte_to_efx(sa, rss_conf->rss_hf, &efx_hash_types); 1716 if (rc != 0) 1717 goto fail_rx_hf_rte_to_efx; 1718 1719 for (mode_i = 0; mode_i < n_contexts; mode_i++) { 1720 rc = efx_rx_scale_mode_set(sa->nic, contexts[mode_i], 1721 rss->hash_alg, efx_hash_types, 1722 B_TRUE); 1723 if (rc != 0) 1724 goto fail_scale_mode_set; 1725 } 1726 1727 if (rss_conf->rss_key != NULL) { 1728 if (sa->state == SFC_ETHDEV_STARTED) { 1729 for (key_i = 0; key_i < n_contexts; key_i++) { 1730 rc = efx_rx_scale_key_set(sa->nic, 1731 contexts[key_i], 1732 rss_conf->rss_key, 1733 sizeof(rss->key)); 1734 if (rc != 0) 1735 goto fail_scale_key_set; 1736 } 1737 } 1738 1739 rte_memcpy(rss->key, rss_conf->rss_key, sizeof(rss->key)); 1740 } 1741 1742 rss->hash_types = efx_hash_types; 1743 1744 sfc_adapter_unlock(sa); 1745 1746 return 0; 1747 1748 fail_scale_key_set: 1749 for (i = 0; i < key_i; i++) { 1750 if (efx_rx_scale_key_set(sa->nic, contexts[i], rss->key, 1751 sizeof(rss->key)) != 0) 1752 sfc_err(sa, "failed to restore RSS key"); 1753 } 1754 1755 fail_scale_mode_set: 1756 for (i = 0; i < mode_i; i++) { 1757 if (efx_rx_scale_mode_set(sa->nic, contexts[i], 1758 EFX_RX_HASHALG_TOEPLITZ, 1759 rss->hash_types, B_TRUE) != 0) 1760 sfc_err(sa, "failed to restore RSS mode"); 1761 } 1762 1763 fail_rx_hf_rte_to_efx: 1764 sfc_adapter_unlock(sa); 1765 return -rc; 1766 } 1767 1768 /* 1769 * The function is used by the secondary process as well. It must not 1770 * use any process-local pointers from the adapter data. 1771 */ 1772 static int 1773 sfc_dev_rss_reta_query(struct rte_eth_dev *dev, 1774 struct rte_eth_rss_reta_entry64 *reta_conf, 1775 uint16_t reta_size) 1776 { 1777 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1778 struct sfc_rss *rss = &sas->rss; 1779 int entry; 1780 1781 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE || sas->isolated) 1782 return -ENOTSUP; 1783 1784 if (rss->channels == 0) 1785 return -EINVAL; 1786 1787 if (reta_size != EFX_RSS_TBL_SIZE) 1788 return -EINVAL; 1789 1790 for (entry = 0; entry < reta_size; entry++) { 1791 int grp = entry / RTE_RETA_GROUP_SIZE; 1792 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1793 1794 if ((reta_conf[grp].mask >> grp_idx) & 1) 1795 reta_conf[grp].reta[grp_idx] = rss->tbl[entry]; 1796 } 1797 1798 return 0; 1799 } 1800 1801 static int 1802 sfc_dev_rss_reta_update(struct rte_eth_dev *dev, 1803 struct rte_eth_rss_reta_entry64 *reta_conf, 1804 uint16_t reta_size) 1805 { 1806 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1807 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss; 1808 unsigned int *rss_tbl_new; 1809 uint16_t entry; 1810 int rc = 0; 1811 1812 1813 if (sfc_sa2shared(sa)->isolated) 1814 return -ENOTSUP; 1815 1816 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) { 1817 sfc_err(sa, "RSS is not available"); 1818 return -ENOTSUP; 1819 } 1820 1821 if (rss->channels == 0) { 1822 sfc_err(sa, "RSS is not configured"); 1823 return -EINVAL; 1824 } 1825 1826 if (reta_size != EFX_RSS_TBL_SIZE) { 1827 sfc_err(sa, "RETA size is wrong (should be %u)", 1828 EFX_RSS_TBL_SIZE); 1829 return -EINVAL; 1830 } 1831 1832 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(rss->tbl), 0); 1833 if (rss_tbl_new == NULL) 1834 return -ENOMEM; 1835 1836 sfc_adapter_lock(sa); 1837 1838 rte_memcpy(rss_tbl_new, rss->tbl, sizeof(rss->tbl)); 1839 1840 for (entry = 0; entry < reta_size; entry++) { 1841 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1842 struct rte_eth_rss_reta_entry64 *grp; 1843 1844 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE]; 1845 1846 if (grp->mask & (1ull << grp_idx)) { 1847 if (grp->reta[grp_idx] >= rss->channels) { 1848 rc = EINVAL; 1849 goto bad_reta_entry; 1850 } 1851 rss_tbl_new[entry] = grp->reta[grp_idx]; 1852 } 1853 } 1854 1855 if (sa->state == SFC_ETHDEV_STARTED) { 1856 rc = efx_rx_scale_tbl_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT, 1857 rss_tbl_new, EFX_RSS_TBL_SIZE); 1858 if (rc != 0) 1859 goto fail_scale_tbl_set; 1860 } 1861 1862 rte_memcpy(rss->tbl, rss_tbl_new, sizeof(rss->tbl)); 1863 1864 fail_scale_tbl_set: 1865 bad_reta_entry: 1866 sfc_adapter_unlock(sa); 1867 1868 rte_free(rss_tbl_new); 1869 1870 SFC_ASSERT(rc >= 0); 1871 return -rc; 1872 } 1873 1874 static int 1875 sfc_dev_flow_ops_get(struct rte_eth_dev *dev __rte_unused, 1876 const struct rte_flow_ops **ops) 1877 { 1878 *ops = &sfc_flow_ops; 1879 return 0; 1880 } 1881 1882 static int 1883 sfc_pool_ops_supported(struct rte_eth_dev *dev, const char *pool) 1884 { 1885 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1886 1887 /* 1888 * If Rx datapath does not provide callback to check mempool, 1889 * all pools are supported. 1890 */ 1891 if (sap->dp_rx->pool_ops_supported == NULL) 1892 return 1; 1893 1894 return sap->dp_rx->pool_ops_supported(pool); 1895 } 1896 1897 static int 1898 sfc_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1899 { 1900 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1901 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1902 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1903 struct sfc_rxq_info *rxq_info; 1904 1905 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1906 1907 return sap->dp_rx->intr_enable(rxq_info->dp); 1908 } 1909 1910 static int 1911 sfc_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1912 { 1913 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1914 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1915 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1916 struct sfc_rxq_info *rxq_info; 1917 1918 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1919 1920 return sap->dp_rx->intr_disable(rxq_info->dp); 1921 } 1922 1923 struct sfc_mport_journal_ctx { 1924 struct sfc_adapter *sa; 1925 uint16_t switch_domain_id; 1926 uint32_t mcdi_handle; 1927 bool controllers_assigned; 1928 efx_pcie_interface_t *controllers; 1929 size_t nb_controllers; 1930 }; 1931 1932 static int 1933 sfc_journal_ctx_add_controller(struct sfc_mport_journal_ctx *ctx, 1934 efx_pcie_interface_t intf) 1935 { 1936 efx_pcie_interface_t *new_controllers; 1937 size_t i, target; 1938 size_t new_size; 1939 1940 if (ctx->controllers == NULL) { 1941 ctx->controllers = rte_malloc("sfc_controller_mapping", 1942 sizeof(ctx->controllers[0]), 0); 1943 if (ctx->controllers == NULL) 1944 return ENOMEM; 1945 1946 ctx->controllers[0] = intf; 1947 ctx->nb_controllers = 1; 1948 1949 return 0; 1950 } 1951 1952 for (i = 0; i < ctx->nb_controllers; i++) { 1953 if (ctx->controllers[i] == intf) 1954 return 0; 1955 if (ctx->controllers[i] > intf) 1956 break; 1957 } 1958 target = i; 1959 1960 ctx->nb_controllers += 1; 1961 new_size = ctx->nb_controllers * sizeof(ctx->controllers[0]); 1962 1963 new_controllers = rte_realloc(ctx->controllers, new_size, 0); 1964 if (new_controllers == NULL) { 1965 rte_free(ctx->controllers); 1966 return ENOMEM; 1967 } 1968 ctx->controllers = new_controllers; 1969 1970 for (i = target + 1; i < ctx->nb_controllers; i++) 1971 ctx->controllers[i] = ctx->controllers[i - 1]; 1972 1973 ctx->controllers[target] = intf; 1974 1975 return 0; 1976 } 1977 1978 static efx_rc_t 1979 sfc_process_mport_journal_entry(struct sfc_mport_journal_ctx *ctx, 1980 efx_mport_desc_t *mport) 1981 { 1982 struct sfc_mae_switch_port_request req; 1983 efx_mport_sel_t entity_selector; 1984 efx_mport_sel_t ethdev_mport; 1985 uint16_t switch_port_id; 1986 efx_rc_t efx_rc; 1987 int rc; 1988 1989 sfc_dbg(ctx->sa, 1990 "processing mport id %u (controller %u pf %u vf %u)", 1991 mport->emd_id.id, mport->emd_vnic.ev_intf, 1992 mport->emd_vnic.ev_pf, mport->emd_vnic.ev_vf); 1993 efx_mae_mport_invalid(ðdev_mport); 1994 1995 if (!ctx->controllers_assigned) { 1996 rc = sfc_journal_ctx_add_controller(ctx, 1997 mport->emd_vnic.ev_intf); 1998 if (rc != 0) 1999 return rc; 2000 } 2001 2002 /* Build Mport selector */ 2003 efx_rc = efx_mae_mport_by_pcie_mh_function(mport->emd_vnic.ev_intf, 2004 mport->emd_vnic.ev_pf, 2005 mport->emd_vnic.ev_vf, 2006 &entity_selector); 2007 if (efx_rc != 0) { 2008 sfc_err(ctx->sa, "failed to build entity mport selector for c%upf%uvf%u", 2009 mport->emd_vnic.ev_intf, 2010 mport->emd_vnic.ev_pf, 2011 mport->emd_vnic.ev_vf); 2012 return efx_rc; 2013 } 2014 2015 rc = sfc_mae_switch_port_id_by_entity(ctx->switch_domain_id, 2016 &entity_selector, 2017 SFC_MAE_SWITCH_PORT_REPRESENTOR, 2018 &switch_port_id); 2019 switch (rc) { 2020 case 0: 2021 /* Already registered */ 2022 break; 2023 case ENOENT: 2024 /* 2025 * No representor has been created for this entity. 2026 * Create a dummy switch registry entry with an invalid ethdev 2027 * mport selector. When a corresponding representor is created, 2028 * this entry will be updated. 2029 */ 2030 req.type = SFC_MAE_SWITCH_PORT_REPRESENTOR; 2031 req.entity_mportp = &entity_selector; 2032 req.ethdev_mportp = ðdev_mport; 2033 req.ethdev_port_id = RTE_MAX_ETHPORTS; 2034 req.port_data.repr.intf = mport->emd_vnic.ev_intf; 2035 req.port_data.repr.pf = mport->emd_vnic.ev_pf; 2036 req.port_data.repr.vf = mport->emd_vnic.ev_vf; 2037 2038 rc = sfc_mae_assign_switch_port(ctx->switch_domain_id, 2039 &req, &switch_port_id); 2040 if (rc != 0) { 2041 sfc_err(ctx->sa, 2042 "failed to assign MAE switch port for c%upf%uvf%u: %s", 2043 mport->emd_vnic.ev_intf, 2044 mport->emd_vnic.ev_pf, 2045 mport->emd_vnic.ev_vf, 2046 rte_strerror(rc)); 2047 return rc; 2048 } 2049 break; 2050 default: 2051 sfc_err(ctx->sa, "failed to find MAE switch port for c%upf%uvf%u: %s", 2052 mport->emd_vnic.ev_intf, 2053 mport->emd_vnic.ev_pf, 2054 mport->emd_vnic.ev_vf, 2055 rte_strerror(rc)); 2056 return rc; 2057 } 2058 2059 return 0; 2060 } 2061 2062 static efx_rc_t 2063 sfc_process_mport_journal_cb(void *data, efx_mport_desc_t *mport, 2064 size_t mport_len) 2065 { 2066 struct sfc_mport_journal_ctx *ctx = data; 2067 2068 if (ctx == NULL || ctx->sa == NULL) { 2069 sfc_err(ctx->sa, "received NULL context or SFC adapter"); 2070 return EINVAL; 2071 } 2072 2073 if (mport_len != sizeof(*mport)) { 2074 sfc_err(ctx->sa, "actual and expected mport buffer sizes differ"); 2075 return EINVAL; 2076 } 2077 2078 SFC_ASSERT(sfc_adapter_is_locked(ctx->sa)); 2079 2080 /* 2081 * If a zombie flag is set, it means the mport has been marked for 2082 * deletion and cannot be used for any new operations. The mport will 2083 * be destroyed completely once all references to it are released. 2084 */ 2085 if (mport->emd_zombie) { 2086 sfc_dbg(ctx->sa, "mport is a zombie, skipping"); 2087 return 0; 2088 } 2089 if (mport->emd_type != EFX_MPORT_TYPE_VNIC) { 2090 sfc_dbg(ctx->sa, "mport is not a VNIC, skipping"); 2091 return 0; 2092 } 2093 if (mport->emd_vnic.ev_client_type != EFX_MPORT_VNIC_CLIENT_FUNCTION) { 2094 sfc_dbg(ctx->sa, "mport is not a function, skipping"); 2095 return 0; 2096 } 2097 if (mport->emd_vnic.ev_handle == ctx->mcdi_handle) { 2098 sfc_dbg(ctx->sa, "mport is this driver instance, skipping"); 2099 return 0; 2100 } 2101 2102 return sfc_process_mport_journal_entry(ctx, mport); 2103 } 2104 2105 static int 2106 sfc_process_mport_journal(struct sfc_adapter *sa) 2107 { 2108 struct sfc_mport_journal_ctx ctx; 2109 const efx_pcie_interface_t *controllers; 2110 size_t nb_controllers; 2111 efx_rc_t efx_rc; 2112 int rc; 2113 2114 memset(&ctx, 0, sizeof(ctx)); 2115 ctx.sa = sa; 2116 ctx.switch_domain_id = sa->mae.switch_domain_id; 2117 2118 efx_rc = efx_mcdi_get_own_client_handle(sa->nic, &ctx.mcdi_handle); 2119 if (efx_rc != 0) { 2120 sfc_err(sa, "failed to get own MCDI handle"); 2121 SFC_ASSERT(efx_rc > 0); 2122 return efx_rc; 2123 } 2124 2125 rc = sfc_mae_switch_domain_controllers(ctx.switch_domain_id, 2126 &controllers, &nb_controllers); 2127 if (rc != 0) { 2128 sfc_err(sa, "failed to get controller mapping"); 2129 return rc; 2130 } 2131 2132 ctx.controllers_assigned = controllers != NULL; 2133 ctx.controllers = NULL; 2134 ctx.nb_controllers = 0; 2135 2136 efx_rc = efx_mae_read_mport_journal(sa->nic, 2137 sfc_process_mport_journal_cb, &ctx); 2138 if (efx_rc != 0) { 2139 sfc_err(sa, "failed to process MAE mport journal"); 2140 SFC_ASSERT(efx_rc > 0); 2141 return efx_rc; 2142 } 2143 2144 if (controllers == NULL) { 2145 rc = sfc_mae_switch_domain_map_controllers(ctx.switch_domain_id, 2146 ctx.controllers, 2147 ctx.nb_controllers); 2148 if (rc != 0) 2149 return rc; 2150 } 2151 2152 return 0; 2153 } 2154 2155 static void 2156 sfc_count_representors_cb(enum sfc_mae_switch_port_type type, 2157 const efx_mport_sel_t *ethdev_mportp __rte_unused, 2158 uint16_t ethdev_port_id __rte_unused, 2159 const efx_mport_sel_t *entity_mportp __rte_unused, 2160 uint16_t switch_port_id __rte_unused, 2161 union sfc_mae_switch_port_data *port_datap 2162 __rte_unused, 2163 void *user_datap) 2164 { 2165 int *counter = user_datap; 2166 2167 SFC_ASSERT(counter != NULL); 2168 2169 if (type == SFC_MAE_SWITCH_PORT_REPRESENTOR) 2170 (*counter)++; 2171 } 2172 2173 struct sfc_get_representors_ctx { 2174 struct rte_eth_representor_info *info; 2175 struct sfc_adapter *sa; 2176 uint16_t switch_domain_id; 2177 const efx_pcie_interface_t *controllers; 2178 size_t nb_controllers; 2179 }; 2180 2181 static void 2182 sfc_get_representors_cb(enum sfc_mae_switch_port_type type, 2183 const efx_mport_sel_t *ethdev_mportp __rte_unused, 2184 uint16_t ethdev_port_id __rte_unused, 2185 const efx_mport_sel_t *entity_mportp __rte_unused, 2186 uint16_t switch_port_id, 2187 union sfc_mae_switch_port_data *port_datap, 2188 void *user_datap) 2189 { 2190 struct sfc_get_representors_ctx *ctx = user_datap; 2191 struct rte_eth_representor_range *range; 2192 int ret; 2193 int rc; 2194 2195 SFC_ASSERT(ctx != NULL); 2196 SFC_ASSERT(ctx->info != NULL); 2197 SFC_ASSERT(ctx->sa != NULL); 2198 2199 if (type != SFC_MAE_SWITCH_PORT_REPRESENTOR) { 2200 sfc_dbg(ctx->sa, "not a representor, skipping"); 2201 return; 2202 } 2203 if (ctx->info->nb_ranges >= ctx->info->nb_ranges_alloc) { 2204 sfc_dbg(ctx->sa, "info structure is full already"); 2205 return; 2206 } 2207 2208 range = &ctx->info->ranges[ctx->info->nb_ranges]; 2209 rc = sfc_mae_switch_controller_from_mapping(ctx->controllers, 2210 ctx->nb_controllers, 2211 port_datap->repr.intf, 2212 &range->controller); 2213 if (rc != 0) { 2214 sfc_err(ctx->sa, "invalid representor controller: %d", 2215 port_datap->repr.intf); 2216 range->controller = -1; 2217 } 2218 range->pf = port_datap->repr.pf; 2219 range->id_base = switch_port_id; 2220 range->id_end = switch_port_id; 2221 2222 if (port_datap->repr.vf != EFX_PCI_VF_INVALID) { 2223 range->type = RTE_ETH_REPRESENTOR_VF; 2224 range->vf = port_datap->repr.vf; 2225 ret = snprintf(range->name, RTE_DEV_NAME_MAX_LEN, 2226 "c%dpf%dvf%d", range->controller, range->pf, 2227 range->vf); 2228 } else { 2229 range->type = RTE_ETH_REPRESENTOR_PF; 2230 ret = snprintf(range->name, RTE_DEV_NAME_MAX_LEN, 2231 "c%dpf%d", range->controller, range->pf); 2232 } 2233 if (ret >= RTE_DEV_NAME_MAX_LEN) { 2234 sfc_err(ctx->sa, "representor name has been truncated: %s", 2235 range->name); 2236 } 2237 2238 ctx->info->nb_ranges++; 2239 } 2240 2241 static int 2242 sfc_representor_info_get(struct rte_eth_dev *dev, 2243 struct rte_eth_representor_info *info) 2244 { 2245 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2246 struct sfc_get_representors_ctx get_repr_ctx; 2247 const efx_nic_cfg_t *nic_cfg; 2248 uint16_t switch_domain_id; 2249 uint32_t nb_repr; 2250 int controller; 2251 int rc; 2252 2253 sfc_adapter_lock(sa); 2254 2255 if (sa->mae.status != SFC_MAE_STATUS_SUPPORTED) { 2256 sfc_adapter_unlock(sa); 2257 return -ENOTSUP; 2258 } 2259 2260 rc = sfc_process_mport_journal(sa); 2261 if (rc != 0) { 2262 sfc_adapter_unlock(sa); 2263 SFC_ASSERT(rc > 0); 2264 return -rc; 2265 } 2266 2267 switch_domain_id = sa->mae.switch_domain_id; 2268 2269 nb_repr = 0; 2270 rc = sfc_mae_switch_ports_iterate(switch_domain_id, 2271 sfc_count_representors_cb, 2272 &nb_repr); 2273 if (rc != 0) { 2274 sfc_adapter_unlock(sa); 2275 SFC_ASSERT(rc > 0); 2276 return -rc; 2277 } 2278 2279 if (info == NULL) { 2280 sfc_adapter_unlock(sa); 2281 return nb_repr; 2282 } 2283 2284 rc = sfc_mae_switch_domain_controllers(switch_domain_id, 2285 &get_repr_ctx.controllers, 2286 &get_repr_ctx.nb_controllers); 2287 if (rc != 0) { 2288 sfc_adapter_unlock(sa); 2289 SFC_ASSERT(rc > 0); 2290 return -rc; 2291 } 2292 2293 nic_cfg = efx_nic_cfg_get(sa->nic); 2294 2295 rc = sfc_mae_switch_domain_get_controller(switch_domain_id, 2296 nic_cfg->enc_intf, 2297 &controller); 2298 if (rc != 0) { 2299 sfc_err(sa, "invalid controller: %d", nic_cfg->enc_intf); 2300 controller = -1; 2301 } 2302 2303 info->controller = controller; 2304 info->pf = nic_cfg->enc_pf; 2305 2306 get_repr_ctx.info = info; 2307 get_repr_ctx.sa = sa; 2308 get_repr_ctx.switch_domain_id = switch_domain_id; 2309 rc = sfc_mae_switch_ports_iterate(switch_domain_id, 2310 sfc_get_representors_cb, 2311 &get_repr_ctx); 2312 if (rc != 0) { 2313 sfc_adapter_unlock(sa); 2314 SFC_ASSERT(rc > 0); 2315 return -rc; 2316 } 2317 2318 sfc_adapter_unlock(sa); 2319 return nb_repr; 2320 } 2321 2322 static int 2323 sfc_rx_metadata_negotiate(struct rte_eth_dev *dev, uint64_t *features) 2324 { 2325 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2326 uint64_t supported = 0; 2327 2328 sfc_adapter_lock(sa); 2329 2330 if ((sa->priv.dp_rx->features & SFC_DP_RX_FEAT_FLOW_FLAG) != 0) 2331 supported |= RTE_ETH_RX_METADATA_USER_FLAG; 2332 2333 if ((sa->priv.dp_rx->features & SFC_DP_RX_FEAT_FLOW_MARK) != 0) 2334 supported |= RTE_ETH_RX_METADATA_USER_MARK; 2335 2336 if (sfc_flow_tunnel_is_supported(sa)) 2337 supported |= RTE_ETH_RX_METADATA_TUNNEL_ID; 2338 2339 sa->negotiated_rx_metadata = supported & *features; 2340 *features = sa->negotiated_rx_metadata; 2341 2342 sfc_adapter_unlock(sa); 2343 2344 return 0; 2345 } 2346 2347 static const struct eth_dev_ops sfc_eth_dev_ops = { 2348 .dev_configure = sfc_dev_configure, 2349 .dev_start = sfc_dev_start, 2350 .dev_stop = sfc_dev_stop, 2351 .dev_set_link_up = sfc_dev_set_link_up, 2352 .dev_set_link_down = sfc_dev_set_link_down, 2353 .dev_close = sfc_dev_close, 2354 .promiscuous_enable = sfc_dev_promisc_enable, 2355 .promiscuous_disable = sfc_dev_promisc_disable, 2356 .allmulticast_enable = sfc_dev_allmulti_enable, 2357 .allmulticast_disable = sfc_dev_allmulti_disable, 2358 .link_update = sfc_dev_link_update, 2359 .stats_get = sfc_stats_get, 2360 .stats_reset = sfc_stats_reset, 2361 .xstats_get = sfc_xstats_get, 2362 .xstats_reset = sfc_stats_reset, 2363 .xstats_get_names = sfc_xstats_get_names, 2364 .dev_infos_get = sfc_dev_infos_get, 2365 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 2366 .mtu_set = sfc_dev_set_mtu, 2367 .rx_queue_start = sfc_rx_queue_start, 2368 .rx_queue_stop = sfc_rx_queue_stop, 2369 .tx_queue_start = sfc_tx_queue_start, 2370 .tx_queue_stop = sfc_tx_queue_stop, 2371 .rx_queue_setup = sfc_rx_queue_setup, 2372 .rx_queue_release = sfc_rx_queue_release, 2373 .rx_queue_intr_enable = sfc_rx_queue_intr_enable, 2374 .rx_queue_intr_disable = sfc_rx_queue_intr_disable, 2375 .tx_queue_setup = sfc_tx_queue_setup, 2376 .tx_queue_release = sfc_tx_queue_release, 2377 .flow_ctrl_get = sfc_flow_ctrl_get, 2378 .flow_ctrl_set = sfc_flow_ctrl_set, 2379 .mac_addr_set = sfc_mac_addr_set, 2380 .udp_tunnel_port_add = sfc_dev_udp_tunnel_port_add, 2381 .udp_tunnel_port_del = sfc_dev_udp_tunnel_port_del, 2382 .reta_update = sfc_dev_rss_reta_update, 2383 .reta_query = sfc_dev_rss_reta_query, 2384 .rss_hash_update = sfc_dev_rss_hash_update, 2385 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 2386 .flow_ops_get = sfc_dev_flow_ops_get, 2387 .set_mc_addr_list = sfc_set_mc_addr_list, 2388 .rxq_info_get = sfc_rx_queue_info_get, 2389 .txq_info_get = sfc_tx_queue_info_get, 2390 .fw_version_get = sfc_fw_version_get, 2391 .xstats_get_by_id = sfc_xstats_get_by_id, 2392 .xstats_get_names_by_id = sfc_xstats_get_names_by_id, 2393 .pool_ops_supported = sfc_pool_ops_supported, 2394 .representor_info_get = sfc_representor_info_get, 2395 .rx_metadata_negotiate = sfc_rx_metadata_negotiate, 2396 }; 2397 2398 struct sfc_ethdev_init_data { 2399 uint16_t nb_representors; 2400 }; 2401 2402 /** 2403 * Duplicate a string in potentially shared memory required for 2404 * multi-process support. 2405 * 2406 * strdup() allocates from process-local heap/memory. 2407 */ 2408 static char * 2409 sfc_strdup(const char *str) 2410 { 2411 size_t size; 2412 char *copy; 2413 2414 if (str == NULL) 2415 return NULL; 2416 2417 size = strlen(str) + 1; 2418 copy = rte_malloc(__func__, size, 0); 2419 if (copy != NULL) 2420 rte_memcpy(copy, str, size); 2421 2422 return copy; 2423 } 2424 2425 static int 2426 sfc_eth_dev_set_ops(struct rte_eth_dev *dev) 2427 { 2428 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2429 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2430 const struct sfc_dp_rx *dp_rx; 2431 const struct sfc_dp_tx *dp_tx; 2432 const efx_nic_cfg_t *encp; 2433 unsigned int avail_caps = 0; 2434 const char *rx_name = NULL; 2435 const char *tx_name = NULL; 2436 int rc; 2437 2438 switch (sa->family) { 2439 case EFX_FAMILY_HUNTINGTON: 2440 case EFX_FAMILY_MEDFORD: 2441 case EFX_FAMILY_MEDFORD2: 2442 avail_caps |= SFC_DP_HW_FW_CAP_EF10; 2443 avail_caps |= SFC_DP_HW_FW_CAP_RX_EFX; 2444 avail_caps |= SFC_DP_HW_FW_CAP_TX_EFX; 2445 break; 2446 case EFX_FAMILY_RIVERHEAD: 2447 avail_caps |= SFC_DP_HW_FW_CAP_EF100; 2448 break; 2449 default: 2450 break; 2451 } 2452 2453 encp = efx_nic_cfg_get(sa->nic); 2454 if (encp->enc_rx_es_super_buffer_supported) 2455 avail_caps |= SFC_DP_HW_FW_CAP_RX_ES_SUPER_BUFFER; 2456 2457 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH, 2458 sfc_kvarg_string_handler, &rx_name); 2459 if (rc != 0) 2460 goto fail_kvarg_rx_datapath; 2461 2462 if (rx_name != NULL) { 2463 dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name); 2464 if (dp_rx == NULL) { 2465 sfc_err(sa, "Rx datapath %s not found", rx_name); 2466 rc = ENOENT; 2467 goto fail_dp_rx; 2468 } 2469 if (!sfc_dp_match_hw_fw_caps(&dp_rx->dp, avail_caps)) { 2470 sfc_err(sa, 2471 "Insufficient Hw/FW capabilities to use Rx datapath %s", 2472 rx_name); 2473 rc = EINVAL; 2474 goto fail_dp_rx_caps; 2475 } 2476 } else { 2477 dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps); 2478 if (dp_rx == NULL) { 2479 sfc_err(sa, "Rx datapath by caps %#x not found", 2480 avail_caps); 2481 rc = ENOENT; 2482 goto fail_dp_rx; 2483 } 2484 } 2485 2486 sas->dp_rx_name = sfc_strdup(dp_rx->dp.name); 2487 if (sas->dp_rx_name == NULL) { 2488 rc = ENOMEM; 2489 goto fail_dp_rx_name; 2490 } 2491 2492 if (strcmp(dp_rx->dp.name, SFC_KVARG_DATAPATH_EF10_ESSB) == 0) { 2493 /* FLAG and MARK are always available from Rx prefix. */ 2494 sa->negotiated_rx_metadata |= RTE_ETH_RX_METADATA_USER_FLAG; 2495 sa->negotiated_rx_metadata |= RTE_ETH_RX_METADATA_USER_MARK; 2496 } 2497 2498 sfc_notice(sa, "use %s Rx datapath", sas->dp_rx_name); 2499 2500 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH, 2501 sfc_kvarg_string_handler, &tx_name); 2502 if (rc != 0) 2503 goto fail_kvarg_tx_datapath; 2504 2505 if (tx_name != NULL) { 2506 dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name); 2507 if (dp_tx == NULL) { 2508 sfc_err(sa, "Tx datapath %s not found", tx_name); 2509 rc = ENOENT; 2510 goto fail_dp_tx; 2511 } 2512 if (!sfc_dp_match_hw_fw_caps(&dp_tx->dp, avail_caps)) { 2513 sfc_err(sa, 2514 "Insufficient Hw/FW capabilities to use Tx datapath %s", 2515 tx_name); 2516 rc = EINVAL; 2517 goto fail_dp_tx_caps; 2518 } 2519 } else { 2520 dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps); 2521 if (dp_tx == NULL) { 2522 sfc_err(sa, "Tx datapath by caps %#x not found", 2523 avail_caps); 2524 rc = ENOENT; 2525 goto fail_dp_tx; 2526 } 2527 } 2528 2529 sas->dp_tx_name = sfc_strdup(dp_tx->dp.name); 2530 if (sas->dp_tx_name == NULL) { 2531 rc = ENOMEM; 2532 goto fail_dp_tx_name; 2533 } 2534 2535 sfc_notice(sa, "use %s Tx datapath", sas->dp_tx_name); 2536 2537 sa->priv.dp_rx = dp_rx; 2538 sa->priv.dp_tx = dp_tx; 2539 2540 dev->rx_pkt_burst = dp_rx->pkt_burst; 2541 dev->tx_pkt_prepare = dp_tx->pkt_prepare; 2542 dev->tx_pkt_burst = dp_tx->pkt_burst; 2543 2544 dev->rx_queue_count = sfc_rx_queue_count; 2545 dev->rx_descriptor_status = sfc_rx_descriptor_status; 2546 dev->tx_descriptor_status = sfc_tx_descriptor_status; 2547 dev->dev_ops = &sfc_eth_dev_ops; 2548 2549 return 0; 2550 2551 fail_dp_tx_name: 2552 fail_dp_tx_caps: 2553 fail_dp_tx: 2554 fail_kvarg_tx_datapath: 2555 rte_free(sas->dp_rx_name); 2556 sas->dp_rx_name = NULL; 2557 2558 fail_dp_rx_name: 2559 fail_dp_rx_caps: 2560 fail_dp_rx: 2561 fail_kvarg_rx_datapath: 2562 return rc; 2563 } 2564 2565 static void 2566 sfc_eth_dev_clear_ops(struct rte_eth_dev *dev) 2567 { 2568 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2569 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2570 2571 dev->dev_ops = NULL; 2572 dev->tx_pkt_prepare = NULL; 2573 dev->rx_pkt_burst = NULL; 2574 dev->tx_pkt_burst = NULL; 2575 2576 rte_free(sas->dp_tx_name); 2577 sas->dp_tx_name = NULL; 2578 sa->priv.dp_tx = NULL; 2579 2580 rte_free(sas->dp_rx_name); 2581 sas->dp_rx_name = NULL; 2582 sa->priv.dp_rx = NULL; 2583 } 2584 2585 static const struct eth_dev_ops sfc_eth_dev_secondary_ops = { 2586 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 2587 .reta_query = sfc_dev_rss_reta_query, 2588 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 2589 .rxq_info_get = sfc_rx_queue_info_get, 2590 .txq_info_get = sfc_tx_queue_info_get, 2591 }; 2592 2593 static int 2594 sfc_eth_dev_secondary_init(struct rte_eth_dev *dev, uint32_t logtype_main) 2595 { 2596 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2597 struct sfc_adapter_priv *sap; 2598 const struct sfc_dp_rx *dp_rx; 2599 const struct sfc_dp_tx *dp_tx; 2600 int rc; 2601 2602 /* 2603 * Allocate process private data from heap, since it should not 2604 * be located in shared memory allocated using rte_malloc() API. 2605 */ 2606 sap = calloc(1, sizeof(*sap)); 2607 if (sap == NULL) { 2608 rc = ENOMEM; 2609 goto fail_alloc_priv; 2610 } 2611 2612 sap->logtype_main = logtype_main; 2613 2614 dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, sas->dp_rx_name); 2615 if (dp_rx == NULL) { 2616 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2617 "cannot find %s Rx datapath", sas->dp_rx_name); 2618 rc = ENOENT; 2619 goto fail_dp_rx; 2620 } 2621 if (~dp_rx->features & SFC_DP_RX_FEAT_MULTI_PROCESS) { 2622 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2623 "%s Rx datapath does not support multi-process", 2624 sas->dp_rx_name); 2625 rc = EINVAL; 2626 goto fail_dp_rx_multi_process; 2627 } 2628 2629 dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, sas->dp_tx_name); 2630 if (dp_tx == NULL) { 2631 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2632 "cannot find %s Tx datapath", sas->dp_tx_name); 2633 rc = ENOENT; 2634 goto fail_dp_tx; 2635 } 2636 if (~dp_tx->features & SFC_DP_TX_FEAT_MULTI_PROCESS) { 2637 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2638 "%s Tx datapath does not support multi-process", 2639 sas->dp_tx_name); 2640 rc = EINVAL; 2641 goto fail_dp_tx_multi_process; 2642 } 2643 2644 sap->dp_rx = dp_rx; 2645 sap->dp_tx = dp_tx; 2646 2647 dev->process_private = sap; 2648 dev->rx_pkt_burst = dp_rx->pkt_burst; 2649 dev->tx_pkt_prepare = dp_tx->pkt_prepare; 2650 dev->tx_pkt_burst = dp_tx->pkt_burst; 2651 dev->rx_queue_count = sfc_rx_queue_count; 2652 dev->rx_descriptor_status = sfc_rx_descriptor_status; 2653 dev->tx_descriptor_status = sfc_tx_descriptor_status; 2654 dev->dev_ops = &sfc_eth_dev_secondary_ops; 2655 2656 return 0; 2657 2658 fail_dp_tx_multi_process: 2659 fail_dp_tx: 2660 fail_dp_rx_multi_process: 2661 fail_dp_rx: 2662 free(sap); 2663 2664 fail_alloc_priv: 2665 return rc; 2666 } 2667 2668 static void 2669 sfc_register_dp(void) 2670 { 2671 /* Register once */ 2672 if (TAILQ_EMPTY(&sfc_dp_head)) { 2673 /* Prefer EF10 datapath */ 2674 sfc_dp_register(&sfc_dp_head, &sfc_ef100_rx.dp); 2675 sfc_dp_register(&sfc_dp_head, &sfc_ef10_essb_rx.dp); 2676 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp); 2677 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); 2678 2679 sfc_dp_register(&sfc_dp_head, &sfc_ef100_tx.dp); 2680 sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp); 2681 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp); 2682 sfc_dp_register(&sfc_dp_head, &sfc_ef10_simple_tx.dp); 2683 } 2684 } 2685 2686 static int 2687 sfc_parse_switch_mode(struct sfc_adapter *sa, bool has_representors) 2688 { 2689 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 2690 const char *switch_mode = NULL; 2691 int rc; 2692 2693 sfc_log_init(sa, "entry"); 2694 2695 rc = sfc_kvargs_process(sa, SFC_KVARG_SWITCH_MODE, 2696 sfc_kvarg_string_handler, &switch_mode); 2697 if (rc != 0) 2698 goto fail_kvargs; 2699 2700 if (switch_mode == NULL) { 2701 sa->switchdev = encp->enc_mae_supported && 2702 (!encp->enc_datapath_cap_evb || 2703 has_representors); 2704 } else if (strcasecmp(switch_mode, SFC_KVARG_SWITCH_MODE_LEGACY) == 0) { 2705 sa->switchdev = false; 2706 } else if (strcasecmp(switch_mode, 2707 SFC_KVARG_SWITCH_MODE_SWITCHDEV) == 0) { 2708 sa->switchdev = true; 2709 } else { 2710 sfc_err(sa, "invalid switch mode device argument '%s'", 2711 switch_mode); 2712 rc = EINVAL; 2713 goto fail_mode; 2714 } 2715 2716 sfc_log_init(sa, "done"); 2717 2718 return 0; 2719 2720 fail_mode: 2721 fail_kvargs: 2722 sfc_log_init(sa, "failed: %s", rte_strerror(rc)); 2723 2724 return rc; 2725 } 2726 2727 static int 2728 sfc_eth_dev_init(struct rte_eth_dev *dev, void *init_params) 2729 { 2730 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2731 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 2732 struct sfc_ethdev_init_data *init_data = init_params; 2733 uint32_t logtype_main; 2734 struct sfc_adapter *sa; 2735 int rc; 2736 const efx_nic_cfg_t *encp; 2737 const struct rte_ether_addr *from; 2738 int ret; 2739 2740 if (sfc_efx_dev_class_get(pci_dev->device.devargs) != 2741 SFC_EFX_DEV_CLASS_NET) { 2742 SFC_GENERIC_LOG(DEBUG, 2743 "Incompatible device class: skip probing, should be probed by other sfc driver."); 2744 return 1; 2745 } 2746 2747 rc = sfc_dp_mport_register(); 2748 if (rc != 0) 2749 return rc; 2750 2751 sfc_register_dp(); 2752 2753 logtype_main = sfc_register_logtype(&pci_dev->addr, 2754 SFC_LOGTYPE_MAIN_STR, 2755 RTE_LOG_NOTICE); 2756 2757 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2758 return -sfc_eth_dev_secondary_init(dev, logtype_main); 2759 2760 /* Required for logging */ 2761 ret = snprintf(sas->log_prefix, sizeof(sas->log_prefix), 2762 "PMD: sfc_efx " PCI_PRI_FMT " #%" PRIu16 ": ", 2763 pci_dev->addr.domain, pci_dev->addr.bus, 2764 pci_dev->addr.devid, pci_dev->addr.function, 2765 dev->data->port_id); 2766 if (ret < 0 || ret >= (int)sizeof(sas->log_prefix)) { 2767 SFC_GENERIC_LOG(ERR, 2768 "reserved log prefix is too short for " PCI_PRI_FMT, 2769 pci_dev->addr.domain, pci_dev->addr.bus, 2770 pci_dev->addr.devid, pci_dev->addr.function); 2771 return -EINVAL; 2772 } 2773 sas->pci_addr = pci_dev->addr; 2774 sas->port_id = dev->data->port_id; 2775 2776 /* 2777 * Allocate process private data from heap, since it should not 2778 * be located in shared memory allocated using rte_malloc() API. 2779 */ 2780 sa = calloc(1, sizeof(*sa)); 2781 if (sa == NULL) { 2782 rc = ENOMEM; 2783 goto fail_alloc_sa; 2784 } 2785 2786 dev->process_private = sa; 2787 2788 /* Required for logging */ 2789 sa->priv.shared = sas; 2790 sa->priv.logtype_main = logtype_main; 2791 2792 sa->eth_dev = dev; 2793 2794 /* Copy PCI device info to the dev->data */ 2795 rte_eth_copy_pci_info(dev, pci_dev); 2796 dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 2797 2798 rc = sfc_kvargs_parse(sa); 2799 if (rc != 0) 2800 goto fail_kvargs_parse; 2801 2802 sfc_log_init(sa, "entry"); 2803 2804 dev->data->mac_addrs = rte_zmalloc("sfc", RTE_ETHER_ADDR_LEN, 0); 2805 if (dev->data->mac_addrs == NULL) { 2806 rc = ENOMEM; 2807 goto fail_mac_addrs; 2808 } 2809 2810 sfc_adapter_lock_init(sa); 2811 sfc_adapter_lock(sa); 2812 2813 sfc_log_init(sa, "probing"); 2814 rc = sfc_probe(sa); 2815 if (rc != 0) 2816 goto fail_probe; 2817 2818 /* 2819 * Selecting a default switch mode requires the NIC to be probed and 2820 * to have its capabilities filled in. 2821 */ 2822 rc = sfc_parse_switch_mode(sa, init_data->nb_representors > 0); 2823 if (rc != 0) 2824 goto fail_switch_mode; 2825 2826 sfc_log_init(sa, "set device ops"); 2827 rc = sfc_eth_dev_set_ops(dev); 2828 if (rc != 0) 2829 goto fail_set_ops; 2830 2831 sfc_log_init(sa, "attaching"); 2832 rc = sfc_attach(sa); 2833 if (rc != 0) 2834 goto fail_attach; 2835 2836 if (sa->switchdev && sa->mae.status != SFC_MAE_STATUS_SUPPORTED) { 2837 sfc_err(sa, 2838 "failed to enable switchdev mode without MAE support"); 2839 rc = ENOTSUP; 2840 goto fail_switchdev_no_mae; 2841 } 2842 2843 encp = efx_nic_cfg_get(sa->nic); 2844 2845 /* 2846 * The arguments are really reverse order in comparison to 2847 * Linux kernel. Copy from NIC config to Ethernet device data. 2848 */ 2849 from = (const struct rte_ether_addr *)(encp->enc_mac_addr); 2850 rte_ether_addr_copy(from, &dev->data->mac_addrs[0]); 2851 2852 sfc_adapter_unlock(sa); 2853 2854 sfc_log_init(sa, "done"); 2855 return 0; 2856 2857 fail_switchdev_no_mae: 2858 sfc_detach(sa); 2859 2860 fail_attach: 2861 sfc_eth_dev_clear_ops(dev); 2862 2863 fail_set_ops: 2864 fail_switch_mode: 2865 sfc_unprobe(sa); 2866 2867 fail_probe: 2868 sfc_adapter_unlock(sa); 2869 sfc_adapter_lock_fini(sa); 2870 rte_free(dev->data->mac_addrs); 2871 dev->data->mac_addrs = NULL; 2872 2873 fail_mac_addrs: 2874 sfc_kvargs_cleanup(sa); 2875 2876 fail_kvargs_parse: 2877 sfc_log_init(sa, "failed %d", rc); 2878 dev->process_private = NULL; 2879 free(sa); 2880 2881 fail_alloc_sa: 2882 SFC_ASSERT(rc > 0); 2883 return -rc; 2884 } 2885 2886 static int 2887 sfc_eth_dev_uninit(struct rte_eth_dev *dev) 2888 { 2889 sfc_dev_close(dev); 2890 2891 return 0; 2892 } 2893 2894 static const struct rte_pci_id pci_id_sfc_efx_map[] = { 2895 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, 2896 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, 2897 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, 2898 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, 2899 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, 2900 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, 2901 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2) }, 2902 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2_VF) }, 2903 { RTE_PCI_DEVICE(EFX_PCI_VENID_XILINX, EFX_PCI_DEVID_RIVERHEAD) }, 2904 { .vendor_id = 0 /* sentinel */ } 2905 }; 2906 2907 static int 2908 sfc_parse_rte_devargs(const char *args, struct rte_eth_devargs *devargs) 2909 { 2910 struct rte_eth_devargs eth_da = { .nb_representor_ports = 0 }; 2911 int rc; 2912 2913 if (args != NULL) { 2914 rc = rte_eth_devargs_parse(args, ð_da); 2915 if (rc != 0) { 2916 SFC_GENERIC_LOG(ERR, 2917 "Failed to parse generic devargs '%s'", 2918 args); 2919 return rc; 2920 } 2921 } 2922 2923 *devargs = eth_da; 2924 2925 return 0; 2926 } 2927 2928 static int 2929 sfc_eth_dev_find_or_create(struct rte_pci_device *pci_dev, 2930 struct sfc_ethdev_init_data *init_data, 2931 struct rte_eth_dev **devp, 2932 bool *dev_created) 2933 { 2934 struct rte_eth_dev *dev; 2935 bool created = false; 2936 int rc; 2937 2938 dev = rte_eth_dev_allocated(pci_dev->device.name); 2939 if (dev == NULL) { 2940 rc = rte_eth_dev_create(&pci_dev->device, pci_dev->device.name, 2941 sizeof(struct sfc_adapter_shared), 2942 eth_dev_pci_specific_init, pci_dev, 2943 sfc_eth_dev_init, init_data); 2944 if (rc != 0) { 2945 SFC_GENERIC_LOG(ERR, "Failed to create sfc ethdev '%s'", 2946 pci_dev->device.name); 2947 return rc; 2948 } 2949 2950 created = true; 2951 2952 dev = rte_eth_dev_allocated(pci_dev->device.name); 2953 if (dev == NULL) { 2954 SFC_GENERIC_LOG(ERR, 2955 "Failed to find allocated sfc ethdev '%s'", 2956 pci_dev->device.name); 2957 return -ENODEV; 2958 } 2959 } 2960 2961 *devp = dev; 2962 *dev_created = created; 2963 2964 return 0; 2965 } 2966 2967 static int 2968 sfc_eth_dev_create_repr(struct sfc_adapter *sa, 2969 efx_pcie_interface_t controller, 2970 uint16_t port, 2971 uint16_t repr_port, 2972 enum rte_eth_representor_type type) 2973 { 2974 struct sfc_repr_entity_info entity; 2975 efx_mport_sel_t mport_sel; 2976 int rc; 2977 2978 switch (type) { 2979 case RTE_ETH_REPRESENTOR_NONE: 2980 return 0; 2981 case RTE_ETH_REPRESENTOR_VF: 2982 case RTE_ETH_REPRESENTOR_PF: 2983 break; 2984 case RTE_ETH_REPRESENTOR_SF: 2985 sfc_err(sa, "SF representors are not supported"); 2986 return ENOTSUP; 2987 default: 2988 sfc_err(sa, "unknown representor type: %d", type); 2989 return ENOTSUP; 2990 } 2991 2992 rc = efx_mae_mport_by_pcie_mh_function(controller, 2993 port, 2994 repr_port, 2995 &mport_sel); 2996 if (rc != 0) { 2997 sfc_err(sa, 2998 "failed to get m-port selector for controller %u port %u repr_port %u: %s", 2999 controller, port, repr_port, rte_strerror(-rc)); 3000 return rc; 3001 } 3002 3003 memset(&entity, 0, sizeof(entity)); 3004 entity.type = type; 3005 entity.intf = controller; 3006 entity.pf = port; 3007 entity.vf = repr_port; 3008 3009 rc = sfc_repr_create(sa->eth_dev, &entity, sa->mae.switch_domain_id, 3010 &mport_sel); 3011 if (rc != 0) { 3012 sfc_err(sa, 3013 "failed to create representor for controller %u port %u repr_port %u: %s", 3014 controller, port, repr_port, rte_strerror(-rc)); 3015 return rc; 3016 } 3017 3018 return 0; 3019 } 3020 3021 static int 3022 sfc_eth_dev_create_repr_port(struct sfc_adapter *sa, 3023 const struct rte_eth_devargs *eth_da, 3024 efx_pcie_interface_t controller, 3025 uint16_t port) 3026 { 3027 int first_error = 0; 3028 uint16_t i; 3029 int rc; 3030 3031 if (eth_da->type == RTE_ETH_REPRESENTOR_PF) { 3032 return sfc_eth_dev_create_repr(sa, controller, port, 3033 EFX_PCI_VF_INVALID, 3034 eth_da->type); 3035 } 3036 3037 for (i = 0; i < eth_da->nb_representor_ports; i++) { 3038 rc = sfc_eth_dev_create_repr(sa, controller, port, 3039 eth_da->representor_ports[i], 3040 eth_da->type); 3041 if (rc != 0 && first_error == 0) 3042 first_error = rc; 3043 } 3044 3045 return first_error; 3046 } 3047 3048 static int 3049 sfc_eth_dev_create_repr_controller(struct sfc_adapter *sa, 3050 const struct rte_eth_devargs *eth_da, 3051 efx_pcie_interface_t controller) 3052 { 3053 const efx_nic_cfg_t *encp; 3054 int first_error = 0; 3055 uint16_t default_port; 3056 uint16_t i; 3057 int rc; 3058 3059 if (eth_da->nb_ports == 0) { 3060 encp = efx_nic_cfg_get(sa->nic); 3061 default_port = encp->enc_intf == controller ? encp->enc_pf : 0; 3062 return sfc_eth_dev_create_repr_port(sa, eth_da, controller, 3063 default_port); 3064 } 3065 3066 for (i = 0; i < eth_da->nb_ports; i++) { 3067 rc = sfc_eth_dev_create_repr_port(sa, eth_da, controller, 3068 eth_da->ports[i]); 3069 if (rc != 0 && first_error == 0) 3070 first_error = rc; 3071 } 3072 3073 return first_error; 3074 } 3075 3076 static int 3077 sfc_eth_dev_create_representors(struct rte_eth_dev *dev, 3078 const struct rte_eth_devargs *eth_da) 3079 { 3080 efx_pcie_interface_t intf; 3081 const efx_nic_cfg_t *encp; 3082 struct sfc_adapter *sa; 3083 uint16_t switch_domain_id; 3084 uint16_t i; 3085 int rc; 3086 3087 sa = sfc_adapter_by_eth_dev(dev); 3088 switch_domain_id = sa->mae.switch_domain_id; 3089 3090 switch (eth_da->type) { 3091 case RTE_ETH_REPRESENTOR_NONE: 3092 return 0; 3093 case RTE_ETH_REPRESENTOR_PF: 3094 case RTE_ETH_REPRESENTOR_VF: 3095 break; 3096 case RTE_ETH_REPRESENTOR_SF: 3097 sfc_err(sa, "SF representors are not supported"); 3098 return -ENOTSUP; 3099 default: 3100 sfc_err(sa, "unknown representor type: %d", 3101 eth_da->type); 3102 return -ENOTSUP; 3103 } 3104 3105 if (!sa->switchdev) { 3106 sfc_err(sa, "cannot create representors in non-switchdev mode"); 3107 return -EINVAL; 3108 } 3109 3110 if (!sfc_repr_available(sfc_sa2shared(sa))) { 3111 sfc_err(sa, "cannot create representors: unsupported"); 3112 3113 return -ENOTSUP; 3114 } 3115 3116 /* 3117 * This is needed to construct the DPDK controller -> EFX interface 3118 * mapping. 3119 */ 3120 sfc_adapter_lock(sa); 3121 rc = sfc_process_mport_journal(sa); 3122 sfc_adapter_unlock(sa); 3123 if (rc != 0) { 3124 SFC_ASSERT(rc > 0); 3125 return -rc; 3126 } 3127 3128 if (eth_da->nb_mh_controllers > 0) { 3129 for (i = 0; i < eth_da->nb_mh_controllers; i++) { 3130 rc = sfc_mae_switch_domain_get_intf(switch_domain_id, 3131 eth_da->mh_controllers[i], 3132 &intf); 3133 if (rc != 0) { 3134 sfc_err(sa, "failed to get representor"); 3135 continue; 3136 } 3137 sfc_eth_dev_create_repr_controller(sa, eth_da, intf); 3138 } 3139 } else { 3140 encp = efx_nic_cfg_get(sa->nic); 3141 sfc_eth_dev_create_repr_controller(sa, eth_da, encp->enc_intf); 3142 } 3143 3144 return 0; 3145 } 3146 3147 static int sfc_eth_dev_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 3148 struct rte_pci_device *pci_dev) 3149 { 3150 struct sfc_ethdev_init_data init_data; 3151 struct rte_eth_devargs eth_da; 3152 struct rte_eth_dev *dev; 3153 bool dev_created; 3154 int rc; 3155 3156 if (pci_dev->device.devargs != NULL) { 3157 rc = sfc_parse_rte_devargs(pci_dev->device.devargs->args, 3158 ð_da); 3159 if (rc != 0) 3160 return rc; 3161 } else { 3162 memset(ð_da, 0, sizeof(eth_da)); 3163 } 3164 3165 /* If no VF representors specified, check for PF ones */ 3166 if (eth_da.nb_representor_ports > 0) 3167 init_data.nb_representors = eth_da.nb_representor_ports; 3168 else 3169 init_data.nb_representors = eth_da.nb_ports; 3170 3171 if (init_data.nb_representors > 0 && 3172 rte_eal_process_type() != RTE_PROC_PRIMARY) { 3173 SFC_GENERIC_LOG(ERR, 3174 "Create representors from secondary process not supported, dev '%s'", 3175 pci_dev->device.name); 3176 return -ENOTSUP; 3177 } 3178 3179 /* 3180 * Driver supports RTE_PCI_DRV_PROBE_AGAIN. Hence create device only 3181 * if it does not already exist. Re-probing an existing device is 3182 * expected to allow additional representors to be configured. 3183 */ 3184 rc = sfc_eth_dev_find_or_create(pci_dev, &init_data, &dev, 3185 &dev_created); 3186 if (rc != 0) 3187 return rc; 3188 3189 rc = sfc_eth_dev_create_representors(dev, ð_da); 3190 if (rc != 0) { 3191 if (dev_created) 3192 (void)rte_eth_dev_destroy(dev, sfc_eth_dev_uninit); 3193 3194 return rc; 3195 } 3196 3197 return 0; 3198 } 3199 3200 static int sfc_eth_dev_pci_remove(struct rte_pci_device *pci_dev) 3201 { 3202 return rte_eth_dev_pci_generic_remove(pci_dev, sfc_eth_dev_uninit); 3203 } 3204 3205 static struct rte_pci_driver sfc_efx_pmd = { 3206 .id_table = pci_id_sfc_efx_map, 3207 .drv_flags = 3208 RTE_PCI_DRV_INTR_LSC | 3209 RTE_PCI_DRV_NEED_MAPPING | 3210 RTE_PCI_DRV_PROBE_AGAIN, 3211 .probe = sfc_eth_dev_pci_probe, 3212 .remove = sfc_eth_dev_pci_remove, 3213 }; 3214 3215 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd); 3216 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); 3217 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio-pci"); 3218 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, 3219 SFC_KVARG_SWITCH_MODE "=" SFC_KVARG_VALUES_SWITCH_MODE " " 3220 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " " 3221 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " " 3222 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " 3223 SFC_KVARG_FW_VARIANT "=" SFC_KVARG_VALUES_FW_VARIANT " " 3224 SFC_KVARG_RXD_WAIT_TIMEOUT_NS "=<long> " 3225 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long>"); 3226 3227 RTE_INIT(sfc_driver_register_logtype) 3228 { 3229 int ret; 3230 3231 ret = rte_log_register_type_and_pick_level(SFC_LOGTYPE_PREFIX "driver", 3232 RTE_LOG_NOTICE); 3233 sfc_logtype_driver = (ret < 0) ? RTE_LOGTYPE_PMD : ret; 3234 } 3235