1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) 2016-2017 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * This software was jointly developed between OKTET Labs (under contract 8 * for Solarflare) and Solarflare Communications, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <rte_dev.h> 33 #include <rte_ethdev.h> 34 #include <rte_ethdev_pci.h> 35 #include <rte_pci.h> 36 #include <rte_bus_pci.h> 37 #include <rte_errno.h> 38 39 #include "efx.h" 40 41 #include "sfc.h" 42 #include "sfc_debug.h" 43 #include "sfc_log.h" 44 #include "sfc_kvargs.h" 45 #include "sfc_ev.h" 46 #include "sfc_rx.h" 47 #include "sfc_tx.h" 48 #include "sfc_flow.h" 49 #include "sfc_dp.h" 50 #include "sfc_dp_rx.h" 51 52 static struct sfc_dp_list sfc_dp_head = 53 TAILQ_HEAD_INITIALIZER(sfc_dp_head); 54 55 static int 56 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) 57 { 58 struct sfc_adapter *sa = dev->data->dev_private; 59 efx_nic_fw_info_t enfi; 60 int ret; 61 int rc; 62 63 /* 64 * Return value of the callback is likely supposed to be 65 * equal to or greater than 0, nevertheless, if an error 66 * occurs, it will be desirable to pass it to the caller 67 */ 68 if ((fw_version == NULL) || (fw_size == 0)) 69 return -EINVAL; 70 71 rc = efx_nic_get_fw_version(sa->nic, &enfi); 72 if (rc != 0) 73 return -rc; 74 75 ret = snprintf(fw_version, fw_size, 76 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16, 77 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1], 78 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]); 79 if (ret < 0) 80 return ret; 81 82 if (enfi.enfi_dpcpu_fw_ids_valid) { 83 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret); 84 int ret_extra; 85 86 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset, 87 fw_size - dpcpu_fw_ids_offset, 88 " rx%" PRIx16 " tx%" PRIx16, 89 enfi.enfi_rx_dpcpu_fw_id, 90 enfi.enfi_tx_dpcpu_fw_id); 91 if (ret_extra < 0) 92 return ret_extra; 93 94 ret += ret_extra; 95 } 96 97 if (fw_size < (size_t)(++ret)) 98 return ret; 99 else 100 return 0; 101 } 102 103 static void 104 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 105 { 106 struct sfc_adapter *sa = dev->data->dev_private; 107 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 108 109 sfc_log_init(sa, "entry"); 110 111 dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev); 112 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; 113 114 /* Autonegotiation may be disabled */ 115 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 116 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX) 117 dev_info->speed_capa |= ETH_LINK_SPEED_1G; 118 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX) 119 dev_info->speed_capa |= ETH_LINK_SPEED_10G; 120 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX) 121 dev_info->speed_capa |= ETH_LINK_SPEED_40G; 122 123 dev_info->max_rx_queues = sa->rxq_max; 124 dev_info->max_tx_queues = sa->txq_max; 125 126 /* By default packets are dropped if no descriptors are available */ 127 dev_info->default_rxconf.rx_drop_en = 1; 128 129 dev_info->rx_offload_capa = 130 DEV_RX_OFFLOAD_IPV4_CKSUM | 131 DEV_RX_OFFLOAD_UDP_CKSUM | 132 DEV_RX_OFFLOAD_TCP_CKSUM; 133 134 if ((encp->enc_tunnel_encapsulations_supported != 0) && 135 (sa->dp_rx->features & SFC_DP_RX_FEAT_TUNNELS)) 136 dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM; 137 138 dev_info->tx_offload_capa = 139 DEV_TX_OFFLOAD_IPV4_CKSUM | 140 DEV_TX_OFFLOAD_UDP_CKSUM | 141 DEV_TX_OFFLOAD_TCP_CKSUM; 142 143 if (encp->enc_tunnel_encapsulations_supported != 0) 144 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM; 145 146 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP; 147 if ((~sa->dp_tx->features & SFC_DP_TX_FEAT_VLAN_INSERT) || 148 !encp->enc_hw_tx_insert_vlan_enabled) 149 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL; 150 else 151 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT; 152 153 if (~sa->dp_tx->features & SFC_DP_TX_FEAT_MULTI_SEG) 154 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOMULTSEGS; 155 156 if (~sa->dp_tx->features & SFC_DP_TX_FEAT_MULTI_POOL) 157 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOMULTMEMP; 158 159 if (~sa->dp_tx->features & SFC_DP_TX_FEAT_REFCNT) 160 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOREFCOUNT; 161 162 #if EFSYS_OPT_RX_SCALE 163 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) { 164 dev_info->reta_size = EFX_RSS_TBL_SIZE; 165 dev_info->hash_key_size = EFX_RSS_KEY_SIZE; 166 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS; 167 } 168 #endif 169 170 if (sa->tso) 171 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO; 172 173 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS; 174 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS; 175 /* The RXQ hardware requires that the descriptor count is a power 176 * of 2, but rx_desc_lim cannot properly describe that constraint. 177 */ 178 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS; 179 180 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; 181 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS; 182 /* 183 * The TXQ hardware requires that the descriptor count is a power 184 * of 2, but tx_desc_lim cannot properly describe that constraint 185 */ 186 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS; 187 } 188 189 static const uint32_t * 190 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) 191 { 192 struct sfc_adapter *sa = dev->data->dev_private; 193 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 194 uint32_t tunnel_encaps = encp->enc_tunnel_encapsulations_supported; 195 196 return sa->dp_rx->supported_ptypes_get(tunnel_encaps); 197 } 198 199 static int 200 sfc_dev_configure(struct rte_eth_dev *dev) 201 { 202 struct rte_eth_dev_data *dev_data = dev->data; 203 struct sfc_adapter *sa = dev_data->dev_private; 204 int rc; 205 206 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u", 207 dev_data->nb_rx_queues, dev_data->nb_tx_queues); 208 209 sfc_adapter_lock(sa); 210 switch (sa->state) { 211 case SFC_ADAPTER_CONFIGURED: 212 /* FALLTHROUGH */ 213 case SFC_ADAPTER_INITIALIZED: 214 rc = sfc_configure(sa); 215 break; 216 default: 217 sfc_err(sa, "unexpected adapter state %u to configure", 218 sa->state); 219 rc = EINVAL; 220 break; 221 } 222 sfc_adapter_unlock(sa); 223 224 sfc_log_init(sa, "done %d", rc); 225 SFC_ASSERT(rc >= 0); 226 return -rc; 227 } 228 229 static int 230 sfc_dev_start(struct rte_eth_dev *dev) 231 { 232 struct sfc_adapter *sa = dev->data->dev_private; 233 int rc; 234 235 sfc_log_init(sa, "entry"); 236 237 sfc_adapter_lock(sa); 238 rc = sfc_start(sa); 239 sfc_adapter_unlock(sa); 240 241 sfc_log_init(sa, "done %d", rc); 242 SFC_ASSERT(rc >= 0); 243 return -rc; 244 } 245 246 static int 247 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 248 { 249 struct sfc_adapter *sa = dev->data->dev_private; 250 struct rte_eth_link *dev_link = &dev->data->dev_link; 251 struct rte_eth_link old_link; 252 struct rte_eth_link current_link; 253 254 sfc_log_init(sa, "entry"); 255 256 retry: 257 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t)); 258 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link); 259 260 if (sa->state != SFC_ADAPTER_STARTED) { 261 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link); 262 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 263 *(uint64_t *)&old_link, 264 *(uint64_t *)¤t_link)) 265 goto retry; 266 } else if (wait_to_complete) { 267 efx_link_mode_t link_mode; 268 269 if (efx_port_poll(sa->nic, &link_mode) != 0) 270 link_mode = EFX_LINK_UNKNOWN; 271 sfc_port_link_mode_to_info(link_mode, ¤t_link); 272 273 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 274 *(uint64_t *)&old_link, 275 *(uint64_t *)¤t_link)) 276 goto retry; 277 } else { 278 sfc_ev_mgmt_qpoll(sa); 279 *(int64_t *)¤t_link = 280 rte_atomic64_read((rte_atomic64_t *)dev_link); 281 } 282 283 if (old_link.link_status != current_link.link_status) 284 sfc_info(sa, "Link status is %s", 285 current_link.link_status ? "UP" : "DOWN"); 286 287 return old_link.link_status == current_link.link_status ? 0 : -1; 288 } 289 290 static void 291 sfc_dev_stop(struct rte_eth_dev *dev) 292 { 293 struct sfc_adapter *sa = dev->data->dev_private; 294 295 sfc_log_init(sa, "entry"); 296 297 sfc_adapter_lock(sa); 298 sfc_stop(sa); 299 sfc_adapter_unlock(sa); 300 301 sfc_log_init(sa, "done"); 302 } 303 304 static int 305 sfc_dev_set_link_up(struct rte_eth_dev *dev) 306 { 307 struct sfc_adapter *sa = dev->data->dev_private; 308 int rc; 309 310 sfc_log_init(sa, "entry"); 311 312 sfc_adapter_lock(sa); 313 rc = sfc_start(sa); 314 sfc_adapter_unlock(sa); 315 316 SFC_ASSERT(rc >= 0); 317 return -rc; 318 } 319 320 static int 321 sfc_dev_set_link_down(struct rte_eth_dev *dev) 322 { 323 struct sfc_adapter *sa = dev->data->dev_private; 324 325 sfc_log_init(sa, "entry"); 326 327 sfc_adapter_lock(sa); 328 sfc_stop(sa); 329 sfc_adapter_unlock(sa); 330 331 return 0; 332 } 333 334 static void 335 sfc_dev_close(struct rte_eth_dev *dev) 336 { 337 struct sfc_adapter *sa = dev->data->dev_private; 338 339 sfc_log_init(sa, "entry"); 340 341 sfc_adapter_lock(sa); 342 switch (sa->state) { 343 case SFC_ADAPTER_STARTED: 344 sfc_stop(sa); 345 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED); 346 /* FALLTHROUGH */ 347 case SFC_ADAPTER_CONFIGURED: 348 sfc_close(sa); 349 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED); 350 /* FALLTHROUGH */ 351 case SFC_ADAPTER_INITIALIZED: 352 break; 353 default: 354 sfc_err(sa, "unexpected adapter state %u on close", sa->state); 355 break; 356 } 357 sfc_adapter_unlock(sa); 358 359 sfc_log_init(sa, "done"); 360 } 361 362 static void 363 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode, 364 boolean_t enabled) 365 { 366 struct sfc_port *port; 367 boolean_t *toggle; 368 struct sfc_adapter *sa = dev->data->dev_private; 369 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI); 370 const char *desc = (allmulti) ? "all-multi" : "promiscuous"; 371 372 sfc_adapter_lock(sa); 373 374 port = &sa->port; 375 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc); 376 377 if (*toggle != enabled) { 378 *toggle = enabled; 379 380 if (port->isolated) { 381 sfc_warn(sa, "isolated mode is active on the port"); 382 sfc_warn(sa, "the change is to be applied on the next " 383 "start provided that isolated mode is " 384 "disabled prior the next start"); 385 } else if ((sa->state == SFC_ADAPTER_STARTED) && 386 (sfc_set_rx_mode(sa) != 0)) { 387 *toggle = !(enabled); 388 sfc_warn(sa, "Failed to %s %s mode", 389 ((enabled) ? "enable" : "disable"), desc); 390 } 391 } 392 393 sfc_adapter_unlock(sa); 394 } 395 396 static void 397 sfc_dev_promisc_enable(struct rte_eth_dev *dev) 398 { 399 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE); 400 } 401 402 static void 403 sfc_dev_promisc_disable(struct rte_eth_dev *dev) 404 { 405 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE); 406 } 407 408 static void 409 sfc_dev_allmulti_enable(struct rte_eth_dev *dev) 410 { 411 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE); 412 } 413 414 static void 415 sfc_dev_allmulti_disable(struct rte_eth_dev *dev) 416 { 417 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE); 418 } 419 420 static int 421 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, 422 uint16_t nb_rx_desc, unsigned int socket_id, 423 const struct rte_eth_rxconf *rx_conf, 424 struct rte_mempool *mb_pool) 425 { 426 struct sfc_adapter *sa = dev->data->dev_private; 427 int rc; 428 429 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u", 430 rx_queue_id, nb_rx_desc, socket_id); 431 432 sfc_adapter_lock(sa); 433 434 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id, 435 rx_conf, mb_pool); 436 if (rc != 0) 437 goto fail_rx_qinit; 438 439 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq->dp; 440 441 sfc_adapter_unlock(sa); 442 443 return 0; 444 445 fail_rx_qinit: 446 sfc_adapter_unlock(sa); 447 SFC_ASSERT(rc > 0); 448 return -rc; 449 } 450 451 static void 452 sfc_rx_queue_release(void *queue) 453 { 454 struct sfc_dp_rxq *dp_rxq = queue; 455 struct sfc_rxq *rxq; 456 struct sfc_adapter *sa; 457 unsigned int sw_index; 458 459 if (dp_rxq == NULL) 460 return; 461 462 rxq = sfc_rxq_by_dp_rxq(dp_rxq); 463 sa = rxq->evq->sa; 464 sfc_adapter_lock(sa); 465 466 sw_index = sfc_rxq_sw_index(rxq); 467 468 sfc_log_init(sa, "RxQ=%u", sw_index); 469 470 sa->eth_dev->data->rx_queues[sw_index] = NULL; 471 472 sfc_rx_qfini(sa, sw_index); 473 474 sfc_adapter_unlock(sa); 475 } 476 477 static int 478 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, 479 uint16_t nb_tx_desc, unsigned int socket_id, 480 const struct rte_eth_txconf *tx_conf) 481 { 482 struct sfc_adapter *sa = dev->data->dev_private; 483 int rc; 484 485 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u", 486 tx_queue_id, nb_tx_desc, socket_id); 487 488 sfc_adapter_lock(sa); 489 490 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf); 491 if (rc != 0) 492 goto fail_tx_qinit; 493 494 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq->dp; 495 496 sfc_adapter_unlock(sa); 497 return 0; 498 499 fail_tx_qinit: 500 sfc_adapter_unlock(sa); 501 SFC_ASSERT(rc > 0); 502 return -rc; 503 } 504 505 static void 506 sfc_tx_queue_release(void *queue) 507 { 508 struct sfc_dp_txq *dp_txq = queue; 509 struct sfc_txq *txq; 510 unsigned int sw_index; 511 struct sfc_adapter *sa; 512 513 if (dp_txq == NULL) 514 return; 515 516 txq = sfc_txq_by_dp_txq(dp_txq); 517 sw_index = sfc_txq_sw_index(txq); 518 519 SFC_ASSERT(txq->evq != NULL); 520 sa = txq->evq->sa; 521 522 sfc_log_init(sa, "TxQ = %u", sw_index); 523 524 sfc_adapter_lock(sa); 525 526 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues); 527 sa->eth_dev->data->tx_queues[sw_index] = NULL; 528 529 sfc_tx_qfini(sa, sw_index); 530 531 sfc_adapter_unlock(sa); 532 } 533 534 static int 535 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 536 { 537 struct sfc_adapter *sa = dev->data->dev_private; 538 struct sfc_port *port = &sa->port; 539 uint64_t *mac_stats; 540 int ret; 541 542 rte_spinlock_lock(&port->mac_stats_lock); 543 544 ret = sfc_port_update_mac_stats(sa); 545 if (ret != 0) 546 goto unlock; 547 548 mac_stats = port->mac_stats_buf; 549 550 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, 551 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) { 552 stats->ipackets = 553 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] + 554 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] + 555 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]; 556 stats->opackets = 557 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] + 558 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] + 559 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]; 560 stats->ibytes = 561 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] + 562 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] + 563 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]; 564 stats->obytes = 565 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] + 566 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] + 567 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; 568 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW]; 569 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; 570 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; 571 } else { 572 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS]; 573 stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; 574 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS]; 575 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS]; 576 /* 577 * Take into account stats which are whenever supported 578 * on EF10. If some stat is not supported by current 579 * firmware variant or HW revision, it is guaranteed 580 * to be zero in mac_stats. 581 */ 582 stats->imissed = 583 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] + 584 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] + 585 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] + 586 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] + 587 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] + 588 mac_stats[EFX_MAC_PM_TRUNC_QBB] + 589 mac_stats[EFX_MAC_PM_DISCARD_QBB] + 590 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] + 591 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] + 592 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS]; 593 stats->ierrors = 594 mac_stats[EFX_MAC_RX_FCS_ERRORS] + 595 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] + 596 mac_stats[EFX_MAC_RX_JABBER_PKTS]; 597 /* no oerrors counters supported on EF10 */ 598 } 599 600 unlock: 601 rte_spinlock_unlock(&port->mac_stats_lock); 602 SFC_ASSERT(ret >= 0); 603 return -ret; 604 } 605 606 static void 607 sfc_stats_reset(struct rte_eth_dev *dev) 608 { 609 struct sfc_adapter *sa = dev->data->dev_private; 610 struct sfc_port *port = &sa->port; 611 int rc; 612 613 if (sa->state != SFC_ADAPTER_STARTED) { 614 /* 615 * The operation cannot be done if port is not started; it 616 * will be scheduled to be done during the next port start 617 */ 618 port->mac_stats_reset_pending = B_TRUE; 619 return; 620 } 621 622 rc = sfc_port_reset_mac_stats(sa); 623 if (rc != 0) 624 sfc_err(sa, "failed to reset statistics (rc = %d)", rc); 625 } 626 627 static int 628 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 629 unsigned int xstats_count) 630 { 631 struct sfc_adapter *sa = dev->data->dev_private; 632 struct sfc_port *port = &sa->port; 633 uint64_t *mac_stats; 634 int rc; 635 unsigned int i; 636 int nstats = 0; 637 638 rte_spinlock_lock(&port->mac_stats_lock); 639 640 rc = sfc_port_update_mac_stats(sa); 641 if (rc != 0) { 642 SFC_ASSERT(rc > 0); 643 nstats = -rc; 644 goto unlock; 645 } 646 647 mac_stats = port->mac_stats_buf; 648 649 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 650 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 651 if (xstats != NULL && nstats < (int)xstats_count) { 652 xstats[nstats].id = nstats; 653 xstats[nstats].value = mac_stats[i]; 654 } 655 nstats++; 656 } 657 } 658 659 unlock: 660 rte_spinlock_unlock(&port->mac_stats_lock); 661 662 return nstats; 663 } 664 665 static int 666 sfc_xstats_get_names(struct rte_eth_dev *dev, 667 struct rte_eth_xstat_name *xstats_names, 668 unsigned int xstats_count) 669 { 670 struct sfc_adapter *sa = dev->data->dev_private; 671 struct sfc_port *port = &sa->port; 672 unsigned int i; 673 unsigned int nstats = 0; 674 675 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 676 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 677 if (xstats_names != NULL && nstats < xstats_count) 678 strncpy(xstats_names[nstats].name, 679 efx_mac_stat_name(sa->nic, i), 680 sizeof(xstats_names[0].name)); 681 nstats++; 682 } 683 } 684 685 return nstats; 686 } 687 688 static int 689 sfc_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 690 uint64_t *values, unsigned int n) 691 { 692 struct sfc_adapter *sa = dev->data->dev_private; 693 struct sfc_port *port = &sa->port; 694 uint64_t *mac_stats; 695 unsigned int nb_supported = 0; 696 unsigned int nb_written = 0; 697 unsigned int i; 698 int ret; 699 int rc; 700 701 if (unlikely(values == NULL) || 702 unlikely((ids == NULL) && (n < port->mac_stats_nb_supported))) 703 return port->mac_stats_nb_supported; 704 705 rte_spinlock_lock(&port->mac_stats_lock); 706 707 rc = sfc_port_update_mac_stats(sa); 708 if (rc != 0) { 709 SFC_ASSERT(rc > 0); 710 ret = -rc; 711 goto unlock; 712 } 713 714 mac_stats = port->mac_stats_buf; 715 716 for (i = 0; (i < EFX_MAC_NSTATS) && (nb_written < n); ++i) { 717 if (!EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) 718 continue; 719 720 if ((ids == NULL) || (ids[nb_written] == nb_supported)) 721 values[nb_written++] = mac_stats[i]; 722 723 ++nb_supported; 724 } 725 726 ret = nb_written; 727 728 unlock: 729 rte_spinlock_unlock(&port->mac_stats_lock); 730 731 return ret; 732 } 733 734 static int 735 sfc_xstats_get_names_by_id(struct rte_eth_dev *dev, 736 struct rte_eth_xstat_name *xstats_names, 737 const uint64_t *ids, unsigned int size) 738 { 739 struct sfc_adapter *sa = dev->data->dev_private; 740 struct sfc_port *port = &sa->port; 741 unsigned int nb_supported = 0; 742 unsigned int nb_written = 0; 743 unsigned int i; 744 745 if (unlikely(xstats_names == NULL) || 746 unlikely((ids == NULL) && (size < port->mac_stats_nb_supported))) 747 return port->mac_stats_nb_supported; 748 749 for (i = 0; (i < EFX_MAC_NSTATS) && (nb_written < size); ++i) { 750 if (!EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) 751 continue; 752 753 if ((ids == NULL) || (ids[nb_written] == nb_supported)) { 754 char *name = xstats_names[nb_written++].name; 755 756 strncpy(name, efx_mac_stat_name(sa->nic, i), 757 sizeof(xstats_names[0].name)); 758 name[sizeof(xstats_names[0].name) - 1] = '\0'; 759 } 760 761 ++nb_supported; 762 } 763 764 return nb_written; 765 } 766 767 static int 768 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 769 { 770 struct sfc_adapter *sa = dev->data->dev_private; 771 unsigned int wanted_fc, link_fc; 772 773 memset(fc_conf, 0, sizeof(*fc_conf)); 774 775 sfc_adapter_lock(sa); 776 777 if (sa->state == SFC_ADAPTER_STARTED) 778 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc); 779 else 780 link_fc = sa->port.flow_ctrl; 781 782 switch (link_fc) { 783 case 0: 784 fc_conf->mode = RTE_FC_NONE; 785 break; 786 case EFX_FCNTL_RESPOND: 787 fc_conf->mode = RTE_FC_RX_PAUSE; 788 break; 789 case EFX_FCNTL_GENERATE: 790 fc_conf->mode = RTE_FC_TX_PAUSE; 791 break; 792 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE): 793 fc_conf->mode = RTE_FC_FULL; 794 break; 795 default: 796 sfc_err(sa, "%s: unexpected flow control value %#x", 797 __func__, link_fc); 798 } 799 800 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; 801 802 sfc_adapter_unlock(sa); 803 804 return 0; 805 } 806 807 static int 808 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 809 { 810 struct sfc_adapter *sa = dev->data->dev_private; 811 struct sfc_port *port = &sa->port; 812 unsigned int fcntl; 813 int rc; 814 815 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || 816 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || 817 fc_conf->mac_ctrl_frame_fwd != 0) { 818 sfc_err(sa, "unsupported flow control settings specified"); 819 rc = EINVAL; 820 goto fail_inval; 821 } 822 823 switch (fc_conf->mode) { 824 case RTE_FC_NONE: 825 fcntl = 0; 826 break; 827 case RTE_FC_RX_PAUSE: 828 fcntl = EFX_FCNTL_RESPOND; 829 break; 830 case RTE_FC_TX_PAUSE: 831 fcntl = EFX_FCNTL_GENERATE; 832 break; 833 case RTE_FC_FULL: 834 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 835 break; 836 default: 837 rc = EINVAL; 838 goto fail_inval; 839 } 840 841 sfc_adapter_lock(sa); 842 843 if (sa->state == SFC_ADAPTER_STARTED) { 844 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg); 845 if (rc != 0) 846 goto fail_mac_fcntl_set; 847 } 848 849 port->flow_ctrl = fcntl; 850 port->flow_ctrl_autoneg = fc_conf->autoneg; 851 852 sfc_adapter_unlock(sa); 853 854 return 0; 855 856 fail_mac_fcntl_set: 857 sfc_adapter_unlock(sa); 858 fail_inval: 859 SFC_ASSERT(rc > 0); 860 return -rc; 861 } 862 863 static int 864 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 865 { 866 struct sfc_adapter *sa = dev->data->dev_private; 867 size_t pdu = EFX_MAC_PDU(mtu); 868 size_t old_pdu; 869 int rc; 870 871 sfc_log_init(sa, "mtu=%u", mtu); 872 873 rc = EINVAL; 874 if (pdu < EFX_MAC_PDU_MIN) { 875 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)", 876 (unsigned int)mtu, (unsigned int)pdu, 877 EFX_MAC_PDU_MIN); 878 goto fail_inval; 879 } 880 if (pdu > EFX_MAC_PDU_MAX) { 881 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)", 882 (unsigned int)mtu, (unsigned int)pdu, 883 EFX_MAC_PDU_MAX); 884 goto fail_inval; 885 } 886 887 sfc_adapter_lock(sa); 888 889 if (pdu != sa->port.pdu) { 890 if (sa->state == SFC_ADAPTER_STARTED) { 891 sfc_stop(sa); 892 893 old_pdu = sa->port.pdu; 894 sa->port.pdu = pdu; 895 rc = sfc_start(sa); 896 if (rc != 0) 897 goto fail_start; 898 } else { 899 sa->port.pdu = pdu; 900 } 901 } 902 903 /* 904 * The driver does not use it, but other PMDs update jumbo_frame 905 * flag and max_rx_pkt_len when MTU is set. 906 */ 907 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN); 908 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu; 909 910 sfc_adapter_unlock(sa); 911 912 sfc_log_init(sa, "done"); 913 return 0; 914 915 fail_start: 916 sa->port.pdu = old_pdu; 917 if (sfc_start(sa) != 0) 918 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) " 919 "PDU max size - port is stopped", 920 (unsigned int)pdu, (unsigned int)old_pdu); 921 sfc_adapter_unlock(sa); 922 923 fail_inval: 924 sfc_log_init(sa, "failed %d", rc); 925 SFC_ASSERT(rc > 0); 926 return -rc; 927 } 928 static void 929 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr) 930 { 931 struct sfc_adapter *sa = dev->data->dev_private; 932 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 933 struct sfc_port *port = &sa->port; 934 int rc; 935 936 sfc_adapter_lock(sa); 937 938 /* 939 * Copy the address to the device private data so that 940 * it could be recalled in the case of adapter restart. 941 */ 942 ether_addr_copy(mac_addr, &port->default_mac_addr); 943 944 if (port->isolated) { 945 sfc_err(sa, "isolated mode is active on the port"); 946 sfc_err(sa, "will not set MAC address"); 947 goto unlock; 948 } 949 950 if (sa->state != SFC_ADAPTER_STARTED) { 951 sfc_info(sa, "the port is not started"); 952 sfc_info(sa, "the new MAC address will be set on port start"); 953 954 goto unlock; 955 } 956 957 if (encp->enc_allow_set_mac_with_installed_filters) { 958 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes); 959 if (rc != 0) { 960 sfc_err(sa, "cannot set MAC address (rc = %u)", rc); 961 goto unlock; 962 } 963 964 /* 965 * Changing the MAC address by means of MCDI request 966 * has no effect on received traffic, therefore 967 * we also need to update unicast filters 968 */ 969 rc = sfc_set_rx_mode(sa); 970 if (rc != 0) 971 sfc_err(sa, "cannot set filter (rc = %u)", rc); 972 } else { 973 sfc_warn(sa, "cannot set MAC address with filters installed"); 974 sfc_warn(sa, "adapter will be restarted to pick the new MAC"); 975 sfc_warn(sa, "(some traffic may be dropped)"); 976 977 /* 978 * Since setting MAC address with filters installed is not 979 * allowed on the adapter, the new MAC address will be set 980 * by means of adapter restart. sfc_start() shall retrieve 981 * the new address from the device private data and set it. 982 */ 983 sfc_stop(sa); 984 rc = sfc_start(sa); 985 if (rc != 0) 986 sfc_err(sa, "cannot restart adapter (rc = %u)", rc); 987 } 988 989 unlock: 990 /* 991 * In the case of failure sa->port->default_mac_addr does not 992 * need rollback since no error code is returned, and the upper 993 * API will anyway update the external MAC address storage. 994 * To be consistent with that new value it is better to keep 995 * the device private value the same. 996 */ 997 sfc_adapter_unlock(sa); 998 } 999 1000 1001 static int 1002 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set, 1003 uint32_t nb_mc_addr) 1004 { 1005 struct sfc_adapter *sa = dev->data->dev_private; 1006 struct sfc_port *port = &sa->port; 1007 uint8_t *mc_addrs = port->mcast_addrs; 1008 int rc; 1009 unsigned int i; 1010 1011 if (port->isolated) { 1012 sfc_err(sa, "isolated mode is active on the port"); 1013 sfc_err(sa, "will not set multicast address list"); 1014 return -ENOTSUP; 1015 } 1016 1017 if (mc_addrs == NULL) 1018 return -ENOBUFS; 1019 1020 if (nb_mc_addr > port->max_mcast_addrs) { 1021 sfc_err(sa, "too many multicast addresses: %u > %u", 1022 nb_mc_addr, port->max_mcast_addrs); 1023 return -EINVAL; 1024 } 1025 1026 for (i = 0; i < nb_mc_addr; ++i) { 1027 rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, 1028 EFX_MAC_ADDR_LEN); 1029 mc_addrs += EFX_MAC_ADDR_LEN; 1030 } 1031 1032 port->nb_mcast_addrs = nb_mc_addr; 1033 1034 if (sa->state != SFC_ADAPTER_STARTED) 1035 return 0; 1036 1037 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, 1038 port->nb_mcast_addrs); 1039 if (rc != 0) 1040 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); 1041 1042 SFC_ASSERT(rc > 0); 1043 return -rc; 1044 } 1045 1046 /* 1047 * The function is used by the secondary process as well. It must not 1048 * use any process-local pointers from the adapter data. 1049 */ 1050 static void 1051 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id, 1052 struct rte_eth_rxq_info *qinfo) 1053 { 1054 struct sfc_adapter *sa = dev->data->dev_private; 1055 struct sfc_rxq_info *rxq_info; 1056 struct sfc_rxq *rxq; 1057 1058 sfc_adapter_lock(sa); 1059 1060 SFC_ASSERT(rx_queue_id < sa->rxq_count); 1061 1062 rxq_info = &sa->rxq_info[rx_queue_id]; 1063 rxq = rxq_info->rxq; 1064 SFC_ASSERT(rxq != NULL); 1065 1066 qinfo->mp = rxq->refill_mb_pool; 1067 qinfo->conf.rx_free_thresh = rxq->refill_threshold; 1068 qinfo->conf.rx_drop_en = 1; 1069 qinfo->conf.rx_deferred_start = rxq_info->deferred_start; 1070 qinfo->scattered_rx = 1071 ((rxq_info->type_flags & EFX_RXQ_FLAG_SCATTER) != 0); 1072 qinfo->nb_desc = rxq_info->entries; 1073 1074 sfc_adapter_unlock(sa); 1075 } 1076 1077 /* 1078 * The function is used by the secondary process as well. It must not 1079 * use any process-local pointers from the adapter data. 1080 */ 1081 static void 1082 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id, 1083 struct rte_eth_txq_info *qinfo) 1084 { 1085 struct sfc_adapter *sa = dev->data->dev_private; 1086 struct sfc_txq_info *txq_info; 1087 1088 sfc_adapter_lock(sa); 1089 1090 SFC_ASSERT(tx_queue_id < sa->txq_count); 1091 1092 txq_info = &sa->txq_info[tx_queue_id]; 1093 SFC_ASSERT(txq_info->txq != NULL); 1094 1095 memset(qinfo, 0, sizeof(*qinfo)); 1096 1097 qinfo->conf.txq_flags = txq_info->txq->flags; 1098 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh; 1099 qinfo->conf.tx_deferred_start = txq_info->deferred_start; 1100 qinfo->nb_desc = txq_info->entries; 1101 1102 sfc_adapter_unlock(sa); 1103 } 1104 1105 static uint32_t 1106 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) 1107 { 1108 struct sfc_adapter *sa = dev->data->dev_private; 1109 1110 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 1111 1112 return sfc_rx_qdesc_npending(sa, rx_queue_id); 1113 } 1114 1115 static int 1116 sfc_rx_descriptor_done(void *queue, uint16_t offset) 1117 { 1118 struct sfc_dp_rxq *dp_rxq = queue; 1119 1120 return sfc_rx_qdesc_done(dp_rxq, offset); 1121 } 1122 1123 static int 1124 sfc_rx_descriptor_status(void *queue, uint16_t offset) 1125 { 1126 struct sfc_dp_rxq *dp_rxq = queue; 1127 struct sfc_rxq *rxq = sfc_rxq_by_dp_rxq(dp_rxq); 1128 1129 return rxq->evq->sa->dp_rx->qdesc_status(dp_rxq, offset); 1130 } 1131 1132 static int 1133 sfc_tx_descriptor_status(void *queue, uint16_t offset) 1134 { 1135 struct sfc_dp_txq *dp_txq = queue; 1136 struct sfc_txq *txq = sfc_txq_by_dp_txq(dp_txq); 1137 1138 return txq->evq->sa->dp_tx->qdesc_status(dp_txq, offset); 1139 } 1140 1141 static int 1142 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) 1143 { 1144 struct sfc_adapter *sa = dev->data->dev_private; 1145 int rc; 1146 1147 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 1148 1149 sfc_adapter_lock(sa); 1150 1151 rc = EINVAL; 1152 if (sa->state != SFC_ADAPTER_STARTED) 1153 goto fail_not_started; 1154 1155 rc = sfc_rx_qstart(sa, rx_queue_id); 1156 if (rc != 0) 1157 goto fail_rx_qstart; 1158 1159 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE; 1160 1161 sfc_adapter_unlock(sa); 1162 1163 return 0; 1164 1165 fail_rx_qstart: 1166 fail_not_started: 1167 sfc_adapter_unlock(sa); 1168 SFC_ASSERT(rc > 0); 1169 return -rc; 1170 } 1171 1172 static int 1173 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) 1174 { 1175 struct sfc_adapter *sa = dev->data->dev_private; 1176 1177 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 1178 1179 sfc_adapter_lock(sa); 1180 sfc_rx_qstop(sa, rx_queue_id); 1181 1182 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE; 1183 1184 sfc_adapter_unlock(sa); 1185 1186 return 0; 1187 } 1188 1189 static int 1190 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1191 { 1192 struct sfc_adapter *sa = dev->data->dev_private; 1193 int rc; 1194 1195 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1196 1197 sfc_adapter_lock(sa); 1198 1199 rc = EINVAL; 1200 if (sa->state != SFC_ADAPTER_STARTED) 1201 goto fail_not_started; 1202 1203 rc = sfc_tx_qstart(sa, tx_queue_id); 1204 if (rc != 0) 1205 goto fail_tx_qstart; 1206 1207 sa->txq_info[tx_queue_id].deferred_started = B_TRUE; 1208 1209 sfc_adapter_unlock(sa); 1210 return 0; 1211 1212 fail_tx_qstart: 1213 1214 fail_not_started: 1215 sfc_adapter_unlock(sa); 1216 SFC_ASSERT(rc > 0); 1217 return -rc; 1218 } 1219 1220 static int 1221 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1222 { 1223 struct sfc_adapter *sa = dev->data->dev_private; 1224 1225 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1226 1227 sfc_adapter_lock(sa); 1228 1229 sfc_tx_qstop(sa, tx_queue_id); 1230 1231 sa->txq_info[tx_queue_id].deferred_started = B_FALSE; 1232 1233 sfc_adapter_unlock(sa); 1234 return 0; 1235 } 1236 1237 static efx_tunnel_protocol_t 1238 sfc_tunnel_rte_type_to_efx_udp_proto(enum rte_eth_tunnel_type rte_type) 1239 { 1240 switch (rte_type) { 1241 case RTE_TUNNEL_TYPE_VXLAN: 1242 return EFX_TUNNEL_PROTOCOL_VXLAN; 1243 case RTE_TUNNEL_TYPE_GENEVE: 1244 return EFX_TUNNEL_PROTOCOL_GENEVE; 1245 default: 1246 return EFX_TUNNEL_NPROTOS; 1247 } 1248 } 1249 1250 enum sfc_udp_tunnel_op_e { 1251 SFC_UDP_TUNNEL_ADD_PORT, 1252 SFC_UDP_TUNNEL_DEL_PORT, 1253 }; 1254 1255 static int 1256 sfc_dev_udp_tunnel_op(struct rte_eth_dev *dev, 1257 struct rte_eth_udp_tunnel *tunnel_udp, 1258 enum sfc_udp_tunnel_op_e op) 1259 { 1260 struct sfc_adapter *sa = dev->data->dev_private; 1261 efx_tunnel_protocol_t tunnel_proto; 1262 int rc; 1263 1264 sfc_log_init(sa, "%s udp_port=%u prot_type=%u", 1265 (op == SFC_UDP_TUNNEL_ADD_PORT) ? "add" : 1266 (op == SFC_UDP_TUNNEL_DEL_PORT) ? "delete" : "unknown", 1267 tunnel_udp->udp_port, tunnel_udp->prot_type); 1268 1269 tunnel_proto = 1270 sfc_tunnel_rte_type_to_efx_udp_proto(tunnel_udp->prot_type); 1271 if (tunnel_proto >= EFX_TUNNEL_NPROTOS) { 1272 rc = ENOTSUP; 1273 goto fail_bad_proto; 1274 } 1275 1276 sfc_adapter_lock(sa); 1277 1278 switch (op) { 1279 case SFC_UDP_TUNNEL_ADD_PORT: 1280 rc = efx_tunnel_config_udp_add(sa->nic, 1281 tunnel_udp->udp_port, 1282 tunnel_proto); 1283 break; 1284 case SFC_UDP_TUNNEL_DEL_PORT: 1285 rc = efx_tunnel_config_udp_remove(sa->nic, 1286 tunnel_udp->udp_port, 1287 tunnel_proto); 1288 break; 1289 default: 1290 rc = EINVAL; 1291 goto fail_bad_op; 1292 } 1293 1294 if (rc != 0) 1295 goto fail_op; 1296 1297 if (sa->state == SFC_ADAPTER_STARTED) { 1298 rc = efx_tunnel_reconfigure(sa->nic); 1299 if (rc == EAGAIN) { 1300 /* 1301 * Configuration is accepted by FW and MC reboot 1302 * is initiated to apply the changes. MC reboot 1303 * will be handled in a usual way (MC reboot 1304 * event on management event queue and adapter 1305 * restart). 1306 */ 1307 rc = 0; 1308 } else if (rc != 0) { 1309 goto fail_reconfigure; 1310 } 1311 } 1312 1313 sfc_adapter_unlock(sa); 1314 return 0; 1315 1316 fail_reconfigure: 1317 /* Remove/restore entry since the change makes the trouble */ 1318 switch (op) { 1319 case SFC_UDP_TUNNEL_ADD_PORT: 1320 (void)efx_tunnel_config_udp_remove(sa->nic, 1321 tunnel_udp->udp_port, 1322 tunnel_proto); 1323 break; 1324 case SFC_UDP_TUNNEL_DEL_PORT: 1325 (void)efx_tunnel_config_udp_add(sa->nic, 1326 tunnel_udp->udp_port, 1327 tunnel_proto); 1328 break; 1329 } 1330 1331 fail_op: 1332 fail_bad_op: 1333 sfc_adapter_unlock(sa); 1334 1335 fail_bad_proto: 1336 SFC_ASSERT(rc > 0); 1337 return -rc; 1338 } 1339 1340 static int 1341 sfc_dev_udp_tunnel_port_add(struct rte_eth_dev *dev, 1342 struct rte_eth_udp_tunnel *tunnel_udp) 1343 { 1344 return sfc_dev_udp_tunnel_op(dev, tunnel_udp, SFC_UDP_TUNNEL_ADD_PORT); 1345 } 1346 1347 static int 1348 sfc_dev_udp_tunnel_port_del(struct rte_eth_dev *dev, 1349 struct rte_eth_udp_tunnel *tunnel_udp) 1350 { 1351 return sfc_dev_udp_tunnel_op(dev, tunnel_udp, SFC_UDP_TUNNEL_DEL_PORT); 1352 } 1353 1354 #if EFSYS_OPT_RX_SCALE 1355 static int 1356 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1357 struct rte_eth_rss_conf *rss_conf) 1358 { 1359 struct sfc_adapter *sa = dev->data->dev_private; 1360 struct sfc_port *port = &sa->port; 1361 1362 if ((sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) || port->isolated) 1363 return -ENOTSUP; 1364 1365 if (sa->rss_channels == 0) 1366 return -EINVAL; 1367 1368 sfc_adapter_lock(sa); 1369 1370 /* 1371 * Mapping of hash configuration between RTE and EFX is not one-to-one, 1372 * hence, conversion is done here to derive a correct set of ETH_RSS 1373 * flags which corresponds to the active EFX configuration stored 1374 * locally in 'sfc_adapter' and kept up-to-date 1375 */ 1376 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types); 1377 rss_conf->rss_key_len = EFX_RSS_KEY_SIZE; 1378 if (rss_conf->rss_key != NULL) 1379 rte_memcpy(rss_conf->rss_key, sa->rss_key, EFX_RSS_KEY_SIZE); 1380 1381 sfc_adapter_unlock(sa); 1382 1383 return 0; 1384 } 1385 1386 static int 1387 sfc_dev_rss_hash_update(struct rte_eth_dev *dev, 1388 struct rte_eth_rss_conf *rss_conf) 1389 { 1390 struct sfc_adapter *sa = dev->data->dev_private; 1391 struct sfc_port *port = &sa->port; 1392 unsigned int efx_hash_types; 1393 int rc = 0; 1394 1395 if (port->isolated) 1396 return -ENOTSUP; 1397 1398 if (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) { 1399 sfc_err(sa, "RSS is not available"); 1400 return -ENOTSUP; 1401 } 1402 1403 if (sa->rss_channels == 0) { 1404 sfc_err(sa, "RSS is not configured"); 1405 return -EINVAL; 1406 } 1407 1408 if ((rss_conf->rss_key != NULL) && 1409 (rss_conf->rss_key_len != sizeof(sa->rss_key))) { 1410 sfc_err(sa, "RSS key size is wrong (should be %lu)", 1411 sizeof(sa->rss_key)); 1412 return -EINVAL; 1413 } 1414 1415 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) { 1416 sfc_err(sa, "unsupported hash functions requested"); 1417 return -EINVAL; 1418 } 1419 1420 sfc_adapter_lock(sa); 1421 1422 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf); 1423 1424 rc = efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT, 1425 EFX_RX_HASHALG_TOEPLITZ, 1426 efx_hash_types, B_TRUE); 1427 if (rc != 0) 1428 goto fail_scale_mode_set; 1429 1430 if (rss_conf->rss_key != NULL) { 1431 if (sa->state == SFC_ADAPTER_STARTED) { 1432 rc = efx_rx_scale_key_set(sa->nic, 1433 EFX_RSS_CONTEXT_DEFAULT, 1434 rss_conf->rss_key, 1435 sizeof(sa->rss_key)); 1436 if (rc != 0) 1437 goto fail_scale_key_set; 1438 } 1439 1440 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key)); 1441 } 1442 1443 sa->rss_hash_types = efx_hash_types; 1444 1445 sfc_adapter_unlock(sa); 1446 1447 return 0; 1448 1449 fail_scale_key_set: 1450 if (efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT, 1451 EFX_RX_HASHALG_TOEPLITZ, 1452 sa->rss_hash_types, B_TRUE) != 0) 1453 sfc_err(sa, "failed to restore RSS mode"); 1454 1455 fail_scale_mode_set: 1456 sfc_adapter_unlock(sa); 1457 return -rc; 1458 } 1459 1460 static int 1461 sfc_dev_rss_reta_query(struct rte_eth_dev *dev, 1462 struct rte_eth_rss_reta_entry64 *reta_conf, 1463 uint16_t reta_size) 1464 { 1465 struct sfc_adapter *sa = dev->data->dev_private; 1466 struct sfc_port *port = &sa->port; 1467 int entry; 1468 1469 if ((sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) || port->isolated) 1470 return -ENOTSUP; 1471 1472 if (sa->rss_channels == 0) 1473 return -EINVAL; 1474 1475 if (reta_size != EFX_RSS_TBL_SIZE) 1476 return -EINVAL; 1477 1478 sfc_adapter_lock(sa); 1479 1480 for (entry = 0; entry < reta_size; entry++) { 1481 int grp = entry / RTE_RETA_GROUP_SIZE; 1482 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1483 1484 if ((reta_conf[grp].mask >> grp_idx) & 1) 1485 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry]; 1486 } 1487 1488 sfc_adapter_unlock(sa); 1489 1490 return 0; 1491 } 1492 1493 static int 1494 sfc_dev_rss_reta_update(struct rte_eth_dev *dev, 1495 struct rte_eth_rss_reta_entry64 *reta_conf, 1496 uint16_t reta_size) 1497 { 1498 struct sfc_adapter *sa = dev->data->dev_private; 1499 struct sfc_port *port = &sa->port; 1500 unsigned int *rss_tbl_new; 1501 uint16_t entry; 1502 int rc = 0; 1503 1504 1505 if (port->isolated) 1506 return -ENOTSUP; 1507 1508 if (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) { 1509 sfc_err(sa, "RSS is not available"); 1510 return -ENOTSUP; 1511 } 1512 1513 if (sa->rss_channels == 0) { 1514 sfc_err(sa, "RSS is not configured"); 1515 return -EINVAL; 1516 } 1517 1518 if (reta_size != EFX_RSS_TBL_SIZE) { 1519 sfc_err(sa, "RETA size is wrong (should be %u)", 1520 EFX_RSS_TBL_SIZE); 1521 return -EINVAL; 1522 } 1523 1524 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0); 1525 if (rss_tbl_new == NULL) 1526 return -ENOMEM; 1527 1528 sfc_adapter_lock(sa); 1529 1530 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl)); 1531 1532 for (entry = 0; entry < reta_size; entry++) { 1533 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1534 struct rte_eth_rss_reta_entry64 *grp; 1535 1536 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE]; 1537 1538 if (grp->mask & (1ull << grp_idx)) { 1539 if (grp->reta[grp_idx] >= sa->rss_channels) { 1540 rc = EINVAL; 1541 goto bad_reta_entry; 1542 } 1543 rss_tbl_new[entry] = grp->reta[grp_idx]; 1544 } 1545 } 1546 1547 if (sa->state == SFC_ADAPTER_STARTED) { 1548 rc = efx_rx_scale_tbl_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT, 1549 rss_tbl_new, EFX_RSS_TBL_SIZE); 1550 if (rc != 0) 1551 goto fail_scale_tbl_set; 1552 } 1553 1554 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl)); 1555 1556 fail_scale_tbl_set: 1557 bad_reta_entry: 1558 sfc_adapter_unlock(sa); 1559 1560 rte_free(rss_tbl_new); 1561 1562 SFC_ASSERT(rc >= 0); 1563 return -rc; 1564 } 1565 #endif 1566 1567 static int 1568 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type, 1569 enum rte_filter_op filter_op, 1570 void *arg) 1571 { 1572 struct sfc_adapter *sa = dev->data->dev_private; 1573 int rc = ENOTSUP; 1574 1575 sfc_log_init(sa, "entry"); 1576 1577 switch (filter_type) { 1578 case RTE_ETH_FILTER_NONE: 1579 sfc_err(sa, "Global filters configuration not supported"); 1580 break; 1581 case RTE_ETH_FILTER_MACVLAN: 1582 sfc_err(sa, "MACVLAN filters not supported"); 1583 break; 1584 case RTE_ETH_FILTER_ETHERTYPE: 1585 sfc_err(sa, "EtherType filters not supported"); 1586 break; 1587 case RTE_ETH_FILTER_FLEXIBLE: 1588 sfc_err(sa, "Flexible filters not supported"); 1589 break; 1590 case RTE_ETH_FILTER_SYN: 1591 sfc_err(sa, "SYN filters not supported"); 1592 break; 1593 case RTE_ETH_FILTER_NTUPLE: 1594 sfc_err(sa, "NTUPLE filters not supported"); 1595 break; 1596 case RTE_ETH_FILTER_TUNNEL: 1597 sfc_err(sa, "Tunnel filters not supported"); 1598 break; 1599 case RTE_ETH_FILTER_FDIR: 1600 sfc_err(sa, "Flow Director filters not supported"); 1601 break; 1602 case RTE_ETH_FILTER_HASH: 1603 sfc_err(sa, "Hash filters not supported"); 1604 break; 1605 case RTE_ETH_FILTER_GENERIC: 1606 if (filter_op != RTE_ETH_FILTER_GET) { 1607 rc = EINVAL; 1608 } else { 1609 *(const void **)arg = &sfc_flow_ops; 1610 rc = 0; 1611 } 1612 break; 1613 default: 1614 sfc_err(sa, "Unknown filter type %u", filter_type); 1615 break; 1616 } 1617 1618 sfc_log_init(sa, "exit: %d", -rc); 1619 SFC_ASSERT(rc >= 0); 1620 return -rc; 1621 } 1622 1623 static const struct eth_dev_ops sfc_eth_dev_ops = { 1624 .dev_configure = sfc_dev_configure, 1625 .dev_start = sfc_dev_start, 1626 .dev_stop = sfc_dev_stop, 1627 .dev_set_link_up = sfc_dev_set_link_up, 1628 .dev_set_link_down = sfc_dev_set_link_down, 1629 .dev_close = sfc_dev_close, 1630 .promiscuous_enable = sfc_dev_promisc_enable, 1631 .promiscuous_disable = sfc_dev_promisc_disable, 1632 .allmulticast_enable = sfc_dev_allmulti_enable, 1633 .allmulticast_disable = sfc_dev_allmulti_disable, 1634 .link_update = sfc_dev_link_update, 1635 .stats_get = sfc_stats_get, 1636 .stats_reset = sfc_stats_reset, 1637 .xstats_get = sfc_xstats_get, 1638 .xstats_reset = sfc_stats_reset, 1639 .xstats_get_names = sfc_xstats_get_names, 1640 .dev_infos_get = sfc_dev_infos_get, 1641 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 1642 .mtu_set = sfc_dev_set_mtu, 1643 .rx_queue_start = sfc_rx_queue_start, 1644 .rx_queue_stop = sfc_rx_queue_stop, 1645 .tx_queue_start = sfc_tx_queue_start, 1646 .tx_queue_stop = sfc_tx_queue_stop, 1647 .rx_queue_setup = sfc_rx_queue_setup, 1648 .rx_queue_release = sfc_rx_queue_release, 1649 .rx_queue_count = sfc_rx_queue_count, 1650 .rx_descriptor_done = sfc_rx_descriptor_done, 1651 .rx_descriptor_status = sfc_rx_descriptor_status, 1652 .tx_descriptor_status = sfc_tx_descriptor_status, 1653 .tx_queue_setup = sfc_tx_queue_setup, 1654 .tx_queue_release = sfc_tx_queue_release, 1655 .flow_ctrl_get = sfc_flow_ctrl_get, 1656 .flow_ctrl_set = sfc_flow_ctrl_set, 1657 .mac_addr_set = sfc_mac_addr_set, 1658 .udp_tunnel_port_add = sfc_dev_udp_tunnel_port_add, 1659 .udp_tunnel_port_del = sfc_dev_udp_tunnel_port_del, 1660 #if EFSYS_OPT_RX_SCALE 1661 .reta_update = sfc_dev_rss_reta_update, 1662 .reta_query = sfc_dev_rss_reta_query, 1663 .rss_hash_update = sfc_dev_rss_hash_update, 1664 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 1665 #endif 1666 .filter_ctrl = sfc_dev_filter_ctrl, 1667 .set_mc_addr_list = sfc_set_mc_addr_list, 1668 .rxq_info_get = sfc_rx_queue_info_get, 1669 .txq_info_get = sfc_tx_queue_info_get, 1670 .fw_version_get = sfc_fw_version_get, 1671 .xstats_get_by_id = sfc_xstats_get_by_id, 1672 .xstats_get_names_by_id = sfc_xstats_get_names_by_id, 1673 }; 1674 1675 /** 1676 * Duplicate a string in potentially shared memory required for 1677 * multi-process support. 1678 * 1679 * strdup() allocates from process-local heap/memory. 1680 */ 1681 static char * 1682 sfc_strdup(const char *str) 1683 { 1684 size_t size; 1685 char *copy; 1686 1687 if (str == NULL) 1688 return NULL; 1689 1690 size = strlen(str) + 1; 1691 copy = rte_malloc(__func__, size, 0); 1692 if (copy != NULL) 1693 rte_memcpy(copy, str, size); 1694 1695 return copy; 1696 } 1697 1698 static int 1699 sfc_eth_dev_set_ops(struct rte_eth_dev *dev) 1700 { 1701 struct sfc_adapter *sa = dev->data->dev_private; 1702 unsigned int avail_caps = 0; 1703 const char *rx_name = NULL; 1704 const char *tx_name = NULL; 1705 int rc; 1706 1707 switch (sa->family) { 1708 case EFX_FAMILY_HUNTINGTON: 1709 case EFX_FAMILY_MEDFORD: 1710 avail_caps |= SFC_DP_HW_FW_CAP_EF10; 1711 break; 1712 default: 1713 break; 1714 } 1715 1716 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH, 1717 sfc_kvarg_string_handler, &rx_name); 1718 if (rc != 0) 1719 goto fail_kvarg_rx_datapath; 1720 1721 if (rx_name != NULL) { 1722 sa->dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name); 1723 if (sa->dp_rx == NULL) { 1724 sfc_err(sa, "Rx datapath %s not found", rx_name); 1725 rc = ENOENT; 1726 goto fail_dp_rx; 1727 } 1728 if (!sfc_dp_match_hw_fw_caps(&sa->dp_rx->dp, avail_caps)) { 1729 sfc_err(sa, 1730 "Insufficient Hw/FW capabilities to use Rx datapath %s", 1731 rx_name); 1732 rc = EINVAL; 1733 goto fail_dp_rx_caps; 1734 } 1735 } else { 1736 sa->dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps); 1737 if (sa->dp_rx == NULL) { 1738 sfc_err(sa, "Rx datapath by caps %#x not found", 1739 avail_caps); 1740 rc = ENOENT; 1741 goto fail_dp_rx; 1742 } 1743 } 1744 1745 sa->dp_rx_name = sfc_strdup(sa->dp_rx->dp.name); 1746 if (sa->dp_rx_name == NULL) { 1747 rc = ENOMEM; 1748 goto fail_dp_rx_name; 1749 } 1750 1751 sfc_info(sa, "use %s Rx datapath", sa->dp_rx_name); 1752 1753 dev->rx_pkt_burst = sa->dp_rx->pkt_burst; 1754 1755 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH, 1756 sfc_kvarg_string_handler, &tx_name); 1757 if (rc != 0) 1758 goto fail_kvarg_tx_datapath; 1759 1760 if (tx_name != NULL) { 1761 sa->dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name); 1762 if (sa->dp_tx == NULL) { 1763 sfc_err(sa, "Tx datapath %s not found", tx_name); 1764 rc = ENOENT; 1765 goto fail_dp_tx; 1766 } 1767 if (!sfc_dp_match_hw_fw_caps(&sa->dp_tx->dp, avail_caps)) { 1768 sfc_err(sa, 1769 "Insufficient Hw/FW capabilities to use Tx datapath %s", 1770 tx_name); 1771 rc = EINVAL; 1772 goto fail_dp_tx_caps; 1773 } 1774 } else { 1775 sa->dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps); 1776 if (sa->dp_tx == NULL) { 1777 sfc_err(sa, "Tx datapath by caps %#x not found", 1778 avail_caps); 1779 rc = ENOENT; 1780 goto fail_dp_tx; 1781 } 1782 } 1783 1784 sa->dp_tx_name = sfc_strdup(sa->dp_tx->dp.name); 1785 if (sa->dp_tx_name == NULL) { 1786 rc = ENOMEM; 1787 goto fail_dp_tx_name; 1788 } 1789 1790 sfc_info(sa, "use %s Tx datapath", sa->dp_tx_name); 1791 1792 dev->tx_pkt_burst = sa->dp_tx->pkt_burst; 1793 1794 dev->dev_ops = &sfc_eth_dev_ops; 1795 1796 return 0; 1797 1798 fail_dp_tx_name: 1799 fail_dp_tx_caps: 1800 sa->dp_tx = NULL; 1801 1802 fail_dp_tx: 1803 fail_kvarg_tx_datapath: 1804 rte_free(sa->dp_rx_name); 1805 sa->dp_rx_name = NULL; 1806 1807 fail_dp_rx_name: 1808 fail_dp_rx_caps: 1809 sa->dp_rx = NULL; 1810 1811 fail_dp_rx: 1812 fail_kvarg_rx_datapath: 1813 return rc; 1814 } 1815 1816 static void 1817 sfc_eth_dev_clear_ops(struct rte_eth_dev *dev) 1818 { 1819 struct sfc_adapter *sa = dev->data->dev_private; 1820 1821 dev->dev_ops = NULL; 1822 dev->rx_pkt_burst = NULL; 1823 dev->tx_pkt_burst = NULL; 1824 1825 rte_free(sa->dp_tx_name); 1826 sa->dp_tx_name = NULL; 1827 sa->dp_tx = NULL; 1828 1829 rte_free(sa->dp_rx_name); 1830 sa->dp_rx_name = NULL; 1831 sa->dp_rx = NULL; 1832 } 1833 1834 static const struct eth_dev_ops sfc_eth_dev_secondary_ops = { 1835 .rxq_info_get = sfc_rx_queue_info_get, 1836 .txq_info_get = sfc_tx_queue_info_get, 1837 }; 1838 1839 static int 1840 sfc_eth_dev_secondary_set_ops(struct rte_eth_dev *dev) 1841 { 1842 /* 1843 * Device private data has really many process-local pointers. 1844 * Below code should be extremely careful to use data located 1845 * in shared memory only. 1846 */ 1847 struct sfc_adapter *sa = dev->data->dev_private; 1848 const struct sfc_dp_rx *dp_rx; 1849 const struct sfc_dp_tx *dp_tx; 1850 int rc; 1851 1852 dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, sa->dp_rx_name); 1853 if (dp_rx == NULL) { 1854 sfc_err(sa, "cannot find %s Rx datapath", sa->dp_tx_name); 1855 rc = ENOENT; 1856 goto fail_dp_rx; 1857 } 1858 if (~dp_rx->features & SFC_DP_RX_FEAT_MULTI_PROCESS) { 1859 sfc_err(sa, "%s Rx datapath does not support multi-process", 1860 sa->dp_tx_name); 1861 rc = EINVAL; 1862 goto fail_dp_rx_multi_process; 1863 } 1864 1865 dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, sa->dp_tx_name); 1866 if (dp_tx == NULL) { 1867 sfc_err(sa, "cannot find %s Tx datapath", sa->dp_tx_name); 1868 rc = ENOENT; 1869 goto fail_dp_tx; 1870 } 1871 if (~dp_tx->features & SFC_DP_TX_FEAT_MULTI_PROCESS) { 1872 sfc_err(sa, "%s Tx datapath does not support multi-process", 1873 sa->dp_tx_name); 1874 rc = EINVAL; 1875 goto fail_dp_tx_multi_process; 1876 } 1877 1878 dev->rx_pkt_burst = dp_rx->pkt_burst; 1879 dev->tx_pkt_burst = dp_tx->pkt_burst; 1880 dev->dev_ops = &sfc_eth_dev_secondary_ops; 1881 1882 return 0; 1883 1884 fail_dp_tx_multi_process: 1885 fail_dp_tx: 1886 fail_dp_rx_multi_process: 1887 fail_dp_rx: 1888 return rc; 1889 } 1890 1891 static void 1892 sfc_eth_dev_secondary_clear_ops(struct rte_eth_dev *dev) 1893 { 1894 dev->dev_ops = NULL; 1895 dev->tx_pkt_burst = NULL; 1896 dev->rx_pkt_burst = NULL; 1897 } 1898 1899 static void 1900 sfc_register_dp(void) 1901 { 1902 /* Register once */ 1903 if (TAILQ_EMPTY(&sfc_dp_head)) { 1904 /* Prefer EF10 datapath */ 1905 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp); 1906 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); 1907 1908 sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp); 1909 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp); 1910 sfc_dp_register(&sfc_dp_head, &sfc_ef10_simple_tx.dp); 1911 } 1912 } 1913 1914 static int 1915 sfc_eth_dev_init(struct rte_eth_dev *dev) 1916 { 1917 struct sfc_adapter *sa = dev->data->dev_private; 1918 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1919 int rc; 1920 const efx_nic_cfg_t *encp; 1921 const struct ether_addr *from; 1922 1923 sfc_register_dp(); 1924 1925 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1926 return -sfc_eth_dev_secondary_set_ops(dev); 1927 1928 /* Required for logging */ 1929 sa->pci_addr = pci_dev->addr; 1930 sa->port_id = dev->data->port_id; 1931 1932 sa->eth_dev = dev; 1933 1934 /* Copy PCI device info to the dev->data */ 1935 rte_eth_copy_pci_info(dev, pci_dev); 1936 1937 rc = sfc_kvargs_parse(sa); 1938 if (rc != 0) 1939 goto fail_kvargs_parse; 1940 1941 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT, 1942 sfc_kvarg_bool_handler, &sa->debug_init); 1943 if (rc != 0) 1944 goto fail_kvarg_debug_init; 1945 1946 sfc_log_init(sa, "entry"); 1947 1948 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0); 1949 if (dev->data->mac_addrs == NULL) { 1950 rc = ENOMEM; 1951 goto fail_mac_addrs; 1952 } 1953 1954 sfc_adapter_lock_init(sa); 1955 sfc_adapter_lock(sa); 1956 1957 sfc_log_init(sa, "probing"); 1958 rc = sfc_probe(sa); 1959 if (rc != 0) 1960 goto fail_probe; 1961 1962 sfc_log_init(sa, "set device ops"); 1963 rc = sfc_eth_dev_set_ops(dev); 1964 if (rc != 0) 1965 goto fail_set_ops; 1966 1967 sfc_log_init(sa, "attaching"); 1968 rc = sfc_attach(sa); 1969 if (rc != 0) 1970 goto fail_attach; 1971 1972 encp = efx_nic_cfg_get(sa->nic); 1973 1974 /* 1975 * The arguments are really reverse order in comparison to 1976 * Linux kernel. Copy from NIC config to Ethernet device data. 1977 */ 1978 from = (const struct ether_addr *)(encp->enc_mac_addr); 1979 ether_addr_copy(from, &dev->data->mac_addrs[0]); 1980 1981 sfc_adapter_unlock(sa); 1982 1983 sfc_log_init(sa, "done"); 1984 return 0; 1985 1986 fail_attach: 1987 sfc_eth_dev_clear_ops(dev); 1988 1989 fail_set_ops: 1990 sfc_unprobe(sa); 1991 1992 fail_probe: 1993 sfc_adapter_unlock(sa); 1994 sfc_adapter_lock_fini(sa); 1995 rte_free(dev->data->mac_addrs); 1996 dev->data->mac_addrs = NULL; 1997 1998 fail_mac_addrs: 1999 fail_kvarg_debug_init: 2000 sfc_kvargs_cleanup(sa); 2001 2002 fail_kvargs_parse: 2003 sfc_log_init(sa, "failed %d", rc); 2004 SFC_ASSERT(rc > 0); 2005 return -rc; 2006 } 2007 2008 static int 2009 sfc_eth_dev_uninit(struct rte_eth_dev *dev) 2010 { 2011 struct sfc_adapter *sa; 2012 2013 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 2014 sfc_eth_dev_secondary_clear_ops(dev); 2015 return 0; 2016 } 2017 2018 sa = dev->data->dev_private; 2019 sfc_log_init(sa, "entry"); 2020 2021 sfc_adapter_lock(sa); 2022 2023 sfc_eth_dev_clear_ops(dev); 2024 2025 sfc_detach(sa); 2026 sfc_unprobe(sa); 2027 2028 rte_free(dev->data->mac_addrs); 2029 dev->data->mac_addrs = NULL; 2030 2031 sfc_kvargs_cleanup(sa); 2032 2033 sfc_adapter_unlock(sa); 2034 sfc_adapter_lock_fini(sa); 2035 2036 sfc_log_init(sa, "done"); 2037 2038 /* Required for logging, so cleanup last */ 2039 sa->eth_dev = NULL; 2040 return 0; 2041 } 2042 2043 static const struct rte_pci_id pci_id_sfc_efx_map[] = { 2044 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, 2045 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, 2046 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, 2047 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, 2048 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, 2049 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, 2050 { .vendor_id = 0 /* sentinel */ } 2051 }; 2052 2053 static int sfc_eth_dev_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 2054 struct rte_pci_device *pci_dev) 2055 { 2056 return rte_eth_dev_pci_generic_probe(pci_dev, 2057 sizeof(struct sfc_adapter), sfc_eth_dev_init); 2058 } 2059 2060 static int sfc_eth_dev_pci_remove(struct rte_pci_device *pci_dev) 2061 { 2062 return rte_eth_dev_pci_generic_remove(pci_dev, sfc_eth_dev_uninit); 2063 } 2064 2065 static struct rte_pci_driver sfc_efx_pmd = { 2066 .id_table = pci_id_sfc_efx_map, 2067 .drv_flags = 2068 RTE_PCI_DRV_INTR_LSC | 2069 RTE_PCI_DRV_NEED_MAPPING, 2070 .probe = sfc_eth_dev_pci_probe, 2071 .remove = sfc_eth_dev_pci_remove, 2072 }; 2073 2074 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd); 2075 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); 2076 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio-pci"); 2077 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, 2078 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " " 2079 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " " 2080 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " 2081 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> " 2082 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " " 2083 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL); 2084