1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) 2016-2017 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * This software was jointly developed between OKTET Labs (under contract 8 * for Solarflare) and Solarflare Communications, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <rte_dev.h> 33 #include <rte_ethdev.h> 34 #include <rte_ethdev_pci.h> 35 #include <rte_pci.h> 36 #include <rte_errno.h> 37 38 #include "efx.h" 39 40 #include "sfc.h" 41 #include "sfc_debug.h" 42 #include "sfc_log.h" 43 #include "sfc_kvargs.h" 44 #include "sfc_ev.h" 45 #include "sfc_rx.h" 46 #include "sfc_tx.h" 47 #include "sfc_flow.h" 48 #include "sfc_dp.h" 49 #include "sfc_dp_rx.h" 50 51 static struct sfc_dp_list sfc_dp_head = 52 TAILQ_HEAD_INITIALIZER(sfc_dp_head); 53 54 static int 55 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) 56 { 57 struct sfc_adapter *sa = dev->data->dev_private; 58 efx_nic_fw_info_t enfi; 59 int ret; 60 int rc; 61 62 /* 63 * Return value of the callback is likely supposed to be 64 * equal to or greater than 0, nevertheless, if an error 65 * occurs, it will be desirable to pass it to the caller 66 */ 67 if ((fw_version == NULL) || (fw_size == 0)) 68 return -EINVAL; 69 70 rc = efx_nic_get_fw_version(sa->nic, &enfi); 71 if (rc != 0) 72 return -rc; 73 74 ret = snprintf(fw_version, fw_size, 75 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16, 76 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1], 77 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]); 78 if (ret < 0) 79 return ret; 80 81 if (enfi.enfi_dpcpu_fw_ids_valid) { 82 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret); 83 int ret_extra; 84 85 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset, 86 fw_size - dpcpu_fw_ids_offset, 87 " rx%" PRIx16 " tx%" PRIx16, 88 enfi.enfi_rx_dpcpu_fw_id, 89 enfi.enfi_tx_dpcpu_fw_id); 90 if (ret_extra < 0) 91 return ret_extra; 92 93 ret += ret_extra; 94 } 95 96 if (fw_size < (size_t)(++ret)) 97 return ret; 98 else 99 return 0; 100 } 101 102 static void 103 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 104 { 105 struct sfc_adapter *sa = dev->data->dev_private; 106 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 107 108 sfc_log_init(sa, "entry"); 109 110 dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev); 111 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; 112 113 /* Autonegotiation may be disabled */ 114 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 115 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX) 116 dev_info->speed_capa |= ETH_LINK_SPEED_1G; 117 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX) 118 dev_info->speed_capa |= ETH_LINK_SPEED_10G; 119 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX) 120 dev_info->speed_capa |= ETH_LINK_SPEED_40G; 121 122 dev_info->max_rx_queues = sa->rxq_max; 123 dev_info->max_tx_queues = sa->txq_max; 124 125 /* By default packets are dropped if no descriptors are available */ 126 dev_info->default_rxconf.rx_drop_en = 1; 127 128 dev_info->rx_offload_capa = 129 DEV_RX_OFFLOAD_IPV4_CKSUM | 130 DEV_RX_OFFLOAD_UDP_CKSUM | 131 DEV_RX_OFFLOAD_TCP_CKSUM; 132 133 dev_info->tx_offload_capa = 134 DEV_TX_OFFLOAD_IPV4_CKSUM | 135 DEV_TX_OFFLOAD_UDP_CKSUM | 136 DEV_TX_OFFLOAD_TCP_CKSUM; 137 138 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP; 139 if ((~sa->dp_tx->features & SFC_DP_TX_FEAT_VLAN_INSERT) || 140 !encp->enc_hw_tx_insert_vlan_enabled) 141 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL; 142 else 143 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT; 144 145 if (~sa->dp_tx->features & SFC_DP_TX_FEAT_MULTI_SEG) 146 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOMULTSEGS; 147 148 if (~sa->dp_tx->features & SFC_DP_TX_FEAT_MULTI_POOL) 149 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOMULTMEMP; 150 151 if (~sa->dp_tx->features & SFC_DP_TX_FEAT_REFCNT) 152 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOREFCOUNT; 153 154 #if EFSYS_OPT_RX_SCALE 155 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) { 156 dev_info->reta_size = EFX_RSS_TBL_SIZE; 157 dev_info->hash_key_size = EFX_RSS_KEY_SIZE; 158 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS; 159 } 160 #endif 161 162 if (sa->tso) 163 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO; 164 165 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS; 166 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS; 167 /* The RXQ hardware requires that the descriptor count is a power 168 * of 2, but rx_desc_lim cannot properly describe that constraint. 169 */ 170 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS; 171 172 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; 173 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS; 174 /* 175 * The TXQ hardware requires that the descriptor count is a power 176 * of 2, but tx_desc_lim cannot properly describe that constraint 177 */ 178 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS; 179 } 180 181 static const uint32_t * 182 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) 183 { 184 struct sfc_adapter *sa = dev->data->dev_private; 185 186 return sa->dp_rx->supported_ptypes_get(); 187 } 188 189 static int 190 sfc_dev_configure(struct rte_eth_dev *dev) 191 { 192 struct rte_eth_dev_data *dev_data = dev->data; 193 struct sfc_adapter *sa = dev_data->dev_private; 194 int rc; 195 196 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u", 197 dev_data->nb_rx_queues, dev_data->nb_tx_queues); 198 199 sfc_adapter_lock(sa); 200 switch (sa->state) { 201 case SFC_ADAPTER_CONFIGURED: 202 /* FALLTHROUGH */ 203 case SFC_ADAPTER_INITIALIZED: 204 rc = sfc_configure(sa); 205 break; 206 default: 207 sfc_err(sa, "unexpected adapter state %u to configure", 208 sa->state); 209 rc = EINVAL; 210 break; 211 } 212 sfc_adapter_unlock(sa); 213 214 sfc_log_init(sa, "done %d", rc); 215 SFC_ASSERT(rc >= 0); 216 return -rc; 217 } 218 219 static int 220 sfc_dev_start(struct rte_eth_dev *dev) 221 { 222 struct sfc_adapter *sa = dev->data->dev_private; 223 int rc; 224 225 sfc_log_init(sa, "entry"); 226 227 sfc_adapter_lock(sa); 228 rc = sfc_start(sa); 229 sfc_adapter_unlock(sa); 230 231 sfc_log_init(sa, "done %d", rc); 232 SFC_ASSERT(rc >= 0); 233 return -rc; 234 } 235 236 static int 237 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 238 { 239 struct sfc_adapter *sa = dev->data->dev_private; 240 struct rte_eth_link *dev_link = &dev->data->dev_link; 241 struct rte_eth_link old_link; 242 struct rte_eth_link current_link; 243 244 sfc_log_init(sa, "entry"); 245 246 retry: 247 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t)); 248 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link); 249 250 if (sa->state != SFC_ADAPTER_STARTED) { 251 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link); 252 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 253 *(uint64_t *)&old_link, 254 *(uint64_t *)¤t_link)) 255 goto retry; 256 } else if (wait_to_complete) { 257 efx_link_mode_t link_mode; 258 259 if (efx_port_poll(sa->nic, &link_mode) != 0) 260 link_mode = EFX_LINK_UNKNOWN; 261 sfc_port_link_mode_to_info(link_mode, ¤t_link); 262 263 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 264 *(uint64_t *)&old_link, 265 *(uint64_t *)¤t_link)) 266 goto retry; 267 } else { 268 sfc_ev_mgmt_qpoll(sa); 269 *(int64_t *)¤t_link = 270 rte_atomic64_read((rte_atomic64_t *)dev_link); 271 } 272 273 if (old_link.link_status != current_link.link_status) 274 sfc_info(sa, "Link status is %s", 275 current_link.link_status ? "UP" : "DOWN"); 276 277 return old_link.link_status == current_link.link_status ? 0 : -1; 278 } 279 280 static void 281 sfc_dev_stop(struct rte_eth_dev *dev) 282 { 283 struct sfc_adapter *sa = dev->data->dev_private; 284 285 sfc_log_init(sa, "entry"); 286 287 sfc_adapter_lock(sa); 288 sfc_stop(sa); 289 sfc_adapter_unlock(sa); 290 291 sfc_log_init(sa, "done"); 292 } 293 294 static int 295 sfc_dev_set_link_up(struct rte_eth_dev *dev) 296 { 297 struct sfc_adapter *sa = dev->data->dev_private; 298 int rc; 299 300 sfc_log_init(sa, "entry"); 301 302 sfc_adapter_lock(sa); 303 rc = sfc_start(sa); 304 sfc_adapter_unlock(sa); 305 306 SFC_ASSERT(rc >= 0); 307 return -rc; 308 } 309 310 static int 311 sfc_dev_set_link_down(struct rte_eth_dev *dev) 312 { 313 struct sfc_adapter *sa = dev->data->dev_private; 314 315 sfc_log_init(sa, "entry"); 316 317 sfc_adapter_lock(sa); 318 sfc_stop(sa); 319 sfc_adapter_unlock(sa); 320 321 return 0; 322 } 323 324 static void 325 sfc_dev_close(struct rte_eth_dev *dev) 326 { 327 struct sfc_adapter *sa = dev->data->dev_private; 328 329 sfc_log_init(sa, "entry"); 330 331 sfc_adapter_lock(sa); 332 switch (sa->state) { 333 case SFC_ADAPTER_STARTED: 334 sfc_stop(sa); 335 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED); 336 /* FALLTHROUGH */ 337 case SFC_ADAPTER_CONFIGURED: 338 sfc_close(sa); 339 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED); 340 /* FALLTHROUGH */ 341 case SFC_ADAPTER_INITIALIZED: 342 break; 343 default: 344 sfc_err(sa, "unexpected adapter state %u on close", sa->state); 345 break; 346 } 347 sfc_adapter_unlock(sa); 348 349 sfc_log_init(sa, "done"); 350 } 351 352 static void 353 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode, 354 boolean_t enabled) 355 { 356 struct sfc_port *port; 357 boolean_t *toggle; 358 struct sfc_adapter *sa = dev->data->dev_private; 359 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI); 360 const char *desc = (allmulti) ? "all-multi" : "promiscuous"; 361 362 sfc_adapter_lock(sa); 363 364 port = &sa->port; 365 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc); 366 367 if (*toggle != enabled) { 368 *toggle = enabled; 369 370 if (port->isolated) { 371 sfc_warn(sa, "isolated mode is active on the port"); 372 sfc_warn(sa, "the change is to be applied on the next " 373 "start provided that isolated mode is " 374 "disabled prior the next start"); 375 } else if ((sa->state == SFC_ADAPTER_STARTED) && 376 (sfc_set_rx_mode(sa) != 0)) { 377 *toggle = !(enabled); 378 sfc_warn(sa, "Failed to %s %s mode", 379 ((enabled) ? "enable" : "disable"), desc); 380 } 381 } 382 383 sfc_adapter_unlock(sa); 384 } 385 386 static void 387 sfc_dev_promisc_enable(struct rte_eth_dev *dev) 388 { 389 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE); 390 } 391 392 static void 393 sfc_dev_promisc_disable(struct rte_eth_dev *dev) 394 { 395 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE); 396 } 397 398 static void 399 sfc_dev_allmulti_enable(struct rte_eth_dev *dev) 400 { 401 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE); 402 } 403 404 static void 405 sfc_dev_allmulti_disable(struct rte_eth_dev *dev) 406 { 407 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE); 408 } 409 410 static int 411 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, 412 uint16_t nb_rx_desc, unsigned int socket_id, 413 const struct rte_eth_rxconf *rx_conf, 414 struct rte_mempool *mb_pool) 415 { 416 struct sfc_adapter *sa = dev->data->dev_private; 417 int rc; 418 419 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u", 420 rx_queue_id, nb_rx_desc, socket_id); 421 422 sfc_adapter_lock(sa); 423 424 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id, 425 rx_conf, mb_pool); 426 if (rc != 0) 427 goto fail_rx_qinit; 428 429 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq->dp; 430 431 sfc_adapter_unlock(sa); 432 433 return 0; 434 435 fail_rx_qinit: 436 sfc_adapter_unlock(sa); 437 SFC_ASSERT(rc > 0); 438 return -rc; 439 } 440 441 static void 442 sfc_rx_queue_release(void *queue) 443 { 444 struct sfc_dp_rxq *dp_rxq = queue; 445 struct sfc_rxq *rxq; 446 struct sfc_adapter *sa; 447 unsigned int sw_index; 448 449 if (dp_rxq == NULL) 450 return; 451 452 rxq = sfc_rxq_by_dp_rxq(dp_rxq); 453 sa = rxq->evq->sa; 454 sfc_adapter_lock(sa); 455 456 sw_index = sfc_rxq_sw_index(rxq); 457 458 sfc_log_init(sa, "RxQ=%u", sw_index); 459 460 sa->eth_dev->data->rx_queues[sw_index] = NULL; 461 462 sfc_rx_qfini(sa, sw_index); 463 464 sfc_adapter_unlock(sa); 465 } 466 467 static int 468 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, 469 uint16_t nb_tx_desc, unsigned int socket_id, 470 const struct rte_eth_txconf *tx_conf) 471 { 472 struct sfc_adapter *sa = dev->data->dev_private; 473 int rc; 474 475 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u", 476 tx_queue_id, nb_tx_desc, socket_id); 477 478 sfc_adapter_lock(sa); 479 480 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf); 481 if (rc != 0) 482 goto fail_tx_qinit; 483 484 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq->dp; 485 486 sfc_adapter_unlock(sa); 487 return 0; 488 489 fail_tx_qinit: 490 sfc_adapter_unlock(sa); 491 SFC_ASSERT(rc > 0); 492 return -rc; 493 } 494 495 static void 496 sfc_tx_queue_release(void *queue) 497 { 498 struct sfc_dp_txq *dp_txq = queue; 499 struct sfc_txq *txq; 500 unsigned int sw_index; 501 struct sfc_adapter *sa; 502 503 if (dp_txq == NULL) 504 return; 505 506 txq = sfc_txq_by_dp_txq(dp_txq); 507 sw_index = sfc_txq_sw_index(txq); 508 509 SFC_ASSERT(txq->evq != NULL); 510 sa = txq->evq->sa; 511 512 sfc_log_init(sa, "TxQ = %u", sw_index); 513 514 sfc_adapter_lock(sa); 515 516 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues); 517 sa->eth_dev->data->tx_queues[sw_index] = NULL; 518 519 sfc_tx_qfini(sa, sw_index); 520 521 sfc_adapter_unlock(sa); 522 } 523 524 static void 525 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 526 { 527 struct sfc_adapter *sa = dev->data->dev_private; 528 struct sfc_port *port = &sa->port; 529 uint64_t *mac_stats; 530 531 rte_spinlock_lock(&port->mac_stats_lock); 532 533 if (sfc_port_update_mac_stats(sa) != 0) 534 goto unlock; 535 536 mac_stats = port->mac_stats_buf; 537 538 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, 539 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) { 540 stats->ipackets = 541 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] + 542 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] + 543 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]; 544 stats->opackets = 545 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] + 546 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] + 547 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]; 548 stats->ibytes = 549 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] + 550 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] + 551 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]; 552 stats->obytes = 553 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] + 554 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] + 555 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; 556 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW]; 557 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; 558 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; 559 } else { 560 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS]; 561 stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; 562 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS]; 563 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS]; 564 /* 565 * Take into account stats which are whenever supported 566 * on EF10. If some stat is not supported by current 567 * firmware variant or HW revision, it is guaranteed 568 * to be zero in mac_stats. 569 */ 570 stats->imissed = 571 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] + 572 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] + 573 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] + 574 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] + 575 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] + 576 mac_stats[EFX_MAC_PM_TRUNC_QBB] + 577 mac_stats[EFX_MAC_PM_DISCARD_QBB] + 578 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] + 579 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] + 580 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS]; 581 stats->ierrors = 582 mac_stats[EFX_MAC_RX_FCS_ERRORS] + 583 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] + 584 mac_stats[EFX_MAC_RX_JABBER_PKTS]; 585 /* no oerrors counters supported on EF10 */ 586 } 587 588 unlock: 589 rte_spinlock_unlock(&port->mac_stats_lock); 590 } 591 592 static void 593 sfc_stats_reset(struct rte_eth_dev *dev) 594 { 595 struct sfc_adapter *sa = dev->data->dev_private; 596 struct sfc_port *port = &sa->port; 597 int rc; 598 599 if (sa->state != SFC_ADAPTER_STARTED) { 600 /* 601 * The operation cannot be done if port is not started; it 602 * will be scheduled to be done during the next port start 603 */ 604 port->mac_stats_reset_pending = B_TRUE; 605 return; 606 } 607 608 rc = sfc_port_reset_mac_stats(sa); 609 if (rc != 0) 610 sfc_err(sa, "failed to reset statistics (rc = %d)", rc); 611 } 612 613 static int 614 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 615 unsigned int xstats_count) 616 { 617 struct sfc_adapter *sa = dev->data->dev_private; 618 struct sfc_port *port = &sa->port; 619 uint64_t *mac_stats; 620 int rc; 621 unsigned int i; 622 int nstats = 0; 623 624 rte_spinlock_lock(&port->mac_stats_lock); 625 626 rc = sfc_port_update_mac_stats(sa); 627 if (rc != 0) { 628 SFC_ASSERT(rc > 0); 629 nstats = -rc; 630 goto unlock; 631 } 632 633 mac_stats = port->mac_stats_buf; 634 635 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 636 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 637 if (xstats != NULL && nstats < (int)xstats_count) { 638 xstats[nstats].id = nstats; 639 xstats[nstats].value = mac_stats[i]; 640 } 641 nstats++; 642 } 643 } 644 645 unlock: 646 rte_spinlock_unlock(&port->mac_stats_lock); 647 648 return nstats; 649 } 650 651 static int 652 sfc_xstats_get_names(struct rte_eth_dev *dev, 653 struct rte_eth_xstat_name *xstats_names, 654 unsigned int xstats_count) 655 { 656 struct sfc_adapter *sa = dev->data->dev_private; 657 struct sfc_port *port = &sa->port; 658 unsigned int i; 659 unsigned int nstats = 0; 660 661 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 662 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 663 if (xstats_names != NULL && nstats < xstats_count) 664 strncpy(xstats_names[nstats].name, 665 efx_mac_stat_name(sa->nic, i), 666 sizeof(xstats_names[0].name)); 667 nstats++; 668 } 669 } 670 671 return nstats; 672 } 673 674 static int 675 sfc_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 676 uint64_t *values, unsigned int n) 677 { 678 struct sfc_adapter *sa = dev->data->dev_private; 679 struct sfc_port *port = &sa->port; 680 uint64_t *mac_stats; 681 unsigned int nb_supported = 0; 682 unsigned int nb_written = 0; 683 unsigned int i; 684 int ret; 685 int rc; 686 687 if (unlikely(values == NULL) || 688 unlikely((ids == NULL) && (n < port->mac_stats_nb_supported))) 689 return port->mac_stats_nb_supported; 690 691 rte_spinlock_lock(&port->mac_stats_lock); 692 693 rc = sfc_port_update_mac_stats(sa); 694 if (rc != 0) { 695 SFC_ASSERT(rc > 0); 696 ret = -rc; 697 goto unlock; 698 } 699 700 mac_stats = port->mac_stats_buf; 701 702 for (i = 0; (i < EFX_MAC_NSTATS) && (nb_written < n); ++i) { 703 if (!EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) 704 continue; 705 706 if ((ids == NULL) || (ids[nb_written] == nb_supported)) 707 values[nb_written++] = mac_stats[i]; 708 709 ++nb_supported; 710 } 711 712 ret = nb_written; 713 714 unlock: 715 rte_spinlock_unlock(&port->mac_stats_lock); 716 717 return ret; 718 } 719 720 static int 721 sfc_xstats_get_names_by_id(struct rte_eth_dev *dev, 722 struct rte_eth_xstat_name *xstats_names, 723 const uint64_t *ids, unsigned int size) 724 { 725 struct sfc_adapter *sa = dev->data->dev_private; 726 struct sfc_port *port = &sa->port; 727 unsigned int nb_supported = 0; 728 unsigned int nb_written = 0; 729 unsigned int i; 730 731 if (unlikely(xstats_names == NULL) || 732 unlikely((ids == NULL) && (size < port->mac_stats_nb_supported))) 733 return port->mac_stats_nb_supported; 734 735 for (i = 0; (i < EFX_MAC_NSTATS) && (nb_written < size); ++i) { 736 if (!EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) 737 continue; 738 739 if ((ids == NULL) || (ids[nb_written] == nb_supported)) { 740 char *name = xstats_names[nb_written++].name; 741 742 strncpy(name, efx_mac_stat_name(sa->nic, i), 743 sizeof(xstats_names[0].name)); 744 name[sizeof(xstats_names[0].name) - 1] = '\0'; 745 } 746 747 ++nb_supported; 748 } 749 750 return nb_written; 751 } 752 753 static int 754 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 755 { 756 struct sfc_adapter *sa = dev->data->dev_private; 757 unsigned int wanted_fc, link_fc; 758 759 memset(fc_conf, 0, sizeof(*fc_conf)); 760 761 sfc_adapter_lock(sa); 762 763 if (sa->state == SFC_ADAPTER_STARTED) 764 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc); 765 else 766 link_fc = sa->port.flow_ctrl; 767 768 switch (link_fc) { 769 case 0: 770 fc_conf->mode = RTE_FC_NONE; 771 break; 772 case EFX_FCNTL_RESPOND: 773 fc_conf->mode = RTE_FC_RX_PAUSE; 774 break; 775 case EFX_FCNTL_GENERATE: 776 fc_conf->mode = RTE_FC_TX_PAUSE; 777 break; 778 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE): 779 fc_conf->mode = RTE_FC_FULL; 780 break; 781 default: 782 sfc_err(sa, "%s: unexpected flow control value %#x", 783 __func__, link_fc); 784 } 785 786 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; 787 788 sfc_adapter_unlock(sa); 789 790 return 0; 791 } 792 793 static int 794 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 795 { 796 struct sfc_adapter *sa = dev->data->dev_private; 797 struct sfc_port *port = &sa->port; 798 unsigned int fcntl; 799 int rc; 800 801 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || 802 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || 803 fc_conf->mac_ctrl_frame_fwd != 0) { 804 sfc_err(sa, "unsupported flow control settings specified"); 805 rc = EINVAL; 806 goto fail_inval; 807 } 808 809 switch (fc_conf->mode) { 810 case RTE_FC_NONE: 811 fcntl = 0; 812 break; 813 case RTE_FC_RX_PAUSE: 814 fcntl = EFX_FCNTL_RESPOND; 815 break; 816 case RTE_FC_TX_PAUSE: 817 fcntl = EFX_FCNTL_GENERATE; 818 break; 819 case RTE_FC_FULL: 820 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 821 break; 822 default: 823 rc = EINVAL; 824 goto fail_inval; 825 } 826 827 sfc_adapter_lock(sa); 828 829 if (sa->state == SFC_ADAPTER_STARTED) { 830 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg); 831 if (rc != 0) 832 goto fail_mac_fcntl_set; 833 } 834 835 port->flow_ctrl = fcntl; 836 port->flow_ctrl_autoneg = fc_conf->autoneg; 837 838 sfc_adapter_unlock(sa); 839 840 return 0; 841 842 fail_mac_fcntl_set: 843 sfc_adapter_unlock(sa); 844 fail_inval: 845 SFC_ASSERT(rc > 0); 846 return -rc; 847 } 848 849 static int 850 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 851 { 852 struct sfc_adapter *sa = dev->data->dev_private; 853 size_t pdu = EFX_MAC_PDU(mtu); 854 size_t old_pdu; 855 int rc; 856 857 sfc_log_init(sa, "mtu=%u", mtu); 858 859 rc = EINVAL; 860 if (pdu < EFX_MAC_PDU_MIN) { 861 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)", 862 (unsigned int)mtu, (unsigned int)pdu, 863 EFX_MAC_PDU_MIN); 864 goto fail_inval; 865 } 866 if (pdu > EFX_MAC_PDU_MAX) { 867 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)", 868 (unsigned int)mtu, (unsigned int)pdu, 869 EFX_MAC_PDU_MAX); 870 goto fail_inval; 871 } 872 873 sfc_adapter_lock(sa); 874 875 if (pdu != sa->port.pdu) { 876 if (sa->state == SFC_ADAPTER_STARTED) { 877 sfc_stop(sa); 878 879 old_pdu = sa->port.pdu; 880 sa->port.pdu = pdu; 881 rc = sfc_start(sa); 882 if (rc != 0) 883 goto fail_start; 884 } else { 885 sa->port.pdu = pdu; 886 } 887 } 888 889 /* 890 * The driver does not use it, but other PMDs update jumbo_frame 891 * flag and max_rx_pkt_len when MTU is set. 892 */ 893 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN); 894 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu; 895 896 sfc_adapter_unlock(sa); 897 898 sfc_log_init(sa, "done"); 899 return 0; 900 901 fail_start: 902 sa->port.pdu = old_pdu; 903 if (sfc_start(sa) != 0) 904 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) " 905 "PDU max size - port is stopped", 906 (unsigned int)pdu, (unsigned int)old_pdu); 907 sfc_adapter_unlock(sa); 908 909 fail_inval: 910 sfc_log_init(sa, "failed %d", rc); 911 SFC_ASSERT(rc > 0); 912 return -rc; 913 } 914 static void 915 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr) 916 { 917 struct sfc_adapter *sa = dev->data->dev_private; 918 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 919 struct sfc_port *port = &sa->port; 920 int rc; 921 922 sfc_adapter_lock(sa); 923 924 if (port->isolated) { 925 sfc_err(sa, "isolated mode is active on the port"); 926 sfc_err(sa, "will not set MAC address"); 927 goto unlock; 928 } 929 930 if (sa->state != SFC_ADAPTER_STARTED) { 931 sfc_info(sa, "the port is not started"); 932 sfc_info(sa, "the new MAC address will be set on port start"); 933 934 goto unlock; 935 } 936 937 if (encp->enc_allow_set_mac_with_installed_filters) { 938 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes); 939 if (rc != 0) { 940 sfc_err(sa, "cannot set MAC address (rc = %u)", rc); 941 goto unlock; 942 } 943 944 /* 945 * Changing the MAC address by means of MCDI request 946 * has no effect on received traffic, therefore 947 * we also need to update unicast filters 948 */ 949 rc = sfc_set_rx_mode(sa); 950 if (rc != 0) 951 sfc_err(sa, "cannot set filter (rc = %u)", rc); 952 } else { 953 sfc_warn(sa, "cannot set MAC address with filters installed"); 954 sfc_warn(sa, "adapter will be restarted to pick the new MAC"); 955 sfc_warn(sa, "(some traffic may be dropped)"); 956 957 /* 958 * Since setting MAC address with filters installed is not 959 * allowed on the adapter, one needs to simply restart adapter 960 * so that the new MAC address will be taken from an outer 961 * storage and set flawlessly by means of sfc_start() call 962 */ 963 sfc_stop(sa); 964 rc = sfc_start(sa); 965 if (rc != 0) 966 sfc_err(sa, "cannot restart adapter (rc = %u)", rc); 967 } 968 969 unlock: 970 sfc_adapter_unlock(sa); 971 } 972 973 974 static int 975 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set, 976 uint32_t nb_mc_addr) 977 { 978 struct sfc_adapter *sa = dev->data->dev_private; 979 struct sfc_port *port = &sa->port; 980 uint8_t *mc_addrs = port->mcast_addrs; 981 int rc; 982 unsigned int i; 983 984 if (port->isolated) { 985 sfc_err(sa, "isolated mode is active on the port"); 986 sfc_err(sa, "will not set multicast address list"); 987 return -ENOTSUP; 988 } 989 990 if (mc_addrs == NULL) 991 return -ENOBUFS; 992 993 if (nb_mc_addr > port->max_mcast_addrs) { 994 sfc_err(sa, "too many multicast addresses: %u > %u", 995 nb_mc_addr, port->max_mcast_addrs); 996 return -EINVAL; 997 } 998 999 for (i = 0; i < nb_mc_addr; ++i) { 1000 rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, 1001 EFX_MAC_ADDR_LEN); 1002 mc_addrs += EFX_MAC_ADDR_LEN; 1003 } 1004 1005 port->nb_mcast_addrs = nb_mc_addr; 1006 1007 if (sa->state != SFC_ADAPTER_STARTED) 1008 return 0; 1009 1010 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, 1011 port->nb_mcast_addrs); 1012 if (rc != 0) 1013 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); 1014 1015 SFC_ASSERT(rc > 0); 1016 return -rc; 1017 } 1018 1019 /* 1020 * The function is used by the secondary process as well. It must not 1021 * use any process-local pointers from the adapter data. 1022 */ 1023 static void 1024 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id, 1025 struct rte_eth_rxq_info *qinfo) 1026 { 1027 struct sfc_adapter *sa = dev->data->dev_private; 1028 struct sfc_rxq_info *rxq_info; 1029 struct sfc_rxq *rxq; 1030 1031 sfc_adapter_lock(sa); 1032 1033 SFC_ASSERT(rx_queue_id < sa->rxq_count); 1034 1035 rxq_info = &sa->rxq_info[rx_queue_id]; 1036 rxq = rxq_info->rxq; 1037 SFC_ASSERT(rxq != NULL); 1038 1039 qinfo->mp = rxq->refill_mb_pool; 1040 qinfo->conf.rx_free_thresh = rxq->refill_threshold; 1041 qinfo->conf.rx_drop_en = 1; 1042 qinfo->conf.rx_deferred_start = rxq_info->deferred_start; 1043 qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER); 1044 qinfo->nb_desc = rxq_info->entries; 1045 1046 sfc_adapter_unlock(sa); 1047 } 1048 1049 /* 1050 * The function is used by the secondary process as well. It must not 1051 * use any process-local pointers from the adapter data. 1052 */ 1053 static void 1054 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id, 1055 struct rte_eth_txq_info *qinfo) 1056 { 1057 struct sfc_adapter *sa = dev->data->dev_private; 1058 struct sfc_txq_info *txq_info; 1059 1060 sfc_adapter_lock(sa); 1061 1062 SFC_ASSERT(tx_queue_id < sa->txq_count); 1063 1064 txq_info = &sa->txq_info[tx_queue_id]; 1065 SFC_ASSERT(txq_info->txq != NULL); 1066 1067 memset(qinfo, 0, sizeof(*qinfo)); 1068 1069 qinfo->conf.txq_flags = txq_info->txq->flags; 1070 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh; 1071 qinfo->conf.tx_deferred_start = txq_info->deferred_start; 1072 qinfo->nb_desc = txq_info->entries; 1073 1074 sfc_adapter_unlock(sa); 1075 } 1076 1077 static uint32_t 1078 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) 1079 { 1080 struct sfc_adapter *sa = dev->data->dev_private; 1081 1082 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 1083 1084 return sfc_rx_qdesc_npending(sa, rx_queue_id); 1085 } 1086 1087 static int 1088 sfc_rx_descriptor_done(void *queue, uint16_t offset) 1089 { 1090 struct sfc_dp_rxq *dp_rxq = queue; 1091 1092 return sfc_rx_qdesc_done(dp_rxq, offset); 1093 } 1094 1095 static int 1096 sfc_rx_descriptor_status(void *queue, uint16_t offset) 1097 { 1098 struct sfc_dp_rxq *dp_rxq = queue; 1099 struct sfc_rxq *rxq = sfc_rxq_by_dp_rxq(dp_rxq); 1100 1101 return rxq->evq->sa->dp_rx->qdesc_status(dp_rxq, offset); 1102 } 1103 1104 static int 1105 sfc_tx_descriptor_status(void *queue, uint16_t offset) 1106 { 1107 struct sfc_dp_txq *dp_txq = queue; 1108 struct sfc_txq *txq = sfc_txq_by_dp_txq(dp_txq); 1109 1110 return txq->evq->sa->dp_tx->qdesc_status(dp_txq, offset); 1111 } 1112 1113 static int 1114 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) 1115 { 1116 struct sfc_adapter *sa = dev->data->dev_private; 1117 int rc; 1118 1119 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 1120 1121 sfc_adapter_lock(sa); 1122 1123 rc = EINVAL; 1124 if (sa->state != SFC_ADAPTER_STARTED) 1125 goto fail_not_started; 1126 1127 rc = sfc_rx_qstart(sa, rx_queue_id); 1128 if (rc != 0) 1129 goto fail_rx_qstart; 1130 1131 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE; 1132 1133 sfc_adapter_unlock(sa); 1134 1135 return 0; 1136 1137 fail_rx_qstart: 1138 fail_not_started: 1139 sfc_adapter_unlock(sa); 1140 SFC_ASSERT(rc > 0); 1141 return -rc; 1142 } 1143 1144 static int 1145 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) 1146 { 1147 struct sfc_adapter *sa = dev->data->dev_private; 1148 1149 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 1150 1151 sfc_adapter_lock(sa); 1152 sfc_rx_qstop(sa, rx_queue_id); 1153 1154 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE; 1155 1156 sfc_adapter_unlock(sa); 1157 1158 return 0; 1159 } 1160 1161 static int 1162 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1163 { 1164 struct sfc_adapter *sa = dev->data->dev_private; 1165 int rc; 1166 1167 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1168 1169 sfc_adapter_lock(sa); 1170 1171 rc = EINVAL; 1172 if (sa->state != SFC_ADAPTER_STARTED) 1173 goto fail_not_started; 1174 1175 rc = sfc_tx_qstart(sa, tx_queue_id); 1176 if (rc != 0) 1177 goto fail_tx_qstart; 1178 1179 sa->txq_info[tx_queue_id].deferred_started = B_TRUE; 1180 1181 sfc_adapter_unlock(sa); 1182 return 0; 1183 1184 fail_tx_qstart: 1185 1186 fail_not_started: 1187 sfc_adapter_unlock(sa); 1188 SFC_ASSERT(rc > 0); 1189 return -rc; 1190 } 1191 1192 static int 1193 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1194 { 1195 struct sfc_adapter *sa = dev->data->dev_private; 1196 1197 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1198 1199 sfc_adapter_lock(sa); 1200 1201 sfc_tx_qstop(sa, tx_queue_id); 1202 1203 sa->txq_info[tx_queue_id].deferred_started = B_FALSE; 1204 1205 sfc_adapter_unlock(sa); 1206 return 0; 1207 } 1208 1209 #if EFSYS_OPT_RX_SCALE 1210 static int 1211 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1212 struct rte_eth_rss_conf *rss_conf) 1213 { 1214 struct sfc_adapter *sa = dev->data->dev_private; 1215 struct sfc_port *port = &sa->port; 1216 1217 if ((sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) || port->isolated) 1218 return -ENOTSUP; 1219 1220 if (sa->rss_channels == 0) 1221 return -EINVAL; 1222 1223 sfc_adapter_lock(sa); 1224 1225 /* 1226 * Mapping of hash configuration between RTE and EFX is not one-to-one, 1227 * hence, conversion is done here to derive a correct set of ETH_RSS 1228 * flags which corresponds to the active EFX configuration stored 1229 * locally in 'sfc_adapter' and kept up-to-date 1230 */ 1231 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types); 1232 rss_conf->rss_key_len = EFX_RSS_KEY_SIZE; 1233 if (rss_conf->rss_key != NULL) 1234 rte_memcpy(rss_conf->rss_key, sa->rss_key, EFX_RSS_KEY_SIZE); 1235 1236 sfc_adapter_unlock(sa); 1237 1238 return 0; 1239 } 1240 1241 static int 1242 sfc_dev_rss_hash_update(struct rte_eth_dev *dev, 1243 struct rte_eth_rss_conf *rss_conf) 1244 { 1245 struct sfc_adapter *sa = dev->data->dev_private; 1246 struct sfc_port *port = &sa->port; 1247 unsigned int efx_hash_types; 1248 int rc = 0; 1249 1250 if (port->isolated) 1251 return -ENOTSUP; 1252 1253 if (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) { 1254 sfc_err(sa, "RSS is not available"); 1255 return -ENOTSUP; 1256 } 1257 1258 if (sa->rss_channels == 0) { 1259 sfc_err(sa, "RSS is not configured"); 1260 return -EINVAL; 1261 } 1262 1263 if ((rss_conf->rss_key != NULL) && 1264 (rss_conf->rss_key_len != sizeof(sa->rss_key))) { 1265 sfc_err(sa, "RSS key size is wrong (should be %lu)", 1266 sizeof(sa->rss_key)); 1267 return -EINVAL; 1268 } 1269 1270 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) { 1271 sfc_err(sa, "unsupported hash functions requested"); 1272 return -EINVAL; 1273 } 1274 1275 sfc_adapter_lock(sa); 1276 1277 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf); 1278 1279 rc = efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT, 1280 EFX_RX_HASHALG_TOEPLITZ, 1281 efx_hash_types, B_TRUE); 1282 if (rc != 0) 1283 goto fail_scale_mode_set; 1284 1285 if (rss_conf->rss_key != NULL) { 1286 if (sa->state == SFC_ADAPTER_STARTED) { 1287 rc = efx_rx_scale_key_set(sa->nic, 1288 EFX_RSS_CONTEXT_DEFAULT, 1289 rss_conf->rss_key, 1290 sizeof(sa->rss_key)); 1291 if (rc != 0) 1292 goto fail_scale_key_set; 1293 } 1294 1295 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key)); 1296 } 1297 1298 sa->rss_hash_types = efx_hash_types; 1299 1300 sfc_adapter_unlock(sa); 1301 1302 return 0; 1303 1304 fail_scale_key_set: 1305 if (efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT, 1306 EFX_RX_HASHALG_TOEPLITZ, 1307 sa->rss_hash_types, B_TRUE) != 0) 1308 sfc_err(sa, "failed to restore RSS mode"); 1309 1310 fail_scale_mode_set: 1311 sfc_adapter_unlock(sa); 1312 return -rc; 1313 } 1314 1315 static int 1316 sfc_dev_rss_reta_query(struct rte_eth_dev *dev, 1317 struct rte_eth_rss_reta_entry64 *reta_conf, 1318 uint16_t reta_size) 1319 { 1320 struct sfc_adapter *sa = dev->data->dev_private; 1321 struct sfc_port *port = &sa->port; 1322 int entry; 1323 1324 if ((sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) || port->isolated) 1325 return -ENOTSUP; 1326 1327 if (sa->rss_channels == 0) 1328 return -EINVAL; 1329 1330 if (reta_size != EFX_RSS_TBL_SIZE) 1331 return -EINVAL; 1332 1333 sfc_adapter_lock(sa); 1334 1335 for (entry = 0; entry < reta_size; entry++) { 1336 int grp = entry / RTE_RETA_GROUP_SIZE; 1337 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1338 1339 if ((reta_conf[grp].mask >> grp_idx) & 1) 1340 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry]; 1341 } 1342 1343 sfc_adapter_unlock(sa); 1344 1345 return 0; 1346 } 1347 1348 static int 1349 sfc_dev_rss_reta_update(struct rte_eth_dev *dev, 1350 struct rte_eth_rss_reta_entry64 *reta_conf, 1351 uint16_t reta_size) 1352 { 1353 struct sfc_adapter *sa = dev->data->dev_private; 1354 struct sfc_port *port = &sa->port; 1355 unsigned int *rss_tbl_new; 1356 uint16_t entry; 1357 int rc = 0; 1358 1359 1360 if (port->isolated) 1361 return -ENOTSUP; 1362 1363 if (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) { 1364 sfc_err(sa, "RSS is not available"); 1365 return -ENOTSUP; 1366 } 1367 1368 if (sa->rss_channels == 0) { 1369 sfc_err(sa, "RSS is not configured"); 1370 return -EINVAL; 1371 } 1372 1373 if (reta_size != EFX_RSS_TBL_SIZE) { 1374 sfc_err(sa, "RETA size is wrong (should be %u)", 1375 EFX_RSS_TBL_SIZE); 1376 return -EINVAL; 1377 } 1378 1379 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0); 1380 if (rss_tbl_new == NULL) 1381 return -ENOMEM; 1382 1383 sfc_adapter_lock(sa); 1384 1385 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl)); 1386 1387 for (entry = 0; entry < reta_size; entry++) { 1388 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1389 struct rte_eth_rss_reta_entry64 *grp; 1390 1391 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE]; 1392 1393 if (grp->mask & (1ull << grp_idx)) { 1394 if (grp->reta[grp_idx] >= sa->rss_channels) { 1395 rc = EINVAL; 1396 goto bad_reta_entry; 1397 } 1398 rss_tbl_new[entry] = grp->reta[grp_idx]; 1399 } 1400 } 1401 1402 if (sa->state == SFC_ADAPTER_STARTED) { 1403 rc = efx_rx_scale_tbl_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT, 1404 rss_tbl_new, EFX_RSS_TBL_SIZE); 1405 if (rc != 0) 1406 goto fail_scale_tbl_set; 1407 } 1408 1409 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl)); 1410 1411 fail_scale_tbl_set: 1412 bad_reta_entry: 1413 sfc_adapter_unlock(sa); 1414 1415 rte_free(rss_tbl_new); 1416 1417 SFC_ASSERT(rc >= 0); 1418 return -rc; 1419 } 1420 #endif 1421 1422 static int 1423 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type, 1424 enum rte_filter_op filter_op, 1425 void *arg) 1426 { 1427 struct sfc_adapter *sa = dev->data->dev_private; 1428 int rc = ENOTSUP; 1429 1430 sfc_log_init(sa, "entry"); 1431 1432 switch (filter_type) { 1433 case RTE_ETH_FILTER_NONE: 1434 sfc_err(sa, "Global filters configuration not supported"); 1435 break; 1436 case RTE_ETH_FILTER_MACVLAN: 1437 sfc_err(sa, "MACVLAN filters not supported"); 1438 break; 1439 case RTE_ETH_FILTER_ETHERTYPE: 1440 sfc_err(sa, "EtherType filters not supported"); 1441 break; 1442 case RTE_ETH_FILTER_FLEXIBLE: 1443 sfc_err(sa, "Flexible filters not supported"); 1444 break; 1445 case RTE_ETH_FILTER_SYN: 1446 sfc_err(sa, "SYN filters not supported"); 1447 break; 1448 case RTE_ETH_FILTER_NTUPLE: 1449 sfc_err(sa, "NTUPLE filters not supported"); 1450 break; 1451 case RTE_ETH_FILTER_TUNNEL: 1452 sfc_err(sa, "Tunnel filters not supported"); 1453 break; 1454 case RTE_ETH_FILTER_FDIR: 1455 sfc_err(sa, "Flow Director filters not supported"); 1456 break; 1457 case RTE_ETH_FILTER_HASH: 1458 sfc_err(sa, "Hash filters not supported"); 1459 break; 1460 case RTE_ETH_FILTER_GENERIC: 1461 if (filter_op != RTE_ETH_FILTER_GET) { 1462 rc = EINVAL; 1463 } else { 1464 *(const void **)arg = &sfc_flow_ops; 1465 rc = 0; 1466 } 1467 break; 1468 default: 1469 sfc_err(sa, "Unknown filter type %u", filter_type); 1470 break; 1471 } 1472 1473 sfc_log_init(sa, "exit: %d", -rc); 1474 SFC_ASSERT(rc >= 0); 1475 return -rc; 1476 } 1477 1478 static const struct eth_dev_ops sfc_eth_dev_ops = { 1479 .dev_configure = sfc_dev_configure, 1480 .dev_start = sfc_dev_start, 1481 .dev_stop = sfc_dev_stop, 1482 .dev_set_link_up = sfc_dev_set_link_up, 1483 .dev_set_link_down = sfc_dev_set_link_down, 1484 .dev_close = sfc_dev_close, 1485 .promiscuous_enable = sfc_dev_promisc_enable, 1486 .promiscuous_disable = sfc_dev_promisc_disable, 1487 .allmulticast_enable = sfc_dev_allmulti_enable, 1488 .allmulticast_disable = sfc_dev_allmulti_disable, 1489 .link_update = sfc_dev_link_update, 1490 .stats_get = sfc_stats_get, 1491 .stats_reset = sfc_stats_reset, 1492 .xstats_get = sfc_xstats_get, 1493 .xstats_reset = sfc_stats_reset, 1494 .xstats_get_names = sfc_xstats_get_names, 1495 .dev_infos_get = sfc_dev_infos_get, 1496 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 1497 .mtu_set = sfc_dev_set_mtu, 1498 .rx_queue_start = sfc_rx_queue_start, 1499 .rx_queue_stop = sfc_rx_queue_stop, 1500 .tx_queue_start = sfc_tx_queue_start, 1501 .tx_queue_stop = sfc_tx_queue_stop, 1502 .rx_queue_setup = sfc_rx_queue_setup, 1503 .rx_queue_release = sfc_rx_queue_release, 1504 .rx_queue_count = sfc_rx_queue_count, 1505 .rx_descriptor_done = sfc_rx_descriptor_done, 1506 .rx_descriptor_status = sfc_rx_descriptor_status, 1507 .tx_descriptor_status = sfc_tx_descriptor_status, 1508 .tx_queue_setup = sfc_tx_queue_setup, 1509 .tx_queue_release = sfc_tx_queue_release, 1510 .flow_ctrl_get = sfc_flow_ctrl_get, 1511 .flow_ctrl_set = sfc_flow_ctrl_set, 1512 .mac_addr_set = sfc_mac_addr_set, 1513 #if EFSYS_OPT_RX_SCALE 1514 .reta_update = sfc_dev_rss_reta_update, 1515 .reta_query = sfc_dev_rss_reta_query, 1516 .rss_hash_update = sfc_dev_rss_hash_update, 1517 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 1518 #endif 1519 .filter_ctrl = sfc_dev_filter_ctrl, 1520 .set_mc_addr_list = sfc_set_mc_addr_list, 1521 .rxq_info_get = sfc_rx_queue_info_get, 1522 .txq_info_get = sfc_tx_queue_info_get, 1523 .fw_version_get = sfc_fw_version_get, 1524 .xstats_get_by_id = sfc_xstats_get_by_id, 1525 .xstats_get_names_by_id = sfc_xstats_get_names_by_id, 1526 }; 1527 1528 /** 1529 * Duplicate a string in potentially shared memory required for 1530 * multi-process support. 1531 * 1532 * strdup() allocates from process-local heap/memory. 1533 */ 1534 static char * 1535 sfc_strdup(const char *str) 1536 { 1537 size_t size; 1538 char *copy; 1539 1540 if (str == NULL) 1541 return NULL; 1542 1543 size = strlen(str) + 1; 1544 copy = rte_malloc(__func__, size, 0); 1545 if (copy != NULL) 1546 rte_memcpy(copy, str, size); 1547 1548 return copy; 1549 } 1550 1551 static int 1552 sfc_eth_dev_set_ops(struct rte_eth_dev *dev) 1553 { 1554 struct sfc_adapter *sa = dev->data->dev_private; 1555 unsigned int avail_caps = 0; 1556 const char *rx_name = NULL; 1557 const char *tx_name = NULL; 1558 int rc; 1559 1560 switch (sa->family) { 1561 case EFX_FAMILY_HUNTINGTON: 1562 case EFX_FAMILY_MEDFORD: 1563 avail_caps |= SFC_DP_HW_FW_CAP_EF10; 1564 break; 1565 default: 1566 break; 1567 } 1568 1569 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH, 1570 sfc_kvarg_string_handler, &rx_name); 1571 if (rc != 0) 1572 goto fail_kvarg_rx_datapath; 1573 1574 if (rx_name != NULL) { 1575 sa->dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name); 1576 if (sa->dp_rx == NULL) { 1577 sfc_err(sa, "Rx datapath %s not found", rx_name); 1578 rc = ENOENT; 1579 goto fail_dp_rx; 1580 } 1581 if (!sfc_dp_match_hw_fw_caps(&sa->dp_rx->dp, avail_caps)) { 1582 sfc_err(sa, 1583 "Insufficient Hw/FW capabilities to use Rx datapath %s", 1584 rx_name); 1585 rc = EINVAL; 1586 goto fail_dp_rx_caps; 1587 } 1588 } else { 1589 sa->dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps); 1590 if (sa->dp_rx == NULL) { 1591 sfc_err(sa, "Rx datapath by caps %#x not found", 1592 avail_caps); 1593 rc = ENOENT; 1594 goto fail_dp_rx; 1595 } 1596 } 1597 1598 sa->dp_rx_name = sfc_strdup(sa->dp_rx->dp.name); 1599 if (sa->dp_rx_name == NULL) { 1600 rc = ENOMEM; 1601 goto fail_dp_rx_name; 1602 } 1603 1604 sfc_info(sa, "use %s Rx datapath", sa->dp_rx_name); 1605 1606 dev->rx_pkt_burst = sa->dp_rx->pkt_burst; 1607 1608 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH, 1609 sfc_kvarg_string_handler, &tx_name); 1610 if (rc != 0) 1611 goto fail_kvarg_tx_datapath; 1612 1613 if (tx_name != NULL) { 1614 sa->dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name); 1615 if (sa->dp_tx == NULL) { 1616 sfc_err(sa, "Tx datapath %s not found", tx_name); 1617 rc = ENOENT; 1618 goto fail_dp_tx; 1619 } 1620 if (!sfc_dp_match_hw_fw_caps(&sa->dp_tx->dp, avail_caps)) { 1621 sfc_err(sa, 1622 "Insufficient Hw/FW capabilities to use Tx datapath %s", 1623 tx_name); 1624 rc = EINVAL; 1625 goto fail_dp_tx_caps; 1626 } 1627 } else { 1628 sa->dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps); 1629 if (sa->dp_tx == NULL) { 1630 sfc_err(sa, "Tx datapath by caps %#x not found", 1631 avail_caps); 1632 rc = ENOENT; 1633 goto fail_dp_tx; 1634 } 1635 } 1636 1637 sa->dp_tx_name = sfc_strdup(sa->dp_tx->dp.name); 1638 if (sa->dp_tx_name == NULL) { 1639 rc = ENOMEM; 1640 goto fail_dp_tx_name; 1641 } 1642 1643 sfc_info(sa, "use %s Tx datapath", sa->dp_tx_name); 1644 1645 dev->tx_pkt_burst = sa->dp_tx->pkt_burst; 1646 1647 dev->dev_ops = &sfc_eth_dev_ops; 1648 1649 return 0; 1650 1651 fail_dp_tx_name: 1652 fail_dp_tx_caps: 1653 sa->dp_tx = NULL; 1654 1655 fail_dp_tx: 1656 fail_kvarg_tx_datapath: 1657 rte_free(sa->dp_rx_name); 1658 sa->dp_rx_name = NULL; 1659 1660 fail_dp_rx_name: 1661 fail_dp_rx_caps: 1662 sa->dp_rx = NULL; 1663 1664 fail_dp_rx: 1665 fail_kvarg_rx_datapath: 1666 return rc; 1667 } 1668 1669 static void 1670 sfc_eth_dev_clear_ops(struct rte_eth_dev *dev) 1671 { 1672 struct sfc_adapter *sa = dev->data->dev_private; 1673 1674 dev->dev_ops = NULL; 1675 dev->rx_pkt_burst = NULL; 1676 dev->tx_pkt_burst = NULL; 1677 1678 rte_free(sa->dp_tx_name); 1679 sa->dp_tx_name = NULL; 1680 sa->dp_tx = NULL; 1681 1682 rte_free(sa->dp_rx_name); 1683 sa->dp_rx_name = NULL; 1684 sa->dp_rx = NULL; 1685 } 1686 1687 static const struct eth_dev_ops sfc_eth_dev_secondary_ops = { 1688 .rxq_info_get = sfc_rx_queue_info_get, 1689 .txq_info_get = sfc_tx_queue_info_get, 1690 }; 1691 1692 static int 1693 sfc_eth_dev_secondary_set_ops(struct rte_eth_dev *dev) 1694 { 1695 /* 1696 * Device private data has really many process-local pointers. 1697 * Below code should be extremely careful to use data located 1698 * in shared memory only. 1699 */ 1700 struct sfc_adapter *sa = dev->data->dev_private; 1701 const struct sfc_dp_rx *dp_rx; 1702 const struct sfc_dp_tx *dp_tx; 1703 int rc; 1704 1705 dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, sa->dp_rx_name); 1706 if (dp_rx == NULL) { 1707 sfc_err(sa, "cannot find %s Rx datapath", sa->dp_tx_name); 1708 rc = ENOENT; 1709 goto fail_dp_rx; 1710 } 1711 if (~dp_rx->features & SFC_DP_RX_FEAT_MULTI_PROCESS) { 1712 sfc_err(sa, "%s Rx datapath does not support multi-process", 1713 sa->dp_tx_name); 1714 rc = EINVAL; 1715 goto fail_dp_rx_multi_process; 1716 } 1717 1718 dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, sa->dp_tx_name); 1719 if (dp_tx == NULL) { 1720 sfc_err(sa, "cannot find %s Tx datapath", sa->dp_tx_name); 1721 rc = ENOENT; 1722 goto fail_dp_tx; 1723 } 1724 if (~dp_tx->features & SFC_DP_TX_FEAT_MULTI_PROCESS) { 1725 sfc_err(sa, "%s Tx datapath does not support multi-process", 1726 sa->dp_tx_name); 1727 rc = EINVAL; 1728 goto fail_dp_tx_multi_process; 1729 } 1730 1731 dev->rx_pkt_burst = dp_rx->pkt_burst; 1732 dev->tx_pkt_burst = dp_tx->pkt_burst; 1733 dev->dev_ops = &sfc_eth_dev_secondary_ops; 1734 1735 return 0; 1736 1737 fail_dp_tx_multi_process: 1738 fail_dp_tx: 1739 fail_dp_rx_multi_process: 1740 fail_dp_rx: 1741 return rc; 1742 } 1743 1744 static void 1745 sfc_eth_dev_secondary_clear_ops(struct rte_eth_dev *dev) 1746 { 1747 dev->dev_ops = NULL; 1748 dev->tx_pkt_burst = NULL; 1749 dev->rx_pkt_burst = NULL; 1750 } 1751 1752 static void 1753 sfc_register_dp(void) 1754 { 1755 /* Register once */ 1756 if (TAILQ_EMPTY(&sfc_dp_head)) { 1757 /* Prefer EF10 datapath */ 1758 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp); 1759 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); 1760 1761 sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp); 1762 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp); 1763 sfc_dp_register(&sfc_dp_head, &sfc_ef10_simple_tx.dp); 1764 } 1765 } 1766 1767 static int 1768 sfc_eth_dev_init(struct rte_eth_dev *dev) 1769 { 1770 struct sfc_adapter *sa = dev->data->dev_private; 1771 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1772 int rc; 1773 const efx_nic_cfg_t *encp; 1774 const struct ether_addr *from; 1775 1776 sfc_register_dp(); 1777 1778 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1779 return -sfc_eth_dev_secondary_set_ops(dev); 1780 1781 /* Required for logging */ 1782 sa->pci_addr = pci_dev->addr; 1783 sa->port_id = dev->data->port_id; 1784 1785 sa->eth_dev = dev; 1786 1787 /* Copy PCI device info to the dev->data */ 1788 rte_eth_copy_pci_info(dev, pci_dev); 1789 1790 dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE; 1791 1792 rc = sfc_kvargs_parse(sa); 1793 if (rc != 0) 1794 goto fail_kvargs_parse; 1795 1796 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT, 1797 sfc_kvarg_bool_handler, &sa->debug_init); 1798 if (rc != 0) 1799 goto fail_kvarg_debug_init; 1800 1801 sfc_log_init(sa, "entry"); 1802 1803 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0); 1804 if (dev->data->mac_addrs == NULL) { 1805 rc = ENOMEM; 1806 goto fail_mac_addrs; 1807 } 1808 1809 sfc_adapter_lock_init(sa); 1810 sfc_adapter_lock(sa); 1811 1812 sfc_log_init(sa, "probing"); 1813 rc = sfc_probe(sa); 1814 if (rc != 0) 1815 goto fail_probe; 1816 1817 sfc_log_init(sa, "set device ops"); 1818 rc = sfc_eth_dev_set_ops(dev); 1819 if (rc != 0) 1820 goto fail_set_ops; 1821 1822 sfc_log_init(sa, "attaching"); 1823 rc = sfc_attach(sa); 1824 if (rc != 0) 1825 goto fail_attach; 1826 1827 encp = efx_nic_cfg_get(sa->nic); 1828 1829 /* 1830 * The arguments are really reverse order in comparison to 1831 * Linux kernel. Copy from NIC config to Ethernet device data. 1832 */ 1833 from = (const struct ether_addr *)(encp->enc_mac_addr); 1834 ether_addr_copy(from, &dev->data->mac_addrs[0]); 1835 1836 sfc_adapter_unlock(sa); 1837 1838 sfc_log_init(sa, "done"); 1839 return 0; 1840 1841 fail_attach: 1842 sfc_eth_dev_clear_ops(dev); 1843 1844 fail_set_ops: 1845 sfc_unprobe(sa); 1846 1847 fail_probe: 1848 sfc_adapter_unlock(sa); 1849 sfc_adapter_lock_fini(sa); 1850 rte_free(dev->data->mac_addrs); 1851 dev->data->mac_addrs = NULL; 1852 1853 fail_mac_addrs: 1854 fail_kvarg_debug_init: 1855 sfc_kvargs_cleanup(sa); 1856 1857 fail_kvargs_parse: 1858 sfc_log_init(sa, "failed %d", rc); 1859 SFC_ASSERT(rc > 0); 1860 return -rc; 1861 } 1862 1863 static int 1864 sfc_eth_dev_uninit(struct rte_eth_dev *dev) 1865 { 1866 struct sfc_adapter *sa; 1867 1868 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1869 sfc_eth_dev_secondary_clear_ops(dev); 1870 return 0; 1871 } 1872 1873 sa = dev->data->dev_private; 1874 sfc_log_init(sa, "entry"); 1875 1876 sfc_adapter_lock(sa); 1877 1878 sfc_eth_dev_clear_ops(dev); 1879 1880 sfc_detach(sa); 1881 sfc_unprobe(sa); 1882 1883 rte_free(dev->data->mac_addrs); 1884 dev->data->mac_addrs = NULL; 1885 1886 sfc_kvargs_cleanup(sa); 1887 1888 sfc_adapter_unlock(sa); 1889 sfc_adapter_lock_fini(sa); 1890 1891 sfc_log_init(sa, "done"); 1892 1893 /* Required for logging, so cleanup last */ 1894 sa->eth_dev = NULL; 1895 return 0; 1896 } 1897 1898 static const struct rte_pci_id pci_id_sfc_efx_map[] = { 1899 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, 1900 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, 1901 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, 1902 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, 1903 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, 1904 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, 1905 { .vendor_id = 0 /* sentinel */ } 1906 }; 1907 1908 static int sfc_eth_dev_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 1909 struct rte_pci_device *pci_dev) 1910 { 1911 return rte_eth_dev_pci_generic_probe(pci_dev, 1912 sizeof(struct sfc_adapter), sfc_eth_dev_init); 1913 } 1914 1915 static int sfc_eth_dev_pci_remove(struct rte_pci_device *pci_dev) 1916 { 1917 return rte_eth_dev_pci_generic_remove(pci_dev, sfc_eth_dev_uninit); 1918 } 1919 1920 static struct rte_pci_driver sfc_efx_pmd = { 1921 .id_table = pci_id_sfc_efx_map, 1922 .drv_flags = 1923 RTE_PCI_DRV_INTR_LSC | 1924 RTE_PCI_DRV_NEED_MAPPING, 1925 .probe = sfc_eth_dev_pci_probe, 1926 .remove = sfc_eth_dev_pci_remove, 1927 }; 1928 1929 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd); 1930 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); 1931 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio-pci"); 1932 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, 1933 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " " 1934 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " " 1935 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " 1936 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> " 1937 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " " 1938 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL); 1939