1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) 2016-2017 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * This software was jointly developed between OKTET Labs (under contract 8 * for Solarflare) and Solarflare Communications, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <rte_dev.h> 33 #include <rte_ethdev.h> 34 #include <rte_ethdev_pci.h> 35 #include <rte_pci.h> 36 #include <rte_errno.h> 37 38 #include "efx.h" 39 40 #include "sfc.h" 41 #include "sfc_debug.h" 42 #include "sfc_log.h" 43 #include "sfc_kvargs.h" 44 #include "sfc_ev.h" 45 #include "sfc_rx.h" 46 #include "sfc_tx.h" 47 #include "sfc_flow.h" 48 #include "sfc_dp.h" 49 #include "sfc_dp_rx.h" 50 51 static struct sfc_dp_list sfc_dp_head = 52 TAILQ_HEAD_INITIALIZER(sfc_dp_head); 53 54 static int 55 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) 56 { 57 struct sfc_adapter *sa = dev->data->dev_private; 58 efx_nic_fw_info_t enfi; 59 int ret; 60 int rc; 61 62 /* 63 * Return value of the callback is likely supposed to be 64 * equal to or greater than 0, nevertheless, if an error 65 * occurs, it will be desirable to pass it to the caller 66 */ 67 if ((fw_version == NULL) || (fw_size == 0)) 68 return -EINVAL; 69 70 rc = efx_nic_get_fw_version(sa->nic, &enfi); 71 if (rc != 0) 72 return -rc; 73 74 ret = snprintf(fw_version, fw_size, 75 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16, 76 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1], 77 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]); 78 if (ret < 0) 79 return ret; 80 81 if (enfi.enfi_dpcpu_fw_ids_valid) { 82 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret); 83 int ret_extra; 84 85 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset, 86 fw_size - dpcpu_fw_ids_offset, 87 " rx%" PRIx16 " tx%" PRIx16, 88 enfi.enfi_rx_dpcpu_fw_id, 89 enfi.enfi_tx_dpcpu_fw_id); 90 if (ret_extra < 0) 91 return ret_extra; 92 93 ret += ret_extra; 94 } 95 96 if (fw_size < (size_t)(++ret)) 97 return ret; 98 else 99 return 0; 100 } 101 102 static void 103 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 104 { 105 struct sfc_adapter *sa = dev->data->dev_private; 106 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 107 108 sfc_log_init(sa, "entry"); 109 110 dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device); 111 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; 112 113 /* Autonegotiation may be disabled */ 114 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 115 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX) 116 dev_info->speed_capa |= ETH_LINK_SPEED_1G; 117 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX) 118 dev_info->speed_capa |= ETH_LINK_SPEED_10G; 119 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX) 120 dev_info->speed_capa |= ETH_LINK_SPEED_40G; 121 122 dev_info->max_rx_queues = sa->rxq_max; 123 dev_info->max_tx_queues = sa->txq_max; 124 125 /* By default packets are dropped if no descriptors are available */ 126 dev_info->default_rxconf.rx_drop_en = 1; 127 128 dev_info->rx_offload_capa = 129 DEV_RX_OFFLOAD_IPV4_CKSUM | 130 DEV_RX_OFFLOAD_UDP_CKSUM | 131 DEV_RX_OFFLOAD_TCP_CKSUM; 132 133 dev_info->tx_offload_capa = 134 DEV_TX_OFFLOAD_IPV4_CKSUM | 135 DEV_TX_OFFLOAD_UDP_CKSUM | 136 DEV_TX_OFFLOAD_TCP_CKSUM; 137 138 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP; 139 if ((~sa->dp_tx->features & SFC_DP_TX_FEAT_VLAN_INSERT) || 140 !encp->enc_hw_tx_insert_vlan_enabled) 141 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL; 142 else 143 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT; 144 145 if (~sa->dp_tx->features & SFC_DP_TX_FEAT_MULTI_SEG) 146 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOMULTSEGS; 147 148 #if EFSYS_OPT_RX_SCALE 149 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) { 150 dev_info->reta_size = EFX_RSS_TBL_SIZE; 151 dev_info->hash_key_size = SFC_RSS_KEY_SIZE; 152 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS; 153 } 154 #endif 155 156 if (sa->tso) 157 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO; 158 159 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS; 160 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS; 161 /* The RXQ hardware requires that the descriptor count is a power 162 * of 2, but rx_desc_lim cannot properly describe that constraint. 163 */ 164 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS; 165 166 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; 167 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS; 168 /* 169 * The TXQ hardware requires that the descriptor count is a power 170 * of 2, but tx_desc_lim cannot properly describe that constraint 171 */ 172 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS; 173 } 174 175 static const uint32_t * 176 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) 177 { 178 struct sfc_adapter *sa = dev->data->dev_private; 179 180 return sa->dp_rx->supported_ptypes_get(); 181 } 182 183 static int 184 sfc_dev_configure(struct rte_eth_dev *dev) 185 { 186 struct rte_eth_dev_data *dev_data = dev->data; 187 struct sfc_adapter *sa = dev_data->dev_private; 188 int rc; 189 190 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u", 191 dev_data->nb_rx_queues, dev_data->nb_tx_queues); 192 193 sfc_adapter_lock(sa); 194 switch (sa->state) { 195 case SFC_ADAPTER_CONFIGURED: 196 /* FALLTHROUGH */ 197 case SFC_ADAPTER_INITIALIZED: 198 rc = sfc_configure(sa); 199 break; 200 default: 201 sfc_err(sa, "unexpected adapter state %u to configure", 202 sa->state); 203 rc = EINVAL; 204 break; 205 } 206 sfc_adapter_unlock(sa); 207 208 sfc_log_init(sa, "done %d", rc); 209 SFC_ASSERT(rc >= 0); 210 return -rc; 211 } 212 213 static int 214 sfc_dev_start(struct rte_eth_dev *dev) 215 { 216 struct sfc_adapter *sa = dev->data->dev_private; 217 int rc; 218 219 sfc_log_init(sa, "entry"); 220 221 sfc_adapter_lock(sa); 222 rc = sfc_start(sa); 223 sfc_adapter_unlock(sa); 224 225 sfc_log_init(sa, "done %d", rc); 226 SFC_ASSERT(rc >= 0); 227 return -rc; 228 } 229 230 static int 231 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 232 { 233 struct sfc_adapter *sa = dev->data->dev_private; 234 struct rte_eth_link *dev_link = &dev->data->dev_link; 235 struct rte_eth_link old_link; 236 struct rte_eth_link current_link; 237 238 sfc_log_init(sa, "entry"); 239 240 retry: 241 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t)); 242 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link); 243 244 if (sa->state != SFC_ADAPTER_STARTED) { 245 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link); 246 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 247 *(uint64_t *)&old_link, 248 *(uint64_t *)¤t_link)) 249 goto retry; 250 } else if (wait_to_complete) { 251 efx_link_mode_t link_mode; 252 253 if (efx_port_poll(sa->nic, &link_mode) != 0) 254 link_mode = EFX_LINK_UNKNOWN; 255 sfc_port_link_mode_to_info(link_mode, ¤t_link); 256 257 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 258 *(uint64_t *)&old_link, 259 *(uint64_t *)¤t_link)) 260 goto retry; 261 } else { 262 sfc_ev_mgmt_qpoll(sa); 263 *(int64_t *)¤t_link = 264 rte_atomic64_read((rte_atomic64_t *)dev_link); 265 } 266 267 if (old_link.link_status != current_link.link_status) 268 sfc_info(sa, "Link status is %s", 269 current_link.link_status ? "UP" : "DOWN"); 270 271 return old_link.link_status == current_link.link_status ? 0 : -1; 272 } 273 274 static void 275 sfc_dev_stop(struct rte_eth_dev *dev) 276 { 277 struct sfc_adapter *sa = dev->data->dev_private; 278 279 sfc_log_init(sa, "entry"); 280 281 sfc_adapter_lock(sa); 282 sfc_stop(sa); 283 sfc_adapter_unlock(sa); 284 285 sfc_log_init(sa, "done"); 286 } 287 288 static int 289 sfc_dev_set_link_up(struct rte_eth_dev *dev) 290 { 291 struct sfc_adapter *sa = dev->data->dev_private; 292 int rc; 293 294 sfc_log_init(sa, "entry"); 295 296 sfc_adapter_lock(sa); 297 rc = sfc_start(sa); 298 sfc_adapter_unlock(sa); 299 300 SFC_ASSERT(rc >= 0); 301 return -rc; 302 } 303 304 static int 305 sfc_dev_set_link_down(struct rte_eth_dev *dev) 306 { 307 struct sfc_adapter *sa = dev->data->dev_private; 308 309 sfc_log_init(sa, "entry"); 310 311 sfc_adapter_lock(sa); 312 sfc_stop(sa); 313 sfc_adapter_unlock(sa); 314 315 return 0; 316 } 317 318 static void 319 sfc_dev_close(struct rte_eth_dev *dev) 320 { 321 struct sfc_adapter *sa = dev->data->dev_private; 322 323 sfc_log_init(sa, "entry"); 324 325 sfc_adapter_lock(sa); 326 switch (sa->state) { 327 case SFC_ADAPTER_STARTED: 328 sfc_stop(sa); 329 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED); 330 /* FALLTHROUGH */ 331 case SFC_ADAPTER_CONFIGURED: 332 sfc_close(sa); 333 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED); 334 /* FALLTHROUGH */ 335 case SFC_ADAPTER_INITIALIZED: 336 break; 337 default: 338 sfc_err(sa, "unexpected adapter state %u on close", sa->state); 339 break; 340 } 341 sfc_adapter_unlock(sa); 342 343 sfc_log_init(sa, "done"); 344 } 345 346 static void 347 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode, 348 boolean_t enabled) 349 { 350 struct sfc_port *port; 351 boolean_t *toggle; 352 struct sfc_adapter *sa = dev->data->dev_private; 353 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI); 354 const char *desc = (allmulti) ? "all-multi" : "promiscuous"; 355 356 sfc_adapter_lock(sa); 357 358 port = &sa->port; 359 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc); 360 361 if (*toggle != enabled) { 362 *toggle = enabled; 363 364 if ((sa->state == SFC_ADAPTER_STARTED) && 365 (sfc_set_rx_mode(sa) != 0)) { 366 *toggle = !(enabled); 367 sfc_warn(sa, "Failed to %s %s mode", 368 ((enabled) ? "enable" : "disable"), desc); 369 } 370 } 371 372 sfc_adapter_unlock(sa); 373 } 374 375 static void 376 sfc_dev_promisc_enable(struct rte_eth_dev *dev) 377 { 378 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE); 379 } 380 381 static void 382 sfc_dev_promisc_disable(struct rte_eth_dev *dev) 383 { 384 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE); 385 } 386 387 static void 388 sfc_dev_allmulti_enable(struct rte_eth_dev *dev) 389 { 390 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE); 391 } 392 393 static void 394 sfc_dev_allmulti_disable(struct rte_eth_dev *dev) 395 { 396 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE); 397 } 398 399 static int 400 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, 401 uint16_t nb_rx_desc, unsigned int socket_id, 402 const struct rte_eth_rxconf *rx_conf, 403 struct rte_mempool *mb_pool) 404 { 405 struct sfc_adapter *sa = dev->data->dev_private; 406 int rc; 407 408 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u", 409 rx_queue_id, nb_rx_desc, socket_id); 410 411 sfc_adapter_lock(sa); 412 413 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id, 414 rx_conf, mb_pool); 415 if (rc != 0) 416 goto fail_rx_qinit; 417 418 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq->dp; 419 420 sfc_adapter_unlock(sa); 421 422 return 0; 423 424 fail_rx_qinit: 425 sfc_adapter_unlock(sa); 426 SFC_ASSERT(rc > 0); 427 return -rc; 428 } 429 430 static void 431 sfc_rx_queue_release(void *queue) 432 { 433 struct sfc_dp_rxq *dp_rxq = queue; 434 struct sfc_rxq *rxq; 435 struct sfc_adapter *sa; 436 unsigned int sw_index; 437 438 if (dp_rxq == NULL) 439 return; 440 441 rxq = sfc_rxq_by_dp_rxq(dp_rxq); 442 sa = rxq->evq->sa; 443 sfc_adapter_lock(sa); 444 445 sw_index = sfc_rxq_sw_index(rxq); 446 447 sfc_log_init(sa, "RxQ=%u", sw_index); 448 449 sa->eth_dev->data->rx_queues[sw_index] = NULL; 450 451 sfc_rx_qfini(sa, sw_index); 452 453 sfc_adapter_unlock(sa); 454 } 455 456 static int 457 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, 458 uint16_t nb_tx_desc, unsigned int socket_id, 459 const struct rte_eth_txconf *tx_conf) 460 { 461 struct sfc_adapter *sa = dev->data->dev_private; 462 int rc; 463 464 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u", 465 tx_queue_id, nb_tx_desc, socket_id); 466 467 sfc_adapter_lock(sa); 468 469 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf); 470 if (rc != 0) 471 goto fail_tx_qinit; 472 473 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq->dp; 474 475 sfc_adapter_unlock(sa); 476 return 0; 477 478 fail_tx_qinit: 479 sfc_adapter_unlock(sa); 480 SFC_ASSERT(rc > 0); 481 return -rc; 482 } 483 484 static void 485 sfc_tx_queue_release(void *queue) 486 { 487 struct sfc_dp_txq *dp_txq = queue; 488 struct sfc_txq *txq; 489 unsigned int sw_index; 490 struct sfc_adapter *sa; 491 492 if (dp_txq == NULL) 493 return; 494 495 txq = sfc_txq_by_dp_txq(dp_txq); 496 sw_index = sfc_txq_sw_index(txq); 497 498 SFC_ASSERT(txq->evq != NULL); 499 sa = txq->evq->sa; 500 501 sfc_log_init(sa, "TxQ = %u", sw_index); 502 503 sfc_adapter_lock(sa); 504 505 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues); 506 sa->eth_dev->data->tx_queues[sw_index] = NULL; 507 508 sfc_tx_qfini(sa, sw_index); 509 510 sfc_adapter_unlock(sa); 511 } 512 513 static void 514 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 515 { 516 struct sfc_adapter *sa = dev->data->dev_private; 517 struct sfc_port *port = &sa->port; 518 uint64_t *mac_stats; 519 520 rte_spinlock_lock(&port->mac_stats_lock); 521 522 if (sfc_port_update_mac_stats(sa) != 0) 523 goto unlock; 524 525 mac_stats = port->mac_stats_buf; 526 527 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, 528 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) { 529 stats->ipackets = 530 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] + 531 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] + 532 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]; 533 stats->opackets = 534 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] + 535 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] + 536 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]; 537 stats->ibytes = 538 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] + 539 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] + 540 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]; 541 stats->obytes = 542 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] + 543 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] + 544 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; 545 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW]; 546 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; 547 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; 548 } else { 549 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS]; 550 stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; 551 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS]; 552 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS]; 553 /* 554 * Take into account stats which are whenever supported 555 * on EF10. If some stat is not supported by current 556 * firmware variant or HW revision, it is guaranteed 557 * to be zero in mac_stats. 558 */ 559 stats->imissed = 560 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] + 561 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] + 562 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] + 563 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] + 564 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] + 565 mac_stats[EFX_MAC_PM_TRUNC_QBB] + 566 mac_stats[EFX_MAC_PM_DISCARD_QBB] + 567 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] + 568 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] + 569 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS]; 570 stats->ierrors = 571 mac_stats[EFX_MAC_RX_FCS_ERRORS] + 572 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] + 573 mac_stats[EFX_MAC_RX_JABBER_PKTS]; 574 /* no oerrors counters supported on EF10 */ 575 } 576 577 unlock: 578 rte_spinlock_unlock(&port->mac_stats_lock); 579 } 580 581 static void 582 sfc_stats_reset(struct rte_eth_dev *dev) 583 { 584 struct sfc_adapter *sa = dev->data->dev_private; 585 struct sfc_port *port = &sa->port; 586 int rc; 587 588 if (sa->state != SFC_ADAPTER_STARTED) { 589 /* 590 * The operation cannot be done if port is not started; it 591 * will be scheduled to be done during the next port start 592 */ 593 port->mac_stats_reset_pending = B_TRUE; 594 return; 595 } 596 597 rc = sfc_port_reset_mac_stats(sa); 598 if (rc != 0) 599 sfc_err(sa, "failed to reset statistics (rc = %d)", rc); 600 } 601 602 static int 603 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 604 unsigned int xstats_count) 605 { 606 struct sfc_adapter *sa = dev->data->dev_private; 607 struct sfc_port *port = &sa->port; 608 uint64_t *mac_stats; 609 int rc; 610 unsigned int i; 611 int nstats = 0; 612 613 rte_spinlock_lock(&port->mac_stats_lock); 614 615 rc = sfc_port_update_mac_stats(sa); 616 if (rc != 0) { 617 SFC_ASSERT(rc > 0); 618 nstats = -rc; 619 goto unlock; 620 } 621 622 mac_stats = port->mac_stats_buf; 623 624 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 625 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 626 if (xstats != NULL && nstats < (int)xstats_count) { 627 xstats[nstats].id = nstats; 628 xstats[nstats].value = mac_stats[i]; 629 } 630 nstats++; 631 } 632 } 633 634 unlock: 635 rte_spinlock_unlock(&port->mac_stats_lock); 636 637 return nstats; 638 } 639 640 static int 641 sfc_xstats_get_names(struct rte_eth_dev *dev, 642 struct rte_eth_xstat_name *xstats_names, 643 unsigned int xstats_count) 644 { 645 struct sfc_adapter *sa = dev->data->dev_private; 646 struct sfc_port *port = &sa->port; 647 unsigned int i; 648 unsigned int nstats = 0; 649 650 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 651 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 652 if (xstats_names != NULL && nstats < xstats_count) 653 strncpy(xstats_names[nstats].name, 654 efx_mac_stat_name(sa->nic, i), 655 sizeof(xstats_names[0].name)); 656 nstats++; 657 } 658 } 659 660 return nstats; 661 } 662 663 static int 664 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 665 { 666 struct sfc_adapter *sa = dev->data->dev_private; 667 unsigned int wanted_fc, link_fc; 668 669 memset(fc_conf, 0, sizeof(*fc_conf)); 670 671 sfc_adapter_lock(sa); 672 673 if (sa->state == SFC_ADAPTER_STARTED) 674 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc); 675 else 676 link_fc = sa->port.flow_ctrl; 677 678 switch (link_fc) { 679 case 0: 680 fc_conf->mode = RTE_FC_NONE; 681 break; 682 case EFX_FCNTL_RESPOND: 683 fc_conf->mode = RTE_FC_RX_PAUSE; 684 break; 685 case EFX_FCNTL_GENERATE: 686 fc_conf->mode = RTE_FC_TX_PAUSE; 687 break; 688 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE): 689 fc_conf->mode = RTE_FC_FULL; 690 break; 691 default: 692 sfc_err(sa, "%s: unexpected flow control value %#x", 693 __func__, link_fc); 694 } 695 696 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; 697 698 sfc_adapter_unlock(sa); 699 700 return 0; 701 } 702 703 static int 704 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 705 { 706 struct sfc_adapter *sa = dev->data->dev_private; 707 struct sfc_port *port = &sa->port; 708 unsigned int fcntl; 709 int rc; 710 711 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || 712 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || 713 fc_conf->mac_ctrl_frame_fwd != 0) { 714 sfc_err(sa, "unsupported flow control settings specified"); 715 rc = EINVAL; 716 goto fail_inval; 717 } 718 719 switch (fc_conf->mode) { 720 case RTE_FC_NONE: 721 fcntl = 0; 722 break; 723 case RTE_FC_RX_PAUSE: 724 fcntl = EFX_FCNTL_RESPOND; 725 break; 726 case RTE_FC_TX_PAUSE: 727 fcntl = EFX_FCNTL_GENERATE; 728 break; 729 case RTE_FC_FULL: 730 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 731 break; 732 default: 733 rc = EINVAL; 734 goto fail_inval; 735 } 736 737 sfc_adapter_lock(sa); 738 739 if (sa->state == SFC_ADAPTER_STARTED) { 740 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg); 741 if (rc != 0) 742 goto fail_mac_fcntl_set; 743 } 744 745 port->flow_ctrl = fcntl; 746 port->flow_ctrl_autoneg = fc_conf->autoneg; 747 748 sfc_adapter_unlock(sa); 749 750 return 0; 751 752 fail_mac_fcntl_set: 753 sfc_adapter_unlock(sa); 754 fail_inval: 755 SFC_ASSERT(rc > 0); 756 return -rc; 757 } 758 759 static int 760 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 761 { 762 struct sfc_adapter *sa = dev->data->dev_private; 763 size_t pdu = EFX_MAC_PDU(mtu); 764 size_t old_pdu; 765 int rc; 766 767 sfc_log_init(sa, "mtu=%u", mtu); 768 769 rc = EINVAL; 770 if (pdu < EFX_MAC_PDU_MIN) { 771 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)", 772 (unsigned int)mtu, (unsigned int)pdu, 773 EFX_MAC_PDU_MIN); 774 goto fail_inval; 775 } 776 if (pdu > EFX_MAC_PDU_MAX) { 777 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)", 778 (unsigned int)mtu, (unsigned int)pdu, 779 EFX_MAC_PDU_MAX); 780 goto fail_inval; 781 } 782 783 sfc_adapter_lock(sa); 784 785 if (pdu != sa->port.pdu) { 786 if (sa->state == SFC_ADAPTER_STARTED) { 787 sfc_stop(sa); 788 789 old_pdu = sa->port.pdu; 790 sa->port.pdu = pdu; 791 rc = sfc_start(sa); 792 if (rc != 0) 793 goto fail_start; 794 } else { 795 sa->port.pdu = pdu; 796 } 797 } 798 799 /* 800 * The driver does not use it, but other PMDs update jumbo_frame 801 * flag and max_rx_pkt_len when MTU is set. 802 */ 803 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN); 804 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu; 805 806 sfc_adapter_unlock(sa); 807 808 sfc_log_init(sa, "done"); 809 return 0; 810 811 fail_start: 812 sa->port.pdu = old_pdu; 813 if (sfc_start(sa) != 0) 814 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) " 815 "PDU max size - port is stopped", 816 (unsigned int)pdu, (unsigned int)old_pdu); 817 sfc_adapter_unlock(sa); 818 819 fail_inval: 820 sfc_log_init(sa, "failed %d", rc); 821 SFC_ASSERT(rc > 0); 822 return -rc; 823 } 824 static void 825 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr) 826 { 827 struct sfc_adapter *sa = dev->data->dev_private; 828 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 829 int rc; 830 831 sfc_adapter_lock(sa); 832 833 if (sa->state != SFC_ADAPTER_STARTED) { 834 sfc_info(sa, "the port is not started"); 835 sfc_info(sa, "the new MAC address will be set on port start"); 836 837 goto unlock; 838 } 839 840 if (encp->enc_allow_set_mac_with_installed_filters) { 841 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes); 842 if (rc != 0) { 843 sfc_err(sa, "cannot set MAC address (rc = %u)", rc); 844 goto unlock; 845 } 846 847 /* 848 * Changing the MAC address by means of MCDI request 849 * has no effect on received traffic, therefore 850 * we also need to update unicast filters 851 */ 852 rc = sfc_set_rx_mode(sa); 853 if (rc != 0) 854 sfc_err(sa, "cannot set filter (rc = %u)", rc); 855 } else { 856 sfc_warn(sa, "cannot set MAC address with filters installed"); 857 sfc_warn(sa, "adapter will be restarted to pick the new MAC"); 858 sfc_warn(sa, "(some traffic may be dropped)"); 859 860 /* 861 * Since setting MAC address with filters installed is not 862 * allowed on the adapter, one needs to simply restart adapter 863 * so that the new MAC address will be taken from an outer 864 * storage and set flawlessly by means of sfc_start() call 865 */ 866 sfc_stop(sa); 867 rc = sfc_start(sa); 868 if (rc != 0) 869 sfc_err(sa, "cannot restart adapter (rc = %u)", rc); 870 } 871 872 unlock: 873 sfc_adapter_unlock(sa); 874 } 875 876 877 static int 878 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set, 879 uint32_t nb_mc_addr) 880 { 881 struct sfc_adapter *sa = dev->data->dev_private; 882 struct sfc_port *port = &sa->port; 883 uint8_t *mc_addrs = port->mcast_addrs; 884 int rc; 885 unsigned int i; 886 887 if (mc_addrs == NULL) 888 return -ENOBUFS; 889 890 if (nb_mc_addr > port->max_mcast_addrs) { 891 sfc_err(sa, "too many multicast addresses: %u > %u", 892 nb_mc_addr, port->max_mcast_addrs); 893 return -EINVAL; 894 } 895 896 for (i = 0; i < nb_mc_addr; ++i) { 897 (void)rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, 898 EFX_MAC_ADDR_LEN); 899 mc_addrs += EFX_MAC_ADDR_LEN; 900 } 901 902 port->nb_mcast_addrs = nb_mc_addr; 903 904 if (sa->state != SFC_ADAPTER_STARTED) 905 return 0; 906 907 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, 908 port->nb_mcast_addrs); 909 if (rc != 0) 910 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); 911 912 SFC_ASSERT(rc > 0); 913 return -rc; 914 } 915 916 static void 917 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id, 918 struct rte_eth_rxq_info *qinfo) 919 { 920 struct sfc_adapter *sa = dev->data->dev_private; 921 struct sfc_rxq_info *rxq_info; 922 struct sfc_rxq *rxq; 923 924 sfc_adapter_lock(sa); 925 926 SFC_ASSERT(rx_queue_id < sa->rxq_count); 927 928 rxq_info = &sa->rxq_info[rx_queue_id]; 929 rxq = rxq_info->rxq; 930 SFC_ASSERT(rxq != NULL); 931 932 qinfo->mp = rxq->refill_mb_pool; 933 qinfo->conf.rx_free_thresh = rxq->refill_threshold; 934 qinfo->conf.rx_drop_en = 1; 935 qinfo->conf.rx_deferred_start = rxq_info->deferred_start; 936 qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER); 937 qinfo->nb_desc = rxq_info->entries; 938 939 sfc_adapter_unlock(sa); 940 } 941 942 static void 943 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id, 944 struct rte_eth_txq_info *qinfo) 945 { 946 struct sfc_adapter *sa = dev->data->dev_private; 947 struct sfc_txq_info *txq_info; 948 949 sfc_adapter_lock(sa); 950 951 SFC_ASSERT(tx_queue_id < sa->txq_count); 952 953 txq_info = &sa->txq_info[tx_queue_id]; 954 SFC_ASSERT(txq_info->txq != NULL); 955 956 memset(qinfo, 0, sizeof(*qinfo)); 957 958 qinfo->conf.txq_flags = txq_info->txq->flags; 959 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh; 960 qinfo->conf.tx_deferred_start = txq_info->deferred_start; 961 qinfo->nb_desc = txq_info->entries; 962 963 sfc_adapter_unlock(sa); 964 } 965 966 static uint32_t 967 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) 968 { 969 struct sfc_adapter *sa = dev->data->dev_private; 970 971 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 972 973 return sfc_rx_qdesc_npending(sa, rx_queue_id); 974 } 975 976 static int 977 sfc_rx_descriptor_done(void *queue, uint16_t offset) 978 { 979 struct sfc_dp_rxq *dp_rxq = queue; 980 981 return sfc_rx_qdesc_done(dp_rxq, offset); 982 } 983 984 static int 985 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) 986 { 987 struct sfc_adapter *sa = dev->data->dev_private; 988 int rc; 989 990 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 991 992 sfc_adapter_lock(sa); 993 994 rc = EINVAL; 995 if (sa->state != SFC_ADAPTER_STARTED) 996 goto fail_not_started; 997 998 rc = sfc_rx_qstart(sa, rx_queue_id); 999 if (rc != 0) 1000 goto fail_rx_qstart; 1001 1002 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE; 1003 1004 sfc_adapter_unlock(sa); 1005 1006 return 0; 1007 1008 fail_rx_qstart: 1009 fail_not_started: 1010 sfc_adapter_unlock(sa); 1011 SFC_ASSERT(rc > 0); 1012 return -rc; 1013 } 1014 1015 static int 1016 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) 1017 { 1018 struct sfc_adapter *sa = dev->data->dev_private; 1019 1020 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 1021 1022 sfc_adapter_lock(sa); 1023 sfc_rx_qstop(sa, rx_queue_id); 1024 1025 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE; 1026 1027 sfc_adapter_unlock(sa); 1028 1029 return 0; 1030 } 1031 1032 static int 1033 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1034 { 1035 struct sfc_adapter *sa = dev->data->dev_private; 1036 int rc; 1037 1038 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1039 1040 sfc_adapter_lock(sa); 1041 1042 rc = EINVAL; 1043 if (sa->state != SFC_ADAPTER_STARTED) 1044 goto fail_not_started; 1045 1046 rc = sfc_tx_qstart(sa, tx_queue_id); 1047 if (rc != 0) 1048 goto fail_tx_qstart; 1049 1050 sa->txq_info[tx_queue_id].deferred_started = B_TRUE; 1051 1052 sfc_adapter_unlock(sa); 1053 return 0; 1054 1055 fail_tx_qstart: 1056 1057 fail_not_started: 1058 sfc_adapter_unlock(sa); 1059 SFC_ASSERT(rc > 0); 1060 return -rc; 1061 } 1062 1063 static int 1064 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1065 { 1066 struct sfc_adapter *sa = dev->data->dev_private; 1067 1068 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1069 1070 sfc_adapter_lock(sa); 1071 1072 sfc_tx_qstop(sa, tx_queue_id); 1073 1074 sa->txq_info[tx_queue_id].deferred_started = B_FALSE; 1075 1076 sfc_adapter_unlock(sa); 1077 return 0; 1078 } 1079 1080 #if EFSYS_OPT_RX_SCALE 1081 static int 1082 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1083 struct rte_eth_rss_conf *rss_conf) 1084 { 1085 struct sfc_adapter *sa = dev->data->dev_private; 1086 1087 if (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) 1088 return -ENOTSUP; 1089 1090 if (sa->rss_channels == 0) 1091 return -EINVAL; 1092 1093 sfc_adapter_lock(sa); 1094 1095 /* 1096 * Mapping of hash configuration between RTE and EFX is not one-to-one, 1097 * hence, conversion is done here to derive a correct set of ETH_RSS 1098 * flags which corresponds to the active EFX configuration stored 1099 * locally in 'sfc_adapter' and kept up-to-date 1100 */ 1101 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types); 1102 rss_conf->rss_key_len = SFC_RSS_KEY_SIZE; 1103 if (rss_conf->rss_key != NULL) 1104 rte_memcpy(rss_conf->rss_key, sa->rss_key, SFC_RSS_KEY_SIZE); 1105 1106 sfc_adapter_unlock(sa); 1107 1108 return 0; 1109 } 1110 1111 static int 1112 sfc_dev_rss_hash_update(struct rte_eth_dev *dev, 1113 struct rte_eth_rss_conf *rss_conf) 1114 { 1115 struct sfc_adapter *sa = dev->data->dev_private; 1116 unsigned int efx_hash_types; 1117 int rc = 0; 1118 1119 if (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) { 1120 sfc_err(sa, "RSS is not available"); 1121 return -ENOTSUP; 1122 } 1123 1124 if (sa->rss_channels == 0) { 1125 sfc_err(sa, "RSS is not configured"); 1126 return -EINVAL; 1127 } 1128 1129 if ((rss_conf->rss_key != NULL) && 1130 (rss_conf->rss_key_len != sizeof(sa->rss_key))) { 1131 sfc_err(sa, "RSS key size is wrong (should be %lu)", 1132 sizeof(sa->rss_key)); 1133 return -EINVAL; 1134 } 1135 1136 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) { 1137 sfc_err(sa, "unsupported hash functions requested"); 1138 return -EINVAL; 1139 } 1140 1141 sfc_adapter_lock(sa); 1142 1143 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf); 1144 1145 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, 1146 efx_hash_types, B_TRUE); 1147 if (rc != 0) 1148 goto fail_scale_mode_set; 1149 1150 if (rss_conf->rss_key != NULL) { 1151 if (sa->state == SFC_ADAPTER_STARTED) { 1152 rc = efx_rx_scale_key_set(sa->nic, rss_conf->rss_key, 1153 sizeof(sa->rss_key)); 1154 if (rc != 0) 1155 goto fail_scale_key_set; 1156 } 1157 1158 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key)); 1159 } 1160 1161 sa->rss_hash_types = efx_hash_types; 1162 1163 sfc_adapter_unlock(sa); 1164 1165 return 0; 1166 1167 fail_scale_key_set: 1168 if (efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, 1169 sa->rss_hash_types, B_TRUE) != 0) 1170 sfc_err(sa, "failed to restore RSS mode"); 1171 1172 fail_scale_mode_set: 1173 sfc_adapter_unlock(sa); 1174 return -rc; 1175 } 1176 1177 static int 1178 sfc_dev_rss_reta_query(struct rte_eth_dev *dev, 1179 struct rte_eth_rss_reta_entry64 *reta_conf, 1180 uint16_t reta_size) 1181 { 1182 struct sfc_adapter *sa = dev->data->dev_private; 1183 int entry; 1184 1185 if (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) 1186 return -ENOTSUP; 1187 1188 if (sa->rss_channels == 0) 1189 return -EINVAL; 1190 1191 if (reta_size != EFX_RSS_TBL_SIZE) 1192 return -EINVAL; 1193 1194 sfc_adapter_lock(sa); 1195 1196 for (entry = 0; entry < reta_size; entry++) { 1197 int grp = entry / RTE_RETA_GROUP_SIZE; 1198 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1199 1200 if ((reta_conf[grp].mask >> grp_idx) & 1) 1201 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry]; 1202 } 1203 1204 sfc_adapter_unlock(sa); 1205 1206 return 0; 1207 } 1208 1209 static int 1210 sfc_dev_rss_reta_update(struct rte_eth_dev *dev, 1211 struct rte_eth_rss_reta_entry64 *reta_conf, 1212 uint16_t reta_size) 1213 { 1214 struct sfc_adapter *sa = dev->data->dev_private; 1215 unsigned int *rss_tbl_new; 1216 uint16_t entry; 1217 int rc; 1218 1219 1220 if (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) { 1221 sfc_err(sa, "RSS is not available"); 1222 return -ENOTSUP; 1223 } 1224 1225 if (sa->rss_channels == 0) { 1226 sfc_err(sa, "RSS is not configured"); 1227 return -EINVAL; 1228 } 1229 1230 if (reta_size != EFX_RSS_TBL_SIZE) { 1231 sfc_err(sa, "RETA size is wrong (should be %u)", 1232 EFX_RSS_TBL_SIZE); 1233 return -EINVAL; 1234 } 1235 1236 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0); 1237 if (rss_tbl_new == NULL) 1238 return -ENOMEM; 1239 1240 sfc_adapter_lock(sa); 1241 1242 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl)); 1243 1244 for (entry = 0; entry < reta_size; entry++) { 1245 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1246 struct rte_eth_rss_reta_entry64 *grp; 1247 1248 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE]; 1249 1250 if (grp->mask & (1ull << grp_idx)) { 1251 if (grp->reta[grp_idx] >= sa->rss_channels) { 1252 rc = EINVAL; 1253 goto bad_reta_entry; 1254 } 1255 rss_tbl_new[entry] = grp->reta[grp_idx]; 1256 } 1257 } 1258 1259 rc = efx_rx_scale_tbl_set(sa->nic, rss_tbl_new, EFX_RSS_TBL_SIZE); 1260 if (rc == 0) 1261 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl)); 1262 1263 bad_reta_entry: 1264 sfc_adapter_unlock(sa); 1265 1266 rte_free(rss_tbl_new); 1267 1268 SFC_ASSERT(rc >= 0); 1269 return -rc; 1270 } 1271 #endif 1272 1273 static int 1274 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type, 1275 enum rte_filter_op filter_op, 1276 void *arg) 1277 { 1278 struct sfc_adapter *sa = dev->data->dev_private; 1279 int rc = ENOTSUP; 1280 1281 sfc_log_init(sa, "entry"); 1282 1283 switch (filter_type) { 1284 case RTE_ETH_FILTER_NONE: 1285 sfc_err(sa, "Global filters configuration not supported"); 1286 break; 1287 case RTE_ETH_FILTER_MACVLAN: 1288 sfc_err(sa, "MACVLAN filters not supported"); 1289 break; 1290 case RTE_ETH_FILTER_ETHERTYPE: 1291 sfc_err(sa, "EtherType filters not supported"); 1292 break; 1293 case RTE_ETH_FILTER_FLEXIBLE: 1294 sfc_err(sa, "Flexible filters not supported"); 1295 break; 1296 case RTE_ETH_FILTER_SYN: 1297 sfc_err(sa, "SYN filters not supported"); 1298 break; 1299 case RTE_ETH_FILTER_NTUPLE: 1300 sfc_err(sa, "NTUPLE filters not supported"); 1301 break; 1302 case RTE_ETH_FILTER_TUNNEL: 1303 sfc_err(sa, "Tunnel filters not supported"); 1304 break; 1305 case RTE_ETH_FILTER_FDIR: 1306 sfc_err(sa, "Flow Director filters not supported"); 1307 break; 1308 case RTE_ETH_FILTER_HASH: 1309 sfc_err(sa, "Hash filters not supported"); 1310 break; 1311 case RTE_ETH_FILTER_GENERIC: 1312 if (filter_op != RTE_ETH_FILTER_GET) { 1313 rc = EINVAL; 1314 } else { 1315 *(const void **)arg = &sfc_flow_ops; 1316 rc = 0; 1317 } 1318 break; 1319 default: 1320 sfc_err(sa, "Unknown filter type %u", filter_type); 1321 break; 1322 } 1323 1324 sfc_log_init(sa, "exit: %d", -rc); 1325 SFC_ASSERT(rc >= 0); 1326 return -rc; 1327 } 1328 1329 static const struct eth_dev_ops sfc_eth_dev_ops = { 1330 .dev_configure = sfc_dev_configure, 1331 .dev_start = sfc_dev_start, 1332 .dev_stop = sfc_dev_stop, 1333 .dev_set_link_up = sfc_dev_set_link_up, 1334 .dev_set_link_down = sfc_dev_set_link_down, 1335 .dev_close = sfc_dev_close, 1336 .promiscuous_enable = sfc_dev_promisc_enable, 1337 .promiscuous_disable = sfc_dev_promisc_disable, 1338 .allmulticast_enable = sfc_dev_allmulti_enable, 1339 .allmulticast_disable = sfc_dev_allmulti_disable, 1340 .link_update = sfc_dev_link_update, 1341 .stats_get = sfc_stats_get, 1342 .stats_reset = sfc_stats_reset, 1343 .xstats_get = sfc_xstats_get, 1344 .xstats_reset = sfc_stats_reset, 1345 .xstats_get_names = sfc_xstats_get_names, 1346 .dev_infos_get = sfc_dev_infos_get, 1347 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 1348 .mtu_set = sfc_dev_set_mtu, 1349 .rx_queue_start = sfc_rx_queue_start, 1350 .rx_queue_stop = sfc_rx_queue_stop, 1351 .tx_queue_start = sfc_tx_queue_start, 1352 .tx_queue_stop = sfc_tx_queue_stop, 1353 .rx_queue_setup = sfc_rx_queue_setup, 1354 .rx_queue_release = sfc_rx_queue_release, 1355 .rx_queue_count = sfc_rx_queue_count, 1356 .rx_descriptor_done = sfc_rx_descriptor_done, 1357 .tx_queue_setup = sfc_tx_queue_setup, 1358 .tx_queue_release = sfc_tx_queue_release, 1359 .flow_ctrl_get = sfc_flow_ctrl_get, 1360 .flow_ctrl_set = sfc_flow_ctrl_set, 1361 .mac_addr_set = sfc_mac_addr_set, 1362 #if EFSYS_OPT_RX_SCALE 1363 .reta_update = sfc_dev_rss_reta_update, 1364 .reta_query = sfc_dev_rss_reta_query, 1365 .rss_hash_update = sfc_dev_rss_hash_update, 1366 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 1367 #endif 1368 .filter_ctrl = sfc_dev_filter_ctrl, 1369 .set_mc_addr_list = sfc_set_mc_addr_list, 1370 .rxq_info_get = sfc_rx_queue_info_get, 1371 .txq_info_get = sfc_tx_queue_info_get, 1372 .fw_version_get = sfc_fw_version_get, 1373 }; 1374 1375 static int 1376 sfc_eth_dev_set_ops(struct rte_eth_dev *dev) 1377 { 1378 struct sfc_adapter *sa = dev->data->dev_private; 1379 unsigned int avail_caps = 0; 1380 const char *rx_name = NULL; 1381 const char *tx_name = NULL; 1382 int rc; 1383 1384 switch (sa->family) { 1385 case EFX_FAMILY_HUNTINGTON: 1386 case EFX_FAMILY_MEDFORD: 1387 avail_caps |= SFC_DP_HW_FW_CAP_EF10; 1388 break; 1389 default: 1390 break; 1391 } 1392 1393 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH, 1394 sfc_kvarg_string_handler, &rx_name); 1395 if (rc != 0) 1396 goto fail_kvarg_rx_datapath; 1397 1398 if (rx_name != NULL) { 1399 sa->dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name); 1400 if (sa->dp_rx == NULL) { 1401 sfc_err(sa, "Rx datapath %s not found", rx_name); 1402 rc = ENOENT; 1403 goto fail_dp_rx; 1404 } 1405 if (!sfc_dp_match_hw_fw_caps(&sa->dp_rx->dp, avail_caps)) { 1406 sfc_err(sa, 1407 "Insufficient Hw/FW capabilities to use Rx datapath %s", 1408 rx_name); 1409 rc = EINVAL; 1410 goto fail_dp_rx; 1411 } 1412 } else { 1413 sa->dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps); 1414 if (sa->dp_rx == NULL) { 1415 sfc_err(sa, "Rx datapath by caps %#x not found", 1416 avail_caps); 1417 rc = ENOENT; 1418 goto fail_dp_rx; 1419 } 1420 } 1421 1422 sfc_info(sa, "use %s Rx datapath", sa->dp_rx->dp.name); 1423 1424 dev->rx_pkt_burst = sa->dp_rx->pkt_burst; 1425 1426 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH, 1427 sfc_kvarg_string_handler, &tx_name); 1428 if (rc != 0) 1429 goto fail_kvarg_tx_datapath; 1430 1431 if (tx_name != NULL) { 1432 sa->dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name); 1433 if (sa->dp_tx == NULL) { 1434 sfc_err(sa, "Tx datapath %s not found", tx_name); 1435 rc = ENOENT; 1436 goto fail_dp_tx; 1437 } 1438 if (!sfc_dp_match_hw_fw_caps(&sa->dp_tx->dp, avail_caps)) { 1439 sfc_err(sa, 1440 "Insufficient Hw/FW capabilities to use Tx datapath %s", 1441 tx_name); 1442 rc = EINVAL; 1443 goto fail_dp_tx; 1444 } 1445 } else { 1446 sa->dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps); 1447 if (sa->dp_tx == NULL) { 1448 sfc_err(sa, "Tx datapath by caps %#x not found", 1449 avail_caps); 1450 rc = ENOENT; 1451 goto fail_dp_tx; 1452 } 1453 } 1454 1455 sfc_info(sa, "use %s Tx datapath", sa->dp_tx->dp.name); 1456 1457 dev->tx_pkt_burst = sa->dp_tx->pkt_burst; 1458 1459 dev->dev_ops = &sfc_eth_dev_ops; 1460 1461 return 0; 1462 1463 fail_dp_tx: 1464 fail_kvarg_tx_datapath: 1465 fail_dp_rx: 1466 fail_kvarg_rx_datapath: 1467 return rc; 1468 } 1469 1470 static void 1471 sfc_register_dp(void) 1472 { 1473 /* Register once */ 1474 if (TAILQ_EMPTY(&sfc_dp_head)) { 1475 /* Prefer EF10 datapath */ 1476 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp); 1477 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); 1478 1479 sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp); 1480 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp); 1481 sfc_dp_register(&sfc_dp_head, &sfc_ef10_simple_tx.dp); 1482 } 1483 } 1484 1485 static int 1486 sfc_eth_dev_init(struct rte_eth_dev *dev) 1487 { 1488 struct sfc_adapter *sa = dev->data->dev_private; 1489 struct rte_pci_device *pci_dev = SFC_DEV_TO_PCI(dev); 1490 int rc; 1491 const efx_nic_cfg_t *encp; 1492 const struct ether_addr *from; 1493 1494 sfc_register_dp(); 1495 1496 /* Required for logging */ 1497 sa->eth_dev = dev; 1498 1499 /* Copy PCI device info to the dev->data */ 1500 rte_eth_copy_pci_info(dev, pci_dev); 1501 1502 rc = sfc_kvargs_parse(sa); 1503 if (rc != 0) 1504 goto fail_kvargs_parse; 1505 1506 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT, 1507 sfc_kvarg_bool_handler, &sa->debug_init); 1508 if (rc != 0) 1509 goto fail_kvarg_debug_init; 1510 1511 sfc_log_init(sa, "entry"); 1512 1513 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0); 1514 if (dev->data->mac_addrs == NULL) { 1515 rc = ENOMEM; 1516 goto fail_mac_addrs; 1517 } 1518 1519 sfc_adapter_lock_init(sa); 1520 sfc_adapter_lock(sa); 1521 1522 sfc_log_init(sa, "probing"); 1523 rc = sfc_probe(sa); 1524 if (rc != 0) 1525 goto fail_probe; 1526 1527 sfc_log_init(sa, "set device ops"); 1528 rc = sfc_eth_dev_set_ops(dev); 1529 if (rc != 0) 1530 goto fail_set_ops; 1531 1532 sfc_log_init(sa, "attaching"); 1533 rc = sfc_attach(sa); 1534 if (rc != 0) 1535 goto fail_attach; 1536 1537 encp = efx_nic_cfg_get(sa->nic); 1538 1539 /* 1540 * The arguments are really reverse order in comparison to 1541 * Linux kernel. Copy from NIC config to Ethernet device data. 1542 */ 1543 from = (const struct ether_addr *)(encp->enc_mac_addr); 1544 ether_addr_copy(from, &dev->data->mac_addrs[0]); 1545 1546 sfc_adapter_unlock(sa); 1547 1548 sfc_log_init(sa, "done"); 1549 return 0; 1550 1551 fail_attach: 1552 fail_set_ops: 1553 sfc_unprobe(sa); 1554 1555 fail_probe: 1556 sfc_adapter_unlock(sa); 1557 sfc_adapter_lock_fini(sa); 1558 rte_free(dev->data->mac_addrs); 1559 dev->data->mac_addrs = NULL; 1560 1561 fail_mac_addrs: 1562 fail_kvarg_debug_init: 1563 sfc_kvargs_cleanup(sa); 1564 1565 fail_kvargs_parse: 1566 sfc_log_init(sa, "failed %d", rc); 1567 SFC_ASSERT(rc > 0); 1568 return -rc; 1569 } 1570 1571 static int 1572 sfc_eth_dev_uninit(struct rte_eth_dev *dev) 1573 { 1574 struct sfc_adapter *sa = dev->data->dev_private; 1575 1576 sfc_log_init(sa, "entry"); 1577 1578 sfc_adapter_lock(sa); 1579 1580 sfc_detach(sa); 1581 sfc_unprobe(sa); 1582 1583 rte_free(dev->data->mac_addrs); 1584 dev->data->mac_addrs = NULL; 1585 1586 dev->dev_ops = NULL; 1587 dev->rx_pkt_burst = NULL; 1588 dev->tx_pkt_burst = NULL; 1589 1590 sfc_kvargs_cleanup(sa); 1591 1592 sfc_adapter_unlock(sa); 1593 sfc_adapter_lock_fini(sa); 1594 1595 sfc_log_init(sa, "done"); 1596 1597 /* Required for logging, so cleanup last */ 1598 sa->eth_dev = NULL; 1599 return 0; 1600 } 1601 1602 static const struct rte_pci_id pci_id_sfc_efx_map[] = { 1603 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, 1604 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, 1605 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, 1606 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, 1607 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, 1608 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, 1609 { .vendor_id = 0 /* sentinel */ } 1610 }; 1611 1612 static int sfc_eth_dev_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 1613 struct rte_pci_device *pci_dev) 1614 { 1615 return rte_eth_dev_pci_generic_probe(pci_dev, 1616 sizeof(struct sfc_adapter), sfc_eth_dev_init); 1617 } 1618 1619 static int sfc_eth_dev_pci_remove(struct rte_pci_device *pci_dev) 1620 { 1621 return rte_eth_dev_pci_generic_remove(pci_dev, sfc_eth_dev_uninit); 1622 } 1623 1624 static struct rte_pci_driver sfc_efx_pmd = { 1625 .id_table = pci_id_sfc_efx_map, 1626 .drv_flags = 1627 RTE_PCI_DRV_INTR_LSC | 1628 RTE_PCI_DRV_NEED_MAPPING, 1629 .probe = sfc_eth_dev_pci_probe, 1630 .remove = sfc_eth_dev_pci_remove, 1631 }; 1632 1633 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd); 1634 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); 1635 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio"); 1636 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, 1637 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " " 1638 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " " 1639 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " 1640 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> " 1641 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " " 1642 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL); 1643