1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) 2016-2017 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * This software was jointly developed between OKTET Labs (under contract 8 * for Solarflare) and Solarflare Communications, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <rte_dev.h> 33 #include <rte_ethdev.h> 34 #include <rte_pci.h> 35 #include <rte_errno.h> 36 37 #include "efx.h" 38 39 #include "sfc.h" 40 #include "sfc_debug.h" 41 #include "sfc_log.h" 42 #include "sfc_kvargs.h" 43 #include "sfc_ev.h" 44 #include "sfc_rx.h" 45 #include "sfc_tx.h" 46 #include "sfc_flow.h" 47 #include "sfc_dp.h" 48 #include "sfc_dp_rx.h" 49 50 static struct sfc_dp_list sfc_dp_head = 51 TAILQ_HEAD_INITIALIZER(sfc_dp_head); 52 53 static int 54 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) 55 { 56 struct sfc_adapter *sa = dev->data->dev_private; 57 efx_nic_fw_info_t enfi; 58 int ret; 59 int rc; 60 61 /* 62 * Return value of the callback is likely supposed to be 63 * equal to or greater than 0, nevertheless, if an error 64 * occurs, it will be desirable to pass it to the caller 65 */ 66 if ((fw_version == NULL) || (fw_size == 0)) 67 return -EINVAL; 68 69 rc = efx_nic_get_fw_version(sa->nic, &enfi); 70 if (rc != 0) 71 return -rc; 72 73 ret = snprintf(fw_version, fw_size, 74 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16, 75 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1], 76 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]); 77 if (ret < 0) 78 return ret; 79 80 if (enfi.enfi_dpcpu_fw_ids_valid) { 81 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret); 82 int ret_extra; 83 84 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset, 85 fw_size - dpcpu_fw_ids_offset, 86 " rx%" PRIx16 " tx%" PRIx16, 87 enfi.enfi_rx_dpcpu_fw_id, 88 enfi.enfi_tx_dpcpu_fw_id); 89 if (ret_extra < 0) 90 return ret_extra; 91 92 ret += ret_extra; 93 } 94 95 if (fw_size < (size_t)(++ret)) 96 return ret; 97 else 98 return 0; 99 } 100 101 static void 102 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 103 { 104 struct sfc_adapter *sa = dev->data->dev_private; 105 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 106 107 sfc_log_init(sa, "entry"); 108 109 dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device); 110 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; 111 112 /* Autonegotiation may be disabled */ 113 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 114 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX) 115 dev_info->speed_capa |= ETH_LINK_SPEED_1G; 116 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX) 117 dev_info->speed_capa |= ETH_LINK_SPEED_10G; 118 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX) 119 dev_info->speed_capa |= ETH_LINK_SPEED_40G; 120 121 dev_info->max_rx_queues = sa->rxq_max; 122 dev_info->max_tx_queues = sa->txq_max; 123 124 /* By default packets are dropped if no descriptors are available */ 125 dev_info->default_rxconf.rx_drop_en = 1; 126 127 dev_info->rx_offload_capa = 128 DEV_RX_OFFLOAD_IPV4_CKSUM | 129 DEV_RX_OFFLOAD_UDP_CKSUM | 130 DEV_RX_OFFLOAD_TCP_CKSUM; 131 132 dev_info->tx_offload_capa = 133 DEV_TX_OFFLOAD_IPV4_CKSUM | 134 DEV_TX_OFFLOAD_UDP_CKSUM | 135 DEV_TX_OFFLOAD_TCP_CKSUM; 136 137 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP; 138 if ((~sa->dp_tx->features & SFC_DP_TX_FEAT_VLAN_INSERT) || 139 !encp->enc_hw_tx_insert_vlan_enabled) 140 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL; 141 else 142 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT; 143 144 #if EFSYS_OPT_RX_SCALE 145 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) { 146 dev_info->reta_size = EFX_RSS_TBL_SIZE; 147 dev_info->hash_key_size = SFC_RSS_KEY_SIZE; 148 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS; 149 } 150 #endif 151 152 if (sa->tso) 153 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO; 154 155 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS; 156 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS; 157 /* The RXQ hardware requires that the descriptor count is a power 158 * of 2, but rx_desc_lim cannot properly describe that constraint. 159 */ 160 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS; 161 162 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; 163 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS; 164 /* 165 * The TXQ hardware requires that the descriptor count is a power 166 * of 2, but tx_desc_lim cannot properly describe that constraint 167 */ 168 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS; 169 } 170 171 static const uint32_t * 172 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) 173 { 174 struct sfc_adapter *sa = dev->data->dev_private; 175 176 return sa->dp_rx->supported_ptypes_get(); 177 } 178 179 static int 180 sfc_dev_configure(struct rte_eth_dev *dev) 181 { 182 struct rte_eth_dev_data *dev_data = dev->data; 183 struct sfc_adapter *sa = dev_data->dev_private; 184 int rc; 185 186 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u", 187 dev_data->nb_rx_queues, dev_data->nb_tx_queues); 188 189 sfc_adapter_lock(sa); 190 switch (sa->state) { 191 case SFC_ADAPTER_CONFIGURED: 192 sfc_close(sa); 193 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED); 194 /* FALLTHROUGH */ 195 case SFC_ADAPTER_INITIALIZED: 196 rc = sfc_configure(sa); 197 break; 198 default: 199 sfc_err(sa, "unexpected adapter state %u to configure", 200 sa->state); 201 rc = EINVAL; 202 break; 203 } 204 sfc_adapter_unlock(sa); 205 206 sfc_log_init(sa, "done %d", rc); 207 SFC_ASSERT(rc >= 0); 208 return -rc; 209 } 210 211 static int 212 sfc_dev_start(struct rte_eth_dev *dev) 213 { 214 struct sfc_adapter *sa = dev->data->dev_private; 215 int rc; 216 217 sfc_log_init(sa, "entry"); 218 219 sfc_adapter_lock(sa); 220 rc = sfc_start(sa); 221 sfc_adapter_unlock(sa); 222 223 sfc_log_init(sa, "done %d", rc); 224 SFC_ASSERT(rc >= 0); 225 return -rc; 226 } 227 228 static int 229 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 230 { 231 struct sfc_adapter *sa = dev->data->dev_private; 232 struct rte_eth_link *dev_link = &dev->data->dev_link; 233 struct rte_eth_link old_link; 234 struct rte_eth_link current_link; 235 236 sfc_log_init(sa, "entry"); 237 238 retry: 239 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t)); 240 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link); 241 242 if (sa->state != SFC_ADAPTER_STARTED) { 243 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link); 244 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 245 *(uint64_t *)&old_link, 246 *(uint64_t *)¤t_link)) 247 goto retry; 248 } else if (wait_to_complete) { 249 efx_link_mode_t link_mode; 250 251 if (efx_port_poll(sa->nic, &link_mode) != 0) 252 link_mode = EFX_LINK_UNKNOWN; 253 sfc_port_link_mode_to_info(link_mode, ¤t_link); 254 255 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 256 *(uint64_t *)&old_link, 257 *(uint64_t *)¤t_link)) 258 goto retry; 259 } else { 260 sfc_ev_mgmt_qpoll(sa); 261 *(int64_t *)¤t_link = 262 rte_atomic64_read((rte_atomic64_t *)dev_link); 263 } 264 265 if (old_link.link_status != current_link.link_status) 266 sfc_info(sa, "Link status is %s", 267 current_link.link_status ? "UP" : "DOWN"); 268 269 return old_link.link_status == current_link.link_status ? 0 : -1; 270 } 271 272 static void 273 sfc_dev_stop(struct rte_eth_dev *dev) 274 { 275 struct sfc_adapter *sa = dev->data->dev_private; 276 277 sfc_log_init(sa, "entry"); 278 279 sfc_adapter_lock(sa); 280 sfc_stop(sa); 281 sfc_adapter_unlock(sa); 282 283 sfc_log_init(sa, "done"); 284 } 285 286 static int 287 sfc_dev_set_link_up(struct rte_eth_dev *dev) 288 { 289 struct sfc_adapter *sa = dev->data->dev_private; 290 int rc; 291 292 sfc_log_init(sa, "entry"); 293 294 sfc_adapter_lock(sa); 295 rc = sfc_start(sa); 296 sfc_adapter_unlock(sa); 297 298 SFC_ASSERT(rc >= 0); 299 return -rc; 300 } 301 302 static int 303 sfc_dev_set_link_down(struct rte_eth_dev *dev) 304 { 305 struct sfc_adapter *sa = dev->data->dev_private; 306 307 sfc_log_init(sa, "entry"); 308 309 sfc_adapter_lock(sa); 310 sfc_stop(sa); 311 sfc_adapter_unlock(sa); 312 313 return 0; 314 } 315 316 static void 317 sfc_dev_close(struct rte_eth_dev *dev) 318 { 319 struct sfc_adapter *sa = dev->data->dev_private; 320 321 sfc_log_init(sa, "entry"); 322 323 sfc_adapter_lock(sa); 324 switch (sa->state) { 325 case SFC_ADAPTER_STARTED: 326 sfc_stop(sa); 327 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED); 328 /* FALLTHROUGH */ 329 case SFC_ADAPTER_CONFIGURED: 330 sfc_close(sa); 331 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED); 332 /* FALLTHROUGH */ 333 case SFC_ADAPTER_INITIALIZED: 334 break; 335 default: 336 sfc_err(sa, "unexpected adapter state %u on close", sa->state); 337 break; 338 } 339 sfc_adapter_unlock(sa); 340 341 sfc_log_init(sa, "done"); 342 } 343 344 static void 345 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode, 346 boolean_t enabled) 347 { 348 struct sfc_port *port; 349 boolean_t *toggle; 350 struct sfc_adapter *sa = dev->data->dev_private; 351 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI); 352 const char *desc = (allmulti) ? "all-multi" : "promiscuous"; 353 354 sfc_adapter_lock(sa); 355 356 port = &sa->port; 357 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc); 358 359 if (*toggle != enabled) { 360 *toggle = enabled; 361 362 if ((sa->state == SFC_ADAPTER_STARTED) && 363 (sfc_set_rx_mode(sa) != 0)) { 364 *toggle = !(enabled); 365 sfc_warn(sa, "Failed to %s %s mode", 366 ((enabled) ? "enable" : "disable"), desc); 367 } 368 } 369 370 sfc_adapter_unlock(sa); 371 } 372 373 static void 374 sfc_dev_promisc_enable(struct rte_eth_dev *dev) 375 { 376 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE); 377 } 378 379 static void 380 sfc_dev_promisc_disable(struct rte_eth_dev *dev) 381 { 382 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE); 383 } 384 385 static void 386 sfc_dev_allmulti_enable(struct rte_eth_dev *dev) 387 { 388 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE); 389 } 390 391 static void 392 sfc_dev_allmulti_disable(struct rte_eth_dev *dev) 393 { 394 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE); 395 } 396 397 static int 398 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, 399 uint16_t nb_rx_desc, unsigned int socket_id, 400 const struct rte_eth_rxconf *rx_conf, 401 struct rte_mempool *mb_pool) 402 { 403 struct sfc_adapter *sa = dev->data->dev_private; 404 int rc; 405 406 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u", 407 rx_queue_id, nb_rx_desc, socket_id); 408 409 sfc_adapter_lock(sa); 410 411 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id, 412 rx_conf, mb_pool); 413 if (rc != 0) 414 goto fail_rx_qinit; 415 416 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq->dp; 417 418 sfc_adapter_unlock(sa); 419 420 return 0; 421 422 fail_rx_qinit: 423 sfc_adapter_unlock(sa); 424 SFC_ASSERT(rc > 0); 425 return -rc; 426 } 427 428 static void 429 sfc_rx_queue_release(void *queue) 430 { 431 struct sfc_dp_rxq *dp_rxq = queue; 432 struct sfc_rxq *rxq; 433 struct sfc_adapter *sa; 434 unsigned int sw_index; 435 436 if (dp_rxq == NULL) 437 return; 438 439 rxq = sfc_rxq_by_dp_rxq(dp_rxq); 440 sa = rxq->evq->sa; 441 sfc_adapter_lock(sa); 442 443 sw_index = sfc_rxq_sw_index(rxq); 444 445 sfc_log_init(sa, "RxQ=%u", sw_index); 446 447 sa->eth_dev->data->rx_queues[sw_index] = NULL; 448 449 sfc_rx_qfini(sa, sw_index); 450 451 sfc_adapter_unlock(sa); 452 } 453 454 static int 455 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, 456 uint16_t nb_tx_desc, unsigned int socket_id, 457 const struct rte_eth_txconf *tx_conf) 458 { 459 struct sfc_adapter *sa = dev->data->dev_private; 460 int rc; 461 462 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u", 463 tx_queue_id, nb_tx_desc, socket_id); 464 465 sfc_adapter_lock(sa); 466 467 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf); 468 if (rc != 0) 469 goto fail_tx_qinit; 470 471 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq->dp; 472 473 sfc_adapter_unlock(sa); 474 return 0; 475 476 fail_tx_qinit: 477 sfc_adapter_unlock(sa); 478 SFC_ASSERT(rc > 0); 479 return -rc; 480 } 481 482 static void 483 sfc_tx_queue_release(void *queue) 484 { 485 struct sfc_dp_txq *dp_txq = queue; 486 struct sfc_txq *txq; 487 unsigned int sw_index; 488 struct sfc_adapter *sa; 489 490 if (dp_txq == NULL) 491 return; 492 493 txq = sfc_txq_by_dp_txq(dp_txq); 494 sw_index = sfc_txq_sw_index(txq); 495 496 SFC_ASSERT(txq->evq != NULL); 497 sa = txq->evq->sa; 498 499 sfc_log_init(sa, "TxQ = %u", sw_index); 500 501 sfc_adapter_lock(sa); 502 503 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues); 504 sa->eth_dev->data->tx_queues[sw_index] = NULL; 505 506 sfc_tx_qfini(sa, sw_index); 507 508 sfc_adapter_unlock(sa); 509 } 510 511 static void 512 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 513 { 514 struct sfc_adapter *sa = dev->data->dev_private; 515 struct sfc_port *port = &sa->port; 516 uint64_t *mac_stats; 517 518 rte_spinlock_lock(&port->mac_stats_lock); 519 520 if (sfc_port_update_mac_stats(sa) != 0) 521 goto unlock; 522 523 mac_stats = port->mac_stats_buf; 524 525 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, 526 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) { 527 stats->ipackets = 528 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] + 529 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] + 530 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]; 531 stats->opackets = 532 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] + 533 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] + 534 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]; 535 stats->ibytes = 536 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] + 537 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] + 538 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]; 539 stats->obytes = 540 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] + 541 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] + 542 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; 543 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW]; 544 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; 545 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; 546 } else { 547 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS]; 548 stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; 549 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS]; 550 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS]; 551 /* 552 * Take into account stats which are whenever supported 553 * on EF10. If some stat is not supported by current 554 * firmware variant or HW revision, it is guaranteed 555 * to be zero in mac_stats. 556 */ 557 stats->imissed = 558 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] + 559 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] + 560 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] + 561 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] + 562 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] + 563 mac_stats[EFX_MAC_PM_TRUNC_QBB] + 564 mac_stats[EFX_MAC_PM_DISCARD_QBB] + 565 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] + 566 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] + 567 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS]; 568 stats->ierrors = 569 mac_stats[EFX_MAC_RX_FCS_ERRORS] + 570 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] + 571 mac_stats[EFX_MAC_RX_JABBER_PKTS]; 572 /* no oerrors counters supported on EF10 */ 573 } 574 575 unlock: 576 rte_spinlock_unlock(&port->mac_stats_lock); 577 } 578 579 static void 580 sfc_stats_reset(struct rte_eth_dev *dev) 581 { 582 struct sfc_adapter *sa = dev->data->dev_private; 583 struct sfc_port *port = &sa->port; 584 int rc; 585 586 if (sa->state != SFC_ADAPTER_STARTED) { 587 /* 588 * The operation cannot be done if port is not started; it 589 * will be scheduled to be done during the next port start 590 */ 591 port->mac_stats_reset_pending = B_TRUE; 592 return; 593 } 594 595 rc = sfc_port_reset_mac_stats(sa); 596 if (rc != 0) 597 sfc_err(sa, "failed to reset statistics (rc = %d)", rc); 598 } 599 600 static int 601 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 602 unsigned int xstats_count) 603 { 604 struct sfc_adapter *sa = dev->data->dev_private; 605 struct sfc_port *port = &sa->port; 606 uint64_t *mac_stats; 607 int rc; 608 unsigned int i; 609 int nstats = 0; 610 611 rte_spinlock_lock(&port->mac_stats_lock); 612 613 rc = sfc_port_update_mac_stats(sa); 614 if (rc != 0) { 615 SFC_ASSERT(rc > 0); 616 nstats = -rc; 617 goto unlock; 618 } 619 620 mac_stats = port->mac_stats_buf; 621 622 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 623 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 624 if (xstats != NULL && nstats < (int)xstats_count) { 625 xstats[nstats].id = nstats; 626 xstats[nstats].value = mac_stats[i]; 627 } 628 nstats++; 629 } 630 } 631 632 unlock: 633 rte_spinlock_unlock(&port->mac_stats_lock); 634 635 return nstats; 636 } 637 638 static int 639 sfc_xstats_get_names(struct rte_eth_dev *dev, 640 struct rte_eth_xstat_name *xstats_names, 641 unsigned int xstats_count) 642 { 643 struct sfc_adapter *sa = dev->data->dev_private; 644 struct sfc_port *port = &sa->port; 645 unsigned int i; 646 unsigned int nstats = 0; 647 648 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 649 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 650 if (xstats_names != NULL && nstats < xstats_count) 651 strncpy(xstats_names[nstats].name, 652 efx_mac_stat_name(sa->nic, i), 653 sizeof(xstats_names[0].name)); 654 nstats++; 655 } 656 } 657 658 return nstats; 659 } 660 661 static int 662 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 663 { 664 struct sfc_adapter *sa = dev->data->dev_private; 665 unsigned int wanted_fc, link_fc; 666 667 memset(fc_conf, 0, sizeof(*fc_conf)); 668 669 sfc_adapter_lock(sa); 670 671 if (sa->state == SFC_ADAPTER_STARTED) 672 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc); 673 else 674 link_fc = sa->port.flow_ctrl; 675 676 switch (link_fc) { 677 case 0: 678 fc_conf->mode = RTE_FC_NONE; 679 break; 680 case EFX_FCNTL_RESPOND: 681 fc_conf->mode = RTE_FC_RX_PAUSE; 682 break; 683 case EFX_FCNTL_GENERATE: 684 fc_conf->mode = RTE_FC_TX_PAUSE; 685 break; 686 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE): 687 fc_conf->mode = RTE_FC_FULL; 688 break; 689 default: 690 sfc_err(sa, "%s: unexpected flow control value %#x", 691 __func__, link_fc); 692 } 693 694 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; 695 696 sfc_adapter_unlock(sa); 697 698 return 0; 699 } 700 701 static int 702 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 703 { 704 struct sfc_adapter *sa = dev->data->dev_private; 705 struct sfc_port *port = &sa->port; 706 unsigned int fcntl; 707 int rc; 708 709 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || 710 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || 711 fc_conf->mac_ctrl_frame_fwd != 0) { 712 sfc_err(sa, "unsupported flow control settings specified"); 713 rc = EINVAL; 714 goto fail_inval; 715 } 716 717 switch (fc_conf->mode) { 718 case RTE_FC_NONE: 719 fcntl = 0; 720 break; 721 case RTE_FC_RX_PAUSE: 722 fcntl = EFX_FCNTL_RESPOND; 723 break; 724 case RTE_FC_TX_PAUSE: 725 fcntl = EFX_FCNTL_GENERATE; 726 break; 727 case RTE_FC_FULL: 728 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 729 break; 730 default: 731 rc = EINVAL; 732 goto fail_inval; 733 } 734 735 sfc_adapter_lock(sa); 736 737 if (sa->state == SFC_ADAPTER_STARTED) { 738 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg); 739 if (rc != 0) 740 goto fail_mac_fcntl_set; 741 } 742 743 port->flow_ctrl = fcntl; 744 port->flow_ctrl_autoneg = fc_conf->autoneg; 745 746 sfc_adapter_unlock(sa); 747 748 return 0; 749 750 fail_mac_fcntl_set: 751 sfc_adapter_unlock(sa); 752 fail_inval: 753 SFC_ASSERT(rc > 0); 754 return -rc; 755 } 756 757 static int 758 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 759 { 760 struct sfc_adapter *sa = dev->data->dev_private; 761 size_t pdu = EFX_MAC_PDU(mtu); 762 size_t old_pdu; 763 int rc; 764 765 sfc_log_init(sa, "mtu=%u", mtu); 766 767 rc = EINVAL; 768 if (pdu < EFX_MAC_PDU_MIN) { 769 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)", 770 (unsigned int)mtu, (unsigned int)pdu, 771 EFX_MAC_PDU_MIN); 772 goto fail_inval; 773 } 774 if (pdu > EFX_MAC_PDU_MAX) { 775 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)", 776 (unsigned int)mtu, (unsigned int)pdu, 777 EFX_MAC_PDU_MAX); 778 goto fail_inval; 779 } 780 781 sfc_adapter_lock(sa); 782 783 if (pdu != sa->port.pdu) { 784 if (sa->state == SFC_ADAPTER_STARTED) { 785 sfc_stop(sa); 786 787 old_pdu = sa->port.pdu; 788 sa->port.pdu = pdu; 789 rc = sfc_start(sa); 790 if (rc != 0) 791 goto fail_start; 792 } else { 793 sa->port.pdu = pdu; 794 } 795 } 796 797 /* 798 * The driver does not use it, but other PMDs update jumbo_frame 799 * flag and max_rx_pkt_len when MTU is set. 800 */ 801 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN); 802 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu; 803 804 sfc_adapter_unlock(sa); 805 806 sfc_log_init(sa, "done"); 807 return 0; 808 809 fail_start: 810 sa->port.pdu = old_pdu; 811 if (sfc_start(sa) != 0) 812 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) " 813 "PDU max size - port is stopped", 814 (unsigned int)pdu, (unsigned int)old_pdu); 815 sfc_adapter_unlock(sa); 816 817 fail_inval: 818 sfc_log_init(sa, "failed %d", rc); 819 SFC_ASSERT(rc > 0); 820 return -rc; 821 } 822 static void 823 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr) 824 { 825 struct sfc_adapter *sa = dev->data->dev_private; 826 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 827 int rc; 828 829 sfc_adapter_lock(sa); 830 831 if (sa->state != SFC_ADAPTER_STARTED) { 832 sfc_info(sa, "the port is not started"); 833 sfc_info(sa, "the new MAC address will be set on port start"); 834 835 goto unlock; 836 } 837 838 if (encp->enc_allow_set_mac_with_installed_filters) { 839 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes); 840 if (rc != 0) { 841 sfc_err(sa, "cannot set MAC address (rc = %u)", rc); 842 goto unlock; 843 } 844 845 /* 846 * Changing the MAC address by means of MCDI request 847 * has no effect on received traffic, therefore 848 * we also need to update unicast filters 849 */ 850 rc = sfc_set_rx_mode(sa); 851 if (rc != 0) 852 sfc_err(sa, "cannot set filter (rc = %u)", rc); 853 } else { 854 sfc_warn(sa, "cannot set MAC address with filters installed"); 855 sfc_warn(sa, "adapter will be restarted to pick the new MAC"); 856 sfc_warn(sa, "(some traffic may be dropped)"); 857 858 /* 859 * Since setting MAC address with filters installed is not 860 * allowed on the adapter, one needs to simply restart adapter 861 * so that the new MAC address will be taken from an outer 862 * storage and set flawlessly by means of sfc_start() call 863 */ 864 sfc_stop(sa); 865 rc = sfc_start(sa); 866 if (rc != 0) 867 sfc_err(sa, "cannot restart adapter (rc = %u)", rc); 868 } 869 870 unlock: 871 sfc_adapter_unlock(sa); 872 } 873 874 875 static int 876 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set, 877 uint32_t nb_mc_addr) 878 { 879 struct sfc_adapter *sa = dev->data->dev_private; 880 struct sfc_port *port = &sa->port; 881 uint8_t *mc_addrs = port->mcast_addrs; 882 int rc; 883 unsigned int i; 884 885 if (mc_addrs == NULL) 886 return -ENOBUFS; 887 888 if (nb_mc_addr > port->max_mcast_addrs) { 889 sfc_err(sa, "too many multicast addresses: %u > %u", 890 nb_mc_addr, port->max_mcast_addrs); 891 return -EINVAL; 892 } 893 894 for (i = 0; i < nb_mc_addr; ++i) { 895 (void)rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, 896 EFX_MAC_ADDR_LEN); 897 mc_addrs += EFX_MAC_ADDR_LEN; 898 } 899 900 port->nb_mcast_addrs = nb_mc_addr; 901 902 if (sa->state != SFC_ADAPTER_STARTED) 903 return 0; 904 905 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, 906 port->nb_mcast_addrs); 907 if (rc != 0) 908 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); 909 910 SFC_ASSERT(rc > 0); 911 return -rc; 912 } 913 914 static void 915 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id, 916 struct rte_eth_rxq_info *qinfo) 917 { 918 struct sfc_adapter *sa = dev->data->dev_private; 919 struct sfc_rxq_info *rxq_info; 920 struct sfc_rxq *rxq; 921 922 sfc_adapter_lock(sa); 923 924 SFC_ASSERT(rx_queue_id < sa->rxq_count); 925 926 rxq_info = &sa->rxq_info[rx_queue_id]; 927 rxq = rxq_info->rxq; 928 SFC_ASSERT(rxq != NULL); 929 930 qinfo->mp = rxq->refill_mb_pool; 931 qinfo->conf.rx_free_thresh = rxq->refill_threshold; 932 qinfo->conf.rx_drop_en = 1; 933 qinfo->conf.rx_deferred_start = rxq_info->deferred_start; 934 qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER); 935 qinfo->nb_desc = rxq_info->entries; 936 937 sfc_adapter_unlock(sa); 938 } 939 940 static void 941 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id, 942 struct rte_eth_txq_info *qinfo) 943 { 944 struct sfc_adapter *sa = dev->data->dev_private; 945 struct sfc_txq_info *txq_info; 946 947 sfc_adapter_lock(sa); 948 949 SFC_ASSERT(tx_queue_id < sa->txq_count); 950 951 txq_info = &sa->txq_info[tx_queue_id]; 952 SFC_ASSERT(txq_info->txq != NULL); 953 954 memset(qinfo, 0, sizeof(*qinfo)); 955 956 qinfo->conf.txq_flags = txq_info->txq->flags; 957 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh; 958 qinfo->conf.tx_deferred_start = txq_info->deferred_start; 959 qinfo->nb_desc = txq_info->entries; 960 961 sfc_adapter_unlock(sa); 962 } 963 964 static uint32_t 965 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) 966 { 967 struct sfc_adapter *sa = dev->data->dev_private; 968 969 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 970 971 return sfc_rx_qdesc_npending(sa, rx_queue_id); 972 } 973 974 static int 975 sfc_rx_descriptor_done(void *queue, uint16_t offset) 976 { 977 struct sfc_dp_rxq *dp_rxq = queue; 978 979 return sfc_rx_qdesc_done(dp_rxq, offset); 980 } 981 982 static int 983 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) 984 { 985 struct sfc_adapter *sa = dev->data->dev_private; 986 int rc; 987 988 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 989 990 sfc_adapter_lock(sa); 991 992 rc = EINVAL; 993 if (sa->state != SFC_ADAPTER_STARTED) 994 goto fail_not_started; 995 996 rc = sfc_rx_qstart(sa, rx_queue_id); 997 if (rc != 0) 998 goto fail_rx_qstart; 999 1000 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE; 1001 1002 sfc_adapter_unlock(sa); 1003 1004 return 0; 1005 1006 fail_rx_qstart: 1007 fail_not_started: 1008 sfc_adapter_unlock(sa); 1009 SFC_ASSERT(rc > 0); 1010 return -rc; 1011 } 1012 1013 static int 1014 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) 1015 { 1016 struct sfc_adapter *sa = dev->data->dev_private; 1017 1018 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 1019 1020 sfc_adapter_lock(sa); 1021 sfc_rx_qstop(sa, rx_queue_id); 1022 1023 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE; 1024 1025 sfc_adapter_unlock(sa); 1026 1027 return 0; 1028 } 1029 1030 static int 1031 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1032 { 1033 struct sfc_adapter *sa = dev->data->dev_private; 1034 int rc; 1035 1036 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1037 1038 sfc_adapter_lock(sa); 1039 1040 rc = EINVAL; 1041 if (sa->state != SFC_ADAPTER_STARTED) 1042 goto fail_not_started; 1043 1044 rc = sfc_tx_qstart(sa, tx_queue_id); 1045 if (rc != 0) 1046 goto fail_tx_qstart; 1047 1048 sa->txq_info[tx_queue_id].deferred_started = B_TRUE; 1049 1050 sfc_adapter_unlock(sa); 1051 return 0; 1052 1053 fail_tx_qstart: 1054 1055 fail_not_started: 1056 sfc_adapter_unlock(sa); 1057 SFC_ASSERT(rc > 0); 1058 return -rc; 1059 } 1060 1061 static int 1062 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1063 { 1064 struct sfc_adapter *sa = dev->data->dev_private; 1065 1066 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1067 1068 sfc_adapter_lock(sa); 1069 1070 sfc_tx_qstop(sa, tx_queue_id); 1071 1072 sa->txq_info[tx_queue_id].deferred_started = B_FALSE; 1073 1074 sfc_adapter_unlock(sa); 1075 return 0; 1076 } 1077 1078 #if EFSYS_OPT_RX_SCALE 1079 static int 1080 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1081 struct rte_eth_rss_conf *rss_conf) 1082 { 1083 struct sfc_adapter *sa = dev->data->dev_private; 1084 1085 if ((sa->rss_channels == 1) || 1086 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) 1087 return -ENOTSUP; 1088 1089 sfc_adapter_lock(sa); 1090 1091 /* 1092 * Mapping of hash configuration between RTE and EFX is not one-to-one, 1093 * hence, conversion is done here to derive a correct set of ETH_RSS 1094 * flags which corresponds to the active EFX configuration stored 1095 * locally in 'sfc_adapter' and kept up-to-date 1096 */ 1097 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types); 1098 rss_conf->rss_key_len = SFC_RSS_KEY_SIZE; 1099 if (rss_conf->rss_key != NULL) 1100 rte_memcpy(rss_conf->rss_key, sa->rss_key, SFC_RSS_KEY_SIZE); 1101 1102 sfc_adapter_unlock(sa); 1103 1104 return 0; 1105 } 1106 1107 static int 1108 sfc_dev_rss_hash_update(struct rte_eth_dev *dev, 1109 struct rte_eth_rss_conf *rss_conf) 1110 { 1111 struct sfc_adapter *sa = dev->data->dev_private; 1112 unsigned int efx_hash_types; 1113 int rc = 0; 1114 1115 if ((sa->rss_channels == 1) || 1116 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) { 1117 sfc_err(sa, "RSS is not available"); 1118 return -ENOTSUP; 1119 } 1120 1121 if ((rss_conf->rss_key != NULL) && 1122 (rss_conf->rss_key_len != sizeof(sa->rss_key))) { 1123 sfc_err(sa, "RSS key size is wrong (should be %lu)", 1124 sizeof(sa->rss_key)); 1125 return -EINVAL; 1126 } 1127 1128 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) { 1129 sfc_err(sa, "unsupported hash functions requested"); 1130 return -EINVAL; 1131 } 1132 1133 sfc_adapter_lock(sa); 1134 1135 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf); 1136 1137 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, 1138 efx_hash_types, B_TRUE); 1139 if (rc != 0) 1140 goto fail_scale_mode_set; 1141 1142 if (rss_conf->rss_key != NULL) { 1143 if (sa->state == SFC_ADAPTER_STARTED) { 1144 rc = efx_rx_scale_key_set(sa->nic, rss_conf->rss_key, 1145 sizeof(sa->rss_key)); 1146 if (rc != 0) 1147 goto fail_scale_key_set; 1148 } 1149 1150 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key)); 1151 } 1152 1153 sa->rss_hash_types = efx_hash_types; 1154 1155 sfc_adapter_unlock(sa); 1156 1157 return 0; 1158 1159 fail_scale_key_set: 1160 if (efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, 1161 sa->rss_hash_types, B_TRUE) != 0) 1162 sfc_err(sa, "failed to restore RSS mode"); 1163 1164 fail_scale_mode_set: 1165 sfc_adapter_unlock(sa); 1166 return -rc; 1167 } 1168 1169 static int 1170 sfc_dev_rss_reta_query(struct rte_eth_dev *dev, 1171 struct rte_eth_rss_reta_entry64 *reta_conf, 1172 uint16_t reta_size) 1173 { 1174 struct sfc_adapter *sa = dev->data->dev_private; 1175 int entry; 1176 1177 if ((sa->rss_channels == 1) || 1178 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) 1179 return -ENOTSUP; 1180 1181 if (reta_size != EFX_RSS_TBL_SIZE) 1182 return -EINVAL; 1183 1184 sfc_adapter_lock(sa); 1185 1186 for (entry = 0; entry < reta_size; entry++) { 1187 int grp = entry / RTE_RETA_GROUP_SIZE; 1188 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1189 1190 if ((reta_conf[grp].mask >> grp_idx) & 1) 1191 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry]; 1192 } 1193 1194 sfc_adapter_unlock(sa); 1195 1196 return 0; 1197 } 1198 1199 static int 1200 sfc_dev_rss_reta_update(struct rte_eth_dev *dev, 1201 struct rte_eth_rss_reta_entry64 *reta_conf, 1202 uint16_t reta_size) 1203 { 1204 struct sfc_adapter *sa = dev->data->dev_private; 1205 unsigned int *rss_tbl_new; 1206 uint16_t entry; 1207 int rc; 1208 1209 1210 if ((sa->rss_channels == 1) || 1211 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) { 1212 sfc_err(sa, "RSS is not available"); 1213 return -ENOTSUP; 1214 } 1215 1216 if (reta_size != EFX_RSS_TBL_SIZE) { 1217 sfc_err(sa, "RETA size is wrong (should be %u)", 1218 EFX_RSS_TBL_SIZE); 1219 return -EINVAL; 1220 } 1221 1222 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0); 1223 if (rss_tbl_new == NULL) 1224 return -ENOMEM; 1225 1226 sfc_adapter_lock(sa); 1227 1228 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl)); 1229 1230 for (entry = 0; entry < reta_size; entry++) { 1231 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1232 struct rte_eth_rss_reta_entry64 *grp; 1233 1234 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE]; 1235 1236 if (grp->mask & (1ull << grp_idx)) { 1237 if (grp->reta[grp_idx] >= sa->rss_channels) { 1238 rc = EINVAL; 1239 goto bad_reta_entry; 1240 } 1241 rss_tbl_new[entry] = grp->reta[grp_idx]; 1242 } 1243 } 1244 1245 rc = efx_rx_scale_tbl_set(sa->nic, rss_tbl_new, EFX_RSS_TBL_SIZE); 1246 if (rc == 0) 1247 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl)); 1248 1249 bad_reta_entry: 1250 sfc_adapter_unlock(sa); 1251 1252 rte_free(rss_tbl_new); 1253 1254 SFC_ASSERT(rc >= 0); 1255 return -rc; 1256 } 1257 #endif 1258 1259 static int 1260 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type, 1261 enum rte_filter_op filter_op, 1262 void *arg) 1263 { 1264 struct sfc_adapter *sa = dev->data->dev_private; 1265 int rc = ENOTSUP; 1266 1267 sfc_log_init(sa, "entry"); 1268 1269 switch (filter_type) { 1270 case RTE_ETH_FILTER_NONE: 1271 sfc_err(sa, "Global filters configuration not supported"); 1272 break; 1273 case RTE_ETH_FILTER_MACVLAN: 1274 sfc_err(sa, "MACVLAN filters not supported"); 1275 break; 1276 case RTE_ETH_FILTER_ETHERTYPE: 1277 sfc_err(sa, "EtherType filters not supported"); 1278 break; 1279 case RTE_ETH_FILTER_FLEXIBLE: 1280 sfc_err(sa, "Flexible filters not supported"); 1281 break; 1282 case RTE_ETH_FILTER_SYN: 1283 sfc_err(sa, "SYN filters not supported"); 1284 break; 1285 case RTE_ETH_FILTER_NTUPLE: 1286 sfc_err(sa, "NTUPLE filters not supported"); 1287 break; 1288 case RTE_ETH_FILTER_TUNNEL: 1289 sfc_err(sa, "Tunnel filters not supported"); 1290 break; 1291 case RTE_ETH_FILTER_FDIR: 1292 sfc_err(sa, "Flow Director filters not supported"); 1293 break; 1294 case RTE_ETH_FILTER_HASH: 1295 sfc_err(sa, "Hash filters not supported"); 1296 break; 1297 case RTE_ETH_FILTER_GENERIC: 1298 if (filter_op != RTE_ETH_FILTER_GET) { 1299 rc = EINVAL; 1300 } else { 1301 *(const void **)arg = &sfc_flow_ops; 1302 rc = 0; 1303 } 1304 break; 1305 default: 1306 sfc_err(sa, "Unknown filter type %u", filter_type); 1307 break; 1308 } 1309 1310 sfc_log_init(sa, "exit: %d", -rc); 1311 SFC_ASSERT(rc >= 0); 1312 return -rc; 1313 } 1314 1315 static const struct eth_dev_ops sfc_eth_dev_ops = { 1316 .dev_configure = sfc_dev_configure, 1317 .dev_start = sfc_dev_start, 1318 .dev_stop = sfc_dev_stop, 1319 .dev_set_link_up = sfc_dev_set_link_up, 1320 .dev_set_link_down = sfc_dev_set_link_down, 1321 .dev_close = sfc_dev_close, 1322 .promiscuous_enable = sfc_dev_promisc_enable, 1323 .promiscuous_disable = sfc_dev_promisc_disable, 1324 .allmulticast_enable = sfc_dev_allmulti_enable, 1325 .allmulticast_disable = sfc_dev_allmulti_disable, 1326 .link_update = sfc_dev_link_update, 1327 .stats_get = sfc_stats_get, 1328 .stats_reset = sfc_stats_reset, 1329 .xstats_get = sfc_xstats_get, 1330 .xstats_reset = sfc_stats_reset, 1331 .xstats_get_names = sfc_xstats_get_names, 1332 .dev_infos_get = sfc_dev_infos_get, 1333 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 1334 .mtu_set = sfc_dev_set_mtu, 1335 .rx_queue_start = sfc_rx_queue_start, 1336 .rx_queue_stop = sfc_rx_queue_stop, 1337 .tx_queue_start = sfc_tx_queue_start, 1338 .tx_queue_stop = sfc_tx_queue_stop, 1339 .rx_queue_setup = sfc_rx_queue_setup, 1340 .rx_queue_release = sfc_rx_queue_release, 1341 .rx_queue_count = sfc_rx_queue_count, 1342 .rx_descriptor_done = sfc_rx_descriptor_done, 1343 .tx_queue_setup = sfc_tx_queue_setup, 1344 .tx_queue_release = sfc_tx_queue_release, 1345 .flow_ctrl_get = sfc_flow_ctrl_get, 1346 .flow_ctrl_set = sfc_flow_ctrl_set, 1347 .mac_addr_set = sfc_mac_addr_set, 1348 #if EFSYS_OPT_RX_SCALE 1349 .reta_update = sfc_dev_rss_reta_update, 1350 .reta_query = sfc_dev_rss_reta_query, 1351 .rss_hash_update = sfc_dev_rss_hash_update, 1352 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 1353 #endif 1354 .filter_ctrl = sfc_dev_filter_ctrl, 1355 .set_mc_addr_list = sfc_set_mc_addr_list, 1356 .rxq_info_get = sfc_rx_queue_info_get, 1357 .txq_info_get = sfc_tx_queue_info_get, 1358 .fw_version_get = sfc_fw_version_get, 1359 }; 1360 1361 static int 1362 sfc_eth_dev_set_ops(struct rte_eth_dev *dev) 1363 { 1364 struct sfc_adapter *sa = dev->data->dev_private; 1365 unsigned int avail_caps = 0; 1366 const char *rx_name = NULL; 1367 const char *tx_name = NULL; 1368 int rc; 1369 1370 if (sa == NULL || sa->state == SFC_ADAPTER_UNINITIALIZED) 1371 return -E_RTE_SECONDARY; 1372 1373 switch (sa->family) { 1374 case EFX_FAMILY_HUNTINGTON: 1375 case EFX_FAMILY_MEDFORD: 1376 avail_caps |= SFC_DP_HW_FW_CAP_EF10; 1377 break; 1378 default: 1379 break; 1380 } 1381 1382 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH, 1383 sfc_kvarg_string_handler, &rx_name); 1384 if (rc != 0) 1385 goto fail_kvarg_rx_datapath; 1386 1387 if (rx_name != NULL) { 1388 sa->dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name); 1389 if (sa->dp_rx == NULL) { 1390 sfc_err(sa, "Rx datapath %s not found", rx_name); 1391 rc = ENOENT; 1392 goto fail_dp_rx; 1393 } 1394 if (!sfc_dp_match_hw_fw_caps(&sa->dp_rx->dp, avail_caps)) { 1395 sfc_err(sa, 1396 "Insufficient Hw/FW capabilities to use Rx datapath %s", 1397 rx_name); 1398 rc = EINVAL; 1399 goto fail_dp_rx; 1400 } 1401 } else { 1402 sa->dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps); 1403 if (sa->dp_rx == NULL) { 1404 sfc_err(sa, "Rx datapath by caps %#x not found", 1405 avail_caps); 1406 rc = ENOENT; 1407 goto fail_dp_rx; 1408 } 1409 } 1410 1411 sfc_info(sa, "use %s Rx datapath", sa->dp_rx->dp.name); 1412 1413 dev->rx_pkt_burst = sa->dp_rx->pkt_burst; 1414 1415 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH, 1416 sfc_kvarg_string_handler, &tx_name); 1417 if (rc != 0) 1418 goto fail_kvarg_tx_datapath; 1419 1420 if (tx_name != NULL) { 1421 sa->dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name); 1422 if (sa->dp_tx == NULL) { 1423 sfc_err(sa, "Tx datapath %s not found", tx_name); 1424 rc = ENOENT; 1425 goto fail_dp_tx; 1426 } 1427 if (!sfc_dp_match_hw_fw_caps(&sa->dp_tx->dp, avail_caps)) { 1428 sfc_err(sa, 1429 "Insufficient Hw/FW capabilities to use Tx datapath %s", 1430 tx_name); 1431 rc = EINVAL; 1432 goto fail_dp_tx; 1433 } 1434 } else { 1435 sa->dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps); 1436 if (sa->dp_tx == NULL) { 1437 sfc_err(sa, "Tx datapath by caps %#x not found", 1438 avail_caps); 1439 rc = ENOENT; 1440 goto fail_dp_tx; 1441 } 1442 } 1443 1444 sfc_info(sa, "use %s Tx datapath", sa->dp_tx->dp.name); 1445 1446 dev->tx_pkt_burst = sa->dp_tx->pkt_burst; 1447 1448 dev->dev_ops = &sfc_eth_dev_ops; 1449 1450 return 0; 1451 1452 fail_dp_tx: 1453 fail_kvarg_tx_datapath: 1454 fail_dp_rx: 1455 fail_kvarg_rx_datapath: 1456 return rc; 1457 } 1458 1459 static void 1460 sfc_register_dp(void) 1461 { 1462 /* Register once */ 1463 if (TAILQ_EMPTY(&sfc_dp_head)) { 1464 /* Prefer EF10 datapath */ 1465 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp); 1466 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); 1467 1468 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp); 1469 } 1470 } 1471 1472 static int 1473 sfc_eth_dev_init(struct rte_eth_dev *dev) 1474 { 1475 struct sfc_adapter *sa = dev->data->dev_private; 1476 struct rte_pci_device *pci_dev = SFC_DEV_TO_PCI(dev); 1477 int rc; 1478 const efx_nic_cfg_t *encp; 1479 const struct ether_addr *from; 1480 1481 sfc_register_dp(); 1482 1483 /* Required for logging */ 1484 sa->eth_dev = dev; 1485 1486 /* Copy PCI device info to the dev->data */ 1487 rte_eth_copy_pci_info(dev, pci_dev); 1488 1489 rc = sfc_kvargs_parse(sa); 1490 if (rc != 0) 1491 goto fail_kvargs_parse; 1492 1493 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT, 1494 sfc_kvarg_bool_handler, &sa->debug_init); 1495 if (rc != 0) 1496 goto fail_kvarg_debug_init; 1497 1498 sfc_log_init(sa, "entry"); 1499 1500 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0); 1501 if (dev->data->mac_addrs == NULL) { 1502 rc = ENOMEM; 1503 goto fail_mac_addrs; 1504 } 1505 1506 sfc_adapter_lock_init(sa); 1507 sfc_adapter_lock(sa); 1508 1509 sfc_log_init(sa, "attaching"); 1510 rc = sfc_attach(sa); 1511 if (rc != 0) 1512 goto fail_attach; 1513 1514 encp = efx_nic_cfg_get(sa->nic); 1515 1516 /* 1517 * The arguments are really reverse order in comparison to 1518 * Linux kernel. Copy from NIC config to Ethernet device data. 1519 */ 1520 from = (const struct ether_addr *)(encp->enc_mac_addr); 1521 ether_addr_copy(from, &dev->data->mac_addrs[0]); 1522 1523 sfc_adapter_unlock(sa); 1524 1525 sfc_eth_dev_set_ops(dev); 1526 1527 sfc_log_init(sa, "done"); 1528 return 0; 1529 1530 fail_attach: 1531 sfc_adapter_unlock(sa); 1532 sfc_adapter_lock_fini(sa); 1533 rte_free(dev->data->mac_addrs); 1534 dev->data->mac_addrs = NULL; 1535 1536 fail_mac_addrs: 1537 fail_kvarg_debug_init: 1538 sfc_kvargs_cleanup(sa); 1539 1540 fail_kvargs_parse: 1541 sfc_log_init(sa, "failed %d", rc); 1542 SFC_ASSERT(rc > 0); 1543 return -rc; 1544 } 1545 1546 static int 1547 sfc_eth_dev_uninit(struct rte_eth_dev *dev) 1548 { 1549 struct sfc_adapter *sa = dev->data->dev_private; 1550 1551 sfc_log_init(sa, "entry"); 1552 1553 sfc_adapter_lock(sa); 1554 1555 sfc_detach(sa); 1556 1557 rte_free(dev->data->mac_addrs); 1558 dev->data->mac_addrs = NULL; 1559 1560 dev->dev_ops = NULL; 1561 dev->rx_pkt_burst = NULL; 1562 dev->tx_pkt_burst = NULL; 1563 1564 sfc_kvargs_cleanup(sa); 1565 1566 sfc_adapter_unlock(sa); 1567 sfc_adapter_lock_fini(sa); 1568 1569 sfc_log_init(sa, "done"); 1570 1571 /* Required for logging, so cleanup last */ 1572 sa->eth_dev = NULL; 1573 return 0; 1574 } 1575 1576 static const struct rte_pci_id pci_id_sfc_efx_map[] = { 1577 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, 1578 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, 1579 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, 1580 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, 1581 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, 1582 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, 1583 { .vendor_id = 0 /* sentinel */ } 1584 }; 1585 1586 static struct eth_driver sfc_efx_pmd = { 1587 .pci_drv = { 1588 .id_table = pci_id_sfc_efx_map, 1589 .drv_flags = 1590 RTE_PCI_DRV_INTR_LSC | 1591 RTE_PCI_DRV_NEED_MAPPING, 1592 .probe = rte_eth_dev_pci_probe, 1593 .remove = rte_eth_dev_pci_remove, 1594 }, 1595 .eth_dev_init = sfc_eth_dev_init, 1596 .eth_dev_uninit = sfc_eth_dev_uninit, 1597 .dev_private_size = sizeof(struct sfc_adapter), 1598 }; 1599 1600 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd.pci_drv); 1601 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); 1602 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio"); 1603 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, 1604 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " " 1605 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " " 1606 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " 1607 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> " 1608 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " " 1609 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL); 1610