1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright(c) 2019-2021 Xilinx, Inc. 4 * Copyright(c) 2016-2019 Solarflare Communications Inc. 5 * 6 * This software was jointly developed between OKTET Labs (under contract 7 * for Solarflare) and Solarflare Communications, Inc. 8 */ 9 10 #include <dev_driver.h> 11 #include <ethdev_driver.h> 12 #include <ethdev_pci.h> 13 #include <rte_pci.h> 14 #include <bus_pci_driver.h> 15 #include <rte_errno.h> 16 #include <rte_string_fns.h> 17 #include <rte_ether.h> 18 19 #include "efx.h" 20 21 #include "sfc.h" 22 #include "sfc_debug.h" 23 #include "sfc_log.h" 24 #include "sfc_kvargs.h" 25 #include "sfc_ev.h" 26 #include "sfc_rx.h" 27 #include "sfc_tx.h" 28 #include "sfc_flow.h" 29 #include "sfc_flow_tunnel.h" 30 #include "sfc_dp.h" 31 #include "sfc_dp_rx.h" 32 #include "sfc_repr.h" 33 #include "sfc_sw_stats.h" 34 #include "sfc_switch.h" 35 #include "sfc_nic_dma.h" 36 37 #define SFC_XSTAT_ID_INVALID_VAL UINT64_MAX 38 #define SFC_XSTAT_ID_INVALID_NAME '\0' 39 40 uint32_t sfc_logtype_driver; 41 42 static struct sfc_dp_list sfc_dp_head = 43 TAILQ_HEAD_INITIALIZER(sfc_dp_head); 44 45 46 static void sfc_eth_dev_clear_ops(struct rte_eth_dev *dev); 47 48 49 static int 50 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) 51 { 52 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 53 efx_nic_fw_info_t enfi; 54 int ret; 55 int rc; 56 57 rc = efx_nic_get_fw_version(sa->nic, &enfi); 58 if (rc != 0) 59 return -rc; 60 61 ret = snprintf(fw_version, fw_size, 62 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16, 63 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1], 64 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]); 65 if (ret < 0) 66 return ret; 67 68 if (enfi.enfi_dpcpu_fw_ids_valid) { 69 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret); 70 int ret_extra; 71 72 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset, 73 fw_size - dpcpu_fw_ids_offset, 74 " rx%" PRIx16 " tx%" PRIx16, 75 enfi.enfi_rx_dpcpu_fw_id, 76 enfi.enfi_tx_dpcpu_fw_id); 77 if (ret_extra < 0) 78 return ret_extra; 79 80 ret += ret_extra; 81 } 82 83 if (fw_size < (size_t)(++ret)) 84 return ret; 85 else 86 return 0; 87 } 88 89 static int 90 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 91 { 92 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 93 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 94 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 95 struct sfc_rss *rss = &sas->rss; 96 struct sfc_mae *mae = &sa->mae; 97 98 sfc_log_init(sa, "entry"); 99 100 dev_info->min_mtu = RTE_ETHER_MIN_MTU; 101 dev_info->max_mtu = EFX_MAC_SDU_MAX; 102 103 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; 104 105 dev_info->max_vfs = sa->sriov.num_vfs; 106 107 /* Autonegotiation may be disabled */ 108 dev_info->speed_capa = RTE_ETH_LINK_SPEED_FIXED; 109 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_1000FDX)) 110 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_1G; 111 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_10000FDX)) 112 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_10G; 113 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_25000FDX)) 114 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_25G; 115 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_40000FDX)) 116 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_40G; 117 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_50000FDX)) 118 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_50G; 119 if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_100000FDX)) 120 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_100G; 121 122 dev_info->max_rx_queues = sa->rxq_max; 123 dev_info->max_tx_queues = sa->txq_max; 124 125 /* By default packets are dropped if no descriptors are available */ 126 dev_info->default_rxconf.rx_drop_en = 1; 127 128 dev_info->rx_queue_offload_capa = sfc_rx_get_queue_offload_caps(sa); 129 130 /* 131 * rx_offload_capa includes both device and queue offloads since 132 * the latter may be requested on a per device basis which makes 133 * sense when some offloads are needed to be set on all queues. 134 */ 135 dev_info->rx_offload_capa = sfc_rx_get_dev_offload_caps(sa) | 136 dev_info->rx_queue_offload_capa; 137 138 dev_info->tx_queue_offload_capa = sfc_tx_get_queue_offload_caps(sa); 139 140 /* 141 * tx_offload_capa includes both device and queue offloads since 142 * the latter may be requested on a per device basis which makes 143 * sense when some offloads are needed to be set on all queues. 144 */ 145 dev_info->tx_offload_capa = sfc_tx_get_dev_offload_caps(sa) | 146 dev_info->tx_queue_offload_capa; 147 148 if (rss->context_type != EFX_RX_SCALE_UNAVAILABLE) { 149 uint64_t rte_hf = 0; 150 unsigned int i; 151 152 for (i = 0; i < rss->hf_map_nb_entries; ++i) 153 rte_hf |= rss->hf_map[i].rte; 154 155 dev_info->reta_size = EFX_RSS_TBL_SIZE; 156 dev_info->hash_key_size = EFX_RSS_KEY_SIZE; 157 dev_info->flow_type_rss_offloads = rte_hf; 158 } 159 160 /* Initialize to hardware limits */ 161 dev_info->rx_desc_lim.nb_max = sa->rxq_max_entries; 162 dev_info->rx_desc_lim.nb_min = sa->rxq_min_entries; 163 /* The RXQ hardware requires that the descriptor count is a power 164 * of 2, but rx_desc_lim cannot properly describe that constraint. 165 */ 166 dev_info->rx_desc_lim.nb_align = sa->rxq_min_entries; 167 168 /* Initialize to hardware limits */ 169 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; 170 dev_info->tx_desc_lim.nb_min = sa->txq_min_entries; 171 /* 172 * The TXQ hardware requires that the descriptor count is a power 173 * of 2, but tx_desc_lim cannot properly describe that constraint 174 */ 175 dev_info->tx_desc_lim.nb_align = sa->txq_min_entries; 176 177 if (sap->dp_rx->get_dev_info != NULL) 178 sap->dp_rx->get_dev_info(dev_info); 179 if (sap->dp_tx->get_dev_info != NULL) 180 sap->dp_tx->get_dev_info(dev_info); 181 182 dev_info->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP | 183 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP; 184 dev_info->dev_capa &= ~RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP; 185 186 if (mae->status == SFC_MAE_STATUS_SUPPORTED || 187 mae->status == SFC_MAE_STATUS_ADMIN) { 188 dev_info->switch_info.name = dev->device->driver->name; 189 dev_info->switch_info.domain_id = mae->switch_domain_id; 190 dev_info->switch_info.port_id = mae->switch_port_id; 191 } 192 193 return 0; 194 } 195 196 static const uint32_t * 197 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) 198 { 199 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 200 201 return sap->dp_rx->supported_ptypes_get(sap->shared->tunnel_encaps); 202 } 203 204 static int 205 sfc_dev_configure(struct rte_eth_dev *dev) 206 { 207 struct rte_eth_dev_data *dev_data = dev->data; 208 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 209 int rc; 210 211 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u", 212 dev_data->nb_rx_queues, dev_data->nb_tx_queues); 213 214 sfc_adapter_lock(sa); 215 switch (sa->state) { 216 case SFC_ETHDEV_CONFIGURED: 217 /* FALLTHROUGH */ 218 case SFC_ETHDEV_INITIALIZED: 219 rc = sfc_configure(sa); 220 break; 221 default: 222 sfc_err(sa, "unexpected adapter state %u to configure", 223 sa->state); 224 rc = EINVAL; 225 break; 226 } 227 sfc_adapter_unlock(sa); 228 229 sfc_log_init(sa, "done %d", rc); 230 SFC_ASSERT(rc >= 0); 231 return -rc; 232 } 233 234 static int 235 sfc_dev_start(struct rte_eth_dev *dev) 236 { 237 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 238 int rc; 239 240 sfc_log_init(sa, "entry"); 241 242 sfc_adapter_lock(sa); 243 rc = sfc_start(sa); 244 sfc_adapter_unlock(sa); 245 246 sfc_log_init(sa, "done %d", rc); 247 SFC_ASSERT(rc >= 0); 248 return -rc; 249 } 250 251 static void 252 sfc_dev_get_rte_link(struct rte_eth_dev *dev, int wait_to_complete, 253 struct rte_eth_link *link) 254 { 255 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 256 257 SFC_ASSERT(link != NULL); 258 259 if (sa->state != SFC_ETHDEV_STARTED) { 260 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, link); 261 } else if (wait_to_complete) { 262 efx_link_mode_t link_mode; 263 264 if (efx_port_poll(sa->nic, &link_mode) != 0) 265 link_mode = EFX_LINK_UNKNOWN; 266 sfc_port_link_mode_to_info(link_mode, link); 267 } else { 268 sfc_ev_mgmt_qpoll(sa); 269 rte_eth_linkstatus_get(dev, link); 270 } 271 } 272 273 static int 274 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 275 { 276 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 277 struct rte_eth_link current_link; 278 int ret; 279 280 sfc_log_init(sa, "entry"); 281 282 sfc_dev_get_rte_link(dev, wait_to_complete, ¤t_link); 283 284 ret = rte_eth_linkstatus_set(dev, ¤t_link); 285 if (ret == 0) 286 sfc_notice(sa, "Link status is %s", 287 current_link.link_status ? "UP" : "DOWN"); 288 289 return ret; 290 } 291 292 static int 293 sfc_dev_stop(struct rte_eth_dev *dev) 294 { 295 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 296 297 sfc_log_init(sa, "entry"); 298 299 sfc_adapter_lock(sa); 300 sfc_stop(sa); 301 sfc_adapter_unlock(sa); 302 303 sfc_log_init(sa, "done"); 304 305 return 0; 306 } 307 308 static int 309 sfc_dev_set_link_up(struct rte_eth_dev *dev) 310 { 311 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 312 int rc; 313 314 sfc_log_init(sa, "entry"); 315 316 sfc_adapter_lock(sa); 317 rc = sfc_start(sa); 318 sfc_adapter_unlock(sa); 319 320 SFC_ASSERT(rc >= 0); 321 return -rc; 322 } 323 324 static int 325 sfc_dev_set_link_down(struct rte_eth_dev *dev) 326 { 327 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 328 329 sfc_log_init(sa, "entry"); 330 331 sfc_adapter_lock(sa); 332 sfc_stop(sa); 333 sfc_adapter_unlock(sa); 334 335 return 0; 336 } 337 338 static void 339 sfc_eth_dev_secondary_clear_ops(struct rte_eth_dev *dev) 340 { 341 free(dev->process_private); 342 rte_eth_dev_release_port(dev); 343 } 344 345 static int 346 sfc_dev_close(struct rte_eth_dev *dev) 347 { 348 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 349 350 sfc_log_init(sa, "entry"); 351 352 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 353 sfc_eth_dev_secondary_clear_ops(dev); 354 return 0; 355 } 356 357 sfc_pre_detach(sa); 358 359 sfc_adapter_lock(sa); 360 switch (sa->state) { 361 case SFC_ETHDEV_STARTED: 362 sfc_stop(sa); 363 SFC_ASSERT(sa->state == SFC_ETHDEV_CONFIGURED); 364 /* FALLTHROUGH */ 365 case SFC_ETHDEV_CONFIGURED: 366 sfc_close(sa); 367 SFC_ASSERT(sa->state == SFC_ETHDEV_INITIALIZED); 368 /* FALLTHROUGH */ 369 case SFC_ETHDEV_INITIALIZED: 370 break; 371 default: 372 sfc_err(sa, "unexpected adapter state %u on close", sa->state); 373 break; 374 } 375 376 /* 377 * Cleanup all resources. 378 * Rollback primary process sfc_eth_dev_init() below. 379 */ 380 381 sfc_eth_dev_clear_ops(dev); 382 383 sfc_nic_dma_detach(sa); 384 sfc_detach(sa); 385 sfc_unprobe(sa); 386 387 sfc_kvargs_cleanup(sa); 388 389 sfc_adapter_unlock(sa); 390 sfc_adapter_lock_fini(sa); 391 392 sfc_log_init(sa, "done"); 393 394 /* Required for logging, so cleanup last */ 395 sa->eth_dev = NULL; 396 397 free(sa); 398 399 return 0; 400 } 401 402 static int 403 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode, 404 boolean_t enabled) 405 { 406 struct sfc_port *port; 407 boolean_t *toggle; 408 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 409 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI); 410 const char *desc = (allmulti) ? "all-multi" : "promiscuous"; 411 int rc = 0; 412 413 sfc_adapter_lock(sa); 414 415 port = &sa->port; 416 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc); 417 418 if (*toggle != enabled) { 419 *toggle = enabled; 420 421 if (sfc_sa2shared(sa)->isolated) { 422 sfc_warn(sa, "isolated mode is active on the port"); 423 sfc_warn(sa, "the change is to be applied on the next " 424 "start provided that isolated mode is " 425 "disabled prior the next start"); 426 } else if ((sa->state == SFC_ETHDEV_STARTED) && 427 ((rc = sfc_set_rx_mode(sa)) != 0)) { 428 *toggle = !(enabled); 429 sfc_warn(sa, "Failed to %s %s mode, rc = %d", 430 ((enabled) ? "enable" : "disable"), desc, rc); 431 432 /* 433 * For promiscuous and all-multicast filters a 434 * permission failure should be reported as an 435 * unsupported filter. 436 */ 437 if (rc == EPERM) 438 rc = ENOTSUP; 439 } 440 } 441 442 sfc_adapter_unlock(sa); 443 return rc; 444 } 445 446 static int 447 sfc_dev_promisc_enable(struct rte_eth_dev *dev) 448 { 449 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE); 450 451 SFC_ASSERT(rc >= 0); 452 return -rc; 453 } 454 455 static int 456 sfc_dev_promisc_disable(struct rte_eth_dev *dev) 457 { 458 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE); 459 460 SFC_ASSERT(rc >= 0); 461 return -rc; 462 } 463 464 static int 465 sfc_dev_allmulti_enable(struct rte_eth_dev *dev) 466 { 467 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE); 468 469 SFC_ASSERT(rc >= 0); 470 return -rc; 471 } 472 473 static int 474 sfc_dev_allmulti_disable(struct rte_eth_dev *dev) 475 { 476 int rc = sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE); 477 478 SFC_ASSERT(rc >= 0); 479 return -rc; 480 } 481 482 static int 483 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t ethdev_qid, 484 uint16_t nb_rx_desc, unsigned int socket_id, 485 const struct rte_eth_rxconf *rx_conf, 486 struct rte_mempool *mb_pool) 487 { 488 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 489 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 490 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 491 struct sfc_rxq_info *rxq_info; 492 sfc_sw_index_t sw_index; 493 int rc; 494 495 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u", 496 ethdev_qid, nb_rx_desc, socket_id); 497 498 sfc_adapter_lock(sa); 499 500 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 501 rc = sfc_rx_qinit(sa, sw_index, nb_rx_desc, socket_id, 502 rx_conf, mb_pool); 503 if (rc != 0) 504 goto fail_rx_qinit; 505 506 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 507 dev->data->rx_queues[ethdev_qid] = rxq_info->dp; 508 509 sfc_adapter_unlock(sa); 510 511 return 0; 512 513 fail_rx_qinit: 514 sfc_adapter_unlock(sa); 515 SFC_ASSERT(rc > 0); 516 return -rc; 517 } 518 519 static void 520 sfc_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 521 { 522 struct sfc_dp_rxq *dp_rxq = dev->data->rx_queues[qid]; 523 struct sfc_rxq *rxq; 524 struct sfc_adapter *sa; 525 sfc_sw_index_t sw_index; 526 527 if (dp_rxq == NULL) 528 return; 529 530 rxq = sfc_rxq_by_dp_rxq(dp_rxq); 531 sa = rxq->evq->sa; 532 sfc_adapter_lock(sa); 533 534 sw_index = dp_rxq->dpq.queue_id; 535 536 sfc_log_init(sa, "RxQ=%u", sw_index); 537 538 sfc_rx_qfini(sa, sw_index); 539 540 sfc_adapter_unlock(sa); 541 } 542 543 static int 544 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t ethdev_qid, 545 uint16_t nb_tx_desc, unsigned int socket_id, 546 const struct rte_eth_txconf *tx_conf) 547 { 548 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 549 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 550 struct sfc_txq_info *txq_info; 551 sfc_sw_index_t sw_index; 552 int rc; 553 554 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u", 555 ethdev_qid, nb_tx_desc, socket_id); 556 557 sfc_adapter_lock(sa); 558 559 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 560 rc = sfc_tx_qinit(sa, sw_index, nb_tx_desc, socket_id, tx_conf); 561 if (rc != 0) 562 goto fail_tx_qinit; 563 564 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 565 dev->data->tx_queues[ethdev_qid] = txq_info->dp; 566 567 sfc_adapter_unlock(sa); 568 return 0; 569 570 fail_tx_qinit: 571 sfc_adapter_unlock(sa); 572 SFC_ASSERT(rc > 0); 573 return -rc; 574 } 575 576 static void 577 sfc_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 578 { 579 struct sfc_dp_txq *dp_txq = dev->data->tx_queues[qid]; 580 struct sfc_txq *txq; 581 sfc_sw_index_t sw_index; 582 struct sfc_adapter *sa; 583 584 if (dp_txq == NULL) 585 return; 586 587 txq = sfc_txq_by_dp_txq(dp_txq); 588 sw_index = dp_txq->dpq.queue_id; 589 590 SFC_ASSERT(txq->evq != NULL); 591 sa = txq->evq->sa; 592 593 sfc_log_init(sa, "TxQ = %u", sw_index); 594 595 sfc_adapter_lock(sa); 596 597 sfc_tx_qfini(sa, sw_index); 598 599 sfc_adapter_unlock(sa); 600 } 601 602 static void 603 sfc_stats_get_dp_rx(struct sfc_adapter *sa, uint64_t *pkts, uint64_t *bytes) 604 { 605 struct sfc_adapter_shared *sas = sfc_sa2shared(sa); 606 uint64_t pkts_sum = 0; 607 uint64_t bytes_sum = 0; 608 unsigned int i; 609 610 for (i = 0; i < sas->ethdev_rxq_count; ++i) { 611 struct sfc_rxq_info *rxq_info; 612 613 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, i); 614 if (rxq_info->state & SFC_RXQ_INITIALIZED) { 615 union sfc_pkts_bytes qstats; 616 617 sfc_pkts_bytes_get(&rxq_info->dp->dpq.stats, &qstats); 618 pkts_sum += qstats.pkts - 619 sa->sw_stats.reset_rx_pkts[i]; 620 bytes_sum += qstats.bytes - 621 sa->sw_stats.reset_rx_bytes[i]; 622 } 623 } 624 625 *pkts = pkts_sum; 626 *bytes = bytes_sum; 627 } 628 629 static void 630 sfc_stats_get_dp_tx(struct sfc_adapter *sa, uint64_t *pkts, uint64_t *bytes) 631 { 632 struct sfc_adapter_shared *sas = sfc_sa2shared(sa); 633 uint64_t pkts_sum = 0; 634 uint64_t bytes_sum = 0; 635 unsigned int i; 636 637 for (i = 0; i < sas->ethdev_txq_count; ++i) { 638 struct sfc_txq_info *txq_info; 639 640 txq_info = sfc_txq_info_by_ethdev_qid(sas, i); 641 if (txq_info->state & SFC_TXQ_INITIALIZED) { 642 union sfc_pkts_bytes qstats; 643 644 sfc_pkts_bytes_get(&txq_info->dp->dpq.stats, &qstats); 645 pkts_sum += qstats.pkts - 646 sa->sw_stats.reset_tx_pkts[i]; 647 bytes_sum += qstats.bytes - 648 sa->sw_stats.reset_tx_bytes[i]; 649 } 650 } 651 652 *pkts = pkts_sum; 653 *bytes = bytes_sum; 654 } 655 656 /* 657 * Some statistics are computed as A - B where A and B each increase 658 * monotonically with some hardware counter(s) and the counters are read 659 * asynchronously. 660 * 661 * If packet X is counted in A, but not counted in B yet, computed value is 662 * greater than real. 663 * 664 * If packet X is not counted in A at the moment of reading the counter, 665 * but counted in B at the moment of reading the counter, computed value 666 * is less than real. 667 * 668 * However, counter which grows backward is worse evil than slightly wrong 669 * value. So, let's try to guarantee that it never happens except may be 670 * the case when the MAC stats are zeroed as a result of a NIC reset. 671 */ 672 static void 673 sfc_update_diff_stat(uint64_t *stat, uint64_t newval) 674 { 675 if ((int64_t)(newval - *stat) > 0 || newval == 0) 676 *stat = newval; 677 } 678 679 static int 680 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 681 { 682 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 683 bool have_dp_rx_stats = sap->dp_rx->features & SFC_DP_RX_FEAT_STATS; 684 bool have_dp_tx_stats = sap->dp_tx->features & SFC_DP_TX_FEAT_STATS; 685 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 686 struct sfc_port *port = &sa->port; 687 uint64_t *mac_stats; 688 int ret; 689 690 sfc_adapter_lock(sa); 691 692 if (have_dp_rx_stats) 693 sfc_stats_get_dp_rx(sa, &stats->ipackets, &stats->ibytes); 694 if (have_dp_tx_stats) 695 sfc_stats_get_dp_tx(sa, &stats->opackets, &stats->obytes); 696 697 ret = sfc_port_update_mac_stats(sa, B_FALSE); 698 if (ret != 0) 699 goto unlock; 700 701 mac_stats = port->mac_stats_buf; 702 703 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, 704 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) { 705 if (!have_dp_rx_stats) { 706 stats->ipackets = 707 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] + 708 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] + 709 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]; 710 stats->ibytes = 711 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] + 712 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] + 713 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]; 714 715 /* CRC is included in these stats, but shouldn't be */ 716 stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN; 717 } 718 if (!have_dp_tx_stats) { 719 stats->opackets = 720 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] + 721 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] + 722 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]; 723 stats->obytes = 724 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] + 725 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] + 726 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; 727 728 /* CRC is included in these stats, but shouldn't be */ 729 stats->obytes -= stats->opackets * RTE_ETHER_CRC_LEN; 730 } 731 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; 732 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; 733 } else { 734 if (!have_dp_tx_stats) { 735 stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; 736 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS] - 737 mac_stats[EFX_MAC_TX_PKTS] * RTE_ETHER_CRC_LEN; 738 } 739 740 /* 741 * Take into account stats which are whenever supported 742 * on EF10. If some stat is not supported by current 743 * firmware variant or HW revision, it is guaranteed 744 * to be zero in mac_stats. 745 */ 746 stats->imissed = 747 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] + 748 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] + 749 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] + 750 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] + 751 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] + 752 mac_stats[EFX_MAC_PM_TRUNC_QBB] + 753 mac_stats[EFX_MAC_PM_DISCARD_QBB] + 754 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] + 755 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] + 756 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS]; 757 stats->ierrors = 758 mac_stats[EFX_MAC_RX_FCS_ERRORS] + 759 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] + 760 mac_stats[EFX_MAC_RX_JABBER_PKTS]; 761 /* no oerrors counters supported on EF10 */ 762 763 if (!have_dp_rx_stats) { 764 /* Exclude missed, errors and pauses from Rx packets */ 765 sfc_update_diff_stat(&port->ipackets, 766 mac_stats[EFX_MAC_RX_PKTS] - 767 mac_stats[EFX_MAC_RX_PAUSE_PKTS] - 768 stats->imissed - stats->ierrors); 769 stats->ipackets = port->ipackets; 770 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS] - 771 mac_stats[EFX_MAC_RX_PKTS] * RTE_ETHER_CRC_LEN; 772 } 773 } 774 775 unlock: 776 sfc_adapter_unlock(sa); 777 SFC_ASSERT(ret >= 0); 778 return -ret; 779 } 780 781 static int 782 sfc_stats_reset(struct rte_eth_dev *dev) 783 { 784 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 785 struct sfc_port *port = &sa->port; 786 int rc; 787 788 sfc_adapter_lock(sa); 789 790 if (sa->state != SFC_ETHDEV_STARTED) { 791 /* 792 * The operation cannot be done if port is not started; it 793 * will be scheduled to be done during the next port start 794 */ 795 port->mac_stats_reset_pending = B_TRUE; 796 sfc_adapter_unlock(sa); 797 return 0; 798 } 799 800 rc = sfc_port_reset_mac_stats(sa); 801 if (rc != 0) 802 sfc_err(sa, "failed to reset statistics (rc = %d)", rc); 803 804 sfc_sw_xstats_reset(sa); 805 806 sfc_adapter_unlock(sa); 807 808 SFC_ASSERT(rc >= 0); 809 return -rc; 810 } 811 812 static unsigned int 813 sfc_xstats_get_nb_supported(struct sfc_adapter *sa) 814 { 815 struct sfc_port *port = &sa->port; 816 unsigned int nb_supported; 817 818 sfc_adapter_lock(sa); 819 nb_supported = port->mac_stats_nb_supported + 820 sfc_sw_xstats_get_nb_supported(sa); 821 sfc_adapter_unlock(sa); 822 823 return nb_supported; 824 } 825 826 static int 827 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 828 unsigned int xstats_count) 829 { 830 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 831 unsigned int nb_written = 0; 832 unsigned int nb_supported = 0; 833 int rc; 834 835 if (unlikely(xstats == NULL)) 836 return sfc_xstats_get_nb_supported(sa); 837 838 rc = sfc_port_get_mac_stats(sa, xstats, xstats_count, &nb_written); 839 if (rc < 0) 840 return rc; 841 842 nb_supported = rc; 843 sfc_sw_xstats_get_vals(sa, xstats, xstats_count, &nb_written, 844 &nb_supported); 845 846 return nb_supported; 847 } 848 849 static int 850 sfc_xstats_get_names(struct rte_eth_dev *dev, 851 struct rte_eth_xstat_name *xstats_names, 852 unsigned int xstats_count) 853 { 854 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 855 struct sfc_port *port = &sa->port; 856 unsigned int i; 857 unsigned int nstats = 0; 858 unsigned int nb_written = 0; 859 int ret; 860 861 if (unlikely(xstats_names == NULL)) 862 return sfc_xstats_get_nb_supported(sa); 863 864 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 865 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 866 if (nstats < xstats_count) { 867 strlcpy(xstats_names[nstats].name, 868 efx_mac_stat_name(sa->nic, i), 869 sizeof(xstats_names[0].name)); 870 nb_written++; 871 } 872 nstats++; 873 } 874 } 875 876 ret = sfc_sw_xstats_get_names(sa, xstats_names, xstats_count, 877 &nb_written, &nstats); 878 if (ret != 0) { 879 SFC_ASSERT(ret < 0); 880 return ret; 881 } 882 883 return nstats; 884 } 885 886 static int 887 sfc_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 888 uint64_t *values, unsigned int n) 889 { 890 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 891 struct sfc_port *port = &sa->port; 892 unsigned int nb_supported; 893 unsigned int i; 894 int rc; 895 896 if (unlikely(ids == NULL || values == NULL)) 897 return -EINVAL; 898 899 /* 900 * Values array could be filled in nonsequential order. Fill values with 901 * constant indicating invalid ID first. 902 */ 903 for (i = 0; i < n; i++) 904 values[i] = SFC_XSTAT_ID_INVALID_VAL; 905 906 rc = sfc_port_get_mac_stats_by_id(sa, ids, values, n); 907 if (rc != 0) 908 return rc; 909 910 nb_supported = port->mac_stats_nb_supported; 911 sfc_sw_xstats_get_vals_by_id(sa, ids, values, n, &nb_supported); 912 913 /* Return number of written stats before invalid ID is encountered. */ 914 for (i = 0; i < n; i++) { 915 if (values[i] == SFC_XSTAT_ID_INVALID_VAL) 916 return i; 917 } 918 919 return n; 920 } 921 922 static int 923 sfc_xstats_get_names_by_id(struct rte_eth_dev *dev, 924 const uint64_t *ids, 925 struct rte_eth_xstat_name *xstats_names, 926 unsigned int size) 927 { 928 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 929 struct sfc_port *port = &sa->port; 930 unsigned int nb_supported; 931 unsigned int i; 932 int ret; 933 934 if (unlikely(xstats_names == NULL && ids != NULL) || 935 unlikely(xstats_names != NULL && ids == NULL)) 936 return -EINVAL; 937 938 if (unlikely(xstats_names == NULL && ids == NULL)) 939 return sfc_xstats_get_nb_supported(sa); 940 941 /* 942 * Names array could be filled in nonsequential order. Fill names with 943 * string indicating invalid ID first. 944 */ 945 for (i = 0; i < size; i++) 946 xstats_names[i].name[0] = SFC_XSTAT_ID_INVALID_NAME; 947 948 sfc_adapter_lock(sa); 949 950 SFC_ASSERT(port->mac_stats_nb_supported <= 951 RTE_DIM(port->mac_stats_by_id)); 952 953 for (i = 0; i < size; i++) { 954 if (ids[i] < port->mac_stats_nb_supported) { 955 strlcpy(xstats_names[i].name, 956 efx_mac_stat_name(sa->nic, 957 port->mac_stats_by_id[ids[i]]), 958 sizeof(xstats_names[0].name)); 959 } 960 } 961 962 nb_supported = port->mac_stats_nb_supported; 963 964 sfc_adapter_unlock(sa); 965 966 ret = sfc_sw_xstats_get_names_by_id(sa, ids, xstats_names, size, 967 &nb_supported); 968 if (ret != 0) { 969 SFC_ASSERT(ret < 0); 970 return ret; 971 } 972 973 /* Return number of written names before invalid ID is encountered. */ 974 for (i = 0; i < size; i++) { 975 if (xstats_names[i].name[0] == SFC_XSTAT_ID_INVALID_NAME) 976 return i; 977 } 978 979 return size; 980 } 981 982 static int 983 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 984 { 985 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 986 unsigned int wanted_fc, link_fc; 987 988 memset(fc_conf, 0, sizeof(*fc_conf)); 989 990 sfc_adapter_lock(sa); 991 992 if (sa->state == SFC_ETHDEV_STARTED) 993 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc); 994 else 995 link_fc = sa->port.flow_ctrl; 996 997 switch (link_fc) { 998 case 0: 999 fc_conf->mode = RTE_ETH_FC_NONE; 1000 break; 1001 case EFX_FCNTL_RESPOND: 1002 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; 1003 break; 1004 case EFX_FCNTL_GENERATE: 1005 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; 1006 break; 1007 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE): 1008 fc_conf->mode = RTE_ETH_FC_FULL; 1009 break; 1010 default: 1011 sfc_err(sa, "%s: unexpected flow control value %#x", 1012 __func__, link_fc); 1013 } 1014 1015 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; 1016 1017 sfc_adapter_unlock(sa); 1018 1019 return 0; 1020 } 1021 1022 static int 1023 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1024 { 1025 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1026 struct sfc_port *port = &sa->port; 1027 unsigned int fcntl; 1028 int rc; 1029 1030 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || 1031 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || 1032 fc_conf->mac_ctrl_frame_fwd != 0) { 1033 sfc_err(sa, "unsupported flow control settings specified"); 1034 rc = EINVAL; 1035 goto fail_inval; 1036 } 1037 1038 switch (fc_conf->mode) { 1039 case RTE_ETH_FC_NONE: 1040 fcntl = 0; 1041 break; 1042 case RTE_ETH_FC_RX_PAUSE: 1043 fcntl = EFX_FCNTL_RESPOND; 1044 break; 1045 case RTE_ETH_FC_TX_PAUSE: 1046 fcntl = EFX_FCNTL_GENERATE; 1047 break; 1048 case RTE_ETH_FC_FULL: 1049 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 1050 break; 1051 default: 1052 rc = EINVAL; 1053 goto fail_inval; 1054 } 1055 1056 sfc_adapter_lock(sa); 1057 1058 if (sa->state == SFC_ETHDEV_STARTED) { 1059 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg); 1060 if (rc != 0) 1061 goto fail_mac_fcntl_set; 1062 } 1063 1064 port->flow_ctrl = fcntl; 1065 port->flow_ctrl_autoneg = fc_conf->autoneg; 1066 1067 sfc_adapter_unlock(sa); 1068 1069 return 0; 1070 1071 fail_mac_fcntl_set: 1072 sfc_adapter_unlock(sa); 1073 fail_inval: 1074 SFC_ASSERT(rc > 0); 1075 return -rc; 1076 } 1077 1078 static int 1079 sfc_check_scatter_on_all_rx_queues(struct sfc_adapter *sa, size_t pdu) 1080 { 1081 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa); 1082 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 1083 boolean_t scatter_enabled; 1084 const char *error; 1085 unsigned int i; 1086 1087 for (i = 0; i < sas->rxq_count; i++) { 1088 if ((sas->rxq_info[i].state & SFC_RXQ_INITIALIZED) == 0) 1089 continue; 1090 1091 scatter_enabled = (sas->rxq_info[i].type_flags & 1092 EFX_RXQ_FLAG_SCATTER); 1093 1094 if (!sfc_rx_check_scatter(pdu, sa->rxq_ctrl[i].buf_size, 1095 encp->enc_rx_prefix_size, 1096 scatter_enabled, 1097 encp->enc_rx_scatter_max, &error)) { 1098 sfc_err(sa, "MTU check for RxQ %u failed: %s", i, 1099 error); 1100 return EINVAL; 1101 } 1102 } 1103 1104 return 0; 1105 } 1106 1107 static int 1108 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 1109 { 1110 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1111 size_t pdu = EFX_MAC_PDU(mtu); 1112 size_t old_pdu; 1113 int rc; 1114 1115 sfc_log_init(sa, "mtu=%u", mtu); 1116 1117 rc = EINVAL; 1118 if (pdu < EFX_MAC_PDU_MIN) { 1119 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)", 1120 (unsigned int)mtu, (unsigned int)pdu, 1121 EFX_MAC_PDU_MIN); 1122 goto fail_inval; 1123 } 1124 if (pdu > EFX_MAC_PDU_MAX) { 1125 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)", 1126 (unsigned int)mtu, (unsigned int)pdu, 1127 (unsigned int)EFX_MAC_PDU_MAX); 1128 goto fail_inval; 1129 } 1130 1131 sfc_adapter_lock(sa); 1132 1133 rc = sfc_check_scatter_on_all_rx_queues(sa, pdu); 1134 if (rc != 0) 1135 goto fail_check_scatter; 1136 1137 if (pdu != sa->port.pdu) { 1138 if (sa->state == SFC_ETHDEV_STARTED) { 1139 sfc_stop(sa); 1140 1141 old_pdu = sa->port.pdu; 1142 sa->port.pdu = pdu; 1143 rc = sfc_start(sa); 1144 if (rc != 0) 1145 goto fail_start; 1146 } else { 1147 sa->port.pdu = pdu; 1148 } 1149 } 1150 1151 sfc_adapter_unlock(sa); 1152 1153 sfc_log_init(sa, "done"); 1154 return 0; 1155 1156 fail_start: 1157 sa->port.pdu = old_pdu; 1158 if (sfc_start(sa) != 0) 1159 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) " 1160 "PDU max size - port is stopped", 1161 (unsigned int)pdu, (unsigned int)old_pdu); 1162 1163 fail_check_scatter: 1164 sfc_adapter_unlock(sa); 1165 1166 fail_inval: 1167 sfc_log_init(sa, "failed %d", rc); 1168 SFC_ASSERT(rc > 0); 1169 return -rc; 1170 } 1171 static int 1172 sfc_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr) 1173 { 1174 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1175 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 1176 struct sfc_port *port = &sa->port; 1177 struct rte_ether_addr *old_addr = &dev->data->mac_addrs[0]; 1178 int rc = 0; 1179 1180 sfc_adapter_lock(sa); 1181 1182 if (rte_is_same_ether_addr(mac_addr, &port->default_mac_addr)) 1183 goto unlock; 1184 1185 /* 1186 * Copy the address to the device private data so that 1187 * it could be recalled in the case of adapter restart. 1188 */ 1189 rte_ether_addr_copy(mac_addr, &port->default_mac_addr); 1190 1191 /* 1192 * Neither of the two following checks can return 1193 * an error. The new MAC address is preserved in 1194 * the device private data and can be activated 1195 * on the next port start if the user prevents 1196 * isolated mode from being enabled. 1197 */ 1198 if (sfc_sa2shared(sa)->isolated) { 1199 sfc_warn(sa, "isolated mode is active on the port"); 1200 sfc_warn(sa, "will not set MAC address"); 1201 goto unlock; 1202 } 1203 1204 if (sa->state != SFC_ETHDEV_STARTED) { 1205 sfc_notice(sa, "the port is not started"); 1206 sfc_notice(sa, "the new MAC address will be set on port start"); 1207 1208 goto unlock; 1209 } 1210 1211 if (encp->enc_allow_set_mac_with_installed_filters) { 1212 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes); 1213 if (rc != 0) { 1214 sfc_err(sa, "cannot set MAC address (rc = %u)", rc); 1215 goto unlock; 1216 } 1217 1218 /* 1219 * Changing the MAC address by means of MCDI request 1220 * has no effect on received traffic, therefore 1221 * we also need to update unicast filters 1222 */ 1223 rc = sfc_set_rx_mode_unchecked(sa); 1224 if (rc != 0) { 1225 sfc_err(sa, "cannot set filter (rc = %u)", rc); 1226 /* Rollback the old address */ 1227 (void)efx_mac_addr_set(sa->nic, old_addr->addr_bytes); 1228 (void)sfc_set_rx_mode_unchecked(sa); 1229 } 1230 } else { 1231 sfc_warn(sa, "cannot set MAC address with filters installed"); 1232 sfc_warn(sa, "adapter will be restarted to pick the new MAC"); 1233 sfc_warn(sa, "(some traffic may be dropped)"); 1234 1235 /* 1236 * Since setting MAC address with filters installed is not 1237 * allowed on the adapter, the new MAC address will be set 1238 * by means of adapter restart. sfc_start() shall retrieve 1239 * the new address from the device private data and set it. 1240 */ 1241 sfc_stop(sa); 1242 rc = sfc_start(sa); 1243 if (rc != 0) 1244 sfc_err(sa, "cannot restart adapter (rc = %u)", rc); 1245 } 1246 1247 unlock: 1248 if (rc != 0) 1249 rte_ether_addr_copy(old_addr, &port->default_mac_addr); 1250 1251 sfc_adapter_unlock(sa); 1252 1253 SFC_ASSERT(rc >= 0); 1254 return -rc; 1255 } 1256 1257 1258 static int 1259 sfc_set_mc_addr_list(struct rte_eth_dev *dev, 1260 struct rte_ether_addr *mc_addr_set, uint32_t nb_mc_addr) 1261 { 1262 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1263 struct sfc_port *port = &sa->port; 1264 uint8_t *mc_addrs = port->mcast_addrs; 1265 int rc; 1266 unsigned int i; 1267 1268 if (sfc_sa2shared(sa)->isolated) { 1269 sfc_err(sa, "isolated mode is active on the port"); 1270 sfc_err(sa, "will not set multicast address list"); 1271 return -ENOTSUP; 1272 } 1273 1274 if (mc_addrs == NULL) 1275 return -ENOBUFS; 1276 1277 if (nb_mc_addr > port->max_mcast_addrs) { 1278 sfc_err(sa, "too many multicast addresses: %u > %u", 1279 nb_mc_addr, port->max_mcast_addrs); 1280 return -EINVAL; 1281 } 1282 1283 for (i = 0; i < nb_mc_addr; ++i) { 1284 rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, 1285 EFX_MAC_ADDR_LEN); 1286 mc_addrs += EFX_MAC_ADDR_LEN; 1287 } 1288 1289 port->nb_mcast_addrs = nb_mc_addr; 1290 1291 if (sa->state != SFC_ETHDEV_STARTED) 1292 return 0; 1293 1294 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, 1295 port->nb_mcast_addrs); 1296 if (rc != 0) 1297 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); 1298 1299 SFC_ASSERT(rc >= 0); 1300 return -rc; 1301 } 1302 1303 /* 1304 * The function is used by the secondary process as well. It must not 1305 * use any process-local pointers from the adapter data. 1306 */ 1307 static void 1308 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t ethdev_qid, 1309 struct rte_eth_rxq_info *qinfo) 1310 { 1311 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1312 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1313 struct sfc_rxq_info *rxq_info; 1314 1315 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1316 1317 qinfo->mp = rxq_info->refill_mb_pool; 1318 qinfo->conf.rx_free_thresh = rxq_info->refill_threshold; 1319 qinfo->conf.rx_drop_en = 1; 1320 qinfo->conf.rx_deferred_start = rxq_info->deferred_start; 1321 qinfo->conf.offloads = dev->data->dev_conf.rxmode.offloads; 1322 if (rxq_info->type_flags & EFX_RXQ_FLAG_SCATTER) { 1323 qinfo->conf.offloads |= RTE_ETH_RX_OFFLOAD_SCATTER; 1324 qinfo->scattered_rx = 1; 1325 } 1326 qinfo->nb_desc = rxq_info->entries; 1327 } 1328 1329 /* 1330 * The function is used by the secondary process as well. It must not 1331 * use any process-local pointers from the adapter data. 1332 */ 1333 static void 1334 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t ethdev_qid, 1335 struct rte_eth_txq_info *qinfo) 1336 { 1337 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1338 struct sfc_txq_info *txq_info; 1339 1340 SFC_ASSERT(ethdev_qid < sas->ethdev_txq_count); 1341 1342 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1343 1344 memset(qinfo, 0, sizeof(*qinfo)); 1345 1346 qinfo->conf.offloads = txq_info->offloads; 1347 qinfo->conf.tx_free_thresh = txq_info->free_thresh; 1348 qinfo->conf.tx_deferred_start = txq_info->deferred_start; 1349 qinfo->nb_desc = txq_info->entries; 1350 } 1351 1352 /* 1353 * The function is used by the secondary process as well. It must not 1354 * use any process-local pointers from the adapter data. 1355 */ 1356 static uint32_t 1357 sfc_rx_queue_count(void *rx_queue) 1358 { 1359 struct sfc_dp_rxq *dp_rxq = rx_queue; 1360 const struct sfc_dp_rx *dp_rx; 1361 struct sfc_rxq_info *rxq_info; 1362 1363 dp_rx = sfc_dp_rx_by_dp_rxq(dp_rxq); 1364 rxq_info = sfc_rxq_info_by_dp_rxq(dp_rxq); 1365 1366 if ((rxq_info->state & SFC_RXQ_STARTED) == 0) 1367 return 0; 1368 1369 return dp_rx->qdesc_npending(dp_rxq); 1370 } 1371 1372 /* 1373 * The function is used by the secondary process as well. It must not 1374 * use any process-local pointers from the adapter data. 1375 */ 1376 static int 1377 sfc_rx_descriptor_status(void *queue, uint16_t offset) 1378 { 1379 struct sfc_dp_rxq *dp_rxq = queue; 1380 const struct sfc_dp_rx *dp_rx; 1381 1382 dp_rx = sfc_dp_rx_by_dp_rxq(dp_rxq); 1383 1384 return dp_rx->qdesc_status(dp_rxq, offset); 1385 } 1386 1387 /* 1388 * The function is used by the secondary process as well. It must not 1389 * use any process-local pointers from the adapter data. 1390 */ 1391 static int 1392 sfc_tx_descriptor_status(void *queue, uint16_t offset) 1393 { 1394 struct sfc_dp_txq *dp_txq = queue; 1395 const struct sfc_dp_tx *dp_tx; 1396 1397 dp_tx = sfc_dp_tx_by_dp_txq(dp_txq); 1398 1399 return dp_tx->qdesc_status(dp_txq, offset); 1400 } 1401 1402 static int 1403 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1404 { 1405 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1406 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1407 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1408 struct sfc_rxq_info *rxq_info; 1409 sfc_sw_index_t sw_index; 1410 int rc; 1411 1412 sfc_log_init(sa, "RxQ=%u", ethdev_qid); 1413 1414 sfc_adapter_lock(sa); 1415 1416 rc = EINVAL; 1417 if (sa->state != SFC_ETHDEV_STARTED) 1418 goto fail_not_started; 1419 1420 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1421 if (rxq_info->state != SFC_RXQ_INITIALIZED) 1422 goto fail_not_setup; 1423 1424 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 1425 rc = sfc_rx_qstart(sa, sw_index); 1426 if (rc != 0) 1427 goto fail_rx_qstart; 1428 1429 rxq_info->deferred_started = B_TRUE; 1430 1431 sfc_adapter_unlock(sa); 1432 1433 return 0; 1434 1435 fail_rx_qstart: 1436 fail_not_setup: 1437 fail_not_started: 1438 sfc_adapter_unlock(sa); 1439 SFC_ASSERT(rc > 0); 1440 return -rc; 1441 } 1442 1443 static int 1444 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1445 { 1446 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1447 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1448 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1449 struct sfc_rxq_info *rxq_info; 1450 sfc_sw_index_t sw_index; 1451 1452 sfc_log_init(sa, "RxQ=%u", ethdev_qid); 1453 1454 sfc_adapter_lock(sa); 1455 1456 sw_index = sfc_rxq_sw_index_by_ethdev_rx_qid(sas, sfc_ethdev_qid); 1457 sfc_rx_qstop(sa, sw_index); 1458 1459 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1460 rxq_info->deferred_started = B_FALSE; 1461 1462 sfc_adapter_unlock(sa); 1463 1464 return 0; 1465 } 1466 1467 static int 1468 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1469 { 1470 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1471 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1472 struct sfc_txq_info *txq_info; 1473 sfc_sw_index_t sw_index; 1474 int rc; 1475 1476 sfc_log_init(sa, "TxQ = %u", ethdev_qid); 1477 1478 sfc_adapter_lock(sa); 1479 1480 rc = EINVAL; 1481 if (sa->state != SFC_ETHDEV_STARTED) 1482 goto fail_not_started; 1483 1484 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1485 if (txq_info->state != SFC_TXQ_INITIALIZED) 1486 goto fail_not_setup; 1487 1488 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 1489 rc = sfc_tx_qstart(sa, sw_index); 1490 if (rc != 0) 1491 goto fail_tx_qstart; 1492 1493 txq_info->deferred_started = B_TRUE; 1494 1495 sfc_adapter_unlock(sa); 1496 return 0; 1497 1498 fail_tx_qstart: 1499 1500 fail_not_setup: 1501 fail_not_started: 1502 sfc_adapter_unlock(sa); 1503 SFC_ASSERT(rc > 0); 1504 return -rc; 1505 } 1506 1507 static int 1508 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1509 { 1510 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1511 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1512 struct sfc_txq_info *txq_info; 1513 sfc_sw_index_t sw_index; 1514 1515 sfc_log_init(sa, "TxQ = %u", ethdev_qid); 1516 1517 sfc_adapter_lock(sa); 1518 1519 sw_index = sfc_txq_sw_index_by_ethdev_tx_qid(sas, ethdev_qid); 1520 sfc_tx_qstop(sa, sw_index); 1521 1522 txq_info = sfc_txq_info_by_ethdev_qid(sas, ethdev_qid); 1523 txq_info->deferred_started = B_FALSE; 1524 1525 sfc_adapter_unlock(sa); 1526 return 0; 1527 } 1528 1529 static efx_tunnel_protocol_t 1530 sfc_tunnel_rte_type_to_efx_udp_proto(enum rte_eth_tunnel_type rte_type) 1531 { 1532 switch (rte_type) { 1533 case RTE_ETH_TUNNEL_TYPE_VXLAN: 1534 return EFX_TUNNEL_PROTOCOL_VXLAN; 1535 case RTE_ETH_TUNNEL_TYPE_GENEVE: 1536 return EFX_TUNNEL_PROTOCOL_GENEVE; 1537 default: 1538 return EFX_TUNNEL_NPROTOS; 1539 } 1540 } 1541 1542 enum sfc_udp_tunnel_op_e { 1543 SFC_UDP_TUNNEL_ADD_PORT, 1544 SFC_UDP_TUNNEL_DEL_PORT, 1545 }; 1546 1547 static int 1548 sfc_dev_udp_tunnel_op(struct rte_eth_dev *dev, 1549 struct rte_eth_udp_tunnel *tunnel_udp, 1550 enum sfc_udp_tunnel_op_e op) 1551 { 1552 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1553 efx_tunnel_protocol_t tunnel_proto; 1554 int rc; 1555 1556 sfc_log_init(sa, "%s udp_port=%u prot_type=%u", 1557 (op == SFC_UDP_TUNNEL_ADD_PORT) ? "add" : 1558 (op == SFC_UDP_TUNNEL_DEL_PORT) ? "delete" : "unknown", 1559 tunnel_udp->udp_port, tunnel_udp->prot_type); 1560 1561 tunnel_proto = 1562 sfc_tunnel_rte_type_to_efx_udp_proto(tunnel_udp->prot_type); 1563 if (tunnel_proto >= EFX_TUNNEL_NPROTOS) { 1564 rc = ENOTSUP; 1565 goto fail_bad_proto; 1566 } 1567 1568 sfc_adapter_lock(sa); 1569 1570 switch (op) { 1571 case SFC_UDP_TUNNEL_ADD_PORT: 1572 rc = efx_tunnel_config_udp_add(sa->nic, 1573 tunnel_udp->udp_port, 1574 tunnel_proto); 1575 break; 1576 case SFC_UDP_TUNNEL_DEL_PORT: 1577 rc = efx_tunnel_config_udp_remove(sa->nic, 1578 tunnel_udp->udp_port, 1579 tunnel_proto); 1580 break; 1581 default: 1582 rc = EINVAL; 1583 goto fail_bad_op; 1584 } 1585 1586 if (rc != 0) 1587 goto fail_op; 1588 1589 if (sa->state == SFC_ETHDEV_STARTED) { 1590 rc = efx_tunnel_reconfigure(sa->nic); 1591 if (rc == EAGAIN) { 1592 /* 1593 * Configuration is accepted by FW and MC reboot 1594 * is initiated to apply the changes. MC reboot 1595 * will be handled in a usual way (MC reboot 1596 * event on management event queue and adapter 1597 * restart). 1598 */ 1599 rc = 0; 1600 } else if (rc != 0) { 1601 goto fail_reconfigure; 1602 } 1603 } 1604 1605 sfc_adapter_unlock(sa); 1606 return 0; 1607 1608 fail_reconfigure: 1609 /* Remove/restore entry since the change makes the trouble */ 1610 switch (op) { 1611 case SFC_UDP_TUNNEL_ADD_PORT: 1612 (void)efx_tunnel_config_udp_remove(sa->nic, 1613 tunnel_udp->udp_port, 1614 tunnel_proto); 1615 break; 1616 case SFC_UDP_TUNNEL_DEL_PORT: 1617 (void)efx_tunnel_config_udp_add(sa->nic, 1618 tunnel_udp->udp_port, 1619 tunnel_proto); 1620 break; 1621 } 1622 1623 fail_op: 1624 fail_bad_op: 1625 sfc_adapter_unlock(sa); 1626 1627 fail_bad_proto: 1628 SFC_ASSERT(rc > 0); 1629 return -rc; 1630 } 1631 1632 static int 1633 sfc_dev_udp_tunnel_port_add(struct rte_eth_dev *dev, 1634 struct rte_eth_udp_tunnel *tunnel_udp) 1635 { 1636 return sfc_dev_udp_tunnel_op(dev, tunnel_udp, SFC_UDP_TUNNEL_ADD_PORT); 1637 } 1638 1639 static int 1640 sfc_dev_udp_tunnel_port_del(struct rte_eth_dev *dev, 1641 struct rte_eth_udp_tunnel *tunnel_udp) 1642 { 1643 return sfc_dev_udp_tunnel_op(dev, tunnel_udp, SFC_UDP_TUNNEL_DEL_PORT); 1644 } 1645 1646 /* 1647 * The function is used by the secondary process as well. It must not 1648 * use any process-local pointers from the adapter data. 1649 */ 1650 static int 1651 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1652 struct rte_eth_rss_conf *rss_conf) 1653 { 1654 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1655 struct sfc_rss *rss = &sas->rss; 1656 1657 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) 1658 return -ENOTSUP; 1659 1660 /* 1661 * Mapping of hash configuration between RTE and EFX is not one-to-one, 1662 * hence, conversion is done here to derive a correct set of RTE_ETH_RSS 1663 * flags which corresponds to the active EFX configuration stored 1664 * locally in 'sfc_adapter' and kept up-to-date 1665 */ 1666 rss_conf->rss_hf = sfc_rx_hf_efx_to_rte(rss, rss->hash_types); 1667 rss_conf->rss_key_len = EFX_RSS_KEY_SIZE; 1668 if (rss_conf->rss_key != NULL) 1669 rte_memcpy(rss_conf->rss_key, rss->key, EFX_RSS_KEY_SIZE); 1670 1671 return 0; 1672 } 1673 1674 static int 1675 sfc_dev_rss_hash_update(struct rte_eth_dev *dev, 1676 struct rte_eth_rss_conf *rss_conf) 1677 { 1678 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1679 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss; 1680 unsigned int efx_hash_types; 1681 unsigned int n_contexts; 1682 unsigned int mode_i = 0; 1683 unsigned int key_i = 0; 1684 uint32_t contexts[2]; 1685 unsigned int i = 0; 1686 int rc = 0; 1687 1688 if (sfc_sa2shared(sa)->isolated) 1689 return -ENOTSUP; 1690 1691 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) { 1692 sfc_err(sa, "RSS is not available"); 1693 return -ENOTSUP; 1694 } 1695 1696 if (rss->channels == 0) { 1697 sfc_err(sa, "RSS is not configured"); 1698 return -EINVAL; 1699 } 1700 1701 if ((rss_conf->rss_key != NULL) && 1702 (rss_conf->rss_key_len != sizeof(rss->key))) { 1703 sfc_err(sa, "RSS key size is wrong (should be %zu)", 1704 sizeof(rss->key)); 1705 return -EINVAL; 1706 } 1707 1708 sfc_adapter_lock(sa); 1709 1710 rc = sfc_rx_hf_rte_to_efx(sa, rss_conf->rss_hf, &efx_hash_types); 1711 if (rc != 0) 1712 goto fail_rx_hf_rte_to_efx; 1713 1714 contexts[0] = EFX_RSS_CONTEXT_DEFAULT; 1715 contexts[1] = rss->dummy_ctx.nic_handle; 1716 n_contexts = (rss->dummy_ctx.nic_handle_refcnt == 0) ? 1 : 2; 1717 1718 for (mode_i = 0; mode_i < n_contexts; mode_i++) { 1719 rc = efx_rx_scale_mode_set(sa->nic, contexts[mode_i], 1720 rss->hash_alg, efx_hash_types, 1721 B_TRUE); 1722 if (rc != 0) 1723 goto fail_scale_mode_set; 1724 } 1725 1726 if (rss_conf->rss_key != NULL) { 1727 if (sa->state == SFC_ETHDEV_STARTED) { 1728 for (key_i = 0; key_i < n_contexts; key_i++) { 1729 rc = efx_rx_scale_key_set(sa->nic, 1730 contexts[key_i], 1731 rss_conf->rss_key, 1732 sizeof(rss->key)); 1733 if (rc != 0) 1734 goto fail_scale_key_set; 1735 } 1736 } 1737 1738 rte_memcpy(rss->key, rss_conf->rss_key, sizeof(rss->key)); 1739 } 1740 1741 rss->hash_types = efx_hash_types; 1742 1743 sfc_adapter_unlock(sa); 1744 1745 return 0; 1746 1747 fail_scale_key_set: 1748 for (i = 0; i < key_i; i++) { 1749 if (efx_rx_scale_key_set(sa->nic, contexts[i], rss->key, 1750 sizeof(rss->key)) != 0) 1751 sfc_err(sa, "failed to restore RSS key"); 1752 } 1753 1754 fail_scale_mode_set: 1755 for (i = 0; i < mode_i; i++) { 1756 if (efx_rx_scale_mode_set(sa->nic, contexts[i], 1757 EFX_RX_HASHALG_TOEPLITZ, 1758 rss->hash_types, B_TRUE) != 0) 1759 sfc_err(sa, "failed to restore RSS mode"); 1760 } 1761 1762 fail_rx_hf_rte_to_efx: 1763 sfc_adapter_unlock(sa); 1764 return -rc; 1765 } 1766 1767 /* 1768 * The function is used by the secondary process as well. It must not 1769 * use any process-local pointers from the adapter data. 1770 */ 1771 static int 1772 sfc_dev_rss_reta_query(struct rte_eth_dev *dev, 1773 struct rte_eth_rss_reta_entry64 *reta_conf, 1774 uint16_t reta_size) 1775 { 1776 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1777 struct sfc_rss *rss = &sas->rss; 1778 int entry; 1779 1780 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE || sas->isolated) 1781 return -ENOTSUP; 1782 1783 if (rss->channels == 0) 1784 return -EINVAL; 1785 1786 if (reta_size != EFX_RSS_TBL_SIZE) 1787 return -EINVAL; 1788 1789 for (entry = 0; entry < reta_size; entry++) { 1790 int grp = entry / RTE_ETH_RETA_GROUP_SIZE; 1791 int grp_idx = entry % RTE_ETH_RETA_GROUP_SIZE; 1792 1793 if ((reta_conf[grp].mask >> grp_idx) & 1) 1794 reta_conf[grp].reta[grp_idx] = rss->tbl[entry]; 1795 } 1796 1797 return 0; 1798 } 1799 1800 static int 1801 sfc_dev_rss_reta_update(struct rte_eth_dev *dev, 1802 struct rte_eth_rss_reta_entry64 *reta_conf, 1803 uint16_t reta_size) 1804 { 1805 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 1806 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss; 1807 unsigned int *rss_tbl_new; 1808 uint16_t entry; 1809 int rc = 0; 1810 1811 1812 if (sfc_sa2shared(sa)->isolated) 1813 return -ENOTSUP; 1814 1815 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) { 1816 sfc_err(sa, "RSS is not available"); 1817 return -ENOTSUP; 1818 } 1819 1820 if (rss->channels == 0) { 1821 sfc_err(sa, "RSS is not configured"); 1822 return -EINVAL; 1823 } 1824 1825 if (reta_size != EFX_RSS_TBL_SIZE) { 1826 sfc_err(sa, "RETA size is wrong (should be %u)", 1827 EFX_RSS_TBL_SIZE); 1828 return -EINVAL; 1829 } 1830 1831 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(rss->tbl), 0); 1832 if (rss_tbl_new == NULL) 1833 return -ENOMEM; 1834 1835 sfc_adapter_lock(sa); 1836 1837 rte_memcpy(rss_tbl_new, rss->tbl, sizeof(rss->tbl)); 1838 1839 for (entry = 0; entry < reta_size; entry++) { 1840 int grp_idx = entry % RTE_ETH_RETA_GROUP_SIZE; 1841 struct rte_eth_rss_reta_entry64 *grp; 1842 1843 grp = &reta_conf[entry / RTE_ETH_RETA_GROUP_SIZE]; 1844 1845 if (grp->mask & (1ull << grp_idx)) { 1846 if (grp->reta[grp_idx] >= rss->channels) { 1847 rc = EINVAL; 1848 goto bad_reta_entry; 1849 } 1850 rss_tbl_new[entry] = grp->reta[grp_idx]; 1851 } 1852 } 1853 1854 if (sa->state == SFC_ETHDEV_STARTED) { 1855 rc = efx_rx_scale_tbl_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT, 1856 rss_tbl_new, EFX_RSS_TBL_SIZE); 1857 if (rc != 0) 1858 goto fail_scale_tbl_set; 1859 } 1860 1861 rte_memcpy(rss->tbl, rss_tbl_new, sizeof(rss->tbl)); 1862 1863 fail_scale_tbl_set: 1864 bad_reta_entry: 1865 sfc_adapter_unlock(sa); 1866 1867 rte_free(rss_tbl_new); 1868 1869 SFC_ASSERT(rc >= 0); 1870 return -rc; 1871 } 1872 1873 static int 1874 sfc_dev_flow_ops_get(struct rte_eth_dev *dev __rte_unused, 1875 const struct rte_flow_ops **ops) 1876 { 1877 *ops = &sfc_flow_ops; 1878 return 0; 1879 } 1880 1881 static int 1882 sfc_pool_ops_supported(struct rte_eth_dev *dev, const char *pool) 1883 { 1884 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1885 1886 /* 1887 * If Rx datapath does not provide callback to check mempool, 1888 * all pools are supported. 1889 */ 1890 if (sap->dp_rx->pool_ops_supported == NULL) 1891 return 1; 1892 1893 return sap->dp_rx->pool_ops_supported(pool); 1894 } 1895 1896 static int 1897 sfc_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1898 { 1899 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1900 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1901 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1902 struct sfc_rxq_info *rxq_info; 1903 1904 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1905 1906 return sap->dp_rx->intr_enable(rxq_info->dp); 1907 } 1908 1909 static int 1910 sfc_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t ethdev_qid) 1911 { 1912 const struct sfc_adapter_priv *sap = sfc_adapter_priv_by_eth_dev(dev); 1913 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 1914 sfc_ethdev_qid_t sfc_ethdev_qid = ethdev_qid; 1915 struct sfc_rxq_info *rxq_info; 1916 1917 rxq_info = sfc_rxq_info_by_ethdev_qid(sas, sfc_ethdev_qid); 1918 1919 return sap->dp_rx->intr_disable(rxq_info->dp); 1920 } 1921 1922 struct sfc_mport_journal_ctx { 1923 struct sfc_adapter *sa; 1924 uint16_t switch_domain_id; 1925 uint32_t mcdi_handle; 1926 bool controllers_assigned; 1927 efx_pcie_interface_t *controllers; 1928 size_t nb_controllers; 1929 }; 1930 1931 static int 1932 sfc_journal_ctx_add_controller(struct sfc_mport_journal_ctx *ctx, 1933 efx_pcie_interface_t intf) 1934 { 1935 efx_pcie_interface_t *new_controllers; 1936 size_t i, target; 1937 size_t new_size; 1938 1939 if (ctx->controllers == NULL) { 1940 ctx->controllers = rte_malloc("sfc_controller_mapping", 1941 sizeof(ctx->controllers[0]), 0); 1942 if (ctx->controllers == NULL) 1943 return ENOMEM; 1944 1945 ctx->controllers[0] = intf; 1946 ctx->nb_controllers = 1; 1947 1948 return 0; 1949 } 1950 1951 for (i = 0; i < ctx->nb_controllers; i++) { 1952 if (ctx->controllers[i] == intf) 1953 return 0; 1954 if (ctx->controllers[i] > intf) 1955 break; 1956 } 1957 target = i; 1958 1959 ctx->nb_controllers += 1; 1960 new_size = ctx->nb_controllers * sizeof(ctx->controllers[0]); 1961 1962 new_controllers = rte_realloc(ctx->controllers, new_size, 0); 1963 if (new_controllers == NULL) { 1964 rte_free(ctx->controllers); 1965 return ENOMEM; 1966 } 1967 ctx->controllers = new_controllers; 1968 1969 for (i = target + 1; i < ctx->nb_controllers; i++) 1970 ctx->controllers[i] = ctx->controllers[i - 1]; 1971 1972 ctx->controllers[target] = intf; 1973 1974 return 0; 1975 } 1976 1977 static efx_rc_t 1978 sfc_process_mport_journal_entry(struct sfc_mport_journal_ctx *ctx, 1979 efx_mport_desc_t *mport) 1980 { 1981 struct sfc_mae_switch_port_request req; 1982 efx_mport_sel_t entity_selector; 1983 efx_mport_sel_t ethdev_mport; 1984 uint16_t switch_port_id; 1985 efx_rc_t efx_rc; 1986 int rc; 1987 1988 sfc_dbg(ctx->sa, 1989 "processing mport id %u (controller %u pf %u vf %u)", 1990 mport->emd_id.id, mport->emd_vnic.ev_intf, 1991 mport->emd_vnic.ev_pf, mport->emd_vnic.ev_vf); 1992 efx_mae_mport_invalid(ðdev_mport); 1993 1994 if (!ctx->controllers_assigned) { 1995 rc = sfc_journal_ctx_add_controller(ctx, 1996 mport->emd_vnic.ev_intf); 1997 if (rc != 0) 1998 return rc; 1999 } 2000 2001 /* Build Mport selector */ 2002 efx_rc = efx_mae_mport_by_pcie_mh_function(mport->emd_vnic.ev_intf, 2003 mport->emd_vnic.ev_pf, 2004 mport->emd_vnic.ev_vf, 2005 &entity_selector); 2006 if (efx_rc != 0) { 2007 sfc_err(ctx->sa, "failed to build entity mport selector for c%upf%uvf%u", 2008 mport->emd_vnic.ev_intf, 2009 mport->emd_vnic.ev_pf, 2010 mport->emd_vnic.ev_vf); 2011 return efx_rc; 2012 } 2013 2014 rc = sfc_mae_switch_port_id_by_entity(ctx->switch_domain_id, 2015 &entity_selector, 2016 SFC_MAE_SWITCH_PORT_REPRESENTOR, 2017 &switch_port_id); 2018 switch (rc) { 2019 case 0: 2020 /* Already registered */ 2021 break; 2022 case ENOENT: 2023 /* 2024 * No representor has been created for this entity. 2025 * Create a dummy switch registry entry with an invalid ethdev 2026 * mport selector. When a corresponding representor is created, 2027 * this entry will be updated. 2028 */ 2029 req.type = SFC_MAE_SWITCH_PORT_REPRESENTOR; 2030 req.entity_mportp = &entity_selector; 2031 req.ethdev_mportp = ðdev_mport; 2032 req.ethdev_port_id = RTE_MAX_ETHPORTS; 2033 req.port_data.repr.intf = mport->emd_vnic.ev_intf; 2034 req.port_data.repr.pf = mport->emd_vnic.ev_pf; 2035 req.port_data.repr.vf = mport->emd_vnic.ev_vf; 2036 2037 rc = sfc_mae_assign_switch_port(ctx->switch_domain_id, 2038 &req, &switch_port_id); 2039 if (rc != 0) { 2040 sfc_err(ctx->sa, 2041 "failed to assign MAE switch port for c%upf%uvf%u: %s", 2042 mport->emd_vnic.ev_intf, 2043 mport->emd_vnic.ev_pf, 2044 mport->emd_vnic.ev_vf, 2045 rte_strerror(rc)); 2046 return rc; 2047 } 2048 break; 2049 default: 2050 sfc_err(ctx->sa, "failed to find MAE switch port for c%upf%uvf%u: %s", 2051 mport->emd_vnic.ev_intf, 2052 mport->emd_vnic.ev_pf, 2053 mport->emd_vnic.ev_vf, 2054 rte_strerror(rc)); 2055 return rc; 2056 } 2057 2058 return 0; 2059 } 2060 2061 static efx_rc_t 2062 sfc_process_mport_journal_cb(void *data, efx_mport_desc_t *mport, 2063 size_t mport_len) 2064 { 2065 struct sfc_mport_journal_ctx *ctx = data; 2066 2067 if (ctx == NULL || ctx->sa == NULL) { 2068 sfc_err(ctx->sa, "received NULL context or SFC adapter"); 2069 return EINVAL; 2070 } 2071 2072 if (mport_len != sizeof(*mport)) { 2073 sfc_err(ctx->sa, "actual and expected mport buffer sizes differ"); 2074 return EINVAL; 2075 } 2076 2077 SFC_ASSERT(sfc_adapter_is_locked(ctx->sa)); 2078 2079 /* 2080 * If a zombie flag is set, it means the mport has been marked for 2081 * deletion and cannot be used for any new operations. The mport will 2082 * be destroyed completely once all references to it are released. 2083 */ 2084 if (mport->emd_zombie) { 2085 sfc_dbg(ctx->sa, "mport is a zombie, skipping"); 2086 return 0; 2087 } 2088 if (mport->emd_type != EFX_MPORT_TYPE_VNIC) { 2089 sfc_dbg(ctx->sa, "mport is not a VNIC, skipping"); 2090 return 0; 2091 } 2092 if (mport->emd_vnic.ev_client_type != EFX_MPORT_VNIC_CLIENT_FUNCTION) { 2093 sfc_dbg(ctx->sa, "mport is not a function, skipping"); 2094 return 0; 2095 } 2096 if (mport->emd_vnic.ev_handle == ctx->mcdi_handle) { 2097 sfc_dbg(ctx->sa, "mport is this driver instance, skipping"); 2098 return 0; 2099 } 2100 2101 return sfc_process_mport_journal_entry(ctx, mport); 2102 } 2103 2104 static int 2105 sfc_process_mport_journal(struct sfc_adapter *sa) 2106 { 2107 struct sfc_mport_journal_ctx ctx; 2108 const efx_pcie_interface_t *controllers; 2109 size_t nb_controllers; 2110 efx_rc_t efx_rc; 2111 int rc; 2112 2113 memset(&ctx, 0, sizeof(ctx)); 2114 ctx.sa = sa; 2115 ctx.switch_domain_id = sa->mae.switch_domain_id; 2116 2117 efx_rc = efx_mcdi_get_own_client_handle(sa->nic, &ctx.mcdi_handle); 2118 if (efx_rc != 0) { 2119 sfc_err(sa, "failed to get own MCDI handle"); 2120 SFC_ASSERT(efx_rc > 0); 2121 return efx_rc; 2122 } 2123 2124 rc = sfc_mae_switch_domain_controllers(ctx.switch_domain_id, 2125 &controllers, &nb_controllers); 2126 if (rc != 0) { 2127 sfc_err(sa, "failed to get controller mapping"); 2128 return rc; 2129 } 2130 2131 ctx.controllers_assigned = controllers != NULL; 2132 ctx.controllers = NULL; 2133 ctx.nb_controllers = 0; 2134 2135 efx_rc = efx_mae_read_mport_journal(sa->nic, 2136 sfc_process_mport_journal_cb, &ctx); 2137 if (efx_rc != 0) { 2138 sfc_err(sa, "failed to process MAE mport journal"); 2139 SFC_ASSERT(efx_rc > 0); 2140 return efx_rc; 2141 } 2142 2143 if (controllers == NULL) { 2144 rc = sfc_mae_switch_domain_map_controllers(ctx.switch_domain_id, 2145 ctx.controllers, 2146 ctx.nb_controllers); 2147 if (rc != 0) 2148 return rc; 2149 } 2150 2151 return 0; 2152 } 2153 2154 static void 2155 sfc_count_representors_cb(enum sfc_mae_switch_port_type type, 2156 const efx_mport_sel_t *ethdev_mportp __rte_unused, 2157 uint16_t ethdev_port_id __rte_unused, 2158 const efx_mport_sel_t *entity_mportp __rte_unused, 2159 uint16_t switch_port_id __rte_unused, 2160 union sfc_mae_switch_port_data *port_datap 2161 __rte_unused, 2162 void *user_datap) 2163 { 2164 int *counter = user_datap; 2165 2166 SFC_ASSERT(counter != NULL); 2167 2168 if (type == SFC_MAE_SWITCH_PORT_REPRESENTOR) 2169 (*counter)++; 2170 } 2171 2172 struct sfc_get_representors_ctx { 2173 struct rte_eth_representor_info *info; 2174 struct sfc_adapter *sa; 2175 uint16_t switch_domain_id; 2176 const efx_pcie_interface_t *controllers; 2177 size_t nb_controllers; 2178 }; 2179 2180 static void 2181 sfc_get_representors_cb(enum sfc_mae_switch_port_type type, 2182 const efx_mport_sel_t *ethdev_mportp __rte_unused, 2183 uint16_t ethdev_port_id __rte_unused, 2184 const efx_mport_sel_t *entity_mportp __rte_unused, 2185 uint16_t switch_port_id, 2186 union sfc_mae_switch_port_data *port_datap, 2187 void *user_datap) 2188 { 2189 struct sfc_get_representors_ctx *ctx = user_datap; 2190 struct rte_eth_representor_range *range; 2191 int ret; 2192 int rc; 2193 2194 SFC_ASSERT(ctx != NULL); 2195 SFC_ASSERT(ctx->info != NULL); 2196 SFC_ASSERT(ctx->sa != NULL); 2197 2198 if (type != SFC_MAE_SWITCH_PORT_REPRESENTOR) { 2199 sfc_dbg(ctx->sa, "not a representor, skipping"); 2200 return; 2201 } 2202 if (ctx->info->nb_ranges >= ctx->info->nb_ranges_alloc) { 2203 sfc_dbg(ctx->sa, "info structure is full already"); 2204 return; 2205 } 2206 2207 range = &ctx->info->ranges[ctx->info->nb_ranges]; 2208 rc = sfc_mae_switch_controller_from_mapping(ctx->controllers, 2209 ctx->nb_controllers, 2210 port_datap->repr.intf, 2211 &range->controller); 2212 if (rc != 0) { 2213 sfc_err(ctx->sa, "invalid representor controller: %d", 2214 port_datap->repr.intf); 2215 range->controller = -1; 2216 } 2217 range->pf = port_datap->repr.pf; 2218 range->id_base = switch_port_id; 2219 range->id_end = switch_port_id; 2220 2221 if (port_datap->repr.vf != EFX_PCI_VF_INVALID) { 2222 range->type = RTE_ETH_REPRESENTOR_VF; 2223 range->vf = port_datap->repr.vf; 2224 ret = snprintf(range->name, RTE_DEV_NAME_MAX_LEN, 2225 "c%dpf%dvf%d", range->controller, range->pf, 2226 range->vf); 2227 } else { 2228 range->type = RTE_ETH_REPRESENTOR_PF; 2229 ret = snprintf(range->name, RTE_DEV_NAME_MAX_LEN, 2230 "c%dpf%d", range->controller, range->pf); 2231 } 2232 if (ret >= RTE_DEV_NAME_MAX_LEN) { 2233 sfc_err(ctx->sa, "representor name has been truncated: %s", 2234 range->name); 2235 } 2236 2237 ctx->info->nb_ranges++; 2238 } 2239 2240 static int 2241 sfc_representor_info_get(struct rte_eth_dev *dev, 2242 struct rte_eth_representor_info *info) 2243 { 2244 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2245 struct sfc_get_representors_ctx get_repr_ctx; 2246 const efx_nic_cfg_t *nic_cfg; 2247 uint16_t switch_domain_id; 2248 uint32_t nb_repr; 2249 int controller; 2250 int rc; 2251 2252 sfc_adapter_lock(sa); 2253 2254 if (sa->mae.status != SFC_MAE_STATUS_ADMIN) { 2255 sfc_adapter_unlock(sa); 2256 return -ENOTSUP; 2257 } 2258 2259 rc = sfc_process_mport_journal(sa); 2260 if (rc != 0) { 2261 sfc_adapter_unlock(sa); 2262 SFC_ASSERT(rc > 0); 2263 return -rc; 2264 } 2265 2266 switch_domain_id = sa->mae.switch_domain_id; 2267 2268 nb_repr = 0; 2269 rc = sfc_mae_switch_ports_iterate(switch_domain_id, 2270 sfc_count_representors_cb, 2271 &nb_repr); 2272 if (rc != 0) { 2273 sfc_adapter_unlock(sa); 2274 SFC_ASSERT(rc > 0); 2275 return -rc; 2276 } 2277 2278 if (info == NULL) { 2279 sfc_adapter_unlock(sa); 2280 return nb_repr; 2281 } 2282 2283 rc = sfc_mae_switch_domain_controllers(switch_domain_id, 2284 &get_repr_ctx.controllers, 2285 &get_repr_ctx.nb_controllers); 2286 if (rc != 0) { 2287 sfc_adapter_unlock(sa); 2288 SFC_ASSERT(rc > 0); 2289 return -rc; 2290 } 2291 2292 nic_cfg = efx_nic_cfg_get(sa->nic); 2293 2294 rc = sfc_mae_switch_domain_get_controller(switch_domain_id, 2295 nic_cfg->enc_intf, 2296 &controller); 2297 if (rc != 0) { 2298 sfc_err(sa, "invalid controller: %d", nic_cfg->enc_intf); 2299 controller = -1; 2300 } 2301 2302 info->controller = controller; 2303 info->pf = nic_cfg->enc_pf; 2304 2305 get_repr_ctx.info = info; 2306 get_repr_ctx.sa = sa; 2307 get_repr_ctx.switch_domain_id = switch_domain_id; 2308 rc = sfc_mae_switch_ports_iterate(switch_domain_id, 2309 sfc_get_representors_cb, 2310 &get_repr_ctx); 2311 if (rc != 0) { 2312 sfc_adapter_unlock(sa); 2313 SFC_ASSERT(rc > 0); 2314 return -rc; 2315 } 2316 2317 sfc_adapter_unlock(sa); 2318 return nb_repr; 2319 } 2320 2321 static int 2322 sfc_rx_metadata_negotiate(struct rte_eth_dev *dev, uint64_t *features) 2323 { 2324 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2325 uint64_t supported = 0; 2326 2327 sfc_adapter_lock(sa); 2328 2329 if ((sa->priv.dp_rx->features & SFC_DP_RX_FEAT_FLOW_FLAG) != 0) 2330 supported |= RTE_ETH_RX_METADATA_USER_FLAG; 2331 2332 if ((sa->priv.dp_rx->features & SFC_DP_RX_FEAT_FLOW_MARK) != 0) 2333 supported |= RTE_ETH_RX_METADATA_USER_MARK; 2334 2335 if (sfc_ft_is_supported(sa)) 2336 supported |= RTE_ETH_RX_METADATA_TUNNEL_ID; 2337 2338 sa->negotiated_rx_metadata = supported & *features; 2339 *features = sa->negotiated_rx_metadata; 2340 2341 sfc_adapter_unlock(sa); 2342 2343 return 0; 2344 } 2345 2346 static const struct eth_dev_ops sfc_eth_dev_ops = { 2347 .dev_configure = sfc_dev_configure, 2348 .dev_start = sfc_dev_start, 2349 .dev_stop = sfc_dev_stop, 2350 .dev_set_link_up = sfc_dev_set_link_up, 2351 .dev_set_link_down = sfc_dev_set_link_down, 2352 .dev_close = sfc_dev_close, 2353 .promiscuous_enable = sfc_dev_promisc_enable, 2354 .promiscuous_disable = sfc_dev_promisc_disable, 2355 .allmulticast_enable = sfc_dev_allmulti_enable, 2356 .allmulticast_disable = sfc_dev_allmulti_disable, 2357 .link_update = sfc_dev_link_update, 2358 .stats_get = sfc_stats_get, 2359 .stats_reset = sfc_stats_reset, 2360 .xstats_get = sfc_xstats_get, 2361 .xstats_reset = sfc_stats_reset, 2362 .xstats_get_names = sfc_xstats_get_names, 2363 .dev_infos_get = sfc_dev_infos_get, 2364 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 2365 .mtu_set = sfc_dev_set_mtu, 2366 .rx_queue_start = sfc_rx_queue_start, 2367 .rx_queue_stop = sfc_rx_queue_stop, 2368 .tx_queue_start = sfc_tx_queue_start, 2369 .tx_queue_stop = sfc_tx_queue_stop, 2370 .rx_queue_setup = sfc_rx_queue_setup, 2371 .rx_queue_release = sfc_rx_queue_release, 2372 .rx_queue_intr_enable = sfc_rx_queue_intr_enable, 2373 .rx_queue_intr_disable = sfc_rx_queue_intr_disable, 2374 .tx_queue_setup = sfc_tx_queue_setup, 2375 .tx_queue_release = sfc_tx_queue_release, 2376 .flow_ctrl_get = sfc_flow_ctrl_get, 2377 .flow_ctrl_set = sfc_flow_ctrl_set, 2378 .mac_addr_set = sfc_mac_addr_set, 2379 .udp_tunnel_port_add = sfc_dev_udp_tunnel_port_add, 2380 .udp_tunnel_port_del = sfc_dev_udp_tunnel_port_del, 2381 .reta_update = sfc_dev_rss_reta_update, 2382 .reta_query = sfc_dev_rss_reta_query, 2383 .rss_hash_update = sfc_dev_rss_hash_update, 2384 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 2385 .flow_ops_get = sfc_dev_flow_ops_get, 2386 .set_mc_addr_list = sfc_set_mc_addr_list, 2387 .rxq_info_get = sfc_rx_queue_info_get, 2388 .txq_info_get = sfc_tx_queue_info_get, 2389 .fw_version_get = sfc_fw_version_get, 2390 .xstats_get_by_id = sfc_xstats_get_by_id, 2391 .xstats_get_names_by_id = sfc_xstats_get_names_by_id, 2392 .pool_ops_supported = sfc_pool_ops_supported, 2393 .representor_info_get = sfc_representor_info_get, 2394 .rx_metadata_negotiate = sfc_rx_metadata_negotiate, 2395 }; 2396 2397 struct sfc_ethdev_init_data { 2398 uint16_t nb_representors; 2399 }; 2400 2401 /** 2402 * Duplicate a string in potentially shared memory required for 2403 * multi-process support. 2404 * 2405 * strdup() allocates from process-local heap/memory. 2406 */ 2407 static char * 2408 sfc_strdup(const char *str) 2409 { 2410 size_t size; 2411 char *copy; 2412 2413 if (str == NULL) 2414 return NULL; 2415 2416 size = strlen(str) + 1; 2417 copy = rte_malloc(__func__, size, 0); 2418 if (copy != NULL) 2419 rte_memcpy(copy, str, size); 2420 2421 return copy; 2422 } 2423 2424 static int 2425 sfc_eth_dev_set_ops(struct rte_eth_dev *dev) 2426 { 2427 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2428 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2429 const struct sfc_dp_rx *dp_rx; 2430 const struct sfc_dp_tx *dp_tx; 2431 const efx_nic_cfg_t *encp; 2432 unsigned int avail_caps = 0; 2433 const char *rx_name = NULL; 2434 const char *tx_name = NULL; 2435 int rc; 2436 2437 switch (sa->family) { 2438 case EFX_FAMILY_HUNTINGTON: 2439 case EFX_FAMILY_MEDFORD: 2440 case EFX_FAMILY_MEDFORD2: 2441 avail_caps |= SFC_DP_HW_FW_CAP_EF10; 2442 avail_caps |= SFC_DP_HW_FW_CAP_RX_EFX; 2443 avail_caps |= SFC_DP_HW_FW_CAP_TX_EFX; 2444 break; 2445 case EFX_FAMILY_RIVERHEAD: 2446 avail_caps |= SFC_DP_HW_FW_CAP_EF100; 2447 break; 2448 default: 2449 break; 2450 } 2451 2452 encp = efx_nic_cfg_get(sa->nic); 2453 if (encp->enc_rx_es_super_buffer_supported) 2454 avail_caps |= SFC_DP_HW_FW_CAP_RX_ES_SUPER_BUFFER; 2455 2456 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH, 2457 sfc_kvarg_string_handler, &rx_name); 2458 if (rc != 0) 2459 goto fail_kvarg_rx_datapath; 2460 2461 if (rx_name != NULL) { 2462 dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name); 2463 if (dp_rx == NULL) { 2464 sfc_err(sa, "Rx datapath %s not found", rx_name); 2465 rc = ENOENT; 2466 goto fail_dp_rx; 2467 } 2468 if (!sfc_dp_match_hw_fw_caps(&dp_rx->dp, avail_caps)) { 2469 sfc_err(sa, 2470 "Insufficient Hw/FW capabilities to use Rx datapath %s", 2471 rx_name); 2472 rc = EINVAL; 2473 goto fail_dp_rx_caps; 2474 } 2475 } else { 2476 dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps); 2477 if (dp_rx == NULL) { 2478 sfc_err(sa, "Rx datapath by caps %#x not found", 2479 avail_caps); 2480 rc = ENOENT; 2481 goto fail_dp_rx; 2482 } 2483 } 2484 2485 sas->dp_rx_name = sfc_strdup(dp_rx->dp.name); 2486 if (sas->dp_rx_name == NULL) { 2487 rc = ENOMEM; 2488 goto fail_dp_rx_name; 2489 } 2490 2491 if (strcmp(dp_rx->dp.name, SFC_KVARG_DATAPATH_EF10_ESSB) == 0) { 2492 /* FLAG and MARK are always available from Rx prefix. */ 2493 sa->negotiated_rx_metadata |= RTE_ETH_RX_METADATA_USER_FLAG; 2494 sa->negotiated_rx_metadata |= RTE_ETH_RX_METADATA_USER_MARK; 2495 } 2496 2497 sfc_notice(sa, "use %s Rx datapath", sas->dp_rx_name); 2498 2499 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH, 2500 sfc_kvarg_string_handler, &tx_name); 2501 if (rc != 0) 2502 goto fail_kvarg_tx_datapath; 2503 2504 if (tx_name != NULL) { 2505 dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name); 2506 if (dp_tx == NULL) { 2507 sfc_err(sa, "Tx datapath %s not found", tx_name); 2508 rc = ENOENT; 2509 goto fail_dp_tx; 2510 } 2511 if (!sfc_dp_match_hw_fw_caps(&dp_tx->dp, avail_caps)) { 2512 sfc_err(sa, 2513 "Insufficient Hw/FW capabilities to use Tx datapath %s", 2514 tx_name); 2515 rc = EINVAL; 2516 goto fail_dp_tx_caps; 2517 } 2518 } else { 2519 dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps); 2520 if (dp_tx == NULL) { 2521 sfc_err(sa, "Tx datapath by caps %#x not found", 2522 avail_caps); 2523 rc = ENOENT; 2524 goto fail_dp_tx; 2525 } 2526 } 2527 2528 sas->dp_tx_name = sfc_strdup(dp_tx->dp.name); 2529 if (sas->dp_tx_name == NULL) { 2530 rc = ENOMEM; 2531 goto fail_dp_tx_name; 2532 } 2533 2534 sfc_notice(sa, "use %s Tx datapath", sas->dp_tx_name); 2535 2536 sa->priv.dp_rx = dp_rx; 2537 sa->priv.dp_tx = dp_tx; 2538 2539 dev->rx_pkt_burst = dp_rx->pkt_burst; 2540 dev->tx_pkt_prepare = dp_tx->pkt_prepare; 2541 dev->tx_pkt_burst = dp_tx->pkt_burst; 2542 2543 dev->rx_queue_count = sfc_rx_queue_count; 2544 dev->rx_descriptor_status = sfc_rx_descriptor_status; 2545 dev->tx_descriptor_status = sfc_tx_descriptor_status; 2546 dev->dev_ops = &sfc_eth_dev_ops; 2547 2548 return 0; 2549 2550 fail_dp_tx_name: 2551 fail_dp_tx_caps: 2552 fail_dp_tx: 2553 fail_kvarg_tx_datapath: 2554 rte_free(sas->dp_rx_name); 2555 sas->dp_rx_name = NULL; 2556 2557 fail_dp_rx_name: 2558 fail_dp_rx_caps: 2559 fail_dp_rx: 2560 fail_kvarg_rx_datapath: 2561 return rc; 2562 } 2563 2564 static void 2565 sfc_eth_dev_clear_ops(struct rte_eth_dev *dev) 2566 { 2567 struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev); 2568 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2569 2570 dev->dev_ops = NULL; 2571 dev->tx_pkt_prepare = NULL; 2572 dev->rx_pkt_burst = NULL; 2573 dev->tx_pkt_burst = NULL; 2574 2575 rte_free(sas->dp_tx_name); 2576 sas->dp_tx_name = NULL; 2577 sa->priv.dp_tx = NULL; 2578 2579 rte_free(sas->dp_rx_name); 2580 sas->dp_rx_name = NULL; 2581 sa->priv.dp_rx = NULL; 2582 } 2583 2584 static const struct eth_dev_ops sfc_eth_dev_secondary_ops = { 2585 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 2586 .reta_query = sfc_dev_rss_reta_query, 2587 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 2588 .rxq_info_get = sfc_rx_queue_info_get, 2589 .txq_info_get = sfc_tx_queue_info_get, 2590 }; 2591 2592 static int 2593 sfc_eth_dev_secondary_init(struct rte_eth_dev *dev, uint32_t logtype_main) 2594 { 2595 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2596 struct sfc_adapter_priv *sap; 2597 const struct sfc_dp_rx *dp_rx; 2598 const struct sfc_dp_tx *dp_tx; 2599 int rc; 2600 2601 /* 2602 * Allocate process private data from heap, since it should not 2603 * be located in shared memory allocated using rte_malloc() API. 2604 */ 2605 sap = calloc(1, sizeof(*sap)); 2606 if (sap == NULL) { 2607 rc = ENOMEM; 2608 goto fail_alloc_priv; 2609 } 2610 2611 sap->logtype_main = logtype_main; 2612 2613 dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, sas->dp_rx_name); 2614 if (dp_rx == NULL) { 2615 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2616 "cannot find %s Rx datapath", sas->dp_rx_name); 2617 rc = ENOENT; 2618 goto fail_dp_rx; 2619 } 2620 if (~dp_rx->features & SFC_DP_RX_FEAT_MULTI_PROCESS) { 2621 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2622 "%s Rx datapath does not support multi-process", 2623 sas->dp_rx_name); 2624 rc = EINVAL; 2625 goto fail_dp_rx_multi_process; 2626 } 2627 2628 dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, sas->dp_tx_name); 2629 if (dp_tx == NULL) { 2630 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2631 "cannot find %s Tx datapath", sas->dp_tx_name); 2632 rc = ENOENT; 2633 goto fail_dp_tx; 2634 } 2635 if (~dp_tx->features & SFC_DP_TX_FEAT_MULTI_PROCESS) { 2636 SFC_LOG(sas, RTE_LOG_ERR, logtype_main, 2637 "%s Tx datapath does not support multi-process", 2638 sas->dp_tx_name); 2639 rc = EINVAL; 2640 goto fail_dp_tx_multi_process; 2641 } 2642 2643 sap->dp_rx = dp_rx; 2644 sap->dp_tx = dp_tx; 2645 2646 dev->process_private = sap; 2647 dev->rx_pkt_burst = dp_rx->pkt_burst; 2648 dev->tx_pkt_prepare = dp_tx->pkt_prepare; 2649 dev->tx_pkt_burst = dp_tx->pkt_burst; 2650 dev->rx_queue_count = sfc_rx_queue_count; 2651 dev->rx_descriptor_status = sfc_rx_descriptor_status; 2652 dev->tx_descriptor_status = sfc_tx_descriptor_status; 2653 dev->dev_ops = &sfc_eth_dev_secondary_ops; 2654 2655 return 0; 2656 2657 fail_dp_tx_multi_process: 2658 fail_dp_tx: 2659 fail_dp_rx_multi_process: 2660 fail_dp_rx: 2661 free(sap); 2662 2663 fail_alloc_priv: 2664 return rc; 2665 } 2666 2667 static void 2668 sfc_register_dp(void) 2669 { 2670 /* Register once */ 2671 if (TAILQ_EMPTY(&sfc_dp_head)) { 2672 /* Prefer EF10 datapath */ 2673 sfc_dp_register(&sfc_dp_head, &sfc_ef100_rx.dp); 2674 sfc_dp_register(&sfc_dp_head, &sfc_ef10_essb_rx.dp); 2675 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp); 2676 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); 2677 2678 sfc_dp_register(&sfc_dp_head, &sfc_ef100_tx.dp); 2679 sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp); 2680 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp); 2681 sfc_dp_register(&sfc_dp_head, &sfc_ef10_simple_tx.dp); 2682 } 2683 } 2684 2685 static int 2686 sfc_parse_switch_mode(struct sfc_adapter *sa, bool has_representors) 2687 { 2688 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 2689 const char *switch_mode = NULL; 2690 int rc; 2691 2692 sfc_log_init(sa, "entry"); 2693 2694 rc = sfc_kvargs_process(sa, SFC_KVARG_SWITCH_MODE, 2695 sfc_kvarg_string_handler, &switch_mode); 2696 if (rc != 0) 2697 goto fail_kvargs; 2698 2699 if (switch_mode == NULL) { 2700 sa->switchdev = encp->enc_mae_admin && 2701 (!encp->enc_datapath_cap_evb || 2702 has_representors); 2703 } else if (strcasecmp(switch_mode, SFC_KVARG_SWITCH_MODE_LEGACY) == 0) { 2704 sa->switchdev = false; 2705 } else if (strcasecmp(switch_mode, 2706 SFC_KVARG_SWITCH_MODE_SWITCHDEV) == 0) { 2707 sa->switchdev = true; 2708 } else { 2709 sfc_err(sa, "invalid switch mode device argument '%s'", 2710 switch_mode); 2711 rc = EINVAL; 2712 goto fail_mode; 2713 } 2714 2715 sfc_log_init(sa, "done"); 2716 2717 return 0; 2718 2719 fail_mode: 2720 fail_kvargs: 2721 sfc_log_init(sa, "failed: %s", rte_strerror(rc)); 2722 2723 return rc; 2724 } 2725 2726 static int 2727 sfc_eth_dev_init(struct rte_eth_dev *dev, void *init_params) 2728 { 2729 struct sfc_adapter_shared *sas = sfc_adapter_shared_by_eth_dev(dev); 2730 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 2731 struct sfc_ethdev_init_data *init_data = init_params; 2732 uint32_t logtype_main; 2733 struct sfc_adapter *sa; 2734 int rc; 2735 const efx_nic_cfg_t *encp; 2736 const struct rte_ether_addr *from; 2737 int ret; 2738 2739 if (sfc_efx_dev_class_get(pci_dev->device.devargs) != 2740 SFC_EFX_DEV_CLASS_NET) { 2741 SFC_GENERIC_LOG(DEBUG, 2742 "Incompatible device class: skip probing, should be probed by other sfc driver."); 2743 return 1; 2744 } 2745 2746 rc = sfc_dp_mport_register(); 2747 if (rc != 0) 2748 return rc; 2749 2750 sfc_register_dp(); 2751 2752 logtype_main = sfc_register_logtype(&pci_dev->addr, 2753 SFC_LOGTYPE_MAIN_STR, 2754 RTE_LOG_NOTICE); 2755 2756 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2757 return -sfc_eth_dev_secondary_init(dev, logtype_main); 2758 2759 /* Required for logging */ 2760 ret = snprintf(sas->log_prefix, sizeof(sas->log_prefix), 2761 "PMD: sfc_efx " PCI_PRI_FMT " #%" PRIu16 ": ", 2762 pci_dev->addr.domain, pci_dev->addr.bus, 2763 pci_dev->addr.devid, pci_dev->addr.function, 2764 dev->data->port_id); 2765 if (ret < 0 || ret >= (int)sizeof(sas->log_prefix)) { 2766 SFC_GENERIC_LOG(ERR, 2767 "reserved log prefix is too short for " PCI_PRI_FMT, 2768 pci_dev->addr.domain, pci_dev->addr.bus, 2769 pci_dev->addr.devid, pci_dev->addr.function); 2770 return -EINVAL; 2771 } 2772 sas->pci_addr = pci_dev->addr; 2773 sas->port_id = dev->data->port_id; 2774 2775 /* 2776 * Allocate process private data from heap, since it should not 2777 * be located in shared memory allocated using rte_malloc() API. 2778 */ 2779 sa = calloc(1, sizeof(*sa)); 2780 if (sa == NULL) { 2781 rc = ENOMEM; 2782 goto fail_alloc_sa; 2783 } 2784 2785 dev->process_private = sa; 2786 2787 /* Required for logging */ 2788 sa->priv.shared = sas; 2789 sa->priv.logtype_main = logtype_main; 2790 2791 sa->eth_dev = dev; 2792 2793 /* Copy PCI device info to the dev->data */ 2794 rte_eth_copy_pci_info(dev, pci_dev); 2795 dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 2796 2797 rc = sfc_kvargs_parse(sa); 2798 if (rc != 0) 2799 goto fail_kvargs_parse; 2800 2801 sfc_log_init(sa, "entry"); 2802 2803 dev->data->mac_addrs = rte_zmalloc("sfc", RTE_ETHER_ADDR_LEN, 0); 2804 if (dev->data->mac_addrs == NULL) { 2805 rc = ENOMEM; 2806 goto fail_mac_addrs; 2807 } 2808 2809 sfc_adapter_lock_init(sa); 2810 sfc_adapter_lock(sa); 2811 2812 sfc_log_init(sa, "probing"); 2813 rc = sfc_probe(sa); 2814 if (rc != 0) 2815 goto fail_probe; 2816 2817 /* 2818 * Selecting a default switch mode requires the NIC to be probed and 2819 * to have its capabilities filled in. 2820 */ 2821 rc = sfc_parse_switch_mode(sa, init_data->nb_representors > 0); 2822 if (rc != 0) 2823 goto fail_switch_mode; 2824 2825 sfc_log_init(sa, "set device ops"); 2826 rc = sfc_eth_dev_set_ops(dev); 2827 if (rc != 0) 2828 goto fail_set_ops; 2829 2830 sfc_log_init(sa, "attaching"); 2831 rc = sfc_attach(sa); 2832 if (rc != 0) 2833 goto fail_attach; 2834 2835 if (sa->switchdev && sa->mae.status != SFC_MAE_STATUS_ADMIN) { 2836 sfc_err(sa, 2837 "failed to enable switchdev mode without admin MAE privilege"); 2838 rc = ENOTSUP; 2839 goto fail_switchdev_no_mae; 2840 } 2841 2842 encp = efx_nic_cfg_get(sa->nic); 2843 2844 /* 2845 * The arguments are really reverse order in comparison to 2846 * Linux kernel. Copy from NIC config to Ethernet device data. 2847 */ 2848 from = (const struct rte_ether_addr *)(encp->enc_mac_addr); 2849 rte_ether_addr_copy(from, &dev->data->mac_addrs[0]); 2850 2851 /* 2852 * Setup the NIC DMA mapping handler. All internal mempools 2853 * MUST be created on attach before this point, and the 2854 * adapter MUST NOT create mempools with the adapter lock 2855 * held after this point. 2856 */ 2857 rc = sfc_nic_dma_attach(sa); 2858 if (rc != 0) 2859 goto fail_nic_dma_attach; 2860 2861 sfc_adapter_unlock(sa); 2862 2863 sfc_log_init(sa, "done"); 2864 return 0; 2865 2866 fail_nic_dma_attach: 2867 fail_switchdev_no_mae: 2868 sfc_detach(sa); 2869 2870 fail_attach: 2871 sfc_eth_dev_clear_ops(dev); 2872 2873 fail_set_ops: 2874 fail_switch_mode: 2875 sfc_unprobe(sa); 2876 2877 fail_probe: 2878 sfc_adapter_unlock(sa); 2879 sfc_adapter_lock_fini(sa); 2880 rte_free(dev->data->mac_addrs); 2881 dev->data->mac_addrs = NULL; 2882 2883 fail_mac_addrs: 2884 sfc_kvargs_cleanup(sa); 2885 2886 fail_kvargs_parse: 2887 sfc_log_init(sa, "failed %d", rc); 2888 dev->process_private = NULL; 2889 free(sa); 2890 2891 fail_alloc_sa: 2892 SFC_ASSERT(rc > 0); 2893 return -rc; 2894 } 2895 2896 static int 2897 sfc_eth_dev_uninit(struct rte_eth_dev *dev) 2898 { 2899 sfc_dev_close(dev); 2900 2901 return 0; 2902 } 2903 2904 static const struct rte_pci_id pci_id_sfc_efx_map[] = { 2905 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, 2906 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, 2907 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, 2908 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, 2909 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, 2910 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, 2911 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2) }, 2912 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2_VF) }, 2913 { RTE_PCI_DEVICE(EFX_PCI_VENID_XILINX, EFX_PCI_DEVID_RIVERHEAD) }, 2914 { RTE_PCI_DEVICE(EFX_PCI_VENID_XILINX, EFX_PCI_DEVID_RIVERHEAD_VF) }, 2915 { .vendor_id = 0 /* sentinel */ } 2916 }; 2917 2918 static int 2919 sfc_parse_rte_devargs(const char *args, struct rte_eth_devargs *devargs) 2920 { 2921 struct rte_eth_devargs eth_da = { .nb_representor_ports = 0 }; 2922 int rc; 2923 2924 if (args != NULL) { 2925 rc = rte_eth_devargs_parse(args, ð_da); 2926 if (rc != 0) { 2927 SFC_GENERIC_LOG(ERR, 2928 "Failed to parse generic devargs '%s'", 2929 args); 2930 return rc; 2931 } 2932 } 2933 2934 *devargs = eth_da; 2935 2936 return 0; 2937 } 2938 2939 static int 2940 sfc_eth_dev_find_or_create(struct rte_pci_device *pci_dev, 2941 struct sfc_ethdev_init_data *init_data, 2942 struct rte_eth_dev **devp, 2943 bool *dev_created) 2944 { 2945 struct rte_eth_dev *dev; 2946 bool created = false; 2947 int rc; 2948 2949 dev = rte_eth_dev_allocated(pci_dev->device.name); 2950 if (dev == NULL) { 2951 rc = rte_eth_dev_create(&pci_dev->device, pci_dev->device.name, 2952 sizeof(struct sfc_adapter_shared), 2953 eth_dev_pci_specific_init, pci_dev, 2954 sfc_eth_dev_init, init_data); 2955 if (rc != 0) { 2956 SFC_GENERIC_LOG(ERR, "Failed to create sfc ethdev '%s'", 2957 pci_dev->device.name); 2958 return rc; 2959 } 2960 2961 created = true; 2962 2963 dev = rte_eth_dev_allocated(pci_dev->device.name); 2964 if (dev == NULL) { 2965 SFC_GENERIC_LOG(ERR, 2966 "Failed to find allocated sfc ethdev '%s'", 2967 pci_dev->device.name); 2968 return -ENODEV; 2969 } 2970 } 2971 2972 *devp = dev; 2973 *dev_created = created; 2974 2975 return 0; 2976 } 2977 2978 static int 2979 sfc_eth_dev_create_repr(struct sfc_adapter *sa, 2980 efx_pcie_interface_t controller, 2981 uint16_t port, 2982 uint16_t repr_port, 2983 enum rte_eth_representor_type type) 2984 { 2985 struct sfc_repr_entity_info entity; 2986 efx_mport_sel_t mport_sel; 2987 int rc; 2988 2989 switch (type) { 2990 case RTE_ETH_REPRESENTOR_NONE: 2991 return 0; 2992 case RTE_ETH_REPRESENTOR_VF: 2993 case RTE_ETH_REPRESENTOR_PF: 2994 break; 2995 case RTE_ETH_REPRESENTOR_SF: 2996 sfc_err(sa, "SF representors are not supported"); 2997 return ENOTSUP; 2998 default: 2999 sfc_err(sa, "unknown representor type: %d", type); 3000 return ENOTSUP; 3001 } 3002 3003 rc = efx_mae_mport_by_pcie_mh_function(controller, 3004 port, 3005 repr_port, 3006 &mport_sel); 3007 if (rc != 0) { 3008 sfc_err(sa, 3009 "failed to get m-port selector for controller %u port %u repr_port %u: %s", 3010 controller, port, repr_port, rte_strerror(-rc)); 3011 return rc; 3012 } 3013 3014 memset(&entity, 0, sizeof(entity)); 3015 entity.type = type; 3016 entity.intf = controller; 3017 entity.pf = port; 3018 entity.vf = repr_port; 3019 3020 rc = sfc_repr_create(sa->eth_dev, &entity, sa->mae.switch_domain_id, 3021 &mport_sel); 3022 if (rc != 0) { 3023 sfc_err(sa, 3024 "failed to create representor for controller %u port %u repr_port %u: %s", 3025 controller, port, repr_port, rte_strerror(-rc)); 3026 return rc; 3027 } 3028 3029 return 0; 3030 } 3031 3032 static int 3033 sfc_eth_dev_create_repr_port(struct sfc_adapter *sa, 3034 const struct rte_eth_devargs *eth_da, 3035 efx_pcie_interface_t controller, 3036 uint16_t port) 3037 { 3038 int first_error = 0; 3039 uint16_t i; 3040 int rc; 3041 3042 if (eth_da->type == RTE_ETH_REPRESENTOR_PF) { 3043 return sfc_eth_dev_create_repr(sa, controller, port, 3044 EFX_PCI_VF_INVALID, 3045 eth_da->type); 3046 } 3047 3048 for (i = 0; i < eth_da->nb_representor_ports; i++) { 3049 rc = sfc_eth_dev_create_repr(sa, controller, port, 3050 eth_da->representor_ports[i], 3051 eth_da->type); 3052 if (rc != 0 && first_error == 0) 3053 first_error = rc; 3054 } 3055 3056 return first_error; 3057 } 3058 3059 static int 3060 sfc_eth_dev_create_repr_controller(struct sfc_adapter *sa, 3061 const struct rte_eth_devargs *eth_da, 3062 efx_pcie_interface_t controller) 3063 { 3064 const efx_nic_cfg_t *encp; 3065 int first_error = 0; 3066 uint16_t default_port; 3067 uint16_t i; 3068 int rc; 3069 3070 if (eth_da->nb_ports == 0) { 3071 encp = efx_nic_cfg_get(sa->nic); 3072 default_port = encp->enc_intf == controller ? encp->enc_pf : 0; 3073 return sfc_eth_dev_create_repr_port(sa, eth_da, controller, 3074 default_port); 3075 } 3076 3077 for (i = 0; i < eth_da->nb_ports; i++) { 3078 rc = sfc_eth_dev_create_repr_port(sa, eth_da, controller, 3079 eth_da->ports[i]); 3080 if (rc != 0 && first_error == 0) 3081 first_error = rc; 3082 } 3083 3084 return first_error; 3085 } 3086 3087 static int 3088 sfc_eth_dev_create_representors(struct rte_eth_dev *dev, 3089 const struct rte_eth_devargs *eth_da) 3090 { 3091 efx_pcie_interface_t intf; 3092 const efx_nic_cfg_t *encp; 3093 struct sfc_adapter *sa; 3094 uint16_t switch_domain_id; 3095 uint16_t i; 3096 int rc; 3097 3098 sa = sfc_adapter_by_eth_dev(dev); 3099 switch_domain_id = sa->mae.switch_domain_id; 3100 3101 switch (eth_da->type) { 3102 case RTE_ETH_REPRESENTOR_NONE: 3103 return 0; 3104 case RTE_ETH_REPRESENTOR_PF: 3105 case RTE_ETH_REPRESENTOR_VF: 3106 break; 3107 case RTE_ETH_REPRESENTOR_SF: 3108 sfc_err(sa, "SF representors are not supported"); 3109 return -ENOTSUP; 3110 default: 3111 sfc_err(sa, "unknown representor type: %d", 3112 eth_da->type); 3113 return -ENOTSUP; 3114 } 3115 3116 if (!sa->switchdev) { 3117 sfc_err(sa, "cannot create representors in non-switchdev mode"); 3118 return -EINVAL; 3119 } 3120 3121 if (!sfc_repr_available(sfc_sa2shared(sa))) { 3122 sfc_err(sa, "cannot create representors: unsupported"); 3123 3124 return -ENOTSUP; 3125 } 3126 3127 /* 3128 * This is needed to construct the DPDK controller -> EFX interface 3129 * mapping. 3130 */ 3131 sfc_adapter_lock(sa); 3132 rc = sfc_process_mport_journal(sa); 3133 sfc_adapter_unlock(sa); 3134 if (rc != 0) { 3135 SFC_ASSERT(rc > 0); 3136 return -rc; 3137 } 3138 3139 if (eth_da->nb_mh_controllers > 0) { 3140 for (i = 0; i < eth_da->nb_mh_controllers; i++) { 3141 rc = sfc_mae_switch_domain_get_intf(switch_domain_id, 3142 eth_da->mh_controllers[i], 3143 &intf); 3144 if (rc != 0) { 3145 sfc_err(sa, "failed to get representor"); 3146 continue; 3147 } 3148 sfc_eth_dev_create_repr_controller(sa, eth_da, intf); 3149 } 3150 } else { 3151 encp = efx_nic_cfg_get(sa->nic); 3152 sfc_eth_dev_create_repr_controller(sa, eth_da, encp->enc_intf); 3153 } 3154 3155 return 0; 3156 } 3157 3158 static int sfc_eth_dev_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 3159 struct rte_pci_device *pci_dev) 3160 { 3161 struct sfc_ethdev_init_data init_data; 3162 struct rte_eth_devargs eth_da; 3163 struct rte_eth_dev *dev; 3164 bool dev_created; 3165 int rc; 3166 3167 if (pci_dev->device.devargs != NULL) { 3168 rc = sfc_parse_rte_devargs(pci_dev->device.devargs->args, 3169 ð_da); 3170 if (rc != 0) 3171 return rc; 3172 } else { 3173 memset(ð_da, 0, sizeof(eth_da)); 3174 } 3175 3176 /* If no VF representors specified, check for PF ones */ 3177 if (eth_da.nb_representor_ports > 0) 3178 init_data.nb_representors = eth_da.nb_representor_ports; 3179 else 3180 init_data.nb_representors = eth_da.nb_ports; 3181 3182 if (init_data.nb_representors > 0 && 3183 rte_eal_process_type() != RTE_PROC_PRIMARY) { 3184 SFC_GENERIC_LOG(ERR, 3185 "Create representors from secondary process not supported, dev '%s'", 3186 pci_dev->device.name); 3187 return -ENOTSUP; 3188 } 3189 3190 /* 3191 * Driver supports RTE_PCI_DRV_PROBE_AGAIN. Hence create device only 3192 * if it does not already exist. Re-probing an existing device is 3193 * expected to allow additional representors to be configured. 3194 */ 3195 rc = sfc_eth_dev_find_or_create(pci_dev, &init_data, &dev, 3196 &dev_created); 3197 if (rc != 0) 3198 return rc; 3199 3200 rc = sfc_eth_dev_create_representors(dev, ð_da); 3201 if (rc != 0) { 3202 if (dev_created) 3203 (void)rte_eth_dev_destroy(dev, sfc_eth_dev_uninit); 3204 3205 return rc; 3206 } 3207 3208 return 0; 3209 } 3210 3211 static int sfc_eth_dev_pci_remove(struct rte_pci_device *pci_dev) 3212 { 3213 return rte_eth_dev_pci_generic_remove(pci_dev, sfc_eth_dev_uninit); 3214 } 3215 3216 static struct rte_pci_driver sfc_efx_pmd = { 3217 .id_table = pci_id_sfc_efx_map, 3218 .drv_flags = 3219 RTE_PCI_DRV_INTR_LSC | 3220 RTE_PCI_DRV_NEED_MAPPING | 3221 RTE_PCI_DRV_PROBE_AGAIN, 3222 .probe = sfc_eth_dev_pci_probe, 3223 .remove = sfc_eth_dev_pci_remove, 3224 }; 3225 3226 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd); 3227 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); 3228 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio-pci"); 3229 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, 3230 SFC_KVARG_SWITCH_MODE "=" SFC_KVARG_VALUES_SWITCH_MODE " " 3231 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " " 3232 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " " 3233 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " 3234 SFC_KVARG_FW_VARIANT "=" SFC_KVARG_VALUES_FW_VARIANT " " 3235 SFC_KVARG_RXD_WAIT_TIMEOUT_NS "=<long> " 3236 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long>"); 3237 3238 RTE_INIT(sfc_driver_register_logtype) 3239 { 3240 int ret; 3241 3242 ret = rte_log_register_type_and_pick_level(SFC_LOGTYPE_PREFIX "driver", 3243 RTE_LOG_NOTICE); 3244 sfc_logtype_driver = (ret < 0) ? RTE_LOGTYPE_EAL : ret; 3245 } 3246