1 /*- 2 * Copyright (c) 2016 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * This software was jointly developed between OKTET Labs (under contract 6 * for Solarflare) and Solarflare Communications, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright notice, 12 * this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright notice, 14 * this list of conditions and the following disclaimer in the documentation 15 * and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <rte_dev.h> 31 #include <rte_ethdev.h> 32 #include <rte_pci.h> 33 34 #include "efx.h" 35 36 #include "sfc.h" 37 #include "sfc_debug.h" 38 #include "sfc_log.h" 39 #include "sfc_kvargs.h" 40 #include "sfc_ev.h" 41 #include "sfc_rx.h" 42 #include "sfc_tx.h" 43 #include "sfc_flow.h" 44 45 static void 46 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 47 { 48 struct sfc_adapter *sa = dev->data->dev_private; 49 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 50 51 sfc_log_init(sa, "entry"); 52 53 dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device); 54 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; 55 56 /* Autonegotiation may be disabled */ 57 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 58 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX) 59 dev_info->speed_capa |= ETH_LINK_SPEED_1G; 60 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX) 61 dev_info->speed_capa |= ETH_LINK_SPEED_10G; 62 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX) 63 dev_info->speed_capa |= ETH_LINK_SPEED_40G; 64 65 dev_info->max_rx_queues = sa->rxq_max; 66 dev_info->max_tx_queues = sa->txq_max; 67 68 /* By default packets are dropped if no descriptors are available */ 69 dev_info->default_rxconf.rx_drop_en = 1; 70 71 dev_info->rx_offload_capa = 72 DEV_RX_OFFLOAD_IPV4_CKSUM | 73 DEV_RX_OFFLOAD_UDP_CKSUM | 74 DEV_RX_OFFLOAD_TCP_CKSUM; 75 76 dev_info->tx_offload_capa = 77 DEV_TX_OFFLOAD_IPV4_CKSUM | 78 DEV_TX_OFFLOAD_UDP_CKSUM | 79 DEV_TX_OFFLOAD_TCP_CKSUM; 80 81 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP; 82 if (!encp->enc_hw_tx_insert_vlan_enabled) 83 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL; 84 else 85 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT; 86 87 #if EFSYS_OPT_RX_SCALE 88 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) { 89 dev_info->reta_size = EFX_RSS_TBL_SIZE; 90 dev_info->hash_key_size = SFC_RSS_KEY_SIZE; 91 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS; 92 } 93 #endif 94 95 if (sa->tso) 96 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO; 97 98 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS; 99 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS; 100 /* The RXQ hardware requires that the descriptor count is a power 101 * of 2, but rx_desc_lim cannot properly describe that constraint. 102 */ 103 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS; 104 105 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; 106 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS; 107 /* 108 * The TXQ hardware requires that the descriptor count is a power 109 * of 2, but tx_desc_lim cannot properly describe that constraint 110 */ 111 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS; 112 } 113 114 static const uint32_t * 115 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) 116 { 117 static const uint32_t ptypes[] = { 118 RTE_PTYPE_L2_ETHER, 119 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 120 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN, 121 RTE_PTYPE_L4_TCP, 122 RTE_PTYPE_L4_UDP, 123 RTE_PTYPE_UNKNOWN 124 }; 125 126 if (dev->rx_pkt_burst == sfc_recv_pkts) 127 return ptypes; 128 129 return NULL; 130 } 131 132 static int 133 sfc_dev_configure(struct rte_eth_dev *dev) 134 { 135 struct rte_eth_dev_data *dev_data = dev->data; 136 struct sfc_adapter *sa = dev_data->dev_private; 137 int rc; 138 139 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u", 140 dev_data->nb_rx_queues, dev_data->nb_tx_queues); 141 142 sfc_adapter_lock(sa); 143 switch (sa->state) { 144 case SFC_ADAPTER_CONFIGURED: 145 sfc_close(sa); 146 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED); 147 /* FALLTHROUGH */ 148 case SFC_ADAPTER_INITIALIZED: 149 rc = sfc_configure(sa); 150 break; 151 default: 152 sfc_err(sa, "unexpected adapter state %u to configure", 153 sa->state); 154 rc = EINVAL; 155 break; 156 } 157 sfc_adapter_unlock(sa); 158 159 sfc_log_init(sa, "done %d", rc); 160 SFC_ASSERT(rc >= 0); 161 return -rc; 162 } 163 164 static int 165 sfc_dev_start(struct rte_eth_dev *dev) 166 { 167 struct sfc_adapter *sa = dev->data->dev_private; 168 int rc; 169 170 sfc_log_init(sa, "entry"); 171 172 sfc_adapter_lock(sa); 173 rc = sfc_start(sa); 174 sfc_adapter_unlock(sa); 175 176 sfc_log_init(sa, "done %d", rc); 177 SFC_ASSERT(rc >= 0); 178 return -rc; 179 } 180 181 static int 182 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 183 { 184 struct sfc_adapter *sa = dev->data->dev_private; 185 struct rte_eth_link *dev_link = &dev->data->dev_link; 186 struct rte_eth_link old_link; 187 struct rte_eth_link current_link; 188 189 sfc_log_init(sa, "entry"); 190 191 retry: 192 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t)); 193 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link); 194 195 if (sa->state != SFC_ADAPTER_STARTED) { 196 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link); 197 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 198 *(uint64_t *)&old_link, 199 *(uint64_t *)¤t_link)) 200 goto retry; 201 } else if (wait_to_complete) { 202 efx_link_mode_t link_mode; 203 204 if (efx_port_poll(sa->nic, &link_mode) != 0) 205 link_mode = EFX_LINK_UNKNOWN; 206 sfc_port_link_mode_to_info(link_mode, ¤t_link); 207 208 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 209 *(uint64_t *)&old_link, 210 *(uint64_t *)¤t_link)) 211 goto retry; 212 } else { 213 sfc_ev_mgmt_qpoll(sa); 214 *(int64_t *)¤t_link = 215 rte_atomic64_read((rte_atomic64_t *)dev_link); 216 } 217 218 if (old_link.link_status != current_link.link_status) 219 sfc_info(sa, "Link status is %s", 220 current_link.link_status ? "UP" : "DOWN"); 221 222 return old_link.link_status == current_link.link_status ? 0 : -1; 223 } 224 225 static void 226 sfc_dev_stop(struct rte_eth_dev *dev) 227 { 228 struct sfc_adapter *sa = dev->data->dev_private; 229 230 sfc_log_init(sa, "entry"); 231 232 sfc_adapter_lock(sa); 233 sfc_stop(sa); 234 sfc_adapter_unlock(sa); 235 236 sfc_log_init(sa, "done"); 237 } 238 239 static int 240 sfc_dev_set_link_up(struct rte_eth_dev *dev) 241 { 242 struct sfc_adapter *sa = dev->data->dev_private; 243 int rc; 244 245 sfc_log_init(sa, "entry"); 246 247 sfc_adapter_lock(sa); 248 rc = sfc_start(sa); 249 sfc_adapter_unlock(sa); 250 251 SFC_ASSERT(rc >= 0); 252 return -rc; 253 } 254 255 static int 256 sfc_dev_set_link_down(struct rte_eth_dev *dev) 257 { 258 struct sfc_adapter *sa = dev->data->dev_private; 259 260 sfc_log_init(sa, "entry"); 261 262 sfc_adapter_lock(sa); 263 sfc_stop(sa); 264 sfc_adapter_unlock(sa); 265 266 return 0; 267 } 268 269 static void 270 sfc_dev_close(struct rte_eth_dev *dev) 271 { 272 struct sfc_adapter *sa = dev->data->dev_private; 273 274 sfc_log_init(sa, "entry"); 275 276 sfc_adapter_lock(sa); 277 switch (sa->state) { 278 case SFC_ADAPTER_STARTED: 279 sfc_stop(sa); 280 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED); 281 /* FALLTHROUGH */ 282 case SFC_ADAPTER_CONFIGURED: 283 sfc_close(sa); 284 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED); 285 /* FALLTHROUGH */ 286 case SFC_ADAPTER_INITIALIZED: 287 break; 288 default: 289 sfc_err(sa, "unexpected adapter state %u on close", sa->state); 290 break; 291 } 292 sfc_adapter_unlock(sa); 293 294 sfc_log_init(sa, "done"); 295 } 296 297 static void 298 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode, 299 boolean_t enabled) 300 { 301 struct sfc_port *port; 302 boolean_t *toggle; 303 struct sfc_adapter *sa = dev->data->dev_private; 304 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI); 305 const char *desc = (allmulti) ? "all-multi" : "promiscuous"; 306 307 sfc_adapter_lock(sa); 308 309 port = &sa->port; 310 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc); 311 312 if (*toggle != enabled) { 313 *toggle = enabled; 314 315 if ((sa->state == SFC_ADAPTER_STARTED) && 316 (sfc_set_rx_mode(sa) != 0)) { 317 *toggle = !(enabled); 318 sfc_warn(sa, "Failed to %s %s mode", 319 ((enabled) ? "enable" : "disable"), desc); 320 } 321 } 322 323 sfc_adapter_unlock(sa); 324 } 325 326 static void 327 sfc_dev_promisc_enable(struct rte_eth_dev *dev) 328 { 329 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE); 330 } 331 332 static void 333 sfc_dev_promisc_disable(struct rte_eth_dev *dev) 334 { 335 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE); 336 } 337 338 static void 339 sfc_dev_allmulti_enable(struct rte_eth_dev *dev) 340 { 341 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE); 342 } 343 344 static void 345 sfc_dev_allmulti_disable(struct rte_eth_dev *dev) 346 { 347 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE); 348 } 349 350 static int 351 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, 352 uint16_t nb_rx_desc, unsigned int socket_id, 353 const struct rte_eth_rxconf *rx_conf, 354 struct rte_mempool *mb_pool) 355 { 356 struct sfc_adapter *sa = dev->data->dev_private; 357 int rc; 358 359 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u", 360 rx_queue_id, nb_rx_desc, socket_id); 361 362 sfc_adapter_lock(sa); 363 364 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id, 365 rx_conf, mb_pool); 366 if (rc != 0) 367 goto fail_rx_qinit; 368 369 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq; 370 371 sfc_adapter_unlock(sa); 372 373 return 0; 374 375 fail_rx_qinit: 376 sfc_adapter_unlock(sa); 377 SFC_ASSERT(rc > 0); 378 return -rc; 379 } 380 381 static void 382 sfc_rx_queue_release(void *queue) 383 { 384 struct sfc_rxq *rxq = queue; 385 struct sfc_adapter *sa; 386 unsigned int sw_index; 387 388 if (rxq == NULL) 389 return; 390 391 sa = rxq->evq->sa; 392 sfc_adapter_lock(sa); 393 394 sw_index = sfc_rxq_sw_index(rxq); 395 396 sfc_log_init(sa, "RxQ=%u", sw_index); 397 398 sa->eth_dev->data->rx_queues[sw_index] = NULL; 399 400 sfc_rx_qfini(sa, sw_index); 401 402 sfc_adapter_unlock(sa); 403 } 404 405 static int 406 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, 407 uint16_t nb_tx_desc, unsigned int socket_id, 408 const struct rte_eth_txconf *tx_conf) 409 { 410 struct sfc_adapter *sa = dev->data->dev_private; 411 int rc; 412 413 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u", 414 tx_queue_id, nb_tx_desc, socket_id); 415 416 sfc_adapter_lock(sa); 417 418 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf); 419 if (rc != 0) 420 goto fail_tx_qinit; 421 422 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq; 423 424 sfc_adapter_unlock(sa); 425 return 0; 426 427 fail_tx_qinit: 428 sfc_adapter_unlock(sa); 429 SFC_ASSERT(rc > 0); 430 return -rc; 431 } 432 433 static void 434 sfc_tx_queue_release(void *queue) 435 { 436 struct sfc_txq *txq = queue; 437 unsigned int sw_index; 438 struct sfc_adapter *sa; 439 440 if (txq == NULL) 441 return; 442 443 sw_index = sfc_txq_sw_index(txq); 444 445 SFC_ASSERT(txq->evq != NULL); 446 sa = txq->evq->sa; 447 448 sfc_log_init(sa, "TxQ = %u", sw_index); 449 450 sfc_adapter_lock(sa); 451 452 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues); 453 sa->eth_dev->data->tx_queues[sw_index] = NULL; 454 455 sfc_tx_qfini(sa, sw_index); 456 457 sfc_adapter_unlock(sa); 458 } 459 460 static void 461 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 462 { 463 struct sfc_adapter *sa = dev->data->dev_private; 464 struct sfc_port *port = &sa->port; 465 uint64_t *mac_stats; 466 467 rte_spinlock_lock(&port->mac_stats_lock); 468 469 if (sfc_port_update_mac_stats(sa) != 0) 470 goto unlock; 471 472 mac_stats = port->mac_stats_buf; 473 474 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, 475 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) { 476 stats->ipackets = 477 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] + 478 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] + 479 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]; 480 stats->opackets = 481 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] + 482 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] + 483 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]; 484 stats->ibytes = 485 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] + 486 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] + 487 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]; 488 stats->obytes = 489 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] + 490 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] + 491 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; 492 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW]; 493 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; 494 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; 495 } else { 496 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS]; 497 stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; 498 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS]; 499 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS]; 500 /* 501 * Take into account stats which are whenever supported 502 * on EF10. If some stat is not supported by current 503 * firmware variant or HW revision, it is guaranteed 504 * to be zero in mac_stats. 505 */ 506 stats->imissed = 507 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] + 508 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] + 509 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] + 510 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] + 511 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] + 512 mac_stats[EFX_MAC_PM_TRUNC_QBB] + 513 mac_stats[EFX_MAC_PM_DISCARD_QBB] + 514 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] + 515 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] + 516 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS]; 517 stats->ierrors = 518 mac_stats[EFX_MAC_RX_FCS_ERRORS] + 519 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] + 520 mac_stats[EFX_MAC_RX_JABBER_PKTS]; 521 /* no oerrors counters supported on EF10 */ 522 } 523 524 unlock: 525 rte_spinlock_unlock(&port->mac_stats_lock); 526 } 527 528 static void 529 sfc_stats_reset(struct rte_eth_dev *dev) 530 { 531 struct sfc_adapter *sa = dev->data->dev_private; 532 struct sfc_port *port = &sa->port; 533 int rc; 534 535 if (sa->state != SFC_ADAPTER_STARTED) { 536 /* 537 * The operation cannot be done if port is not started; it 538 * will be scheduled to be done during the next port start 539 */ 540 port->mac_stats_reset_pending = B_TRUE; 541 return; 542 } 543 544 rc = sfc_port_reset_mac_stats(sa); 545 if (rc != 0) 546 sfc_err(sa, "failed to reset statistics (rc = %d)", rc); 547 } 548 549 static int 550 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 551 unsigned int xstats_count) 552 { 553 struct sfc_adapter *sa = dev->data->dev_private; 554 struct sfc_port *port = &sa->port; 555 uint64_t *mac_stats; 556 int rc; 557 unsigned int i; 558 int nstats = 0; 559 560 rte_spinlock_lock(&port->mac_stats_lock); 561 562 rc = sfc_port_update_mac_stats(sa); 563 if (rc != 0) { 564 SFC_ASSERT(rc > 0); 565 nstats = -rc; 566 goto unlock; 567 } 568 569 mac_stats = port->mac_stats_buf; 570 571 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 572 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 573 if (xstats != NULL && nstats < (int)xstats_count) { 574 xstats[nstats].id = nstats; 575 xstats[nstats].value = mac_stats[i]; 576 } 577 nstats++; 578 } 579 } 580 581 unlock: 582 rte_spinlock_unlock(&port->mac_stats_lock); 583 584 return nstats; 585 } 586 587 static int 588 sfc_xstats_get_names(struct rte_eth_dev *dev, 589 struct rte_eth_xstat_name *xstats_names, 590 unsigned int xstats_count) 591 { 592 struct sfc_adapter *sa = dev->data->dev_private; 593 struct sfc_port *port = &sa->port; 594 unsigned int i; 595 unsigned int nstats = 0; 596 597 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 598 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 599 if (xstats_names != NULL && nstats < xstats_count) 600 strncpy(xstats_names[nstats].name, 601 efx_mac_stat_name(sa->nic, i), 602 sizeof(xstats_names[0].name)); 603 nstats++; 604 } 605 } 606 607 return nstats; 608 } 609 610 static int 611 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 612 { 613 struct sfc_adapter *sa = dev->data->dev_private; 614 unsigned int wanted_fc, link_fc; 615 616 memset(fc_conf, 0, sizeof(*fc_conf)); 617 618 sfc_adapter_lock(sa); 619 620 if (sa->state == SFC_ADAPTER_STARTED) 621 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc); 622 else 623 link_fc = sa->port.flow_ctrl; 624 625 switch (link_fc) { 626 case 0: 627 fc_conf->mode = RTE_FC_NONE; 628 break; 629 case EFX_FCNTL_RESPOND: 630 fc_conf->mode = RTE_FC_RX_PAUSE; 631 break; 632 case EFX_FCNTL_GENERATE: 633 fc_conf->mode = RTE_FC_TX_PAUSE; 634 break; 635 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE): 636 fc_conf->mode = RTE_FC_FULL; 637 break; 638 default: 639 sfc_err(sa, "%s: unexpected flow control value %#x", 640 __func__, link_fc); 641 } 642 643 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; 644 645 sfc_adapter_unlock(sa); 646 647 return 0; 648 } 649 650 static int 651 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 652 { 653 struct sfc_adapter *sa = dev->data->dev_private; 654 struct sfc_port *port = &sa->port; 655 unsigned int fcntl; 656 int rc; 657 658 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || 659 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || 660 fc_conf->mac_ctrl_frame_fwd != 0) { 661 sfc_err(sa, "unsupported flow control settings specified"); 662 rc = EINVAL; 663 goto fail_inval; 664 } 665 666 switch (fc_conf->mode) { 667 case RTE_FC_NONE: 668 fcntl = 0; 669 break; 670 case RTE_FC_RX_PAUSE: 671 fcntl = EFX_FCNTL_RESPOND; 672 break; 673 case RTE_FC_TX_PAUSE: 674 fcntl = EFX_FCNTL_GENERATE; 675 break; 676 case RTE_FC_FULL: 677 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 678 break; 679 default: 680 rc = EINVAL; 681 goto fail_inval; 682 } 683 684 sfc_adapter_lock(sa); 685 686 if (sa->state == SFC_ADAPTER_STARTED) { 687 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg); 688 if (rc != 0) 689 goto fail_mac_fcntl_set; 690 } 691 692 port->flow_ctrl = fcntl; 693 port->flow_ctrl_autoneg = fc_conf->autoneg; 694 695 sfc_adapter_unlock(sa); 696 697 return 0; 698 699 fail_mac_fcntl_set: 700 sfc_adapter_unlock(sa); 701 fail_inval: 702 SFC_ASSERT(rc > 0); 703 return -rc; 704 } 705 706 static int 707 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 708 { 709 struct sfc_adapter *sa = dev->data->dev_private; 710 size_t pdu = EFX_MAC_PDU(mtu); 711 size_t old_pdu; 712 int rc; 713 714 sfc_log_init(sa, "mtu=%u", mtu); 715 716 rc = EINVAL; 717 if (pdu < EFX_MAC_PDU_MIN) { 718 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)", 719 (unsigned int)mtu, (unsigned int)pdu, 720 EFX_MAC_PDU_MIN); 721 goto fail_inval; 722 } 723 if (pdu > EFX_MAC_PDU_MAX) { 724 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)", 725 (unsigned int)mtu, (unsigned int)pdu, 726 EFX_MAC_PDU_MAX); 727 goto fail_inval; 728 } 729 730 sfc_adapter_lock(sa); 731 732 if (pdu != sa->port.pdu) { 733 if (sa->state == SFC_ADAPTER_STARTED) { 734 sfc_stop(sa); 735 736 old_pdu = sa->port.pdu; 737 sa->port.pdu = pdu; 738 rc = sfc_start(sa); 739 if (rc != 0) 740 goto fail_start; 741 } else { 742 sa->port.pdu = pdu; 743 } 744 } 745 746 /* 747 * The driver does not use it, but other PMDs update jumbo_frame 748 * flag and max_rx_pkt_len when MTU is set. 749 */ 750 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN); 751 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu; 752 753 sfc_adapter_unlock(sa); 754 755 sfc_log_init(sa, "done"); 756 return 0; 757 758 fail_start: 759 sa->port.pdu = old_pdu; 760 if (sfc_start(sa) != 0) 761 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) " 762 "PDU max size - port is stopped", 763 (unsigned int)pdu, (unsigned int)old_pdu); 764 sfc_adapter_unlock(sa); 765 766 fail_inval: 767 sfc_log_init(sa, "failed %d", rc); 768 SFC_ASSERT(rc > 0); 769 return -rc; 770 } 771 static void 772 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr) 773 { 774 struct sfc_adapter *sa = dev->data->dev_private; 775 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 776 int rc; 777 778 sfc_adapter_lock(sa); 779 780 if (sa->state != SFC_ADAPTER_STARTED) { 781 sfc_info(sa, "the port is not started"); 782 sfc_info(sa, "the new MAC address will be set on port start"); 783 784 goto unlock; 785 } 786 787 if (encp->enc_allow_set_mac_with_installed_filters) { 788 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes); 789 if (rc != 0) { 790 sfc_err(sa, "cannot set MAC address (rc = %u)", rc); 791 goto unlock; 792 } 793 794 /* 795 * Changing the MAC address by means of MCDI request 796 * has no effect on received traffic, therefore 797 * we also need to update unicast filters 798 */ 799 rc = sfc_set_rx_mode(sa); 800 if (rc != 0) 801 sfc_err(sa, "cannot set filter (rc = %u)", rc); 802 } else { 803 sfc_warn(sa, "cannot set MAC address with filters installed"); 804 sfc_warn(sa, "adapter will be restarted to pick the new MAC"); 805 sfc_warn(sa, "(some traffic may be dropped)"); 806 807 /* 808 * Since setting MAC address with filters installed is not 809 * allowed on the adapter, one needs to simply restart adapter 810 * so that the new MAC address will be taken from an outer 811 * storage and set flawlessly by means of sfc_start() call 812 */ 813 sfc_stop(sa); 814 rc = sfc_start(sa); 815 if (rc != 0) 816 sfc_err(sa, "cannot restart adapter (rc = %u)", rc); 817 } 818 819 unlock: 820 sfc_adapter_unlock(sa); 821 } 822 823 824 static int 825 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set, 826 uint32_t nb_mc_addr) 827 { 828 struct sfc_adapter *sa = dev->data->dev_private; 829 struct sfc_port *port = &sa->port; 830 uint8_t *mc_addrs = port->mcast_addrs; 831 int rc; 832 unsigned int i; 833 834 if (mc_addrs == NULL) 835 return -ENOBUFS; 836 837 if (nb_mc_addr > port->max_mcast_addrs) { 838 sfc_err(sa, "too many multicast addresses: %u > %u", 839 nb_mc_addr, port->max_mcast_addrs); 840 return -EINVAL; 841 } 842 843 for (i = 0; i < nb_mc_addr; ++i) { 844 (void)rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, 845 EFX_MAC_ADDR_LEN); 846 mc_addrs += EFX_MAC_ADDR_LEN; 847 } 848 849 port->nb_mcast_addrs = nb_mc_addr; 850 851 if (sa->state != SFC_ADAPTER_STARTED) 852 return 0; 853 854 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, 855 port->nb_mcast_addrs); 856 if (rc != 0) 857 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); 858 859 SFC_ASSERT(rc > 0); 860 return -rc; 861 } 862 863 static void 864 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id, 865 struct rte_eth_rxq_info *qinfo) 866 { 867 struct sfc_adapter *sa = dev->data->dev_private; 868 struct sfc_rxq_info *rxq_info; 869 struct sfc_rxq *rxq; 870 871 sfc_adapter_lock(sa); 872 873 SFC_ASSERT(rx_queue_id < sa->rxq_count); 874 875 rxq_info = &sa->rxq_info[rx_queue_id]; 876 rxq = rxq_info->rxq; 877 SFC_ASSERT(rxq != NULL); 878 879 qinfo->mp = rxq->refill_mb_pool; 880 qinfo->conf.rx_free_thresh = rxq->refill_threshold; 881 qinfo->conf.rx_drop_en = 1; 882 qinfo->conf.rx_deferred_start = rxq_info->deferred_start; 883 qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER); 884 qinfo->nb_desc = rxq_info->entries; 885 886 sfc_adapter_unlock(sa); 887 } 888 889 static void 890 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id, 891 struct rte_eth_txq_info *qinfo) 892 { 893 struct sfc_adapter *sa = dev->data->dev_private; 894 struct sfc_txq_info *txq_info; 895 896 sfc_adapter_lock(sa); 897 898 SFC_ASSERT(tx_queue_id < sa->txq_count); 899 900 txq_info = &sa->txq_info[tx_queue_id]; 901 SFC_ASSERT(txq_info->txq != NULL); 902 903 memset(qinfo, 0, sizeof(*qinfo)); 904 905 qinfo->conf.txq_flags = txq_info->txq->flags; 906 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh; 907 qinfo->conf.tx_deferred_start = txq_info->deferred_start; 908 qinfo->nb_desc = txq_info->entries; 909 910 sfc_adapter_unlock(sa); 911 } 912 913 static uint32_t 914 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) 915 { 916 struct sfc_adapter *sa = dev->data->dev_private; 917 918 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 919 920 return sfc_rx_qdesc_npending(sa, rx_queue_id); 921 } 922 923 static int 924 sfc_rx_descriptor_done(void *queue, uint16_t offset) 925 { 926 struct sfc_rxq *rxq = queue; 927 928 return sfc_rx_qdesc_done(rxq, offset); 929 } 930 931 static int 932 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) 933 { 934 struct sfc_adapter *sa = dev->data->dev_private; 935 int rc; 936 937 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 938 939 sfc_adapter_lock(sa); 940 941 rc = EINVAL; 942 if (sa->state != SFC_ADAPTER_STARTED) 943 goto fail_not_started; 944 945 rc = sfc_rx_qstart(sa, rx_queue_id); 946 if (rc != 0) 947 goto fail_rx_qstart; 948 949 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE; 950 951 sfc_adapter_unlock(sa); 952 953 return 0; 954 955 fail_rx_qstart: 956 fail_not_started: 957 sfc_adapter_unlock(sa); 958 SFC_ASSERT(rc > 0); 959 return -rc; 960 } 961 962 static int 963 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) 964 { 965 struct sfc_adapter *sa = dev->data->dev_private; 966 967 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 968 969 sfc_adapter_lock(sa); 970 sfc_rx_qstop(sa, rx_queue_id); 971 972 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE; 973 974 sfc_adapter_unlock(sa); 975 976 return 0; 977 } 978 979 static int 980 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) 981 { 982 struct sfc_adapter *sa = dev->data->dev_private; 983 int rc; 984 985 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 986 987 sfc_adapter_lock(sa); 988 989 rc = EINVAL; 990 if (sa->state != SFC_ADAPTER_STARTED) 991 goto fail_not_started; 992 993 rc = sfc_tx_qstart(sa, tx_queue_id); 994 if (rc != 0) 995 goto fail_tx_qstart; 996 997 sa->txq_info[tx_queue_id].deferred_started = B_TRUE; 998 999 sfc_adapter_unlock(sa); 1000 return 0; 1001 1002 fail_tx_qstart: 1003 1004 fail_not_started: 1005 sfc_adapter_unlock(sa); 1006 SFC_ASSERT(rc > 0); 1007 return -rc; 1008 } 1009 1010 static int 1011 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1012 { 1013 struct sfc_adapter *sa = dev->data->dev_private; 1014 1015 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1016 1017 sfc_adapter_lock(sa); 1018 1019 sfc_tx_qstop(sa, tx_queue_id); 1020 1021 sa->txq_info[tx_queue_id].deferred_started = B_FALSE; 1022 1023 sfc_adapter_unlock(sa); 1024 return 0; 1025 } 1026 1027 #if EFSYS_OPT_RX_SCALE 1028 static int 1029 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1030 struct rte_eth_rss_conf *rss_conf) 1031 { 1032 struct sfc_adapter *sa = dev->data->dev_private; 1033 1034 if ((sa->rss_channels == 1) || 1035 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) 1036 return -ENOTSUP; 1037 1038 sfc_adapter_lock(sa); 1039 1040 /* 1041 * Mapping of hash configuration between RTE and EFX is not one-to-one, 1042 * hence, conversion is done here to derive a correct set of ETH_RSS 1043 * flags which corresponds to the active EFX configuration stored 1044 * locally in 'sfc_adapter' and kept up-to-date 1045 */ 1046 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types); 1047 rss_conf->rss_key_len = SFC_RSS_KEY_SIZE; 1048 if (rss_conf->rss_key != NULL) 1049 rte_memcpy(rss_conf->rss_key, sa->rss_key, SFC_RSS_KEY_SIZE); 1050 1051 sfc_adapter_unlock(sa); 1052 1053 return 0; 1054 } 1055 1056 static int 1057 sfc_dev_rss_hash_update(struct rte_eth_dev *dev, 1058 struct rte_eth_rss_conf *rss_conf) 1059 { 1060 struct sfc_adapter *sa = dev->data->dev_private; 1061 unsigned int efx_hash_types; 1062 int rc = 0; 1063 1064 if ((sa->rss_channels == 1) || 1065 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) { 1066 sfc_err(sa, "RSS is not available"); 1067 return -ENOTSUP; 1068 } 1069 1070 if ((rss_conf->rss_key != NULL) && 1071 (rss_conf->rss_key_len != sizeof(sa->rss_key))) { 1072 sfc_err(sa, "RSS key size is wrong (should be %lu)", 1073 sizeof(sa->rss_key)); 1074 return -EINVAL; 1075 } 1076 1077 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) { 1078 sfc_err(sa, "unsupported hash functions requested"); 1079 return -EINVAL; 1080 } 1081 1082 sfc_adapter_lock(sa); 1083 1084 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf); 1085 1086 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, 1087 efx_hash_types, B_TRUE); 1088 if (rc != 0) 1089 goto fail_scale_mode_set; 1090 1091 if (rss_conf->rss_key != NULL) { 1092 if (sa->state == SFC_ADAPTER_STARTED) { 1093 rc = efx_rx_scale_key_set(sa->nic, rss_conf->rss_key, 1094 sizeof(sa->rss_key)); 1095 if (rc != 0) 1096 goto fail_scale_key_set; 1097 } 1098 1099 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key)); 1100 } 1101 1102 sa->rss_hash_types = efx_hash_types; 1103 1104 sfc_adapter_unlock(sa); 1105 1106 return 0; 1107 1108 fail_scale_key_set: 1109 if (efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, 1110 sa->rss_hash_types, B_TRUE) != 0) 1111 sfc_err(sa, "failed to restore RSS mode"); 1112 1113 fail_scale_mode_set: 1114 sfc_adapter_unlock(sa); 1115 return -rc; 1116 } 1117 1118 static int 1119 sfc_dev_rss_reta_query(struct rte_eth_dev *dev, 1120 struct rte_eth_rss_reta_entry64 *reta_conf, 1121 uint16_t reta_size) 1122 { 1123 struct sfc_adapter *sa = dev->data->dev_private; 1124 int entry; 1125 1126 if ((sa->rss_channels == 1) || 1127 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) 1128 return -ENOTSUP; 1129 1130 if (reta_size != EFX_RSS_TBL_SIZE) 1131 return -EINVAL; 1132 1133 sfc_adapter_lock(sa); 1134 1135 for (entry = 0; entry < reta_size; entry++) { 1136 int grp = entry / RTE_RETA_GROUP_SIZE; 1137 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1138 1139 if ((reta_conf[grp].mask >> grp_idx) & 1) 1140 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry]; 1141 } 1142 1143 sfc_adapter_unlock(sa); 1144 1145 return 0; 1146 } 1147 1148 static int 1149 sfc_dev_rss_reta_update(struct rte_eth_dev *dev, 1150 struct rte_eth_rss_reta_entry64 *reta_conf, 1151 uint16_t reta_size) 1152 { 1153 struct sfc_adapter *sa = dev->data->dev_private; 1154 unsigned int *rss_tbl_new; 1155 uint16_t entry; 1156 int rc; 1157 1158 1159 if ((sa->rss_channels == 1) || 1160 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) { 1161 sfc_err(sa, "RSS is not available"); 1162 return -ENOTSUP; 1163 } 1164 1165 if (reta_size != EFX_RSS_TBL_SIZE) { 1166 sfc_err(sa, "RETA size is wrong (should be %u)", 1167 EFX_RSS_TBL_SIZE); 1168 return -EINVAL; 1169 } 1170 1171 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0); 1172 if (rss_tbl_new == NULL) 1173 return -ENOMEM; 1174 1175 sfc_adapter_lock(sa); 1176 1177 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl)); 1178 1179 for (entry = 0; entry < reta_size; entry++) { 1180 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1181 struct rte_eth_rss_reta_entry64 *grp; 1182 1183 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE]; 1184 1185 if (grp->mask & (1ull << grp_idx)) { 1186 if (grp->reta[grp_idx] >= sa->rss_channels) { 1187 rc = EINVAL; 1188 goto bad_reta_entry; 1189 } 1190 rss_tbl_new[entry] = grp->reta[grp_idx]; 1191 } 1192 } 1193 1194 rc = efx_rx_scale_tbl_set(sa->nic, rss_tbl_new, EFX_RSS_TBL_SIZE); 1195 if (rc == 0) 1196 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl)); 1197 1198 bad_reta_entry: 1199 sfc_adapter_unlock(sa); 1200 1201 rte_free(rss_tbl_new); 1202 1203 SFC_ASSERT(rc >= 0); 1204 return -rc; 1205 } 1206 #endif 1207 1208 static int 1209 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type, 1210 enum rte_filter_op filter_op, 1211 void *arg) 1212 { 1213 struct sfc_adapter *sa = dev->data->dev_private; 1214 int rc = ENOTSUP; 1215 1216 sfc_log_init(sa, "entry"); 1217 1218 switch (filter_type) { 1219 case RTE_ETH_FILTER_NONE: 1220 sfc_err(sa, "Global filters configuration not supported"); 1221 break; 1222 case RTE_ETH_FILTER_MACVLAN: 1223 sfc_err(sa, "MACVLAN filters not supported"); 1224 break; 1225 case RTE_ETH_FILTER_ETHERTYPE: 1226 sfc_err(sa, "EtherType filters not supported"); 1227 break; 1228 case RTE_ETH_FILTER_FLEXIBLE: 1229 sfc_err(sa, "Flexible filters not supported"); 1230 break; 1231 case RTE_ETH_FILTER_SYN: 1232 sfc_err(sa, "SYN filters not supported"); 1233 break; 1234 case RTE_ETH_FILTER_NTUPLE: 1235 sfc_err(sa, "NTUPLE filters not supported"); 1236 break; 1237 case RTE_ETH_FILTER_TUNNEL: 1238 sfc_err(sa, "Tunnel filters not supported"); 1239 break; 1240 case RTE_ETH_FILTER_FDIR: 1241 sfc_err(sa, "Flow Director filters not supported"); 1242 break; 1243 case RTE_ETH_FILTER_HASH: 1244 sfc_err(sa, "Hash filters not supported"); 1245 break; 1246 case RTE_ETH_FILTER_GENERIC: 1247 if (filter_op != RTE_ETH_FILTER_GET) { 1248 rc = EINVAL; 1249 } else { 1250 *(const void **)arg = &sfc_flow_ops; 1251 rc = 0; 1252 } 1253 break; 1254 default: 1255 sfc_err(sa, "Unknown filter type %u", filter_type); 1256 break; 1257 } 1258 1259 sfc_log_init(sa, "exit: %d", -rc); 1260 SFC_ASSERT(rc >= 0); 1261 return -rc; 1262 } 1263 1264 static const struct eth_dev_ops sfc_eth_dev_ops = { 1265 .dev_configure = sfc_dev_configure, 1266 .dev_start = sfc_dev_start, 1267 .dev_stop = sfc_dev_stop, 1268 .dev_set_link_up = sfc_dev_set_link_up, 1269 .dev_set_link_down = sfc_dev_set_link_down, 1270 .dev_close = sfc_dev_close, 1271 .promiscuous_enable = sfc_dev_promisc_enable, 1272 .promiscuous_disable = sfc_dev_promisc_disable, 1273 .allmulticast_enable = sfc_dev_allmulti_enable, 1274 .allmulticast_disable = sfc_dev_allmulti_disable, 1275 .link_update = sfc_dev_link_update, 1276 .stats_get = sfc_stats_get, 1277 .stats_reset = sfc_stats_reset, 1278 .xstats_get = sfc_xstats_get, 1279 .xstats_reset = sfc_stats_reset, 1280 .xstats_get_names = sfc_xstats_get_names, 1281 .dev_infos_get = sfc_dev_infos_get, 1282 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 1283 .mtu_set = sfc_dev_set_mtu, 1284 .rx_queue_start = sfc_rx_queue_start, 1285 .rx_queue_stop = sfc_rx_queue_stop, 1286 .tx_queue_start = sfc_tx_queue_start, 1287 .tx_queue_stop = sfc_tx_queue_stop, 1288 .rx_queue_setup = sfc_rx_queue_setup, 1289 .rx_queue_release = sfc_rx_queue_release, 1290 .rx_queue_count = sfc_rx_queue_count, 1291 .rx_descriptor_done = sfc_rx_descriptor_done, 1292 .tx_queue_setup = sfc_tx_queue_setup, 1293 .tx_queue_release = sfc_tx_queue_release, 1294 .flow_ctrl_get = sfc_flow_ctrl_get, 1295 .flow_ctrl_set = sfc_flow_ctrl_set, 1296 .mac_addr_set = sfc_mac_addr_set, 1297 #if EFSYS_OPT_RX_SCALE 1298 .reta_update = sfc_dev_rss_reta_update, 1299 .reta_query = sfc_dev_rss_reta_query, 1300 .rss_hash_update = sfc_dev_rss_hash_update, 1301 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 1302 #endif 1303 .filter_ctrl = sfc_dev_filter_ctrl, 1304 .set_mc_addr_list = sfc_set_mc_addr_list, 1305 .rxq_info_get = sfc_rx_queue_info_get, 1306 .txq_info_get = sfc_tx_queue_info_get, 1307 }; 1308 1309 static int 1310 sfc_eth_dev_init(struct rte_eth_dev *dev) 1311 { 1312 struct sfc_adapter *sa = dev->data->dev_private; 1313 struct rte_pci_device *pci_dev = SFC_DEV_TO_PCI(dev); 1314 int rc; 1315 const efx_nic_cfg_t *encp; 1316 const struct ether_addr *from; 1317 1318 /* Required for logging */ 1319 sa->eth_dev = dev; 1320 1321 /* Copy PCI device info to the dev->data */ 1322 rte_eth_copy_pci_info(dev, pci_dev); 1323 1324 rc = sfc_kvargs_parse(sa); 1325 if (rc != 0) 1326 goto fail_kvargs_parse; 1327 1328 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT, 1329 sfc_kvarg_bool_handler, &sa->debug_init); 1330 if (rc != 0) 1331 goto fail_kvarg_debug_init; 1332 1333 sfc_log_init(sa, "entry"); 1334 1335 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0); 1336 if (dev->data->mac_addrs == NULL) { 1337 rc = ENOMEM; 1338 goto fail_mac_addrs; 1339 } 1340 1341 sfc_adapter_lock_init(sa); 1342 sfc_adapter_lock(sa); 1343 1344 sfc_log_init(sa, "attaching"); 1345 rc = sfc_attach(sa); 1346 if (rc != 0) 1347 goto fail_attach; 1348 1349 encp = efx_nic_cfg_get(sa->nic); 1350 1351 /* 1352 * The arguments are really reverse order in comparison to 1353 * Linux kernel. Copy from NIC config to Ethernet device data. 1354 */ 1355 from = (const struct ether_addr *)(encp->enc_mac_addr); 1356 ether_addr_copy(from, &dev->data->mac_addrs[0]); 1357 1358 dev->dev_ops = &sfc_eth_dev_ops; 1359 dev->rx_pkt_burst = &sfc_recv_pkts; 1360 dev->tx_pkt_burst = &sfc_xmit_pkts; 1361 1362 sfc_adapter_unlock(sa); 1363 1364 sfc_log_init(sa, "done"); 1365 return 0; 1366 1367 fail_attach: 1368 sfc_adapter_unlock(sa); 1369 sfc_adapter_lock_fini(sa); 1370 rte_free(dev->data->mac_addrs); 1371 dev->data->mac_addrs = NULL; 1372 1373 fail_mac_addrs: 1374 fail_kvarg_debug_init: 1375 sfc_kvargs_cleanup(sa); 1376 1377 fail_kvargs_parse: 1378 sfc_log_init(sa, "failed %d", rc); 1379 SFC_ASSERT(rc > 0); 1380 return -rc; 1381 } 1382 1383 static int 1384 sfc_eth_dev_uninit(struct rte_eth_dev *dev) 1385 { 1386 struct sfc_adapter *sa = dev->data->dev_private; 1387 1388 sfc_log_init(sa, "entry"); 1389 1390 sfc_adapter_lock(sa); 1391 1392 sfc_detach(sa); 1393 1394 rte_free(dev->data->mac_addrs); 1395 dev->data->mac_addrs = NULL; 1396 1397 dev->dev_ops = NULL; 1398 dev->rx_pkt_burst = NULL; 1399 dev->tx_pkt_burst = NULL; 1400 1401 sfc_kvargs_cleanup(sa); 1402 1403 sfc_adapter_unlock(sa); 1404 sfc_adapter_lock_fini(sa); 1405 1406 sfc_log_init(sa, "done"); 1407 1408 /* Required for logging, so cleanup last */ 1409 sa->eth_dev = NULL; 1410 return 0; 1411 } 1412 1413 static const struct rte_pci_id pci_id_sfc_efx_map[] = { 1414 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, 1415 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, 1416 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, 1417 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, 1418 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, 1419 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, 1420 { .vendor_id = 0 /* sentinel */ } 1421 }; 1422 1423 static struct eth_driver sfc_efx_pmd = { 1424 .pci_drv = { 1425 .id_table = pci_id_sfc_efx_map, 1426 .drv_flags = 1427 RTE_PCI_DRV_INTR_LSC | 1428 RTE_PCI_DRV_NEED_MAPPING, 1429 .probe = rte_eth_dev_pci_probe, 1430 .remove = rte_eth_dev_pci_remove, 1431 }, 1432 .eth_dev_init = sfc_eth_dev_init, 1433 .eth_dev_uninit = sfc_eth_dev_uninit, 1434 .dev_private_size = sizeof(struct sfc_adapter), 1435 }; 1436 1437 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd.pci_drv); 1438 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); 1439 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio"); 1440 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, 1441 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " 1442 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> " 1443 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " " 1444 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL); 1445