xref: /dpdk/drivers/net/sfc/sfc_ethdev.c (revision 1d8f3a8028cfb9be1d9e49195030de55afd2e01b)
1 /*-
2  *   BSD LICENSE
3  *
4  * Copyright (c) 2016-2017 Solarflare Communications Inc.
5  * All rights reserved.
6  *
7  * This software was jointly developed between OKTET Labs (under contract
8  * for Solarflare) and Solarflare Communications, Inc.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions are met:
12  *
13  * 1. Redistributions of source code must retain the above copyright notice,
14  *    this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright notice,
16  *    this list of conditions and the following disclaimer in the documentation
17  *    and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <rte_dev.h>
33 #include <rte_ethdev.h>
34 #include <rte_ethdev_pci.h>
35 #include <rte_pci.h>
36 #include <rte_errno.h>
37 
38 #include "efx.h"
39 
40 #include "sfc.h"
41 #include "sfc_debug.h"
42 #include "sfc_log.h"
43 #include "sfc_kvargs.h"
44 #include "sfc_ev.h"
45 #include "sfc_rx.h"
46 #include "sfc_tx.h"
47 #include "sfc_flow.h"
48 #include "sfc_dp.h"
49 #include "sfc_dp_rx.h"
50 
51 static struct sfc_dp_list sfc_dp_head =
52 	TAILQ_HEAD_INITIALIZER(sfc_dp_head);
53 
54 static int
55 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
56 {
57 	struct sfc_adapter *sa = dev->data->dev_private;
58 	efx_nic_fw_info_t enfi;
59 	int ret;
60 	int rc;
61 
62 	/*
63 	 * Return value of the callback is likely supposed to be
64 	 * equal to or greater than 0, nevertheless, if an error
65 	 * occurs, it will be desirable to pass it to the caller
66 	 */
67 	if ((fw_version == NULL) || (fw_size == 0))
68 		return -EINVAL;
69 
70 	rc = efx_nic_get_fw_version(sa->nic, &enfi);
71 	if (rc != 0)
72 		return -rc;
73 
74 	ret = snprintf(fw_version, fw_size,
75 		       "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16,
76 		       enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1],
77 		       enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]);
78 	if (ret < 0)
79 		return ret;
80 
81 	if (enfi.enfi_dpcpu_fw_ids_valid) {
82 		size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret);
83 		int ret_extra;
84 
85 		ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset,
86 				     fw_size - dpcpu_fw_ids_offset,
87 				     " rx%" PRIx16 " tx%" PRIx16,
88 				     enfi.enfi_rx_dpcpu_fw_id,
89 				     enfi.enfi_tx_dpcpu_fw_id);
90 		if (ret_extra < 0)
91 			return ret_extra;
92 
93 		ret += ret_extra;
94 	}
95 
96 	if (fw_size < (size_t)(++ret))
97 		return ret;
98 	else
99 		return 0;
100 }
101 
102 static void
103 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
104 {
105 	struct sfc_adapter *sa = dev->data->dev_private;
106 	const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
107 
108 	sfc_log_init(sa, "entry");
109 
110 	dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
111 	dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX;
112 
113 	/* Autonegotiation may be disabled */
114 	dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
115 	if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX)
116 		dev_info->speed_capa |= ETH_LINK_SPEED_1G;
117 	if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX)
118 		dev_info->speed_capa |= ETH_LINK_SPEED_10G;
119 	if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX)
120 		dev_info->speed_capa |= ETH_LINK_SPEED_40G;
121 
122 	dev_info->max_rx_queues = sa->rxq_max;
123 	dev_info->max_tx_queues = sa->txq_max;
124 
125 	/* By default packets are dropped if no descriptors are available */
126 	dev_info->default_rxconf.rx_drop_en = 1;
127 
128 	dev_info->rx_offload_capa =
129 		DEV_RX_OFFLOAD_IPV4_CKSUM |
130 		DEV_RX_OFFLOAD_UDP_CKSUM |
131 		DEV_RX_OFFLOAD_TCP_CKSUM;
132 
133 	dev_info->tx_offload_capa =
134 		DEV_TX_OFFLOAD_IPV4_CKSUM |
135 		DEV_TX_OFFLOAD_UDP_CKSUM |
136 		DEV_TX_OFFLOAD_TCP_CKSUM;
137 
138 	dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
139 	if ((~sa->dp_tx->features & SFC_DP_TX_FEAT_VLAN_INSERT) ||
140 	    !encp->enc_hw_tx_insert_vlan_enabled)
141 		dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
142 	else
143 		dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT;
144 
145 	if (~sa->dp_tx->features & SFC_DP_TX_FEAT_MULTI_SEG)
146 		dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
147 
148 #if EFSYS_OPT_RX_SCALE
149 	if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) {
150 		dev_info->reta_size = EFX_RSS_TBL_SIZE;
151 		dev_info->hash_key_size = SFC_RSS_KEY_SIZE;
152 		dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS;
153 	}
154 #endif
155 
156 	if (sa->tso)
157 		dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO;
158 
159 	dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS;
160 	dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS;
161 	/* The RXQ hardware requires that the descriptor count is a power
162 	 * of 2, but rx_desc_lim cannot properly describe that constraint.
163 	 */
164 	dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS;
165 
166 	dev_info->tx_desc_lim.nb_max = sa->txq_max_entries;
167 	dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS;
168 	/*
169 	 * The TXQ hardware requires that the descriptor count is a power
170 	 * of 2, but tx_desc_lim cannot properly describe that constraint
171 	 */
172 	dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS;
173 }
174 
175 static const uint32_t *
176 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev)
177 {
178 	struct sfc_adapter *sa = dev->data->dev_private;
179 
180 	return sa->dp_rx->supported_ptypes_get();
181 }
182 
183 static int
184 sfc_dev_configure(struct rte_eth_dev *dev)
185 {
186 	struct rte_eth_dev_data *dev_data = dev->data;
187 	struct sfc_adapter *sa = dev_data->dev_private;
188 	int rc;
189 
190 	sfc_log_init(sa, "entry n_rxq=%u n_txq=%u",
191 		     dev_data->nb_rx_queues, dev_data->nb_tx_queues);
192 
193 	sfc_adapter_lock(sa);
194 	switch (sa->state) {
195 	case SFC_ADAPTER_CONFIGURED:
196 		/* FALLTHROUGH */
197 	case SFC_ADAPTER_INITIALIZED:
198 		rc = sfc_configure(sa);
199 		break;
200 	default:
201 		sfc_err(sa, "unexpected adapter state %u to configure",
202 			sa->state);
203 		rc = EINVAL;
204 		break;
205 	}
206 	sfc_adapter_unlock(sa);
207 
208 	sfc_log_init(sa, "done %d", rc);
209 	SFC_ASSERT(rc >= 0);
210 	return -rc;
211 }
212 
213 static int
214 sfc_dev_start(struct rte_eth_dev *dev)
215 {
216 	struct sfc_adapter *sa = dev->data->dev_private;
217 	int rc;
218 
219 	sfc_log_init(sa, "entry");
220 
221 	sfc_adapter_lock(sa);
222 	rc = sfc_start(sa);
223 	sfc_adapter_unlock(sa);
224 
225 	sfc_log_init(sa, "done %d", rc);
226 	SFC_ASSERT(rc >= 0);
227 	return -rc;
228 }
229 
230 static int
231 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
232 {
233 	struct sfc_adapter *sa = dev->data->dev_private;
234 	struct rte_eth_link *dev_link = &dev->data->dev_link;
235 	struct rte_eth_link old_link;
236 	struct rte_eth_link current_link;
237 
238 	sfc_log_init(sa, "entry");
239 
240 retry:
241 	EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
242 	*(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link);
243 
244 	if (sa->state != SFC_ADAPTER_STARTED) {
245 		sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, &current_link);
246 		if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link,
247 					 *(uint64_t *)&old_link,
248 					 *(uint64_t *)&current_link))
249 			goto retry;
250 	} else if (wait_to_complete) {
251 		efx_link_mode_t link_mode;
252 
253 		if (efx_port_poll(sa->nic, &link_mode) != 0)
254 			link_mode = EFX_LINK_UNKNOWN;
255 		sfc_port_link_mode_to_info(link_mode, &current_link);
256 
257 		if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link,
258 					 *(uint64_t *)&old_link,
259 					 *(uint64_t *)&current_link))
260 			goto retry;
261 	} else {
262 		sfc_ev_mgmt_qpoll(sa);
263 		*(int64_t *)&current_link =
264 			rte_atomic64_read((rte_atomic64_t *)dev_link);
265 	}
266 
267 	if (old_link.link_status != current_link.link_status)
268 		sfc_info(sa, "Link status is %s",
269 			 current_link.link_status ? "UP" : "DOWN");
270 
271 	return old_link.link_status == current_link.link_status ? 0 : -1;
272 }
273 
274 static void
275 sfc_dev_stop(struct rte_eth_dev *dev)
276 {
277 	struct sfc_adapter *sa = dev->data->dev_private;
278 
279 	sfc_log_init(sa, "entry");
280 
281 	sfc_adapter_lock(sa);
282 	sfc_stop(sa);
283 	sfc_adapter_unlock(sa);
284 
285 	sfc_log_init(sa, "done");
286 }
287 
288 static int
289 sfc_dev_set_link_up(struct rte_eth_dev *dev)
290 {
291 	struct sfc_adapter *sa = dev->data->dev_private;
292 	int rc;
293 
294 	sfc_log_init(sa, "entry");
295 
296 	sfc_adapter_lock(sa);
297 	rc = sfc_start(sa);
298 	sfc_adapter_unlock(sa);
299 
300 	SFC_ASSERT(rc >= 0);
301 	return -rc;
302 }
303 
304 static int
305 sfc_dev_set_link_down(struct rte_eth_dev *dev)
306 {
307 	struct sfc_adapter *sa = dev->data->dev_private;
308 
309 	sfc_log_init(sa, "entry");
310 
311 	sfc_adapter_lock(sa);
312 	sfc_stop(sa);
313 	sfc_adapter_unlock(sa);
314 
315 	return 0;
316 }
317 
318 static void
319 sfc_dev_close(struct rte_eth_dev *dev)
320 {
321 	struct sfc_adapter *sa = dev->data->dev_private;
322 
323 	sfc_log_init(sa, "entry");
324 
325 	sfc_adapter_lock(sa);
326 	switch (sa->state) {
327 	case SFC_ADAPTER_STARTED:
328 		sfc_stop(sa);
329 		SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED);
330 		/* FALLTHROUGH */
331 	case SFC_ADAPTER_CONFIGURED:
332 		sfc_close(sa);
333 		SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED);
334 		/* FALLTHROUGH */
335 	case SFC_ADAPTER_INITIALIZED:
336 		break;
337 	default:
338 		sfc_err(sa, "unexpected adapter state %u on close", sa->state);
339 		break;
340 	}
341 	sfc_adapter_unlock(sa);
342 
343 	sfc_log_init(sa, "done");
344 }
345 
346 static void
347 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode,
348 		   boolean_t enabled)
349 {
350 	struct sfc_port *port;
351 	boolean_t *toggle;
352 	struct sfc_adapter *sa = dev->data->dev_private;
353 	boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI);
354 	const char *desc = (allmulti) ? "all-multi" : "promiscuous";
355 
356 	sfc_adapter_lock(sa);
357 
358 	port = &sa->port;
359 	toggle = (allmulti) ? (&port->allmulti) : (&port->promisc);
360 
361 	if (*toggle != enabled) {
362 		*toggle = enabled;
363 
364 		if (port->isolated) {
365 			sfc_warn(sa, "isolated mode is active on the port");
366 			sfc_warn(sa, "the change is to be applied on the next "
367 				     "start provided that isolated mode is "
368 				     "disabled prior the next start");
369 		} else if ((sa->state == SFC_ADAPTER_STARTED) &&
370 			   (sfc_set_rx_mode(sa) != 0)) {
371 			*toggle = !(enabled);
372 			sfc_warn(sa, "Failed to %s %s mode",
373 				 ((enabled) ? "enable" : "disable"), desc);
374 		}
375 	}
376 
377 	sfc_adapter_unlock(sa);
378 }
379 
380 static void
381 sfc_dev_promisc_enable(struct rte_eth_dev *dev)
382 {
383 	sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE);
384 }
385 
386 static void
387 sfc_dev_promisc_disable(struct rte_eth_dev *dev)
388 {
389 	sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE);
390 }
391 
392 static void
393 sfc_dev_allmulti_enable(struct rte_eth_dev *dev)
394 {
395 	sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE);
396 }
397 
398 static void
399 sfc_dev_allmulti_disable(struct rte_eth_dev *dev)
400 {
401 	sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE);
402 }
403 
404 static int
405 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
406 		   uint16_t nb_rx_desc, unsigned int socket_id,
407 		   const struct rte_eth_rxconf *rx_conf,
408 		   struct rte_mempool *mb_pool)
409 {
410 	struct sfc_adapter *sa = dev->data->dev_private;
411 	int rc;
412 
413 	sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u",
414 		     rx_queue_id, nb_rx_desc, socket_id);
415 
416 	sfc_adapter_lock(sa);
417 
418 	rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id,
419 			  rx_conf, mb_pool);
420 	if (rc != 0)
421 		goto fail_rx_qinit;
422 
423 	dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq->dp;
424 
425 	sfc_adapter_unlock(sa);
426 
427 	return 0;
428 
429 fail_rx_qinit:
430 	sfc_adapter_unlock(sa);
431 	SFC_ASSERT(rc > 0);
432 	return -rc;
433 }
434 
435 static void
436 sfc_rx_queue_release(void *queue)
437 {
438 	struct sfc_dp_rxq *dp_rxq = queue;
439 	struct sfc_rxq *rxq;
440 	struct sfc_adapter *sa;
441 	unsigned int sw_index;
442 
443 	if (dp_rxq == NULL)
444 		return;
445 
446 	rxq = sfc_rxq_by_dp_rxq(dp_rxq);
447 	sa = rxq->evq->sa;
448 	sfc_adapter_lock(sa);
449 
450 	sw_index = sfc_rxq_sw_index(rxq);
451 
452 	sfc_log_init(sa, "RxQ=%u", sw_index);
453 
454 	sa->eth_dev->data->rx_queues[sw_index] = NULL;
455 
456 	sfc_rx_qfini(sa, sw_index);
457 
458 	sfc_adapter_unlock(sa);
459 }
460 
461 static int
462 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
463 		   uint16_t nb_tx_desc, unsigned int socket_id,
464 		   const struct rte_eth_txconf *tx_conf)
465 {
466 	struct sfc_adapter *sa = dev->data->dev_private;
467 	int rc;
468 
469 	sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u",
470 		     tx_queue_id, nb_tx_desc, socket_id);
471 
472 	sfc_adapter_lock(sa);
473 
474 	rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf);
475 	if (rc != 0)
476 		goto fail_tx_qinit;
477 
478 	dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq->dp;
479 
480 	sfc_adapter_unlock(sa);
481 	return 0;
482 
483 fail_tx_qinit:
484 	sfc_adapter_unlock(sa);
485 	SFC_ASSERT(rc > 0);
486 	return -rc;
487 }
488 
489 static void
490 sfc_tx_queue_release(void *queue)
491 {
492 	struct sfc_dp_txq *dp_txq = queue;
493 	struct sfc_txq *txq;
494 	unsigned int sw_index;
495 	struct sfc_adapter *sa;
496 
497 	if (dp_txq == NULL)
498 		return;
499 
500 	txq = sfc_txq_by_dp_txq(dp_txq);
501 	sw_index = sfc_txq_sw_index(txq);
502 
503 	SFC_ASSERT(txq->evq != NULL);
504 	sa = txq->evq->sa;
505 
506 	sfc_log_init(sa, "TxQ = %u", sw_index);
507 
508 	sfc_adapter_lock(sa);
509 
510 	SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues);
511 	sa->eth_dev->data->tx_queues[sw_index] = NULL;
512 
513 	sfc_tx_qfini(sa, sw_index);
514 
515 	sfc_adapter_unlock(sa);
516 }
517 
518 static void
519 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
520 {
521 	struct sfc_adapter *sa = dev->data->dev_private;
522 	struct sfc_port *port = &sa->port;
523 	uint64_t *mac_stats;
524 
525 	rte_spinlock_lock(&port->mac_stats_lock);
526 
527 	if (sfc_port_update_mac_stats(sa) != 0)
528 		goto unlock;
529 
530 	mac_stats = port->mac_stats_buf;
531 
532 	if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask,
533 				   EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) {
534 		stats->ipackets =
535 			mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] +
536 			mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] +
537 			mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS];
538 		stats->opackets =
539 			mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] +
540 			mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] +
541 			mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS];
542 		stats->ibytes =
543 			mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] +
544 			mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] +
545 			mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES];
546 		stats->obytes =
547 			mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] +
548 			mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] +
549 			mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES];
550 		stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW];
551 		stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS];
552 		stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS];
553 	} else {
554 		stats->ipackets = mac_stats[EFX_MAC_RX_PKTS];
555 		stats->opackets = mac_stats[EFX_MAC_TX_PKTS];
556 		stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS];
557 		stats->obytes = mac_stats[EFX_MAC_TX_OCTETS];
558 		/*
559 		 * Take into account stats which are whenever supported
560 		 * on EF10. If some stat is not supported by current
561 		 * firmware variant or HW revision, it is guaranteed
562 		 * to be zero in mac_stats.
563 		 */
564 		stats->imissed =
565 			mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] +
566 			mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] +
567 			mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] +
568 			mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] +
569 			mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] +
570 			mac_stats[EFX_MAC_PM_TRUNC_QBB] +
571 			mac_stats[EFX_MAC_PM_DISCARD_QBB] +
572 			mac_stats[EFX_MAC_PM_DISCARD_MAPPING] +
573 			mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] +
574 			mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS];
575 		stats->ierrors =
576 			mac_stats[EFX_MAC_RX_FCS_ERRORS] +
577 			mac_stats[EFX_MAC_RX_ALIGN_ERRORS] +
578 			mac_stats[EFX_MAC_RX_JABBER_PKTS];
579 		/* no oerrors counters supported on EF10 */
580 	}
581 
582 unlock:
583 	rte_spinlock_unlock(&port->mac_stats_lock);
584 }
585 
586 static void
587 sfc_stats_reset(struct rte_eth_dev *dev)
588 {
589 	struct sfc_adapter *sa = dev->data->dev_private;
590 	struct sfc_port *port = &sa->port;
591 	int rc;
592 
593 	if (sa->state != SFC_ADAPTER_STARTED) {
594 		/*
595 		 * The operation cannot be done if port is not started; it
596 		 * will be scheduled to be done during the next port start
597 		 */
598 		port->mac_stats_reset_pending = B_TRUE;
599 		return;
600 	}
601 
602 	rc = sfc_port_reset_mac_stats(sa);
603 	if (rc != 0)
604 		sfc_err(sa, "failed to reset statistics (rc = %d)", rc);
605 }
606 
607 static int
608 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
609 	       unsigned int xstats_count)
610 {
611 	struct sfc_adapter *sa = dev->data->dev_private;
612 	struct sfc_port *port = &sa->port;
613 	uint64_t *mac_stats;
614 	int rc;
615 	unsigned int i;
616 	int nstats = 0;
617 
618 	rte_spinlock_lock(&port->mac_stats_lock);
619 
620 	rc = sfc_port_update_mac_stats(sa);
621 	if (rc != 0) {
622 		SFC_ASSERT(rc > 0);
623 		nstats = -rc;
624 		goto unlock;
625 	}
626 
627 	mac_stats = port->mac_stats_buf;
628 
629 	for (i = 0; i < EFX_MAC_NSTATS; ++i) {
630 		if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
631 			if (xstats != NULL && nstats < (int)xstats_count) {
632 				xstats[nstats].id = nstats;
633 				xstats[nstats].value = mac_stats[i];
634 			}
635 			nstats++;
636 		}
637 	}
638 
639 unlock:
640 	rte_spinlock_unlock(&port->mac_stats_lock);
641 
642 	return nstats;
643 }
644 
645 static int
646 sfc_xstats_get_names(struct rte_eth_dev *dev,
647 		     struct rte_eth_xstat_name *xstats_names,
648 		     unsigned int xstats_count)
649 {
650 	struct sfc_adapter *sa = dev->data->dev_private;
651 	struct sfc_port *port = &sa->port;
652 	unsigned int i;
653 	unsigned int nstats = 0;
654 
655 	for (i = 0; i < EFX_MAC_NSTATS; ++i) {
656 		if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
657 			if (xstats_names != NULL && nstats < xstats_count)
658 				strncpy(xstats_names[nstats].name,
659 					efx_mac_stat_name(sa->nic, i),
660 					sizeof(xstats_names[0].name));
661 			nstats++;
662 		}
663 	}
664 
665 	return nstats;
666 }
667 
668 static int
669 sfc_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
670 		     uint64_t *values, unsigned int n)
671 {
672 	struct sfc_adapter *sa = dev->data->dev_private;
673 	struct sfc_port *port = &sa->port;
674 	uint64_t *mac_stats;
675 	unsigned int nb_supported = 0;
676 	unsigned int nb_written = 0;
677 	unsigned int i;
678 	int ret;
679 	int rc;
680 
681 	if (unlikely(values == NULL) ||
682 	    unlikely((ids == NULL) && (n < port->mac_stats_nb_supported)))
683 		return port->mac_stats_nb_supported;
684 
685 	rte_spinlock_lock(&port->mac_stats_lock);
686 
687 	rc = sfc_port_update_mac_stats(sa);
688 	if (rc != 0) {
689 		SFC_ASSERT(rc > 0);
690 		ret = -rc;
691 		goto unlock;
692 	}
693 
694 	mac_stats = port->mac_stats_buf;
695 
696 	for (i = 0; (i < EFX_MAC_NSTATS) && (nb_written < n); ++i) {
697 		if (!EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i))
698 			continue;
699 
700 		if ((ids == NULL) || (ids[nb_written] == nb_supported))
701 			values[nb_written++] = mac_stats[i];
702 
703 		++nb_supported;
704 	}
705 
706 	ret = nb_written;
707 
708 unlock:
709 	rte_spinlock_unlock(&port->mac_stats_lock);
710 
711 	return ret;
712 }
713 
714 static int
715 sfc_xstats_get_names_by_id(struct rte_eth_dev *dev,
716 			   struct rte_eth_xstat_name *xstats_names,
717 			   const uint64_t *ids, unsigned int size)
718 {
719 	struct sfc_adapter *sa = dev->data->dev_private;
720 	struct sfc_port *port = &sa->port;
721 	unsigned int nb_supported = 0;
722 	unsigned int nb_written = 0;
723 	unsigned int i;
724 
725 	if (unlikely(xstats_names == NULL) ||
726 	    unlikely((ids == NULL) && (size < port->mac_stats_nb_supported)))
727 		return port->mac_stats_nb_supported;
728 
729 	for (i = 0; (i < EFX_MAC_NSTATS) && (nb_written < size); ++i) {
730 		if (!EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i))
731 			continue;
732 
733 		if ((ids == NULL) || (ids[nb_written] == nb_supported)) {
734 			char *name = xstats_names[nb_written++].name;
735 
736 			strncpy(name, efx_mac_stat_name(sa->nic, i),
737 				sizeof(xstats_names[0].name));
738 			name[sizeof(xstats_names[0].name) - 1] = '\0';
739 		}
740 
741 		++nb_supported;
742 	}
743 
744 	return nb_written;
745 }
746 
747 static int
748 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
749 {
750 	struct sfc_adapter *sa = dev->data->dev_private;
751 	unsigned int wanted_fc, link_fc;
752 
753 	memset(fc_conf, 0, sizeof(*fc_conf));
754 
755 	sfc_adapter_lock(sa);
756 
757 	if (sa->state == SFC_ADAPTER_STARTED)
758 		efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc);
759 	else
760 		link_fc = sa->port.flow_ctrl;
761 
762 	switch (link_fc) {
763 	case 0:
764 		fc_conf->mode = RTE_FC_NONE;
765 		break;
766 	case EFX_FCNTL_RESPOND:
767 		fc_conf->mode = RTE_FC_RX_PAUSE;
768 		break;
769 	case EFX_FCNTL_GENERATE:
770 		fc_conf->mode = RTE_FC_TX_PAUSE;
771 		break;
772 	case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE):
773 		fc_conf->mode = RTE_FC_FULL;
774 		break;
775 	default:
776 		sfc_err(sa, "%s: unexpected flow control value %#x",
777 			__func__, link_fc);
778 	}
779 
780 	fc_conf->autoneg = sa->port.flow_ctrl_autoneg;
781 
782 	sfc_adapter_unlock(sa);
783 
784 	return 0;
785 }
786 
787 static int
788 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
789 {
790 	struct sfc_adapter *sa = dev->data->dev_private;
791 	struct sfc_port *port = &sa->port;
792 	unsigned int fcntl;
793 	int rc;
794 
795 	if (fc_conf->high_water != 0 || fc_conf->low_water != 0 ||
796 	    fc_conf->pause_time != 0 || fc_conf->send_xon != 0 ||
797 	    fc_conf->mac_ctrl_frame_fwd != 0) {
798 		sfc_err(sa, "unsupported flow control settings specified");
799 		rc = EINVAL;
800 		goto fail_inval;
801 	}
802 
803 	switch (fc_conf->mode) {
804 	case RTE_FC_NONE:
805 		fcntl = 0;
806 		break;
807 	case RTE_FC_RX_PAUSE:
808 		fcntl = EFX_FCNTL_RESPOND;
809 		break;
810 	case RTE_FC_TX_PAUSE:
811 		fcntl = EFX_FCNTL_GENERATE;
812 		break;
813 	case RTE_FC_FULL:
814 		fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
815 		break;
816 	default:
817 		rc = EINVAL;
818 		goto fail_inval;
819 	}
820 
821 	sfc_adapter_lock(sa);
822 
823 	if (sa->state == SFC_ADAPTER_STARTED) {
824 		rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg);
825 		if (rc != 0)
826 			goto fail_mac_fcntl_set;
827 	}
828 
829 	port->flow_ctrl = fcntl;
830 	port->flow_ctrl_autoneg = fc_conf->autoneg;
831 
832 	sfc_adapter_unlock(sa);
833 
834 	return 0;
835 
836 fail_mac_fcntl_set:
837 	sfc_adapter_unlock(sa);
838 fail_inval:
839 	SFC_ASSERT(rc > 0);
840 	return -rc;
841 }
842 
843 static int
844 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
845 {
846 	struct sfc_adapter *sa = dev->data->dev_private;
847 	size_t pdu = EFX_MAC_PDU(mtu);
848 	size_t old_pdu;
849 	int rc;
850 
851 	sfc_log_init(sa, "mtu=%u", mtu);
852 
853 	rc = EINVAL;
854 	if (pdu < EFX_MAC_PDU_MIN) {
855 		sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)",
856 			(unsigned int)mtu, (unsigned int)pdu,
857 			EFX_MAC_PDU_MIN);
858 		goto fail_inval;
859 	}
860 	if (pdu > EFX_MAC_PDU_MAX) {
861 		sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)",
862 			(unsigned int)mtu, (unsigned int)pdu,
863 			EFX_MAC_PDU_MAX);
864 		goto fail_inval;
865 	}
866 
867 	sfc_adapter_lock(sa);
868 
869 	if (pdu != sa->port.pdu) {
870 		if (sa->state == SFC_ADAPTER_STARTED) {
871 			sfc_stop(sa);
872 
873 			old_pdu = sa->port.pdu;
874 			sa->port.pdu = pdu;
875 			rc = sfc_start(sa);
876 			if (rc != 0)
877 				goto fail_start;
878 		} else {
879 			sa->port.pdu = pdu;
880 		}
881 	}
882 
883 	/*
884 	 * The driver does not use it, but other PMDs update jumbo_frame
885 	 * flag and max_rx_pkt_len when MTU is set.
886 	 */
887 	dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN);
888 	dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu;
889 
890 	sfc_adapter_unlock(sa);
891 
892 	sfc_log_init(sa, "done");
893 	return 0;
894 
895 fail_start:
896 	sa->port.pdu = old_pdu;
897 	if (sfc_start(sa) != 0)
898 		sfc_err(sa, "cannot start with neither new (%u) nor old (%u) "
899 			"PDU max size - port is stopped",
900 			(unsigned int)pdu, (unsigned int)old_pdu);
901 	sfc_adapter_unlock(sa);
902 
903 fail_inval:
904 	sfc_log_init(sa, "failed %d", rc);
905 	SFC_ASSERT(rc > 0);
906 	return -rc;
907 }
908 static void
909 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
910 {
911 	struct sfc_adapter *sa = dev->data->dev_private;
912 	const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
913 	struct sfc_port *port = &sa->port;
914 	int rc;
915 
916 	sfc_adapter_lock(sa);
917 
918 	if (port->isolated) {
919 		sfc_err(sa, "isolated mode is active on the port");
920 		sfc_err(sa, "will not set MAC address");
921 		goto unlock;
922 	}
923 
924 	if (sa->state != SFC_ADAPTER_STARTED) {
925 		sfc_info(sa, "the port is not started");
926 		sfc_info(sa, "the new MAC address will be set on port start");
927 
928 		goto unlock;
929 	}
930 
931 	if (encp->enc_allow_set_mac_with_installed_filters) {
932 		rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes);
933 		if (rc != 0) {
934 			sfc_err(sa, "cannot set MAC address (rc = %u)", rc);
935 			goto unlock;
936 		}
937 
938 		/*
939 		 * Changing the MAC address by means of MCDI request
940 		 * has no effect on received traffic, therefore
941 		 * we also need to update unicast filters
942 		 */
943 		rc = sfc_set_rx_mode(sa);
944 		if (rc != 0)
945 			sfc_err(sa, "cannot set filter (rc = %u)", rc);
946 	} else {
947 		sfc_warn(sa, "cannot set MAC address with filters installed");
948 		sfc_warn(sa, "adapter will be restarted to pick the new MAC");
949 		sfc_warn(sa, "(some traffic may be dropped)");
950 
951 		/*
952 		 * Since setting MAC address with filters installed is not
953 		 * allowed on the adapter, one needs to simply restart adapter
954 		 * so that the new MAC address will be taken from an outer
955 		 * storage and set flawlessly by means of sfc_start() call
956 		 */
957 		sfc_stop(sa);
958 		rc = sfc_start(sa);
959 		if (rc != 0)
960 			sfc_err(sa, "cannot restart adapter (rc = %u)", rc);
961 	}
962 
963 unlock:
964 	sfc_adapter_unlock(sa);
965 }
966 
967 
968 static int
969 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set,
970 		     uint32_t nb_mc_addr)
971 {
972 	struct sfc_adapter *sa = dev->data->dev_private;
973 	struct sfc_port *port = &sa->port;
974 	uint8_t *mc_addrs = port->mcast_addrs;
975 	int rc;
976 	unsigned int i;
977 
978 	if (port->isolated) {
979 		sfc_err(sa, "isolated mode is active on the port");
980 		sfc_err(sa, "will not set multicast address list");
981 		return -ENOTSUP;
982 	}
983 
984 	if (mc_addrs == NULL)
985 		return -ENOBUFS;
986 
987 	if (nb_mc_addr > port->max_mcast_addrs) {
988 		sfc_err(sa, "too many multicast addresses: %u > %u",
989 			 nb_mc_addr, port->max_mcast_addrs);
990 		return -EINVAL;
991 	}
992 
993 	for (i = 0; i < nb_mc_addr; ++i) {
994 		(void)rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes,
995 				 EFX_MAC_ADDR_LEN);
996 		mc_addrs += EFX_MAC_ADDR_LEN;
997 	}
998 
999 	port->nb_mcast_addrs = nb_mc_addr;
1000 
1001 	if (sa->state != SFC_ADAPTER_STARTED)
1002 		return 0;
1003 
1004 	rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs,
1005 					port->nb_mcast_addrs);
1006 	if (rc != 0)
1007 		sfc_err(sa, "cannot set multicast address list (rc = %u)", rc);
1008 
1009 	SFC_ASSERT(rc > 0);
1010 	return -rc;
1011 }
1012 
1013 /*
1014  * The function is used by the secondary process as well. It must not
1015  * use any process-local pointers from the adapter data.
1016  */
1017 static void
1018 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
1019 		      struct rte_eth_rxq_info *qinfo)
1020 {
1021 	struct sfc_adapter *sa = dev->data->dev_private;
1022 	struct sfc_rxq_info *rxq_info;
1023 	struct sfc_rxq *rxq;
1024 
1025 	sfc_adapter_lock(sa);
1026 
1027 	SFC_ASSERT(rx_queue_id < sa->rxq_count);
1028 
1029 	rxq_info = &sa->rxq_info[rx_queue_id];
1030 	rxq = rxq_info->rxq;
1031 	SFC_ASSERT(rxq != NULL);
1032 
1033 	qinfo->mp = rxq->refill_mb_pool;
1034 	qinfo->conf.rx_free_thresh = rxq->refill_threshold;
1035 	qinfo->conf.rx_drop_en = 1;
1036 	qinfo->conf.rx_deferred_start = rxq_info->deferred_start;
1037 	qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER);
1038 	qinfo->nb_desc = rxq_info->entries;
1039 
1040 	sfc_adapter_unlock(sa);
1041 }
1042 
1043 /*
1044  * The function is used by the secondary process as well. It must not
1045  * use any process-local pointers from the adapter data.
1046  */
1047 static void
1048 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
1049 		      struct rte_eth_txq_info *qinfo)
1050 {
1051 	struct sfc_adapter *sa = dev->data->dev_private;
1052 	struct sfc_txq_info *txq_info;
1053 
1054 	sfc_adapter_lock(sa);
1055 
1056 	SFC_ASSERT(tx_queue_id < sa->txq_count);
1057 
1058 	txq_info = &sa->txq_info[tx_queue_id];
1059 	SFC_ASSERT(txq_info->txq != NULL);
1060 
1061 	memset(qinfo, 0, sizeof(*qinfo));
1062 
1063 	qinfo->conf.txq_flags = txq_info->txq->flags;
1064 	qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh;
1065 	qinfo->conf.tx_deferred_start = txq_info->deferred_start;
1066 	qinfo->nb_desc = txq_info->entries;
1067 
1068 	sfc_adapter_unlock(sa);
1069 }
1070 
1071 static uint32_t
1072 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1073 {
1074 	struct sfc_adapter *sa = dev->data->dev_private;
1075 
1076 	sfc_log_init(sa, "RxQ=%u", rx_queue_id);
1077 
1078 	return sfc_rx_qdesc_npending(sa, rx_queue_id);
1079 }
1080 
1081 static int
1082 sfc_rx_descriptor_done(void *queue, uint16_t offset)
1083 {
1084 	struct sfc_dp_rxq *dp_rxq = queue;
1085 
1086 	return sfc_rx_qdesc_done(dp_rxq, offset);
1087 }
1088 
1089 static int
1090 sfc_rx_descriptor_status(void *queue, uint16_t offset)
1091 {
1092 	struct sfc_dp_rxq *dp_rxq = queue;
1093 	struct sfc_rxq *rxq = sfc_rxq_by_dp_rxq(dp_rxq);
1094 
1095 	return rxq->evq->sa->dp_rx->qdesc_status(dp_rxq, offset);
1096 }
1097 
1098 static int
1099 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1100 {
1101 	struct sfc_adapter *sa = dev->data->dev_private;
1102 	int rc;
1103 
1104 	sfc_log_init(sa, "RxQ=%u", rx_queue_id);
1105 
1106 	sfc_adapter_lock(sa);
1107 
1108 	rc = EINVAL;
1109 	if (sa->state != SFC_ADAPTER_STARTED)
1110 		goto fail_not_started;
1111 
1112 	rc = sfc_rx_qstart(sa, rx_queue_id);
1113 	if (rc != 0)
1114 		goto fail_rx_qstart;
1115 
1116 	sa->rxq_info[rx_queue_id].deferred_started = B_TRUE;
1117 
1118 	sfc_adapter_unlock(sa);
1119 
1120 	return 0;
1121 
1122 fail_rx_qstart:
1123 fail_not_started:
1124 	sfc_adapter_unlock(sa);
1125 	SFC_ASSERT(rc > 0);
1126 	return -rc;
1127 }
1128 
1129 static int
1130 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1131 {
1132 	struct sfc_adapter *sa = dev->data->dev_private;
1133 
1134 	sfc_log_init(sa, "RxQ=%u", rx_queue_id);
1135 
1136 	sfc_adapter_lock(sa);
1137 	sfc_rx_qstop(sa, rx_queue_id);
1138 
1139 	sa->rxq_info[rx_queue_id].deferred_started = B_FALSE;
1140 
1141 	sfc_adapter_unlock(sa);
1142 
1143 	return 0;
1144 }
1145 
1146 static int
1147 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1148 {
1149 	struct sfc_adapter *sa = dev->data->dev_private;
1150 	int rc;
1151 
1152 	sfc_log_init(sa, "TxQ = %u", tx_queue_id);
1153 
1154 	sfc_adapter_lock(sa);
1155 
1156 	rc = EINVAL;
1157 	if (sa->state != SFC_ADAPTER_STARTED)
1158 		goto fail_not_started;
1159 
1160 	rc = sfc_tx_qstart(sa, tx_queue_id);
1161 	if (rc != 0)
1162 		goto fail_tx_qstart;
1163 
1164 	sa->txq_info[tx_queue_id].deferred_started = B_TRUE;
1165 
1166 	sfc_adapter_unlock(sa);
1167 	return 0;
1168 
1169 fail_tx_qstart:
1170 
1171 fail_not_started:
1172 	sfc_adapter_unlock(sa);
1173 	SFC_ASSERT(rc > 0);
1174 	return -rc;
1175 }
1176 
1177 static int
1178 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1179 {
1180 	struct sfc_adapter *sa = dev->data->dev_private;
1181 
1182 	sfc_log_init(sa, "TxQ = %u", tx_queue_id);
1183 
1184 	sfc_adapter_lock(sa);
1185 
1186 	sfc_tx_qstop(sa, tx_queue_id);
1187 
1188 	sa->txq_info[tx_queue_id].deferred_started = B_FALSE;
1189 
1190 	sfc_adapter_unlock(sa);
1191 	return 0;
1192 }
1193 
1194 #if EFSYS_OPT_RX_SCALE
1195 static int
1196 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1197 			  struct rte_eth_rss_conf *rss_conf)
1198 {
1199 	struct sfc_adapter *sa = dev->data->dev_private;
1200 	struct sfc_port *port = &sa->port;
1201 
1202 	if ((sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) || port->isolated)
1203 		return -ENOTSUP;
1204 
1205 	if (sa->rss_channels == 0)
1206 		return -EINVAL;
1207 
1208 	sfc_adapter_lock(sa);
1209 
1210 	/*
1211 	 * Mapping of hash configuration between RTE and EFX is not one-to-one,
1212 	 * hence, conversion is done here to derive a correct set of ETH_RSS
1213 	 * flags which corresponds to the active EFX configuration stored
1214 	 * locally in 'sfc_adapter' and kept up-to-date
1215 	 */
1216 	rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types);
1217 	rss_conf->rss_key_len = SFC_RSS_KEY_SIZE;
1218 	if (rss_conf->rss_key != NULL)
1219 		rte_memcpy(rss_conf->rss_key, sa->rss_key, SFC_RSS_KEY_SIZE);
1220 
1221 	sfc_adapter_unlock(sa);
1222 
1223 	return 0;
1224 }
1225 
1226 static int
1227 sfc_dev_rss_hash_update(struct rte_eth_dev *dev,
1228 			struct rte_eth_rss_conf *rss_conf)
1229 {
1230 	struct sfc_adapter *sa = dev->data->dev_private;
1231 	struct sfc_port *port = &sa->port;
1232 	unsigned int efx_hash_types;
1233 	int rc = 0;
1234 
1235 	if (port->isolated)
1236 		return -ENOTSUP;
1237 
1238 	if (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) {
1239 		sfc_err(sa, "RSS is not available");
1240 		return -ENOTSUP;
1241 	}
1242 
1243 	if (sa->rss_channels == 0) {
1244 		sfc_err(sa, "RSS is not configured");
1245 		return -EINVAL;
1246 	}
1247 
1248 	if ((rss_conf->rss_key != NULL) &&
1249 	    (rss_conf->rss_key_len != sizeof(sa->rss_key))) {
1250 		sfc_err(sa, "RSS key size is wrong (should be %lu)",
1251 			sizeof(sa->rss_key));
1252 		return -EINVAL;
1253 	}
1254 
1255 	if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) {
1256 		sfc_err(sa, "unsupported hash functions requested");
1257 		return -EINVAL;
1258 	}
1259 
1260 	sfc_adapter_lock(sa);
1261 
1262 	efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf);
1263 
1264 	rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
1265 				   efx_hash_types, B_TRUE);
1266 	if (rc != 0)
1267 		goto fail_scale_mode_set;
1268 
1269 	if (rss_conf->rss_key != NULL) {
1270 		if (sa->state == SFC_ADAPTER_STARTED) {
1271 			rc = efx_rx_scale_key_set(sa->nic, rss_conf->rss_key,
1272 						  sizeof(sa->rss_key));
1273 			if (rc != 0)
1274 				goto fail_scale_key_set;
1275 		}
1276 
1277 		rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key));
1278 	}
1279 
1280 	sa->rss_hash_types = efx_hash_types;
1281 
1282 	sfc_adapter_unlock(sa);
1283 
1284 	return 0;
1285 
1286 fail_scale_key_set:
1287 	if (efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
1288 				  sa->rss_hash_types, B_TRUE) != 0)
1289 		sfc_err(sa, "failed to restore RSS mode");
1290 
1291 fail_scale_mode_set:
1292 	sfc_adapter_unlock(sa);
1293 	return -rc;
1294 }
1295 
1296 static int
1297 sfc_dev_rss_reta_query(struct rte_eth_dev *dev,
1298 		       struct rte_eth_rss_reta_entry64 *reta_conf,
1299 		       uint16_t reta_size)
1300 {
1301 	struct sfc_adapter *sa = dev->data->dev_private;
1302 	struct sfc_port *port = &sa->port;
1303 	int entry;
1304 
1305 	if ((sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) || port->isolated)
1306 		return -ENOTSUP;
1307 
1308 	if (sa->rss_channels == 0)
1309 		return -EINVAL;
1310 
1311 	if (reta_size != EFX_RSS_TBL_SIZE)
1312 		return -EINVAL;
1313 
1314 	sfc_adapter_lock(sa);
1315 
1316 	for (entry = 0; entry < reta_size; entry++) {
1317 		int grp = entry / RTE_RETA_GROUP_SIZE;
1318 		int grp_idx = entry % RTE_RETA_GROUP_SIZE;
1319 
1320 		if ((reta_conf[grp].mask >> grp_idx) & 1)
1321 			reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry];
1322 	}
1323 
1324 	sfc_adapter_unlock(sa);
1325 
1326 	return 0;
1327 }
1328 
1329 static int
1330 sfc_dev_rss_reta_update(struct rte_eth_dev *dev,
1331 			struct rte_eth_rss_reta_entry64 *reta_conf,
1332 			uint16_t reta_size)
1333 {
1334 	struct sfc_adapter *sa = dev->data->dev_private;
1335 	struct sfc_port *port = &sa->port;
1336 	unsigned int *rss_tbl_new;
1337 	uint16_t entry;
1338 	int rc;
1339 
1340 
1341 	if (port->isolated)
1342 		return -ENOTSUP;
1343 
1344 	if (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) {
1345 		sfc_err(sa, "RSS is not available");
1346 		return -ENOTSUP;
1347 	}
1348 
1349 	if (sa->rss_channels == 0) {
1350 		sfc_err(sa, "RSS is not configured");
1351 		return -EINVAL;
1352 	}
1353 
1354 	if (reta_size != EFX_RSS_TBL_SIZE) {
1355 		sfc_err(sa, "RETA size is wrong (should be %u)",
1356 			EFX_RSS_TBL_SIZE);
1357 		return -EINVAL;
1358 	}
1359 
1360 	rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0);
1361 	if (rss_tbl_new == NULL)
1362 		return -ENOMEM;
1363 
1364 	sfc_adapter_lock(sa);
1365 
1366 	rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl));
1367 
1368 	for (entry = 0; entry < reta_size; entry++) {
1369 		int grp_idx = entry % RTE_RETA_GROUP_SIZE;
1370 		struct rte_eth_rss_reta_entry64 *grp;
1371 
1372 		grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE];
1373 
1374 		if (grp->mask & (1ull << grp_idx)) {
1375 			if (grp->reta[grp_idx] >= sa->rss_channels) {
1376 				rc = EINVAL;
1377 				goto bad_reta_entry;
1378 			}
1379 			rss_tbl_new[entry] = grp->reta[grp_idx];
1380 		}
1381 	}
1382 
1383 	rc = efx_rx_scale_tbl_set(sa->nic, rss_tbl_new, EFX_RSS_TBL_SIZE);
1384 	if (rc == 0)
1385 		rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl));
1386 
1387 bad_reta_entry:
1388 	sfc_adapter_unlock(sa);
1389 
1390 	rte_free(rss_tbl_new);
1391 
1392 	SFC_ASSERT(rc >= 0);
1393 	return -rc;
1394 }
1395 #endif
1396 
1397 static int
1398 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type,
1399 		    enum rte_filter_op filter_op,
1400 		    void *arg)
1401 {
1402 	struct sfc_adapter *sa = dev->data->dev_private;
1403 	int rc = ENOTSUP;
1404 
1405 	sfc_log_init(sa, "entry");
1406 
1407 	switch (filter_type) {
1408 	case RTE_ETH_FILTER_NONE:
1409 		sfc_err(sa, "Global filters configuration not supported");
1410 		break;
1411 	case RTE_ETH_FILTER_MACVLAN:
1412 		sfc_err(sa, "MACVLAN filters not supported");
1413 		break;
1414 	case RTE_ETH_FILTER_ETHERTYPE:
1415 		sfc_err(sa, "EtherType filters not supported");
1416 		break;
1417 	case RTE_ETH_FILTER_FLEXIBLE:
1418 		sfc_err(sa, "Flexible filters not supported");
1419 		break;
1420 	case RTE_ETH_FILTER_SYN:
1421 		sfc_err(sa, "SYN filters not supported");
1422 		break;
1423 	case RTE_ETH_FILTER_NTUPLE:
1424 		sfc_err(sa, "NTUPLE filters not supported");
1425 		break;
1426 	case RTE_ETH_FILTER_TUNNEL:
1427 		sfc_err(sa, "Tunnel filters not supported");
1428 		break;
1429 	case RTE_ETH_FILTER_FDIR:
1430 		sfc_err(sa, "Flow Director filters not supported");
1431 		break;
1432 	case RTE_ETH_FILTER_HASH:
1433 		sfc_err(sa, "Hash filters not supported");
1434 		break;
1435 	case RTE_ETH_FILTER_GENERIC:
1436 		if (filter_op != RTE_ETH_FILTER_GET) {
1437 			rc = EINVAL;
1438 		} else {
1439 			*(const void **)arg = &sfc_flow_ops;
1440 			rc = 0;
1441 		}
1442 		break;
1443 	default:
1444 		sfc_err(sa, "Unknown filter type %u", filter_type);
1445 		break;
1446 	}
1447 
1448 	sfc_log_init(sa, "exit: %d", -rc);
1449 	SFC_ASSERT(rc >= 0);
1450 	return -rc;
1451 }
1452 
1453 static const struct eth_dev_ops sfc_eth_dev_ops = {
1454 	.dev_configure			= sfc_dev_configure,
1455 	.dev_start			= sfc_dev_start,
1456 	.dev_stop			= sfc_dev_stop,
1457 	.dev_set_link_up		= sfc_dev_set_link_up,
1458 	.dev_set_link_down		= sfc_dev_set_link_down,
1459 	.dev_close			= sfc_dev_close,
1460 	.promiscuous_enable		= sfc_dev_promisc_enable,
1461 	.promiscuous_disable		= sfc_dev_promisc_disable,
1462 	.allmulticast_enable		= sfc_dev_allmulti_enable,
1463 	.allmulticast_disable		= sfc_dev_allmulti_disable,
1464 	.link_update			= sfc_dev_link_update,
1465 	.stats_get			= sfc_stats_get,
1466 	.stats_reset			= sfc_stats_reset,
1467 	.xstats_get			= sfc_xstats_get,
1468 	.xstats_reset			= sfc_stats_reset,
1469 	.xstats_get_names		= sfc_xstats_get_names,
1470 	.dev_infos_get			= sfc_dev_infos_get,
1471 	.dev_supported_ptypes_get	= sfc_dev_supported_ptypes_get,
1472 	.mtu_set			= sfc_dev_set_mtu,
1473 	.rx_queue_start			= sfc_rx_queue_start,
1474 	.rx_queue_stop			= sfc_rx_queue_stop,
1475 	.tx_queue_start			= sfc_tx_queue_start,
1476 	.tx_queue_stop			= sfc_tx_queue_stop,
1477 	.rx_queue_setup			= sfc_rx_queue_setup,
1478 	.rx_queue_release		= sfc_rx_queue_release,
1479 	.rx_queue_count			= sfc_rx_queue_count,
1480 	.rx_descriptor_done		= sfc_rx_descriptor_done,
1481 	.rx_descriptor_status		= sfc_rx_descriptor_status,
1482 	.tx_queue_setup			= sfc_tx_queue_setup,
1483 	.tx_queue_release		= sfc_tx_queue_release,
1484 	.flow_ctrl_get			= sfc_flow_ctrl_get,
1485 	.flow_ctrl_set			= sfc_flow_ctrl_set,
1486 	.mac_addr_set			= sfc_mac_addr_set,
1487 #if EFSYS_OPT_RX_SCALE
1488 	.reta_update			= sfc_dev_rss_reta_update,
1489 	.reta_query			= sfc_dev_rss_reta_query,
1490 	.rss_hash_update		= sfc_dev_rss_hash_update,
1491 	.rss_hash_conf_get		= sfc_dev_rss_hash_conf_get,
1492 #endif
1493 	.filter_ctrl			= sfc_dev_filter_ctrl,
1494 	.set_mc_addr_list		= sfc_set_mc_addr_list,
1495 	.rxq_info_get			= sfc_rx_queue_info_get,
1496 	.txq_info_get			= sfc_tx_queue_info_get,
1497 	.fw_version_get			= sfc_fw_version_get,
1498 	.xstats_get_by_id		= sfc_xstats_get_by_id,
1499 	.xstats_get_names_by_id		= sfc_xstats_get_names_by_id,
1500 };
1501 
1502 /**
1503  * Duplicate a string in potentially shared memory required for
1504  * multi-process support.
1505  *
1506  * strdup() allocates from process-local heap/memory.
1507  */
1508 static char *
1509 sfc_strdup(const char *str)
1510 {
1511 	size_t size;
1512 	char *copy;
1513 
1514 	if (str == NULL)
1515 		return NULL;
1516 
1517 	size = strlen(str) + 1;
1518 	copy = rte_malloc(__func__, size, 0);
1519 	if (copy != NULL)
1520 		rte_memcpy(copy, str, size);
1521 
1522 	return copy;
1523 }
1524 
1525 static int
1526 sfc_eth_dev_set_ops(struct rte_eth_dev *dev)
1527 {
1528 	struct sfc_adapter *sa = dev->data->dev_private;
1529 	unsigned int avail_caps = 0;
1530 	const char *rx_name = NULL;
1531 	const char *tx_name = NULL;
1532 	int rc;
1533 
1534 	switch (sa->family) {
1535 	case EFX_FAMILY_HUNTINGTON:
1536 	case EFX_FAMILY_MEDFORD:
1537 		avail_caps |= SFC_DP_HW_FW_CAP_EF10;
1538 		break;
1539 	default:
1540 		break;
1541 	}
1542 
1543 	rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH,
1544 				sfc_kvarg_string_handler, &rx_name);
1545 	if (rc != 0)
1546 		goto fail_kvarg_rx_datapath;
1547 
1548 	if (rx_name != NULL) {
1549 		sa->dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name);
1550 		if (sa->dp_rx == NULL) {
1551 			sfc_err(sa, "Rx datapath %s not found", rx_name);
1552 			rc = ENOENT;
1553 			goto fail_dp_rx;
1554 		}
1555 		if (!sfc_dp_match_hw_fw_caps(&sa->dp_rx->dp, avail_caps)) {
1556 			sfc_err(sa,
1557 				"Insufficient Hw/FW capabilities to use Rx datapath %s",
1558 				rx_name);
1559 			rc = EINVAL;
1560 			goto fail_dp_rx_caps;
1561 		}
1562 	} else {
1563 		sa->dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps);
1564 		if (sa->dp_rx == NULL) {
1565 			sfc_err(sa, "Rx datapath by caps %#x not found",
1566 				avail_caps);
1567 			rc = ENOENT;
1568 			goto fail_dp_rx;
1569 		}
1570 	}
1571 
1572 	sa->dp_rx_name = sfc_strdup(sa->dp_rx->dp.name);
1573 	if (sa->dp_rx_name == NULL) {
1574 		rc = ENOMEM;
1575 		goto fail_dp_rx_name;
1576 	}
1577 
1578 	sfc_info(sa, "use %s Rx datapath", sa->dp_rx_name);
1579 
1580 	dev->rx_pkt_burst = sa->dp_rx->pkt_burst;
1581 
1582 	rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH,
1583 				sfc_kvarg_string_handler, &tx_name);
1584 	if (rc != 0)
1585 		goto fail_kvarg_tx_datapath;
1586 
1587 	if (tx_name != NULL) {
1588 		sa->dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name);
1589 		if (sa->dp_tx == NULL) {
1590 			sfc_err(sa, "Tx datapath %s not found", tx_name);
1591 			rc = ENOENT;
1592 			goto fail_dp_tx;
1593 		}
1594 		if (!sfc_dp_match_hw_fw_caps(&sa->dp_tx->dp, avail_caps)) {
1595 			sfc_err(sa,
1596 				"Insufficient Hw/FW capabilities to use Tx datapath %s",
1597 				tx_name);
1598 			rc = EINVAL;
1599 			goto fail_dp_tx_caps;
1600 		}
1601 	} else {
1602 		sa->dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps);
1603 		if (sa->dp_tx == NULL) {
1604 			sfc_err(sa, "Tx datapath by caps %#x not found",
1605 				avail_caps);
1606 			rc = ENOENT;
1607 			goto fail_dp_tx;
1608 		}
1609 	}
1610 
1611 	sa->dp_tx_name = sfc_strdup(sa->dp_tx->dp.name);
1612 	if (sa->dp_tx_name == NULL) {
1613 		rc = ENOMEM;
1614 		goto fail_dp_tx_name;
1615 	}
1616 
1617 	sfc_info(sa, "use %s Tx datapath", sa->dp_tx_name);
1618 
1619 	dev->tx_pkt_burst = sa->dp_tx->pkt_burst;
1620 
1621 	dev->dev_ops = &sfc_eth_dev_ops;
1622 
1623 	return 0;
1624 
1625 fail_dp_tx_name:
1626 fail_dp_tx_caps:
1627 	sa->dp_tx = NULL;
1628 
1629 fail_dp_tx:
1630 fail_kvarg_tx_datapath:
1631 	rte_free(sa->dp_rx_name);
1632 	sa->dp_rx_name = NULL;
1633 
1634 fail_dp_rx_name:
1635 fail_dp_rx_caps:
1636 	sa->dp_rx = NULL;
1637 
1638 fail_dp_rx:
1639 fail_kvarg_rx_datapath:
1640 	return rc;
1641 }
1642 
1643 static void
1644 sfc_eth_dev_clear_ops(struct rte_eth_dev *dev)
1645 {
1646 	struct sfc_adapter *sa = dev->data->dev_private;
1647 
1648 	dev->dev_ops = NULL;
1649 	dev->rx_pkt_burst = NULL;
1650 	dev->tx_pkt_burst = NULL;
1651 
1652 	rte_free(sa->dp_tx_name);
1653 	sa->dp_tx_name = NULL;
1654 	sa->dp_tx = NULL;
1655 
1656 	rte_free(sa->dp_rx_name);
1657 	sa->dp_rx_name = NULL;
1658 	sa->dp_rx = NULL;
1659 }
1660 
1661 static const struct eth_dev_ops sfc_eth_dev_secondary_ops = {
1662 	.rxq_info_get			= sfc_rx_queue_info_get,
1663 	.txq_info_get			= sfc_tx_queue_info_get,
1664 };
1665 
1666 static int
1667 sfc_eth_dev_secondary_set_ops(struct rte_eth_dev *dev)
1668 {
1669 	/*
1670 	 * Device private data has really many process-local pointers.
1671 	 * Below code should be extremely careful to use data located
1672 	 * in shared memory only.
1673 	 */
1674 	struct sfc_adapter *sa = dev->data->dev_private;
1675 	const struct sfc_dp_rx *dp_rx;
1676 	const struct sfc_dp_tx *dp_tx;
1677 	int rc;
1678 
1679 	dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, sa->dp_rx_name);
1680 	if (dp_rx == NULL) {
1681 		sfc_err(sa, "cannot find %s Rx datapath", sa->dp_tx_name);
1682 		rc = ENOENT;
1683 		goto fail_dp_rx;
1684 	}
1685 	if (~dp_rx->features & SFC_DP_RX_FEAT_MULTI_PROCESS) {
1686 		sfc_err(sa, "%s Rx datapath does not support multi-process",
1687 			sa->dp_tx_name);
1688 		rc = EINVAL;
1689 		goto fail_dp_rx_multi_process;
1690 	}
1691 
1692 	dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, sa->dp_tx_name);
1693 	if (dp_tx == NULL) {
1694 		sfc_err(sa, "cannot find %s Tx datapath", sa->dp_tx_name);
1695 		rc = ENOENT;
1696 		goto fail_dp_tx;
1697 	}
1698 	if (~dp_tx->features & SFC_DP_TX_FEAT_MULTI_PROCESS) {
1699 		sfc_err(sa, "%s Tx datapath does not support multi-process",
1700 			sa->dp_tx_name);
1701 		rc = EINVAL;
1702 		goto fail_dp_tx_multi_process;
1703 	}
1704 
1705 	dev->rx_pkt_burst = dp_rx->pkt_burst;
1706 	dev->tx_pkt_burst = dp_tx->pkt_burst;
1707 	dev->dev_ops = &sfc_eth_dev_secondary_ops;
1708 
1709 	return 0;
1710 
1711 fail_dp_tx_multi_process:
1712 fail_dp_tx:
1713 fail_dp_rx_multi_process:
1714 fail_dp_rx:
1715 	return rc;
1716 }
1717 
1718 static void
1719 sfc_eth_dev_secondary_clear_ops(struct rte_eth_dev *dev)
1720 {
1721 	dev->dev_ops = NULL;
1722 	dev->tx_pkt_burst = NULL;
1723 	dev->rx_pkt_burst = NULL;
1724 }
1725 
1726 static void
1727 sfc_register_dp(void)
1728 {
1729 	/* Register once */
1730 	if (TAILQ_EMPTY(&sfc_dp_head)) {
1731 		/* Prefer EF10 datapath */
1732 		sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp);
1733 		sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp);
1734 
1735 		sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp);
1736 		sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp);
1737 		sfc_dp_register(&sfc_dp_head, &sfc_ef10_simple_tx.dp);
1738 	}
1739 }
1740 
1741 static int
1742 sfc_eth_dev_init(struct rte_eth_dev *dev)
1743 {
1744 	struct sfc_adapter *sa = dev->data->dev_private;
1745 	struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1746 	int rc;
1747 	const efx_nic_cfg_t *encp;
1748 	const struct ether_addr *from;
1749 
1750 	sfc_register_dp();
1751 
1752 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1753 		return -sfc_eth_dev_secondary_set_ops(dev);
1754 
1755 	/* Required for logging */
1756 	sa->pci_addr = pci_dev->addr;
1757 	sa->port_id = dev->data->port_id;
1758 
1759 	sa->eth_dev = dev;
1760 
1761 	/* Copy PCI device info to the dev->data */
1762 	rte_eth_copy_pci_info(dev, pci_dev);
1763 
1764 	dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1765 
1766 	rc = sfc_kvargs_parse(sa);
1767 	if (rc != 0)
1768 		goto fail_kvargs_parse;
1769 
1770 	rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT,
1771 				sfc_kvarg_bool_handler, &sa->debug_init);
1772 	if (rc != 0)
1773 		goto fail_kvarg_debug_init;
1774 
1775 	sfc_log_init(sa, "entry");
1776 
1777 	dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0);
1778 	if (dev->data->mac_addrs == NULL) {
1779 		rc = ENOMEM;
1780 		goto fail_mac_addrs;
1781 	}
1782 
1783 	sfc_adapter_lock_init(sa);
1784 	sfc_adapter_lock(sa);
1785 
1786 	sfc_log_init(sa, "probing");
1787 	rc = sfc_probe(sa);
1788 	if (rc != 0)
1789 		goto fail_probe;
1790 
1791 	sfc_log_init(sa, "set device ops");
1792 	rc = sfc_eth_dev_set_ops(dev);
1793 	if (rc != 0)
1794 		goto fail_set_ops;
1795 
1796 	sfc_log_init(sa, "attaching");
1797 	rc = sfc_attach(sa);
1798 	if (rc != 0)
1799 		goto fail_attach;
1800 
1801 	encp = efx_nic_cfg_get(sa->nic);
1802 
1803 	/*
1804 	 * The arguments are really reverse order in comparison to
1805 	 * Linux kernel. Copy from NIC config to Ethernet device data.
1806 	 */
1807 	from = (const struct ether_addr *)(encp->enc_mac_addr);
1808 	ether_addr_copy(from, &dev->data->mac_addrs[0]);
1809 
1810 	sfc_adapter_unlock(sa);
1811 
1812 	sfc_log_init(sa, "done");
1813 	return 0;
1814 
1815 fail_attach:
1816 	sfc_eth_dev_clear_ops(dev);
1817 
1818 fail_set_ops:
1819 	sfc_unprobe(sa);
1820 
1821 fail_probe:
1822 	sfc_adapter_unlock(sa);
1823 	sfc_adapter_lock_fini(sa);
1824 	rte_free(dev->data->mac_addrs);
1825 	dev->data->mac_addrs = NULL;
1826 
1827 fail_mac_addrs:
1828 fail_kvarg_debug_init:
1829 	sfc_kvargs_cleanup(sa);
1830 
1831 fail_kvargs_parse:
1832 	sfc_log_init(sa, "failed %d", rc);
1833 	SFC_ASSERT(rc > 0);
1834 	return -rc;
1835 }
1836 
1837 static int
1838 sfc_eth_dev_uninit(struct rte_eth_dev *dev)
1839 {
1840 	struct sfc_adapter *sa;
1841 
1842 	if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1843 		sfc_eth_dev_secondary_clear_ops(dev);
1844 		return 0;
1845 	}
1846 
1847 	sa = dev->data->dev_private;
1848 	sfc_log_init(sa, "entry");
1849 
1850 	sfc_adapter_lock(sa);
1851 
1852 	sfc_eth_dev_clear_ops(dev);
1853 
1854 	sfc_detach(sa);
1855 	sfc_unprobe(sa);
1856 
1857 	rte_free(dev->data->mac_addrs);
1858 	dev->data->mac_addrs = NULL;
1859 
1860 	sfc_kvargs_cleanup(sa);
1861 
1862 	sfc_adapter_unlock(sa);
1863 	sfc_adapter_lock_fini(sa);
1864 
1865 	sfc_log_init(sa, "done");
1866 
1867 	/* Required for logging, so cleanup last */
1868 	sa->eth_dev = NULL;
1869 	return 0;
1870 }
1871 
1872 static const struct rte_pci_id pci_id_sfc_efx_map[] = {
1873 	{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) },
1874 	{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) },
1875 	{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) },
1876 	{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) },
1877 	{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) },
1878 	{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) },
1879 	{ .vendor_id = 0 /* sentinel */ }
1880 };
1881 
1882 static int sfc_eth_dev_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1883 	struct rte_pci_device *pci_dev)
1884 {
1885 	return rte_eth_dev_pci_generic_probe(pci_dev,
1886 		sizeof(struct sfc_adapter), sfc_eth_dev_init);
1887 }
1888 
1889 static int sfc_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
1890 {
1891 	return rte_eth_dev_pci_generic_remove(pci_dev, sfc_eth_dev_uninit);
1892 }
1893 
1894 static struct rte_pci_driver sfc_efx_pmd = {
1895 	.id_table = pci_id_sfc_efx_map,
1896 	.drv_flags =
1897 		RTE_PCI_DRV_INTR_LSC |
1898 		RTE_PCI_DRV_NEED_MAPPING,
1899 	.probe = sfc_eth_dev_pci_probe,
1900 	.remove = sfc_eth_dev_pci_remove,
1901 };
1902 
1903 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd);
1904 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map);
1905 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio-pci");
1906 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx,
1907 	SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " "
1908 	SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " "
1909 	SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " "
1910 	SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> "
1911 	SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " "
1912 	SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL);
1913