1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) 2016-2017 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * This software was jointly developed between OKTET Labs (under contract 8 * for Solarflare) and Solarflare Communications, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <rte_dev.h> 33 #include <rte_ethdev.h> 34 #include <rte_pci.h> 35 #include <rte_errno.h> 36 37 #include "efx.h" 38 39 #include "sfc.h" 40 #include "sfc_debug.h" 41 #include "sfc_log.h" 42 #include "sfc_kvargs.h" 43 #include "sfc_ev.h" 44 #include "sfc_rx.h" 45 #include "sfc_tx.h" 46 #include "sfc_flow.h" 47 #include "sfc_dp.h" 48 #include "sfc_dp_rx.h" 49 50 static struct sfc_dp_list sfc_dp_head = 51 TAILQ_HEAD_INITIALIZER(sfc_dp_head); 52 53 static int 54 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) 55 { 56 struct sfc_adapter *sa = dev->data->dev_private; 57 efx_nic_fw_info_t enfi; 58 int ret; 59 int rc; 60 61 /* 62 * Return value of the callback is likely supposed to be 63 * equal to or greater than 0, nevertheless, if an error 64 * occurs, it will be desirable to pass it to the caller 65 */ 66 if ((fw_version == NULL) || (fw_size == 0)) 67 return -EINVAL; 68 69 rc = efx_nic_get_fw_version(sa->nic, &enfi); 70 if (rc != 0) 71 return -rc; 72 73 ret = snprintf(fw_version, fw_size, 74 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16, 75 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1], 76 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]); 77 if (ret < 0) 78 return ret; 79 80 if (enfi.enfi_dpcpu_fw_ids_valid) { 81 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret); 82 int ret_extra; 83 84 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset, 85 fw_size - dpcpu_fw_ids_offset, 86 " rx%" PRIx16 " tx%" PRIx16, 87 enfi.enfi_rx_dpcpu_fw_id, 88 enfi.enfi_tx_dpcpu_fw_id); 89 if (ret_extra < 0) 90 return ret_extra; 91 92 ret += ret_extra; 93 } 94 95 if (fw_size < (size_t)(++ret)) 96 return ret; 97 else 98 return 0; 99 } 100 101 static void 102 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 103 { 104 struct sfc_adapter *sa = dev->data->dev_private; 105 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 106 107 sfc_log_init(sa, "entry"); 108 109 dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device); 110 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX; 111 112 /* Autonegotiation may be disabled */ 113 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 114 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX) 115 dev_info->speed_capa |= ETH_LINK_SPEED_1G; 116 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX) 117 dev_info->speed_capa |= ETH_LINK_SPEED_10G; 118 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX) 119 dev_info->speed_capa |= ETH_LINK_SPEED_40G; 120 121 dev_info->max_rx_queues = sa->rxq_max; 122 dev_info->max_tx_queues = sa->txq_max; 123 124 /* By default packets are dropped if no descriptors are available */ 125 dev_info->default_rxconf.rx_drop_en = 1; 126 127 dev_info->rx_offload_capa = 128 DEV_RX_OFFLOAD_IPV4_CKSUM | 129 DEV_RX_OFFLOAD_UDP_CKSUM | 130 DEV_RX_OFFLOAD_TCP_CKSUM; 131 132 dev_info->tx_offload_capa = 133 DEV_TX_OFFLOAD_IPV4_CKSUM | 134 DEV_TX_OFFLOAD_UDP_CKSUM | 135 DEV_TX_OFFLOAD_TCP_CKSUM; 136 137 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP; 138 if ((~sa->dp_tx->features & SFC_DP_TX_FEAT_VLAN_INSERT) || 139 !encp->enc_hw_tx_insert_vlan_enabled) 140 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL; 141 else 142 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT; 143 144 if (~sa->dp_tx->features & SFC_DP_TX_FEAT_MULTI_SEG) 145 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOMULTSEGS; 146 147 #if EFSYS_OPT_RX_SCALE 148 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) { 149 dev_info->reta_size = EFX_RSS_TBL_SIZE; 150 dev_info->hash_key_size = SFC_RSS_KEY_SIZE; 151 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS; 152 } 153 #endif 154 155 if (sa->tso) 156 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO; 157 158 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS; 159 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS; 160 /* The RXQ hardware requires that the descriptor count is a power 161 * of 2, but rx_desc_lim cannot properly describe that constraint. 162 */ 163 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS; 164 165 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; 166 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS; 167 /* 168 * The TXQ hardware requires that the descriptor count is a power 169 * of 2, but tx_desc_lim cannot properly describe that constraint 170 */ 171 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS; 172 } 173 174 static const uint32_t * 175 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev) 176 { 177 struct sfc_adapter *sa = dev->data->dev_private; 178 179 return sa->dp_rx->supported_ptypes_get(); 180 } 181 182 static int 183 sfc_dev_configure(struct rte_eth_dev *dev) 184 { 185 struct rte_eth_dev_data *dev_data = dev->data; 186 struct sfc_adapter *sa = dev_data->dev_private; 187 int rc; 188 189 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u", 190 dev_data->nb_rx_queues, dev_data->nb_tx_queues); 191 192 sfc_adapter_lock(sa); 193 switch (sa->state) { 194 case SFC_ADAPTER_CONFIGURED: 195 /* FALLTHROUGH */ 196 case SFC_ADAPTER_INITIALIZED: 197 rc = sfc_configure(sa); 198 break; 199 default: 200 sfc_err(sa, "unexpected adapter state %u to configure", 201 sa->state); 202 rc = EINVAL; 203 break; 204 } 205 sfc_adapter_unlock(sa); 206 207 sfc_log_init(sa, "done %d", rc); 208 SFC_ASSERT(rc >= 0); 209 return -rc; 210 } 211 212 static int 213 sfc_dev_start(struct rte_eth_dev *dev) 214 { 215 struct sfc_adapter *sa = dev->data->dev_private; 216 int rc; 217 218 sfc_log_init(sa, "entry"); 219 220 sfc_adapter_lock(sa); 221 rc = sfc_start(sa); 222 sfc_adapter_unlock(sa); 223 224 sfc_log_init(sa, "done %d", rc); 225 SFC_ASSERT(rc >= 0); 226 return -rc; 227 } 228 229 static int 230 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 231 { 232 struct sfc_adapter *sa = dev->data->dev_private; 233 struct rte_eth_link *dev_link = &dev->data->dev_link; 234 struct rte_eth_link old_link; 235 struct rte_eth_link current_link; 236 237 sfc_log_init(sa, "entry"); 238 239 retry: 240 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t)); 241 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link); 242 243 if (sa->state != SFC_ADAPTER_STARTED) { 244 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link); 245 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 246 *(uint64_t *)&old_link, 247 *(uint64_t *)¤t_link)) 248 goto retry; 249 } else if (wait_to_complete) { 250 efx_link_mode_t link_mode; 251 252 if (efx_port_poll(sa->nic, &link_mode) != 0) 253 link_mode = EFX_LINK_UNKNOWN; 254 sfc_port_link_mode_to_info(link_mode, ¤t_link); 255 256 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link, 257 *(uint64_t *)&old_link, 258 *(uint64_t *)¤t_link)) 259 goto retry; 260 } else { 261 sfc_ev_mgmt_qpoll(sa); 262 *(int64_t *)¤t_link = 263 rte_atomic64_read((rte_atomic64_t *)dev_link); 264 } 265 266 if (old_link.link_status != current_link.link_status) 267 sfc_info(sa, "Link status is %s", 268 current_link.link_status ? "UP" : "DOWN"); 269 270 return old_link.link_status == current_link.link_status ? 0 : -1; 271 } 272 273 static void 274 sfc_dev_stop(struct rte_eth_dev *dev) 275 { 276 struct sfc_adapter *sa = dev->data->dev_private; 277 278 sfc_log_init(sa, "entry"); 279 280 sfc_adapter_lock(sa); 281 sfc_stop(sa); 282 sfc_adapter_unlock(sa); 283 284 sfc_log_init(sa, "done"); 285 } 286 287 static int 288 sfc_dev_set_link_up(struct rte_eth_dev *dev) 289 { 290 struct sfc_adapter *sa = dev->data->dev_private; 291 int rc; 292 293 sfc_log_init(sa, "entry"); 294 295 sfc_adapter_lock(sa); 296 rc = sfc_start(sa); 297 sfc_adapter_unlock(sa); 298 299 SFC_ASSERT(rc >= 0); 300 return -rc; 301 } 302 303 static int 304 sfc_dev_set_link_down(struct rte_eth_dev *dev) 305 { 306 struct sfc_adapter *sa = dev->data->dev_private; 307 308 sfc_log_init(sa, "entry"); 309 310 sfc_adapter_lock(sa); 311 sfc_stop(sa); 312 sfc_adapter_unlock(sa); 313 314 return 0; 315 } 316 317 static void 318 sfc_dev_close(struct rte_eth_dev *dev) 319 { 320 struct sfc_adapter *sa = dev->data->dev_private; 321 322 sfc_log_init(sa, "entry"); 323 324 sfc_adapter_lock(sa); 325 switch (sa->state) { 326 case SFC_ADAPTER_STARTED: 327 sfc_stop(sa); 328 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED); 329 /* FALLTHROUGH */ 330 case SFC_ADAPTER_CONFIGURED: 331 sfc_close(sa); 332 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED); 333 /* FALLTHROUGH */ 334 case SFC_ADAPTER_INITIALIZED: 335 break; 336 default: 337 sfc_err(sa, "unexpected adapter state %u on close", sa->state); 338 break; 339 } 340 sfc_adapter_unlock(sa); 341 342 sfc_log_init(sa, "done"); 343 } 344 345 static void 346 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode, 347 boolean_t enabled) 348 { 349 struct sfc_port *port; 350 boolean_t *toggle; 351 struct sfc_adapter *sa = dev->data->dev_private; 352 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI); 353 const char *desc = (allmulti) ? "all-multi" : "promiscuous"; 354 355 sfc_adapter_lock(sa); 356 357 port = &sa->port; 358 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc); 359 360 if (*toggle != enabled) { 361 *toggle = enabled; 362 363 if ((sa->state == SFC_ADAPTER_STARTED) && 364 (sfc_set_rx_mode(sa) != 0)) { 365 *toggle = !(enabled); 366 sfc_warn(sa, "Failed to %s %s mode", 367 ((enabled) ? "enable" : "disable"), desc); 368 } 369 } 370 371 sfc_adapter_unlock(sa); 372 } 373 374 static void 375 sfc_dev_promisc_enable(struct rte_eth_dev *dev) 376 { 377 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE); 378 } 379 380 static void 381 sfc_dev_promisc_disable(struct rte_eth_dev *dev) 382 { 383 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE); 384 } 385 386 static void 387 sfc_dev_allmulti_enable(struct rte_eth_dev *dev) 388 { 389 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE); 390 } 391 392 static void 393 sfc_dev_allmulti_disable(struct rte_eth_dev *dev) 394 { 395 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE); 396 } 397 398 static int 399 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, 400 uint16_t nb_rx_desc, unsigned int socket_id, 401 const struct rte_eth_rxconf *rx_conf, 402 struct rte_mempool *mb_pool) 403 { 404 struct sfc_adapter *sa = dev->data->dev_private; 405 int rc; 406 407 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u", 408 rx_queue_id, nb_rx_desc, socket_id); 409 410 sfc_adapter_lock(sa); 411 412 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id, 413 rx_conf, mb_pool); 414 if (rc != 0) 415 goto fail_rx_qinit; 416 417 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq->dp; 418 419 sfc_adapter_unlock(sa); 420 421 return 0; 422 423 fail_rx_qinit: 424 sfc_adapter_unlock(sa); 425 SFC_ASSERT(rc > 0); 426 return -rc; 427 } 428 429 static void 430 sfc_rx_queue_release(void *queue) 431 { 432 struct sfc_dp_rxq *dp_rxq = queue; 433 struct sfc_rxq *rxq; 434 struct sfc_adapter *sa; 435 unsigned int sw_index; 436 437 if (dp_rxq == NULL) 438 return; 439 440 rxq = sfc_rxq_by_dp_rxq(dp_rxq); 441 sa = rxq->evq->sa; 442 sfc_adapter_lock(sa); 443 444 sw_index = sfc_rxq_sw_index(rxq); 445 446 sfc_log_init(sa, "RxQ=%u", sw_index); 447 448 sa->eth_dev->data->rx_queues[sw_index] = NULL; 449 450 sfc_rx_qfini(sa, sw_index); 451 452 sfc_adapter_unlock(sa); 453 } 454 455 static int 456 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, 457 uint16_t nb_tx_desc, unsigned int socket_id, 458 const struct rte_eth_txconf *tx_conf) 459 { 460 struct sfc_adapter *sa = dev->data->dev_private; 461 int rc; 462 463 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u", 464 tx_queue_id, nb_tx_desc, socket_id); 465 466 sfc_adapter_lock(sa); 467 468 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf); 469 if (rc != 0) 470 goto fail_tx_qinit; 471 472 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq->dp; 473 474 sfc_adapter_unlock(sa); 475 return 0; 476 477 fail_tx_qinit: 478 sfc_adapter_unlock(sa); 479 SFC_ASSERT(rc > 0); 480 return -rc; 481 } 482 483 static void 484 sfc_tx_queue_release(void *queue) 485 { 486 struct sfc_dp_txq *dp_txq = queue; 487 struct sfc_txq *txq; 488 unsigned int sw_index; 489 struct sfc_adapter *sa; 490 491 if (dp_txq == NULL) 492 return; 493 494 txq = sfc_txq_by_dp_txq(dp_txq); 495 sw_index = sfc_txq_sw_index(txq); 496 497 SFC_ASSERT(txq->evq != NULL); 498 sa = txq->evq->sa; 499 500 sfc_log_init(sa, "TxQ = %u", sw_index); 501 502 sfc_adapter_lock(sa); 503 504 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues); 505 sa->eth_dev->data->tx_queues[sw_index] = NULL; 506 507 sfc_tx_qfini(sa, sw_index); 508 509 sfc_adapter_unlock(sa); 510 } 511 512 static void 513 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 514 { 515 struct sfc_adapter *sa = dev->data->dev_private; 516 struct sfc_port *port = &sa->port; 517 uint64_t *mac_stats; 518 519 rte_spinlock_lock(&port->mac_stats_lock); 520 521 if (sfc_port_update_mac_stats(sa) != 0) 522 goto unlock; 523 524 mac_stats = port->mac_stats_buf; 525 526 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, 527 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) { 528 stats->ipackets = 529 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] + 530 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] + 531 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]; 532 stats->opackets = 533 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] + 534 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] + 535 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]; 536 stats->ibytes = 537 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] + 538 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] + 539 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]; 540 stats->obytes = 541 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] + 542 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] + 543 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]; 544 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW]; 545 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS]; 546 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS]; 547 } else { 548 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS]; 549 stats->opackets = mac_stats[EFX_MAC_TX_PKTS]; 550 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS]; 551 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS]; 552 /* 553 * Take into account stats which are whenever supported 554 * on EF10. If some stat is not supported by current 555 * firmware variant or HW revision, it is guaranteed 556 * to be zero in mac_stats. 557 */ 558 stats->imissed = 559 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] + 560 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] + 561 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] + 562 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] + 563 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] + 564 mac_stats[EFX_MAC_PM_TRUNC_QBB] + 565 mac_stats[EFX_MAC_PM_DISCARD_QBB] + 566 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] + 567 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] + 568 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS]; 569 stats->ierrors = 570 mac_stats[EFX_MAC_RX_FCS_ERRORS] + 571 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] + 572 mac_stats[EFX_MAC_RX_JABBER_PKTS]; 573 /* no oerrors counters supported on EF10 */ 574 } 575 576 unlock: 577 rte_spinlock_unlock(&port->mac_stats_lock); 578 } 579 580 static void 581 sfc_stats_reset(struct rte_eth_dev *dev) 582 { 583 struct sfc_adapter *sa = dev->data->dev_private; 584 struct sfc_port *port = &sa->port; 585 int rc; 586 587 if (sa->state != SFC_ADAPTER_STARTED) { 588 /* 589 * The operation cannot be done if port is not started; it 590 * will be scheduled to be done during the next port start 591 */ 592 port->mac_stats_reset_pending = B_TRUE; 593 return; 594 } 595 596 rc = sfc_port_reset_mac_stats(sa); 597 if (rc != 0) 598 sfc_err(sa, "failed to reset statistics (rc = %d)", rc); 599 } 600 601 static int 602 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 603 unsigned int xstats_count) 604 { 605 struct sfc_adapter *sa = dev->data->dev_private; 606 struct sfc_port *port = &sa->port; 607 uint64_t *mac_stats; 608 int rc; 609 unsigned int i; 610 int nstats = 0; 611 612 rte_spinlock_lock(&port->mac_stats_lock); 613 614 rc = sfc_port_update_mac_stats(sa); 615 if (rc != 0) { 616 SFC_ASSERT(rc > 0); 617 nstats = -rc; 618 goto unlock; 619 } 620 621 mac_stats = port->mac_stats_buf; 622 623 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 624 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 625 if (xstats != NULL && nstats < (int)xstats_count) { 626 xstats[nstats].id = nstats; 627 xstats[nstats].value = mac_stats[i]; 628 } 629 nstats++; 630 } 631 } 632 633 unlock: 634 rte_spinlock_unlock(&port->mac_stats_lock); 635 636 return nstats; 637 } 638 639 static int 640 sfc_xstats_get_names(struct rte_eth_dev *dev, 641 struct rte_eth_xstat_name *xstats_names, 642 unsigned int xstats_count) 643 { 644 struct sfc_adapter *sa = dev->data->dev_private; 645 struct sfc_port *port = &sa->port; 646 unsigned int i; 647 unsigned int nstats = 0; 648 649 for (i = 0; i < EFX_MAC_NSTATS; ++i) { 650 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) { 651 if (xstats_names != NULL && nstats < xstats_count) 652 strncpy(xstats_names[nstats].name, 653 efx_mac_stat_name(sa->nic, i), 654 sizeof(xstats_names[0].name)); 655 nstats++; 656 } 657 } 658 659 return nstats; 660 } 661 662 static int 663 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 664 { 665 struct sfc_adapter *sa = dev->data->dev_private; 666 unsigned int wanted_fc, link_fc; 667 668 memset(fc_conf, 0, sizeof(*fc_conf)); 669 670 sfc_adapter_lock(sa); 671 672 if (sa->state == SFC_ADAPTER_STARTED) 673 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc); 674 else 675 link_fc = sa->port.flow_ctrl; 676 677 switch (link_fc) { 678 case 0: 679 fc_conf->mode = RTE_FC_NONE; 680 break; 681 case EFX_FCNTL_RESPOND: 682 fc_conf->mode = RTE_FC_RX_PAUSE; 683 break; 684 case EFX_FCNTL_GENERATE: 685 fc_conf->mode = RTE_FC_TX_PAUSE; 686 break; 687 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE): 688 fc_conf->mode = RTE_FC_FULL; 689 break; 690 default: 691 sfc_err(sa, "%s: unexpected flow control value %#x", 692 __func__, link_fc); 693 } 694 695 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; 696 697 sfc_adapter_unlock(sa); 698 699 return 0; 700 } 701 702 static int 703 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 704 { 705 struct sfc_adapter *sa = dev->data->dev_private; 706 struct sfc_port *port = &sa->port; 707 unsigned int fcntl; 708 int rc; 709 710 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || 711 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || 712 fc_conf->mac_ctrl_frame_fwd != 0) { 713 sfc_err(sa, "unsupported flow control settings specified"); 714 rc = EINVAL; 715 goto fail_inval; 716 } 717 718 switch (fc_conf->mode) { 719 case RTE_FC_NONE: 720 fcntl = 0; 721 break; 722 case RTE_FC_RX_PAUSE: 723 fcntl = EFX_FCNTL_RESPOND; 724 break; 725 case RTE_FC_TX_PAUSE: 726 fcntl = EFX_FCNTL_GENERATE; 727 break; 728 case RTE_FC_FULL: 729 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 730 break; 731 default: 732 rc = EINVAL; 733 goto fail_inval; 734 } 735 736 sfc_adapter_lock(sa); 737 738 if (sa->state == SFC_ADAPTER_STARTED) { 739 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg); 740 if (rc != 0) 741 goto fail_mac_fcntl_set; 742 } 743 744 port->flow_ctrl = fcntl; 745 port->flow_ctrl_autoneg = fc_conf->autoneg; 746 747 sfc_adapter_unlock(sa); 748 749 return 0; 750 751 fail_mac_fcntl_set: 752 sfc_adapter_unlock(sa); 753 fail_inval: 754 SFC_ASSERT(rc > 0); 755 return -rc; 756 } 757 758 static int 759 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 760 { 761 struct sfc_adapter *sa = dev->data->dev_private; 762 size_t pdu = EFX_MAC_PDU(mtu); 763 size_t old_pdu; 764 int rc; 765 766 sfc_log_init(sa, "mtu=%u", mtu); 767 768 rc = EINVAL; 769 if (pdu < EFX_MAC_PDU_MIN) { 770 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)", 771 (unsigned int)mtu, (unsigned int)pdu, 772 EFX_MAC_PDU_MIN); 773 goto fail_inval; 774 } 775 if (pdu > EFX_MAC_PDU_MAX) { 776 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)", 777 (unsigned int)mtu, (unsigned int)pdu, 778 EFX_MAC_PDU_MAX); 779 goto fail_inval; 780 } 781 782 sfc_adapter_lock(sa); 783 784 if (pdu != sa->port.pdu) { 785 if (sa->state == SFC_ADAPTER_STARTED) { 786 sfc_stop(sa); 787 788 old_pdu = sa->port.pdu; 789 sa->port.pdu = pdu; 790 rc = sfc_start(sa); 791 if (rc != 0) 792 goto fail_start; 793 } else { 794 sa->port.pdu = pdu; 795 } 796 } 797 798 /* 799 * The driver does not use it, but other PMDs update jumbo_frame 800 * flag and max_rx_pkt_len when MTU is set. 801 */ 802 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN); 803 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu; 804 805 sfc_adapter_unlock(sa); 806 807 sfc_log_init(sa, "done"); 808 return 0; 809 810 fail_start: 811 sa->port.pdu = old_pdu; 812 if (sfc_start(sa) != 0) 813 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) " 814 "PDU max size - port is stopped", 815 (unsigned int)pdu, (unsigned int)old_pdu); 816 sfc_adapter_unlock(sa); 817 818 fail_inval: 819 sfc_log_init(sa, "failed %d", rc); 820 SFC_ASSERT(rc > 0); 821 return -rc; 822 } 823 static void 824 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr) 825 { 826 struct sfc_adapter *sa = dev->data->dev_private; 827 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 828 int rc; 829 830 sfc_adapter_lock(sa); 831 832 if (sa->state != SFC_ADAPTER_STARTED) { 833 sfc_info(sa, "the port is not started"); 834 sfc_info(sa, "the new MAC address will be set on port start"); 835 836 goto unlock; 837 } 838 839 if (encp->enc_allow_set_mac_with_installed_filters) { 840 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes); 841 if (rc != 0) { 842 sfc_err(sa, "cannot set MAC address (rc = %u)", rc); 843 goto unlock; 844 } 845 846 /* 847 * Changing the MAC address by means of MCDI request 848 * has no effect on received traffic, therefore 849 * we also need to update unicast filters 850 */ 851 rc = sfc_set_rx_mode(sa); 852 if (rc != 0) 853 sfc_err(sa, "cannot set filter (rc = %u)", rc); 854 } else { 855 sfc_warn(sa, "cannot set MAC address with filters installed"); 856 sfc_warn(sa, "adapter will be restarted to pick the new MAC"); 857 sfc_warn(sa, "(some traffic may be dropped)"); 858 859 /* 860 * Since setting MAC address with filters installed is not 861 * allowed on the adapter, one needs to simply restart adapter 862 * so that the new MAC address will be taken from an outer 863 * storage and set flawlessly by means of sfc_start() call 864 */ 865 sfc_stop(sa); 866 rc = sfc_start(sa); 867 if (rc != 0) 868 sfc_err(sa, "cannot restart adapter (rc = %u)", rc); 869 } 870 871 unlock: 872 sfc_adapter_unlock(sa); 873 } 874 875 876 static int 877 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set, 878 uint32_t nb_mc_addr) 879 { 880 struct sfc_adapter *sa = dev->data->dev_private; 881 struct sfc_port *port = &sa->port; 882 uint8_t *mc_addrs = port->mcast_addrs; 883 int rc; 884 unsigned int i; 885 886 if (mc_addrs == NULL) 887 return -ENOBUFS; 888 889 if (nb_mc_addr > port->max_mcast_addrs) { 890 sfc_err(sa, "too many multicast addresses: %u > %u", 891 nb_mc_addr, port->max_mcast_addrs); 892 return -EINVAL; 893 } 894 895 for (i = 0; i < nb_mc_addr; ++i) { 896 (void)rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes, 897 EFX_MAC_ADDR_LEN); 898 mc_addrs += EFX_MAC_ADDR_LEN; 899 } 900 901 port->nb_mcast_addrs = nb_mc_addr; 902 903 if (sa->state != SFC_ADAPTER_STARTED) 904 return 0; 905 906 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs, 907 port->nb_mcast_addrs); 908 if (rc != 0) 909 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc); 910 911 SFC_ASSERT(rc > 0); 912 return -rc; 913 } 914 915 static void 916 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id, 917 struct rte_eth_rxq_info *qinfo) 918 { 919 struct sfc_adapter *sa = dev->data->dev_private; 920 struct sfc_rxq_info *rxq_info; 921 struct sfc_rxq *rxq; 922 923 sfc_adapter_lock(sa); 924 925 SFC_ASSERT(rx_queue_id < sa->rxq_count); 926 927 rxq_info = &sa->rxq_info[rx_queue_id]; 928 rxq = rxq_info->rxq; 929 SFC_ASSERT(rxq != NULL); 930 931 qinfo->mp = rxq->refill_mb_pool; 932 qinfo->conf.rx_free_thresh = rxq->refill_threshold; 933 qinfo->conf.rx_drop_en = 1; 934 qinfo->conf.rx_deferred_start = rxq_info->deferred_start; 935 qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER); 936 qinfo->nb_desc = rxq_info->entries; 937 938 sfc_adapter_unlock(sa); 939 } 940 941 static void 942 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id, 943 struct rte_eth_txq_info *qinfo) 944 { 945 struct sfc_adapter *sa = dev->data->dev_private; 946 struct sfc_txq_info *txq_info; 947 948 sfc_adapter_lock(sa); 949 950 SFC_ASSERT(tx_queue_id < sa->txq_count); 951 952 txq_info = &sa->txq_info[tx_queue_id]; 953 SFC_ASSERT(txq_info->txq != NULL); 954 955 memset(qinfo, 0, sizeof(*qinfo)); 956 957 qinfo->conf.txq_flags = txq_info->txq->flags; 958 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh; 959 qinfo->conf.tx_deferred_start = txq_info->deferred_start; 960 qinfo->nb_desc = txq_info->entries; 961 962 sfc_adapter_unlock(sa); 963 } 964 965 static uint32_t 966 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) 967 { 968 struct sfc_adapter *sa = dev->data->dev_private; 969 970 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 971 972 return sfc_rx_qdesc_npending(sa, rx_queue_id); 973 } 974 975 static int 976 sfc_rx_descriptor_done(void *queue, uint16_t offset) 977 { 978 struct sfc_dp_rxq *dp_rxq = queue; 979 980 return sfc_rx_qdesc_done(dp_rxq, offset); 981 } 982 983 static int 984 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) 985 { 986 struct sfc_adapter *sa = dev->data->dev_private; 987 int rc; 988 989 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 990 991 sfc_adapter_lock(sa); 992 993 rc = EINVAL; 994 if (sa->state != SFC_ADAPTER_STARTED) 995 goto fail_not_started; 996 997 rc = sfc_rx_qstart(sa, rx_queue_id); 998 if (rc != 0) 999 goto fail_rx_qstart; 1000 1001 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE; 1002 1003 sfc_adapter_unlock(sa); 1004 1005 return 0; 1006 1007 fail_rx_qstart: 1008 fail_not_started: 1009 sfc_adapter_unlock(sa); 1010 SFC_ASSERT(rc > 0); 1011 return -rc; 1012 } 1013 1014 static int 1015 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) 1016 { 1017 struct sfc_adapter *sa = dev->data->dev_private; 1018 1019 sfc_log_init(sa, "RxQ=%u", rx_queue_id); 1020 1021 sfc_adapter_lock(sa); 1022 sfc_rx_qstop(sa, rx_queue_id); 1023 1024 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE; 1025 1026 sfc_adapter_unlock(sa); 1027 1028 return 0; 1029 } 1030 1031 static int 1032 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1033 { 1034 struct sfc_adapter *sa = dev->data->dev_private; 1035 int rc; 1036 1037 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1038 1039 sfc_adapter_lock(sa); 1040 1041 rc = EINVAL; 1042 if (sa->state != SFC_ADAPTER_STARTED) 1043 goto fail_not_started; 1044 1045 rc = sfc_tx_qstart(sa, tx_queue_id); 1046 if (rc != 0) 1047 goto fail_tx_qstart; 1048 1049 sa->txq_info[tx_queue_id].deferred_started = B_TRUE; 1050 1051 sfc_adapter_unlock(sa); 1052 return 0; 1053 1054 fail_tx_qstart: 1055 1056 fail_not_started: 1057 sfc_adapter_unlock(sa); 1058 SFC_ASSERT(rc > 0); 1059 return -rc; 1060 } 1061 1062 static int 1063 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) 1064 { 1065 struct sfc_adapter *sa = dev->data->dev_private; 1066 1067 sfc_log_init(sa, "TxQ = %u", tx_queue_id); 1068 1069 sfc_adapter_lock(sa); 1070 1071 sfc_tx_qstop(sa, tx_queue_id); 1072 1073 sa->txq_info[tx_queue_id].deferred_started = B_FALSE; 1074 1075 sfc_adapter_unlock(sa); 1076 return 0; 1077 } 1078 1079 #if EFSYS_OPT_RX_SCALE 1080 static int 1081 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1082 struct rte_eth_rss_conf *rss_conf) 1083 { 1084 struct sfc_adapter *sa = dev->data->dev_private; 1085 1086 if ((sa->rss_channels == 1) || 1087 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) 1088 return -ENOTSUP; 1089 1090 sfc_adapter_lock(sa); 1091 1092 /* 1093 * Mapping of hash configuration between RTE and EFX is not one-to-one, 1094 * hence, conversion is done here to derive a correct set of ETH_RSS 1095 * flags which corresponds to the active EFX configuration stored 1096 * locally in 'sfc_adapter' and kept up-to-date 1097 */ 1098 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types); 1099 rss_conf->rss_key_len = SFC_RSS_KEY_SIZE; 1100 if (rss_conf->rss_key != NULL) 1101 rte_memcpy(rss_conf->rss_key, sa->rss_key, SFC_RSS_KEY_SIZE); 1102 1103 sfc_adapter_unlock(sa); 1104 1105 return 0; 1106 } 1107 1108 static int 1109 sfc_dev_rss_hash_update(struct rte_eth_dev *dev, 1110 struct rte_eth_rss_conf *rss_conf) 1111 { 1112 struct sfc_adapter *sa = dev->data->dev_private; 1113 unsigned int efx_hash_types; 1114 int rc = 0; 1115 1116 if ((sa->rss_channels == 1) || 1117 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) { 1118 sfc_err(sa, "RSS is not available"); 1119 return -ENOTSUP; 1120 } 1121 1122 if ((rss_conf->rss_key != NULL) && 1123 (rss_conf->rss_key_len != sizeof(sa->rss_key))) { 1124 sfc_err(sa, "RSS key size is wrong (should be %lu)", 1125 sizeof(sa->rss_key)); 1126 return -EINVAL; 1127 } 1128 1129 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) { 1130 sfc_err(sa, "unsupported hash functions requested"); 1131 return -EINVAL; 1132 } 1133 1134 sfc_adapter_lock(sa); 1135 1136 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf); 1137 1138 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, 1139 efx_hash_types, B_TRUE); 1140 if (rc != 0) 1141 goto fail_scale_mode_set; 1142 1143 if (rss_conf->rss_key != NULL) { 1144 if (sa->state == SFC_ADAPTER_STARTED) { 1145 rc = efx_rx_scale_key_set(sa->nic, rss_conf->rss_key, 1146 sizeof(sa->rss_key)); 1147 if (rc != 0) 1148 goto fail_scale_key_set; 1149 } 1150 1151 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key)); 1152 } 1153 1154 sa->rss_hash_types = efx_hash_types; 1155 1156 sfc_adapter_unlock(sa); 1157 1158 return 0; 1159 1160 fail_scale_key_set: 1161 if (efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ, 1162 sa->rss_hash_types, B_TRUE) != 0) 1163 sfc_err(sa, "failed to restore RSS mode"); 1164 1165 fail_scale_mode_set: 1166 sfc_adapter_unlock(sa); 1167 return -rc; 1168 } 1169 1170 static int 1171 sfc_dev_rss_reta_query(struct rte_eth_dev *dev, 1172 struct rte_eth_rss_reta_entry64 *reta_conf, 1173 uint16_t reta_size) 1174 { 1175 struct sfc_adapter *sa = dev->data->dev_private; 1176 int entry; 1177 1178 if ((sa->rss_channels == 1) || 1179 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) 1180 return -ENOTSUP; 1181 1182 if (reta_size != EFX_RSS_TBL_SIZE) 1183 return -EINVAL; 1184 1185 sfc_adapter_lock(sa); 1186 1187 for (entry = 0; entry < reta_size; entry++) { 1188 int grp = entry / RTE_RETA_GROUP_SIZE; 1189 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1190 1191 if ((reta_conf[grp].mask >> grp_idx) & 1) 1192 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry]; 1193 } 1194 1195 sfc_adapter_unlock(sa); 1196 1197 return 0; 1198 } 1199 1200 static int 1201 sfc_dev_rss_reta_update(struct rte_eth_dev *dev, 1202 struct rte_eth_rss_reta_entry64 *reta_conf, 1203 uint16_t reta_size) 1204 { 1205 struct sfc_adapter *sa = dev->data->dev_private; 1206 unsigned int *rss_tbl_new; 1207 uint16_t entry; 1208 int rc; 1209 1210 1211 if ((sa->rss_channels == 1) || 1212 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) { 1213 sfc_err(sa, "RSS is not available"); 1214 return -ENOTSUP; 1215 } 1216 1217 if (reta_size != EFX_RSS_TBL_SIZE) { 1218 sfc_err(sa, "RETA size is wrong (should be %u)", 1219 EFX_RSS_TBL_SIZE); 1220 return -EINVAL; 1221 } 1222 1223 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0); 1224 if (rss_tbl_new == NULL) 1225 return -ENOMEM; 1226 1227 sfc_adapter_lock(sa); 1228 1229 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl)); 1230 1231 for (entry = 0; entry < reta_size; entry++) { 1232 int grp_idx = entry % RTE_RETA_GROUP_SIZE; 1233 struct rte_eth_rss_reta_entry64 *grp; 1234 1235 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE]; 1236 1237 if (grp->mask & (1ull << grp_idx)) { 1238 if (grp->reta[grp_idx] >= sa->rss_channels) { 1239 rc = EINVAL; 1240 goto bad_reta_entry; 1241 } 1242 rss_tbl_new[entry] = grp->reta[grp_idx]; 1243 } 1244 } 1245 1246 rc = efx_rx_scale_tbl_set(sa->nic, rss_tbl_new, EFX_RSS_TBL_SIZE); 1247 if (rc == 0) 1248 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl)); 1249 1250 bad_reta_entry: 1251 sfc_adapter_unlock(sa); 1252 1253 rte_free(rss_tbl_new); 1254 1255 SFC_ASSERT(rc >= 0); 1256 return -rc; 1257 } 1258 #endif 1259 1260 static int 1261 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type, 1262 enum rte_filter_op filter_op, 1263 void *arg) 1264 { 1265 struct sfc_adapter *sa = dev->data->dev_private; 1266 int rc = ENOTSUP; 1267 1268 sfc_log_init(sa, "entry"); 1269 1270 switch (filter_type) { 1271 case RTE_ETH_FILTER_NONE: 1272 sfc_err(sa, "Global filters configuration not supported"); 1273 break; 1274 case RTE_ETH_FILTER_MACVLAN: 1275 sfc_err(sa, "MACVLAN filters not supported"); 1276 break; 1277 case RTE_ETH_FILTER_ETHERTYPE: 1278 sfc_err(sa, "EtherType filters not supported"); 1279 break; 1280 case RTE_ETH_FILTER_FLEXIBLE: 1281 sfc_err(sa, "Flexible filters not supported"); 1282 break; 1283 case RTE_ETH_FILTER_SYN: 1284 sfc_err(sa, "SYN filters not supported"); 1285 break; 1286 case RTE_ETH_FILTER_NTUPLE: 1287 sfc_err(sa, "NTUPLE filters not supported"); 1288 break; 1289 case RTE_ETH_FILTER_TUNNEL: 1290 sfc_err(sa, "Tunnel filters not supported"); 1291 break; 1292 case RTE_ETH_FILTER_FDIR: 1293 sfc_err(sa, "Flow Director filters not supported"); 1294 break; 1295 case RTE_ETH_FILTER_HASH: 1296 sfc_err(sa, "Hash filters not supported"); 1297 break; 1298 case RTE_ETH_FILTER_GENERIC: 1299 if (filter_op != RTE_ETH_FILTER_GET) { 1300 rc = EINVAL; 1301 } else { 1302 *(const void **)arg = &sfc_flow_ops; 1303 rc = 0; 1304 } 1305 break; 1306 default: 1307 sfc_err(sa, "Unknown filter type %u", filter_type); 1308 break; 1309 } 1310 1311 sfc_log_init(sa, "exit: %d", -rc); 1312 SFC_ASSERT(rc >= 0); 1313 return -rc; 1314 } 1315 1316 static const struct eth_dev_ops sfc_eth_dev_ops = { 1317 .dev_configure = sfc_dev_configure, 1318 .dev_start = sfc_dev_start, 1319 .dev_stop = sfc_dev_stop, 1320 .dev_set_link_up = sfc_dev_set_link_up, 1321 .dev_set_link_down = sfc_dev_set_link_down, 1322 .dev_close = sfc_dev_close, 1323 .promiscuous_enable = sfc_dev_promisc_enable, 1324 .promiscuous_disable = sfc_dev_promisc_disable, 1325 .allmulticast_enable = sfc_dev_allmulti_enable, 1326 .allmulticast_disable = sfc_dev_allmulti_disable, 1327 .link_update = sfc_dev_link_update, 1328 .stats_get = sfc_stats_get, 1329 .stats_reset = sfc_stats_reset, 1330 .xstats_get = sfc_xstats_get, 1331 .xstats_reset = sfc_stats_reset, 1332 .xstats_get_names = sfc_xstats_get_names, 1333 .dev_infos_get = sfc_dev_infos_get, 1334 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get, 1335 .mtu_set = sfc_dev_set_mtu, 1336 .rx_queue_start = sfc_rx_queue_start, 1337 .rx_queue_stop = sfc_rx_queue_stop, 1338 .tx_queue_start = sfc_tx_queue_start, 1339 .tx_queue_stop = sfc_tx_queue_stop, 1340 .rx_queue_setup = sfc_rx_queue_setup, 1341 .rx_queue_release = sfc_rx_queue_release, 1342 .rx_queue_count = sfc_rx_queue_count, 1343 .rx_descriptor_done = sfc_rx_descriptor_done, 1344 .tx_queue_setup = sfc_tx_queue_setup, 1345 .tx_queue_release = sfc_tx_queue_release, 1346 .flow_ctrl_get = sfc_flow_ctrl_get, 1347 .flow_ctrl_set = sfc_flow_ctrl_set, 1348 .mac_addr_set = sfc_mac_addr_set, 1349 #if EFSYS_OPT_RX_SCALE 1350 .reta_update = sfc_dev_rss_reta_update, 1351 .reta_query = sfc_dev_rss_reta_query, 1352 .rss_hash_update = sfc_dev_rss_hash_update, 1353 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get, 1354 #endif 1355 .filter_ctrl = sfc_dev_filter_ctrl, 1356 .set_mc_addr_list = sfc_set_mc_addr_list, 1357 .rxq_info_get = sfc_rx_queue_info_get, 1358 .txq_info_get = sfc_tx_queue_info_get, 1359 .fw_version_get = sfc_fw_version_get, 1360 }; 1361 1362 static int 1363 sfc_eth_dev_set_ops(struct rte_eth_dev *dev) 1364 { 1365 struct sfc_adapter *sa = dev->data->dev_private; 1366 unsigned int avail_caps = 0; 1367 const char *rx_name = NULL; 1368 const char *tx_name = NULL; 1369 int rc; 1370 1371 switch (sa->family) { 1372 case EFX_FAMILY_HUNTINGTON: 1373 case EFX_FAMILY_MEDFORD: 1374 avail_caps |= SFC_DP_HW_FW_CAP_EF10; 1375 break; 1376 default: 1377 break; 1378 } 1379 1380 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH, 1381 sfc_kvarg_string_handler, &rx_name); 1382 if (rc != 0) 1383 goto fail_kvarg_rx_datapath; 1384 1385 if (rx_name != NULL) { 1386 sa->dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name); 1387 if (sa->dp_rx == NULL) { 1388 sfc_err(sa, "Rx datapath %s not found", rx_name); 1389 rc = ENOENT; 1390 goto fail_dp_rx; 1391 } 1392 if (!sfc_dp_match_hw_fw_caps(&sa->dp_rx->dp, avail_caps)) { 1393 sfc_err(sa, 1394 "Insufficient Hw/FW capabilities to use Rx datapath %s", 1395 rx_name); 1396 rc = EINVAL; 1397 goto fail_dp_rx; 1398 } 1399 } else { 1400 sa->dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps); 1401 if (sa->dp_rx == NULL) { 1402 sfc_err(sa, "Rx datapath by caps %#x not found", 1403 avail_caps); 1404 rc = ENOENT; 1405 goto fail_dp_rx; 1406 } 1407 } 1408 1409 sfc_info(sa, "use %s Rx datapath", sa->dp_rx->dp.name); 1410 1411 dev->rx_pkt_burst = sa->dp_rx->pkt_burst; 1412 1413 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH, 1414 sfc_kvarg_string_handler, &tx_name); 1415 if (rc != 0) 1416 goto fail_kvarg_tx_datapath; 1417 1418 if (tx_name != NULL) { 1419 sa->dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name); 1420 if (sa->dp_tx == NULL) { 1421 sfc_err(sa, "Tx datapath %s not found", tx_name); 1422 rc = ENOENT; 1423 goto fail_dp_tx; 1424 } 1425 if (!sfc_dp_match_hw_fw_caps(&sa->dp_tx->dp, avail_caps)) { 1426 sfc_err(sa, 1427 "Insufficient Hw/FW capabilities to use Tx datapath %s", 1428 tx_name); 1429 rc = EINVAL; 1430 goto fail_dp_tx; 1431 } 1432 } else { 1433 sa->dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps); 1434 if (sa->dp_tx == NULL) { 1435 sfc_err(sa, "Tx datapath by caps %#x not found", 1436 avail_caps); 1437 rc = ENOENT; 1438 goto fail_dp_tx; 1439 } 1440 } 1441 1442 sfc_info(sa, "use %s Tx datapath", sa->dp_tx->dp.name); 1443 1444 dev->tx_pkt_burst = sa->dp_tx->pkt_burst; 1445 1446 dev->dev_ops = &sfc_eth_dev_ops; 1447 1448 return 0; 1449 1450 fail_dp_tx: 1451 fail_kvarg_tx_datapath: 1452 fail_dp_rx: 1453 fail_kvarg_rx_datapath: 1454 return rc; 1455 } 1456 1457 static void 1458 sfc_register_dp(void) 1459 { 1460 /* Register once */ 1461 if (TAILQ_EMPTY(&sfc_dp_head)) { 1462 /* Prefer EF10 datapath */ 1463 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp); 1464 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp); 1465 1466 sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp); 1467 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp); 1468 sfc_dp_register(&sfc_dp_head, &sfc_ef10_simple_tx.dp); 1469 } 1470 } 1471 1472 static int 1473 sfc_eth_dev_init(struct rte_eth_dev *dev) 1474 { 1475 struct sfc_adapter *sa = dev->data->dev_private; 1476 struct rte_pci_device *pci_dev = SFC_DEV_TO_PCI(dev); 1477 int rc; 1478 const efx_nic_cfg_t *encp; 1479 const struct ether_addr *from; 1480 1481 sfc_register_dp(); 1482 1483 /* Required for logging */ 1484 sa->eth_dev = dev; 1485 1486 /* Copy PCI device info to the dev->data */ 1487 rte_eth_copy_pci_info(dev, pci_dev); 1488 1489 rc = sfc_kvargs_parse(sa); 1490 if (rc != 0) 1491 goto fail_kvargs_parse; 1492 1493 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT, 1494 sfc_kvarg_bool_handler, &sa->debug_init); 1495 if (rc != 0) 1496 goto fail_kvarg_debug_init; 1497 1498 sfc_log_init(sa, "entry"); 1499 1500 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0); 1501 if (dev->data->mac_addrs == NULL) { 1502 rc = ENOMEM; 1503 goto fail_mac_addrs; 1504 } 1505 1506 sfc_adapter_lock_init(sa); 1507 sfc_adapter_lock(sa); 1508 1509 sfc_log_init(sa, "probing"); 1510 rc = sfc_probe(sa); 1511 if (rc != 0) 1512 goto fail_probe; 1513 1514 sfc_log_init(sa, "set device ops"); 1515 rc = sfc_eth_dev_set_ops(dev); 1516 if (rc != 0) 1517 goto fail_set_ops; 1518 1519 sfc_log_init(sa, "attaching"); 1520 rc = sfc_attach(sa); 1521 if (rc != 0) 1522 goto fail_attach; 1523 1524 encp = efx_nic_cfg_get(sa->nic); 1525 1526 /* 1527 * The arguments are really reverse order in comparison to 1528 * Linux kernel. Copy from NIC config to Ethernet device data. 1529 */ 1530 from = (const struct ether_addr *)(encp->enc_mac_addr); 1531 ether_addr_copy(from, &dev->data->mac_addrs[0]); 1532 1533 sfc_adapter_unlock(sa); 1534 1535 sfc_log_init(sa, "done"); 1536 return 0; 1537 1538 fail_attach: 1539 fail_set_ops: 1540 sfc_unprobe(sa); 1541 1542 fail_probe: 1543 sfc_adapter_unlock(sa); 1544 sfc_adapter_lock_fini(sa); 1545 rte_free(dev->data->mac_addrs); 1546 dev->data->mac_addrs = NULL; 1547 1548 fail_mac_addrs: 1549 fail_kvarg_debug_init: 1550 sfc_kvargs_cleanup(sa); 1551 1552 fail_kvargs_parse: 1553 sfc_log_init(sa, "failed %d", rc); 1554 SFC_ASSERT(rc > 0); 1555 return -rc; 1556 } 1557 1558 static int 1559 sfc_eth_dev_uninit(struct rte_eth_dev *dev) 1560 { 1561 struct sfc_adapter *sa = dev->data->dev_private; 1562 1563 sfc_log_init(sa, "entry"); 1564 1565 sfc_adapter_lock(sa); 1566 1567 sfc_detach(sa); 1568 sfc_unprobe(sa); 1569 1570 rte_free(dev->data->mac_addrs); 1571 dev->data->mac_addrs = NULL; 1572 1573 dev->dev_ops = NULL; 1574 dev->rx_pkt_burst = NULL; 1575 dev->tx_pkt_burst = NULL; 1576 1577 sfc_kvargs_cleanup(sa); 1578 1579 sfc_adapter_unlock(sa); 1580 sfc_adapter_lock_fini(sa); 1581 1582 sfc_log_init(sa, "done"); 1583 1584 /* Required for logging, so cleanup last */ 1585 sa->eth_dev = NULL; 1586 return 0; 1587 } 1588 1589 static const struct rte_pci_id pci_id_sfc_efx_map[] = { 1590 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) }, 1591 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) }, 1592 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) }, 1593 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) }, 1594 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) }, 1595 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) }, 1596 { .vendor_id = 0 /* sentinel */ } 1597 }; 1598 1599 static struct eth_driver sfc_efx_pmd = { 1600 .pci_drv = { 1601 .id_table = pci_id_sfc_efx_map, 1602 .drv_flags = 1603 RTE_PCI_DRV_INTR_LSC | 1604 RTE_PCI_DRV_NEED_MAPPING, 1605 .probe = rte_eth_dev_pci_probe, 1606 .remove = rte_eth_dev_pci_remove, 1607 }, 1608 .eth_dev_init = sfc_eth_dev_init, 1609 .eth_dev_uninit = sfc_eth_dev_uninit, 1610 .dev_private_size = sizeof(struct sfc_adapter), 1611 }; 1612 1613 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd.pci_drv); 1614 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map); 1615 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio"); 1616 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx, 1617 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " " 1618 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " " 1619 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " " 1620 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> " 1621 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " " 1622 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL); 1623