1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright(c) 2019-2021 Xilinx, Inc. 4 * Copyright(c) 2017-2019 Solarflare Communications Inc. 5 * 6 * This software was jointly developed between OKTET Labs (under contract 7 * for Solarflare) and Solarflare Communications, Inc. 8 */ 9 10 #ifndef _SFC_DP_H 11 #define _SFC_DP_H 12 13 #include <stdbool.h> 14 #include <sys/queue.h> 15 16 #include <rte_pci.h> 17 18 #include "sfc_log.h" 19 20 #ifdef __cplusplus 21 extern "C" { 22 #endif 23 24 #define SFC_DIV_ROUND_UP(a, b) \ 25 __extension__ ({ \ 26 typeof(a) _a = (a); \ 27 typeof(b) _b = (b); \ 28 \ 29 (_a + (_b - 1)) / _b; \ 30 }) 31 32 /** 33 * Datapath exception handler to be provided by the control path. 34 */ 35 typedef void (sfc_dp_exception_t)(void *ctrl); 36 37 enum sfc_dp_type { 38 SFC_DP_RX = 0, /**< Receive datapath */ 39 SFC_DP_TX, /**< Transmit datapath */ 40 }; 41 42 43 /** Datapath queue run-time information */ 44 struct sfc_dp_queue { 45 /* 46 * Typically the structure is located at the end of Rx/Tx queue 47 * data structure and not used on datapath. So, it is not a 48 * problem to have extra fields even if not used. However, 49 * put stats at top of the structure to be closer to fields 50 * used on datapath or reap to have more chances to be cache-hot. 51 */ 52 uint32_t rx_dbells; 53 uint32_t tx_dbells; 54 55 uint16_t port_id; 56 uint16_t queue_id; 57 struct rte_pci_addr pci_addr; 58 }; 59 60 void sfc_dp_queue_init(struct sfc_dp_queue *dpq, 61 uint16_t port_id, uint16_t queue_id, 62 const struct rte_pci_addr *pci_addr); 63 64 /* Maximum datapath log level to be included in build. */ 65 #ifndef SFC_DP_LOG_LEVEL 66 #define SFC_DP_LOG_LEVEL RTE_LOG_NOTICE 67 #endif 68 69 /* 70 * Helper macro to define datapath logging macros and have uniform 71 * logging. 72 */ 73 #define SFC_DP_LOG(dp_name, level, dpq, ...) \ 74 do { \ 75 const struct sfc_dp_queue *_dpq = (dpq); \ 76 const struct rte_pci_addr *_addr = &(_dpq)->pci_addr; \ 77 \ 78 if (RTE_LOG_ ## level > SFC_DP_LOG_LEVEL) \ 79 break; \ 80 SFC_GENERIC_LOG(level, \ 81 RTE_FMT("%s " PCI_PRI_FMT \ 82 " #%" PRIu16 ".%" PRIu16 ": " \ 83 RTE_FMT_HEAD(__VA_ARGS__ ,), \ 84 dp_name, \ 85 _addr->domain, _addr->bus, \ 86 _addr->devid, _addr->function, \ 87 _dpq->port_id, _dpq->queue_id, \ 88 RTE_FMT_TAIL(__VA_ARGS__,))); \ 89 } while (0) 90 91 92 /** Datapath definition */ 93 struct sfc_dp { 94 TAILQ_ENTRY(sfc_dp) links; 95 const char *name; 96 enum sfc_dp_type type; 97 /* Mask of required hardware/firmware capabilities */ 98 unsigned int hw_fw_caps; 99 #define SFC_DP_HW_FW_CAP_EF10 0x1 100 #define SFC_DP_HW_FW_CAP_RX_ES_SUPER_BUFFER 0x2 101 #define SFC_DP_HW_FW_CAP_RX_EFX 0x4 102 #define SFC_DP_HW_FW_CAP_TX_EFX 0x8 103 #define SFC_DP_HW_FW_CAP_EF100 0x10 104 }; 105 106 /** List of datapath variants */ 107 TAILQ_HEAD(sfc_dp_list, sfc_dp); 108 109 typedef unsigned int sfc_sw_index_t; 110 #define SFC_SW_INDEX_INVALID ((sfc_sw_index_t)(UINT_MAX)) 111 112 typedef int32_t sfc_ethdev_qid_t; 113 #define SFC_ETHDEV_QID_INVALID ((sfc_ethdev_qid_t)(-1)) 114 115 /* Check if available HW/FW capabilities are sufficient for the datapath */ 116 static inline bool 117 sfc_dp_match_hw_fw_caps(const struct sfc_dp *dp, unsigned int avail_caps) 118 { 119 return (dp->hw_fw_caps & avail_caps) == dp->hw_fw_caps; 120 } 121 122 struct sfc_dp *sfc_dp_find_by_name(struct sfc_dp_list *head, 123 enum sfc_dp_type type, const char *name); 124 struct sfc_dp *sfc_dp_find_by_caps(struct sfc_dp_list *head, 125 enum sfc_dp_type type, 126 unsigned int avail_caps); 127 int sfc_dp_register(struct sfc_dp_list *head, struct sfc_dp *entry); 128 129 #ifdef __cplusplus 130 } 131 #endif 132 #endif /* _SFC_DP_H */ 133