1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2016 - 2018 Cavium Inc. 3 * All rights reserved. 4 * www.cavium.com 5 */ 6 7 #include <limits.h> 8 #include <time.h> 9 #include <rte_alarm.h> 10 #include <rte_string_fns.h> 11 12 #include "qede_ethdev.h" 13 14 /* Alarm timeout. */ 15 #define QEDE_ALARM_TIMEOUT_US 100000 16 17 /* Global variable to hold absolute path of fw file */ 18 char qede_fw_file[PATH_MAX]; 19 20 static const char * const QEDE_DEFAULT_FIRMWARE = 21 "/lib/firmware/qed/qed_init_values-8.40.33.0.bin"; 22 23 static void 24 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params) 25 { 26 int i; 27 28 for (i = 0; i < edev->num_hwfns; i++) { 29 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 30 p_hwfn->pf_params = *params; 31 } 32 } 33 34 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev) 35 { 36 edev->regview = pci_dev->mem_resource[0].addr; 37 edev->doorbells = pci_dev->mem_resource[2].addr; 38 edev->db_size = pci_dev->mem_resource[2].len; 39 } 40 41 static int 42 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev, 43 uint32_t dp_module, uint8_t dp_level, bool is_vf) 44 { 45 struct ecore_hw_prepare_params hw_prepare_params; 46 int rc; 47 48 ecore_init_struct(edev); 49 edev->drv_type = DRV_ID_DRV_TYPE_LINUX; 50 /* Protocol type is always fixed to PROTOCOL_ETH */ 51 52 if (is_vf) 53 edev->b_is_vf = true; 54 55 ecore_init_dp(edev, dp_module, dp_level, NULL); 56 qed_init_pci(edev, pci_dev); 57 58 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params)); 59 60 if (is_vf) 61 hw_prepare_params.acquire_retry_cnt = ECORE_VF_ACQUIRE_THRESH; 62 63 hw_prepare_params.personality = ECORE_PCI_ETH; 64 hw_prepare_params.drv_resc_alloc = false; 65 hw_prepare_params.chk_reg_fifo = false; 66 hw_prepare_params.initiate_pf_flr = true; 67 hw_prepare_params.allow_mdump = false; 68 hw_prepare_params.b_en_pacing = false; 69 hw_prepare_params.epoch = (u32)time(NULL); 70 rc = ecore_hw_prepare(edev, &hw_prepare_params); 71 if (rc) { 72 DP_ERR(edev, "hw prepare failed\n"); 73 return rc; 74 } 75 76 return rc; 77 } 78 79 static int qed_nic_setup(struct ecore_dev *edev) 80 { 81 int rc; 82 83 rc = ecore_resc_alloc(edev); 84 if (rc) 85 return rc; 86 87 DP_INFO(edev, "Allocated qed resources\n"); 88 ecore_resc_setup(edev); 89 90 return rc; 91 } 92 93 #ifdef CONFIG_ECORE_ZIPPED_FW 94 static int qed_alloc_stream_mem(struct ecore_dev *edev) 95 { 96 int i; 97 98 for_each_hwfn(edev, i) { 99 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 100 101 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, 102 sizeof(*p_hwfn->stream)); 103 if (!p_hwfn->stream) 104 return -ENOMEM; 105 } 106 107 return 0; 108 } 109 110 static void qed_free_stream_mem(struct ecore_dev *edev) 111 { 112 int i; 113 114 for_each_hwfn(edev, i) { 115 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 116 117 if (!p_hwfn->stream) 118 return; 119 120 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream); 121 } 122 } 123 #endif 124 125 #ifdef CONFIG_ECORE_BINARY_FW 126 static int qed_load_firmware_data(struct ecore_dev *edev) 127 { 128 int fd; 129 struct stat st; 130 const char *fw = RTE_LIBRTE_QEDE_FW; 131 132 if (strcmp(fw, "") == 0) 133 strcpy(qede_fw_file, QEDE_DEFAULT_FIRMWARE); 134 else 135 strcpy(qede_fw_file, fw); 136 137 fd = open(qede_fw_file, O_RDONLY); 138 if (fd < 0) { 139 DP_ERR(edev, "Can't open firmware file\n"); 140 return -ENOENT; 141 } 142 143 if (fstat(fd, &st) < 0) { 144 DP_ERR(edev, "Can't stat firmware file\n"); 145 close(fd); 146 return -1; 147 } 148 149 edev->firmware = rte_zmalloc("qede_fw", st.st_size, 150 RTE_CACHE_LINE_SIZE); 151 if (!edev->firmware) { 152 DP_ERR(edev, "Can't allocate memory for firmware\n"); 153 close(fd); 154 return -ENOMEM; 155 } 156 157 if (read(fd, edev->firmware, st.st_size) != st.st_size) { 158 DP_ERR(edev, "Can't read firmware data\n"); 159 close(fd); 160 return -1; 161 } 162 163 edev->fw_len = st.st_size; 164 if (edev->fw_len < 104) { 165 DP_ERR(edev, "Invalid fw size: %" PRIu64 "\n", 166 edev->fw_len); 167 close(fd); 168 return -EINVAL; 169 } 170 171 close(fd); 172 return 0; 173 } 174 #endif 175 176 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn) 177 { 178 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced; 179 180 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac, 181 &is_mac_forced); 182 if (is_mac_exist && is_mac_forced) 183 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN); 184 185 /* Always update link configuration according to bulletin */ 186 qed_link_update(hwfn); 187 } 188 189 static void qede_vf_task(void *arg) 190 { 191 struct ecore_hwfn *p_hwfn = arg; 192 uint8_t change = 0; 193 194 /* Read the bulletin board, and re-schedule the task */ 195 ecore_vf_read_bulletin(p_hwfn, &change); 196 if (change) 197 qed_handle_bulletin_change(p_hwfn); 198 199 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn); 200 } 201 202 static void qed_start_iov_task(struct ecore_dev *edev) 203 { 204 struct ecore_hwfn *p_hwfn; 205 int i; 206 207 for_each_hwfn(edev, i) { 208 p_hwfn = &edev->hwfns[i]; 209 if (!IS_PF(edev)) 210 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, 211 p_hwfn); 212 } 213 } 214 215 static void qed_stop_iov_task(struct ecore_dev *edev) 216 { 217 struct ecore_hwfn *p_hwfn; 218 int i; 219 220 for_each_hwfn(edev, i) { 221 p_hwfn = &edev->hwfns[i]; 222 if (!IS_PF(edev)) 223 rte_eal_alarm_cancel(qede_vf_task, p_hwfn); 224 } 225 } 226 static int qed_slowpath_start(struct ecore_dev *edev, 227 struct qed_slowpath_params *params) 228 { 229 struct ecore_drv_load_params drv_load_params; 230 struct ecore_hw_init_params hw_init_params; 231 struct ecore_mcp_drv_version drv_version; 232 const uint8_t *data = NULL; 233 struct ecore_hwfn *hwfn; 234 struct ecore_ptt *p_ptt; 235 int rc; 236 237 if (IS_PF(edev)) { 238 #ifdef CONFIG_ECORE_BINARY_FW 239 rc = qed_load_firmware_data(edev); 240 if (rc) { 241 DP_ERR(edev, "Failed to find fw file %s\n", 242 qede_fw_file); 243 goto err; 244 } 245 #endif 246 hwfn = ECORE_LEADING_HWFN(edev); 247 if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */ 248 p_ptt = ecore_ptt_acquire(hwfn); 249 if (p_ptt) { 250 ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt; 251 } else { 252 DP_ERR(edev, "Failed to acquire PTT for flowdir\n"); 253 rc = -ENOMEM; 254 goto err; 255 } 256 } 257 } 258 259 rc = qed_nic_setup(edev); 260 if (rc) 261 goto err; 262 263 /* set int_coalescing_mode */ 264 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE; 265 266 #ifdef CONFIG_ECORE_ZIPPED_FW 267 if (IS_PF(edev)) { 268 /* Allocate stream for unzipping */ 269 rc = qed_alloc_stream_mem(edev); 270 if (rc) { 271 DP_ERR(edev, "Failed to allocate stream memory\n"); 272 goto err1; 273 } 274 } 275 #endif 276 277 qed_start_iov_task(edev); 278 279 #ifdef CONFIG_ECORE_BINARY_FW 280 if (IS_PF(edev)) 281 data = (const uint8_t *)edev->firmware + sizeof(u32); 282 #endif 283 284 /* Start the slowpath */ 285 memset(&hw_init_params, 0, sizeof(hw_init_params)); 286 hw_init_params.b_hw_start = true; 287 hw_init_params.int_mode = params->int_mode; 288 hw_init_params.allow_npar_tx_switch = true; 289 hw_init_params.bin_fw_data = data; 290 291 memset(&drv_load_params, 0, sizeof(drv_load_params)); 292 drv_load_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT; 293 drv_load_params.avoid_eng_reset = false; 294 drv_load_params.override_force_load = ECORE_OVERRIDE_FORCE_LOAD_ALWAYS; 295 hw_init_params.avoid_eng_affin = false; 296 hw_init_params.p_drv_load_params = &drv_load_params; 297 298 rc = ecore_hw_init(edev, &hw_init_params); 299 if (rc) { 300 DP_ERR(edev, "ecore_hw_init failed\n"); 301 goto err2; 302 } 303 304 DP_INFO(edev, "HW inited and function started\n"); 305 306 if (IS_PF(edev)) { 307 hwfn = ECORE_LEADING_HWFN(edev); 308 drv_version.version = (params->drv_major << 24) | 309 (params->drv_minor << 16) | 310 (params->drv_rev << 8) | (params->drv_eng); 311 strlcpy((char *)drv_version.name, (const char *)params->name, 312 sizeof(drv_version.name)); 313 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt, 314 &drv_version); 315 if (rc) { 316 DP_ERR(edev, "Failed sending drv version command\n"); 317 goto err3; 318 } 319 } 320 321 ecore_reset_vport_stats(edev); 322 323 return 0; 324 325 err3: 326 ecore_hw_stop(edev); 327 err2: 328 qed_stop_iov_task(edev); 329 #ifdef CONFIG_ECORE_ZIPPED_FW 330 qed_free_stream_mem(edev); 331 err1: 332 #endif 333 ecore_resc_free(edev); 334 err: 335 #ifdef CONFIG_ECORE_BINARY_FW 336 if (IS_PF(edev)) { 337 if (edev->firmware) 338 rte_free(edev->firmware); 339 edev->firmware = NULL; 340 } 341 #endif 342 qed_stop_iov_task(edev); 343 344 return rc; 345 } 346 347 static int 348 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info) 349 { 350 struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(edev); 351 struct ecore_ptt *ptt = NULL; 352 struct ecore_tunnel_info *tun = &edev->tunnel; 353 354 memset(dev_info, 0, sizeof(struct qed_dev_info)); 355 356 if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 357 tun->vxlan.b_mode_enabled) 358 dev_info->vxlan_enable = true; 359 360 if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled && 361 tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 362 tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN) 363 dev_info->gre_enable = true; 364 365 if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled && 366 tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 367 tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN) 368 dev_info->geneve_enable = true; 369 370 dev_info->num_hwfns = edev->num_hwfns; 371 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]); 372 dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu; 373 dev_info->dev_type = edev->type; 374 375 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 376 RTE_ETHER_ADDR_LEN); 377 378 dev_info->fw_major = FW_MAJOR_VERSION; 379 dev_info->fw_minor = FW_MINOR_VERSION; 380 dev_info->fw_rev = FW_REVISION_VERSION; 381 dev_info->fw_eng = FW_ENGINEERING_VERSION; 382 383 if (IS_PF(edev)) { 384 dev_info->b_inter_pf_switch = 385 OSAL_TEST_BIT(ECORE_MF_INTER_PF_SWITCH, &edev->mf_bits); 386 if (!OSAL_TEST_BIT(ECORE_MF_DISABLE_ARFS, &edev->mf_bits)) 387 dev_info->b_arfs_capable = true; 388 dev_info->tx_switching = false; 389 390 dev_info->smart_an = ecore_mcp_is_smart_an_supported(p_hwfn); 391 392 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev)); 393 if (ptt) { 394 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt, 395 &dev_info->mfw_rev, NULL); 396 397 ecore_mcp_get_mbi_ver(ECORE_LEADING_HWFN(edev), ptt, 398 &dev_info->mbi_version); 399 400 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt, 401 &dev_info->flash_size); 402 403 /* Workaround to allow PHY-read commands for 404 * B0 bringup. 405 */ 406 if (ECORE_IS_BB_B0(edev)) 407 dev_info->flash_size = 0xffffffff; 408 409 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt); 410 } 411 } else { 412 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt, 413 &dev_info->mfw_rev, NULL); 414 } 415 416 return 0; 417 } 418 419 int 420 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info) 421 { 422 uint8_t queues = 0; 423 int i; 424 425 memset(info, 0, sizeof(*info)); 426 427 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */; 428 429 if (IS_PF(edev)) { 430 int max_vf_vlan_filters = 0; 431 432 info->num_queues = 0; 433 for_each_hwfn(edev, i) 434 info->num_queues += 435 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE); 436 437 if (IS_ECORE_SRIOV(edev)) 438 max_vf_vlan_filters = edev->p_iov_info->total_vfs * 439 ECORE_ETH_VF_NUM_VLAN_FILTERS; 440 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) - 441 max_vf_vlan_filters; 442 443 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 444 RTE_ETHER_ADDR_LEN); 445 } else { 446 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev), 447 &info->num_queues); 448 if (ECORE_IS_CMT(edev)) { 449 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues); 450 info->num_queues += queues; 451 } 452 453 ecore_vf_get_num_vlan_filters(&edev->hwfns[0], 454 (u8 *)&info->num_vlan_filters); 455 456 ecore_vf_get_port_mac(&edev->hwfns[0], 457 (uint8_t *)&info->port_mac); 458 459 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]); 460 } 461 462 qed_fill_dev_info(edev, &info->common); 463 464 if (IS_VF(edev)) 465 memset(&info->common.hw_mac, 0, RTE_ETHER_ADDR_LEN); 466 467 return 0; 468 } 469 470 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE]) 471 { 472 int i; 473 474 rte_memcpy(edev->name, name, NAME_SIZE); 475 for_each_hwfn(edev, i) { 476 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i); 477 } 478 } 479 480 static uint32_t 481 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info, 482 void *sb_virt_addr, dma_addr_t sb_phy_addr, uint16_t sb_id) 483 { 484 struct ecore_hwfn *p_hwfn; 485 int hwfn_index; 486 uint16_t rel_sb_id; 487 uint8_t n_hwfns = edev->num_hwfns; 488 uint32_t rc; 489 490 hwfn_index = sb_id % n_hwfns; 491 p_hwfn = &edev->hwfns[hwfn_index]; 492 rel_sb_id = sb_id / n_hwfns; 493 494 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n", 495 hwfn_index, rel_sb_id, sb_id); 496 497 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info, 498 sb_virt_addr, sb_phy_addr, rel_sb_id); 499 500 return rc; 501 } 502 503 static void qed_fill_link(struct ecore_hwfn *hwfn, 504 __rte_unused struct ecore_ptt *ptt, 505 struct qed_link_output *if_link) 506 { 507 struct ecore_mcp_link_params params; 508 struct ecore_mcp_link_state link; 509 struct ecore_mcp_link_capabilities link_caps; 510 uint8_t change = 0; 511 512 memset(if_link, 0, sizeof(*if_link)); 513 514 /* Prepare source inputs */ 515 if (IS_PF(hwfn->p_dev)) { 516 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn), 517 sizeof(params)); 518 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link)); 519 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn), 520 sizeof(link_caps)); 521 } else { 522 ecore_vf_read_bulletin(hwfn, &change); 523 ecore_vf_get_link_params(hwfn, ¶ms); 524 ecore_vf_get_link_state(hwfn, &link); 525 ecore_vf_get_link_caps(hwfn, &link_caps); 526 } 527 528 /* Set the link parameters to pass to protocol driver */ 529 if (link.link_up) 530 if_link->link_up = true; 531 532 if (link.link_up) 533 if_link->speed = link.speed; 534 535 if_link->duplex = QEDE_DUPLEX_FULL; 536 537 /* Fill up the native advertised speed cap mask */ 538 if_link->adv_speed = params.speed.advertised_speeds; 539 540 if (params.speed.autoneg) 541 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG; 542 543 if (params.pause.autoneg || params.pause.forced_rx || 544 params.pause.forced_tx) 545 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE; 546 547 if (params.pause.autoneg) 548 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 549 550 if (params.pause.forced_rx) 551 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE; 552 553 if (params.pause.forced_tx) 554 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE; 555 556 if (link_caps.default_eee == ECORE_MCP_EEE_UNSUPPORTED) { 557 if_link->eee_supported = false; 558 } else { 559 if_link->eee_supported = true; 560 if_link->eee_active = link.eee_active; 561 if_link->sup_caps = link_caps.eee_speed_caps; 562 /* MFW clears adv_caps on eee disable; use configured value */ 563 if_link->eee.adv_caps = link.eee_adv_caps ? link.eee_adv_caps : 564 params.eee.adv_caps; 565 if_link->eee.lp_adv_caps = link.eee_lp_adv_caps; 566 if_link->eee.enable = params.eee.enable; 567 if_link->eee.tx_lpi_enable = params.eee.tx_lpi_enable; 568 if_link->eee.tx_lpi_timer = params.eee.tx_lpi_timer; 569 } 570 } 571 572 static void 573 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link) 574 { 575 struct ecore_hwfn *hwfn; 576 struct ecore_ptt *ptt; 577 578 hwfn = &edev->hwfns[0]; 579 if (IS_PF(edev)) { 580 ptt = ecore_ptt_acquire(hwfn); 581 if (!ptt) 582 DP_NOTICE(hwfn, true, "Failed to fill link; No PTT\n"); 583 584 qed_fill_link(hwfn, ptt, if_link); 585 586 if (ptt) 587 ecore_ptt_release(hwfn, ptt); 588 } else { 589 qed_fill_link(hwfn, NULL, if_link); 590 } 591 } 592 593 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params) 594 { 595 struct ecore_hwfn *hwfn; 596 struct ecore_ptt *ptt; 597 struct ecore_mcp_link_params *link_params; 598 int rc; 599 600 if (IS_VF(edev)) 601 return 0; 602 603 /* The link should be set only once per PF */ 604 hwfn = &edev->hwfns[0]; 605 606 ptt = ecore_ptt_acquire(hwfn); 607 if (!ptt) 608 return -EBUSY; 609 610 link_params = ecore_mcp_get_link_params(hwfn); 611 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG) 612 link_params->speed.autoneg = params->autoneg; 613 614 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) { 615 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 616 link_params->pause.autoneg = true; 617 else 618 link_params->pause.autoneg = false; 619 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE) 620 link_params->pause.forced_rx = true; 621 else 622 link_params->pause.forced_rx = false; 623 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE) 624 link_params->pause.forced_tx = true; 625 else 626 link_params->pause.forced_tx = false; 627 } 628 629 if (params->override_flags & QED_LINK_OVERRIDE_EEE_CONFIG) 630 memcpy(&link_params->eee, ¶ms->eee, 631 sizeof(link_params->eee)); 632 633 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up); 634 635 ecore_ptt_release(hwfn, ptt); 636 637 return rc; 638 } 639 640 void qed_link_update(struct ecore_hwfn *hwfn) 641 { 642 struct ecore_dev *edev = hwfn->p_dev; 643 struct qede_dev *qdev = (struct qede_dev *)edev; 644 struct rte_eth_dev *dev = (struct rte_eth_dev *)qdev->ethdev; 645 646 if (!qede_link_update(dev, 0)) 647 _rte_eth_dev_callback_process(dev, 648 RTE_ETH_EVENT_INTR_LSC, NULL); 649 } 650 651 static int qed_drain(struct ecore_dev *edev) 652 { 653 struct ecore_hwfn *hwfn; 654 struct ecore_ptt *ptt; 655 int i, rc; 656 657 if (IS_VF(edev)) 658 return 0; 659 660 for_each_hwfn(edev, i) { 661 hwfn = &edev->hwfns[i]; 662 ptt = ecore_ptt_acquire(hwfn); 663 if (!ptt) { 664 DP_ERR(hwfn, "Failed to drain NIG; No PTT\n"); 665 return -EBUSY; 666 } 667 rc = ecore_mcp_drain(hwfn, ptt); 668 if (rc) 669 return rc; 670 ecore_ptt_release(hwfn, ptt); 671 } 672 673 return 0; 674 } 675 676 static int qed_nic_stop(struct ecore_dev *edev) 677 { 678 int i, rc; 679 680 rc = ecore_hw_stop(edev); 681 for (i = 0; i < edev->num_hwfns; i++) { 682 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 683 684 if (p_hwfn->b_sp_dpc_enabled) 685 p_hwfn->b_sp_dpc_enabled = false; 686 } 687 return rc; 688 } 689 690 static int qed_slowpath_stop(struct ecore_dev *edev) 691 { 692 #ifdef CONFIG_QED_SRIOV 693 int i; 694 #endif 695 696 if (!edev) 697 return -ENODEV; 698 699 if (IS_PF(edev)) { 700 #ifdef CONFIG_ECORE_ZIPPED_FW 701 qed_free_stream_mem(edev); 702 #endif 703 704 #ifdef CONFIG_QED_SRIOV 705 if (IS_QED_ETH_IF(edev)) 706 qed_sriov_disable(edev, true); 707 #endif 708 } 709 710 qed_nic_stop(edev); 711 712 ecore_resc_free(edev); 713 qed_stop_iov_task(edev); 714 715 return 0; 716 } 717 718 static void qed_remove(struct ecore_dev *edev) 719 { 720 if (!edev) 721 return; 722 723 ecore_hw_remove(edev); 724 } 725 726 static int qed_send_drv_state(struct ecore_dev *edev, bool active) 727 { 728 struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev); 729 struct ecore_ptt *ptt; 730 int status = 0; 731 732 ptt = ecore_ptt_acquire(hwfn); 733 if (!ptt) 734 return -EAGAIN; 735 736 status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ? 737 ECORE_OV_DRIVER_STATE_ACTIVE : 738 ECORE_OV_DRIVER_STATE_DISABLED); 739 740 ecore_ptt_release(hwfn, ptt); 741 742 return status; 743 } 744 745 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb, 746 u16 qid, struct ecore_sb_info_dbg *sb_dbg) 747 { 748 struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns]; 749 struct ecore_ptt *ptt; 750 int rc; 751 752 if (IS_VF(edev)) 753 return -EINVAL; 754 755 ptt = ecore_ptt_acquire(hwfn); 756 if (!ptt) { 757 DP_ERR(hwfn, "Can't acquire PTT\n"); 758 return -EAGAIN; 759 } 760 761 memset(sb_dbg, 0, sizeof(*sb_dbg)); 762 rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg); 763 764 ecore_ptt_release(hwfn, ptt); 765 return rc; 766 } 767 768 const struct qed_common_ops qed_common_ops_pass = { 769 INIT_STRUCT_FIELD(probe, &qed_probe), 770 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params), 771 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start), 772 INIT_STRUCT_FIELD(set_name, &qed_set_name), 773 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc), 774 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free), 775 INIT_STRUCT_FIELD(sb_init, &qed_sb_init), 776 INIT_STRUCT_FIELD(get_sb_info, &qed_get_sb_info), 777 INIT_STRUCT_FIELD(get_link, &qed_get_current_link), 778 INIT_STRUCT_FIELD(set_link, &qed_set_link), 779 INIT_STRUCT_FIELD(drain, &qed_drain), 780 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop), 781 INIT_STRUCT_FIELD(remove, &qed_remove), 782 INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state), 783 }; 784 785 const struct qed_eth_ops qed_eth_ops_pass = { 786 INIT_STRUCT_FIELD(common, &qed_common_ops_pass), 787 INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info), 788 }; 789 790 const struct qed_eth_ops *qed_get_eth_ops(void) 791 { 792 return &qed_eth_ops_pass; 793 } 794