1 /* 2 * Copyright (c) 2016 - 2018 Cavium Inc. 3 * All rights reserved. 4 * www.cavium.com 5 * 6 * See LICENSE.qede_pmd for copyright and licensing details. 7 */ 8 9 #include <limits.h> 10 #include <time.h> 11 #include <rte_alarm.h> 12 #include <rte_string_fns.h> 13 14 #include "qede_ethdev.h" 15 16 /* Alarm timeout. */ 17 #define QEDE_ALARM_TIMEOUT_US 100000 18 19 /* Global variable to hold absolute path of fw file */ 20 char fw_file[PATH_MAX]; 21 22 const char *QEDE_DEFAULT_FIRMWARE = 23 "/lib/firmware/qed/qed_init_values-8.33.12.0.bin"; 24 25 static void 26 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params) 27 { 28 int i; 29 30 for (i = 0; i < edev->num_hwfns; i++) { 31 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 32 p_hwfn->pf_params = *params; 33 } 34 } 35 36 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev) 37 { 38 edev->regview = pci_dev->mem_resource[0].addr; 39 edev->doorbells = pci_dev->mem_resource[2].addr; 40 edev->db_size = pci_dev->mem_resource[2].len; 41 } 42 43 static int 44 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev, 45 uint32_t dp_module, uint8_t dp_level, bool is_vf) 46 { 47 struct ecore_hw_prepare_params hw_prepare_params; 48 int rc; 49 50 ecore_init_struct(edev); 51 edev->drv_type = DRV_ID_DRV_TYPE_LINUX; 52 /* Protocol type is always fixed to PROTOCOL_ETH */ 53 54 if (is_vf) 55 edev->b_is_vf = true; 56 57 ecore_init_dp(edev, dp_module, dp_level, NULL); 58 qed_init_pci(edev, pci_dev); 59 60 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params)); 61 hw_prepare_params.personality = ECORE_PCI_ETH; 62 hw_prepare_params.drv_resc_alloc = false; 63 hw_prepare_params.chk_reg_fifo = false; 64 hw_prepare_params.initiate_pf_flr = true; 65 hw_prepare_params.allow_mdump = false; 66 hw_prepare_params.b_en_pacing = false; 67 hw_prepare_params.epoch = (u32)time(NULL); 68 rc = ecore_hw_prepare(edev, &hw_prepare_params); 69 if (rc) { 70 DP_ERR(edev, "hw prepare failed\n"); 71 return rc; 72 } 73 74 return rc; 75 } 76 77 static int qed_nic_setup(struct ecore_dev *edev) 78 { 79 int rc; 80 81 rc = ecore_resc_alloc(edev); 82 if (rc) 83 return rc; 84 85 DP_INFO(edev, "Allocated qed resources\n"); 86 ecore_resc_setup(edev); 87 88 return rc; 89 } 90 91 #ifdef CONFIG_ECORE_ZIPPED_FW 92 static int qed_alloc_stream_mem(struct ecore_dev *edev) 93 { 94 int i; 95 96 for_each_hwfn(edev, i) { 97 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 98 99 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, 100 sizeof(*p_hwfn->stream)); 101 if (!p_hwfn->stream) 102 return -ENOMEM; 103 } 104 105 return 0; 106 } 107 108 static void qed_free_stream_mem(struct ecore_dev *edev) 109 { 110 int i; 111 112 for_each_hwfn(edev, i) { 113 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 114 115 if (!p_hwfn->stream) 116 return; 117 118 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream); 119 } 120 } 121 #endif 122 123 #ifdef CONFIG_ECORE_BINARY_FW 124 static int qed_load_firmware_data(struct ecore_dev *edev) 125 { 126 int fd; 127 struct stat st; 128 const char *fw = RTE_LIBRTE_QEDE_FW; 129 130 if (strcmp(fw, "") == 0) 131 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE); 132 else 133 strcpy(fw_file, fw); 134 135 fd = open(fw_file, O_RDONLY); 136 if (fd < 0) { 137 DP_ERR(edev, "Can't open firmware file\n"); 138 return -ENOENT; 139 } 140 141 if (fstat(fd, &st) < 0) { 142 DP_ERR(edev, "Can't stat firmware file\n"); 143 close(fd); 144 return -1; 145 } 146 147 edev->firmware = rte_zmalloc("qede_fw", st.st_size, 148 RTE_CACHE_LINE_SIZE); 149 if (!edev->firmware) { 150 DP_ERR(edev, "Can't allocate memory for firmware\n"); 151 close(fd); 152 return -ENOMEM; 153 } 154 155 if (read(fd, edev->firmware, st.st_size) != st.st_size) { 156 DP_ERR(edev, "Can't read firmware data\n"); 157 close(fd); 158 return -1; 159 } 160 161 edev->fw_len = st.st_size; 162 if (edev->fw_len < 104) { 163 DP_ERR(edev, "Invalid fw size: %" PRIu64 "\n", 164 edev->fw_len); 165 close(fd); 166 return -EINVAL; 167 } 168 169 close(fd); 170 return 0; 171 } 172 #endif 173 174 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn) 175 { 176 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced; 177 178 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac, 179 &is_mac_forced); 180 if (is_mac_exist && is_mac_forced) 181 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN); 182 183 /* Always update link configuration according to bulletin */ 184 qed_link_update(hwfn); 185 } 186 187 static void qede_vf_task(void *arg) 188 { 189 struct ecore_hwfn *p_hwfn = arg; 190 uint8_t change = 0; 191 192 /* Read the bulletin board, and re-schedule the task */ 193 ecore_vf_read_bulletin(p_hwfn, &change); 194 if (change) 195 qed_handle_bulletin_change(p_hwfn); 196 197 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn); 198 } 199 200 static void qed_start_iov_task(struct ecore_dev *edev) 201 { 202 struct ecore_hwfn *p_hwfn; 203 int i; 204 205 for_each_hwfn(edev, i) { 206 p_hwfn = &edev->hwfns[i]; 207 if (!IS_PF(edev)) 208 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, 209 p_hwfn); 210 } 211 } 212 213 static void qed_stop_iov_task(struct ecore_dev *edev) 214 { 215 struct ecore_hwfn *p_hwfn; 216 int i; 217 218 for_each_hwfn(edev, i) { 219 p_hwfn = &edev->hwfns[i]; 220 if (!IS_PF(edev)) 221 rte_eal_alarm_cancel(qede_vf_task, p_hwfn); 222 } 223 } 224 static int qed_slowpath_start(struct ecore_dev *edev, 225 struct qed_slowpath_params *params) 226 { 227 struct ecore_drv_load_params drv_load_params; 228 struct ecore_hw_init_params hw_init_params; 229 struct ecore_mcp_drv_version drv_version; 230 const uint8_t *data = NULL; 231 struct ecore_hwfn *hwfn; 232 struct ecore_ptt *p_ptt; 233 int rc; 234 235 if (IS_PF(edev)) { 236 #ifdef CONFIG_ECORE_BINARY_FW 237 rc = qed_load_firmware_data(edev); 238 if (rc) { 239 DP_ERR(edev, "Failed to find fw file %s\n", fw_file); 240 goto err; 241 } 242 #endif 243 hwfn = ECORE_LEADING_HWFN(edev); 244 if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */ 245 p_ptt = ecore_ptt_acquire(hwfn); 246 if (p_ptt) { 247 ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt; 248 } else { 249 DP_ERR(edev, "Failed to acquire PTT for flowdir\n"); 250 rc = -ENOMEM; 251 goto err; 252 } 253 } 254 } 255 256 rc = qed_nic_setup(edev); 257 if (rc) 258 goto err; 259 260 /* set int_coalescing_mode */ 261 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE; 262 263 #ifdef CONFIG_ECORE_ZIPPED_FW 264 if (IS_PF(edev)) { 265 /* Allocate stream for unzipping */ 266 rc = qed_alloc_stream_mem(edev); 267 if (rc) { 268 DP_ERR(edev, "Failed to allocate stream memory\n"); 269 goto err1; 270 } 271 } 272 #endif 273 274 qed_start_iov_task(edev); 275 276 #ifdef CONFIG_ECORE_BINARY_FW 277 if (IS_PF(edev)) 278 data = (const uint8_t *)edev->firmware + sizeof(u32); 279 #endif 280 281 /* Start the slowpath */ 282 memset(&hw_init_params, 0, sizeof(hw_init_params)); 283 hw_init_params.b_hw_start = true; 284 hw_init_params.int_mode = ECORE_INT_MODE_MSIX; 285 hw_init_params.allow_npar_tx_switch = true; 286 hw_init_params.bin_fw_data = data; 287 288 memset(&drv_load_params, 0, sizeof(drv_load_params)); 289 drv_load_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT; 290 drv_load_params.avoid_eng_reset = false; 291 drv_load_params.override_force_load = ECORE_OVERRIDE_FORCE_LOAD_ALWAYS; 292 hw_init_params.p_drv_load_params = &drv_load_params; 293 294 rc = ecore_hw_init(edev, &hw_init_params); 295 if (rc) { 296 DP_ERR(edev, "ecore_hw_init failed\n"); 297 goto err2; 298 } 299 300 DP_INFO(edev, "HW inited and function started\n"); 301 302 if (IS_PF(edev)) { 303 hwfn = ECORE_LEADING_HWFN(edev); 304 drv_version.version = (params->drv_major << 24) | 305 (params->drv_minor << 16) | 306 (params->drv_rev << 8) | (params->drv_eng); 307 strlcpy((char *)drv_version.name, (const char *)params->name, 308 sizeof(drv_version.name)); 309 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt, 310 &drv_version); 311 if (rc) { 312 DP_ERR(edev, "Failed sending drv version command\n"); 313 goto err3; 314 } 315 } 316 317 ecore_reset_vport_stats(edev); 318 319 return 0; 320 321 err3: 322 ecore_hw_stop(edev); 323 err2: 324 qed_stop_iov_task(edev); 325 #ifdef CONFIG_ECORE_ZIPPED_FW 326 qed_free_stream_mem(edev); 327 err1: 328 #endif 329 ecore_resc_free(edev); 330 err: 331 #ifdef CONFIG_ECORE_BINARY_FW 332 if (IS_PF(edev)) { 333 if (edev->firmware) 334 rte_free(edev->firmware); 335 edev->firmware = NULL; 336 } 337 #endif 338 qed_stop_iov_task(edev); 339 340 return rc; 341 } 342 343 static int 344 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info) 345 { 346 struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(edev); 347 struct ecore_ptt *ptt = NULL; 348 struct ecore_tunnel_info *tun = &edev->tunnel; 349 350 memset(dev_info, 0, sizeof(struct qed_dev_info)); 351 352 if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 353 tun->vxlan.b_mode_enabled) 354 dev_info->vxlan_enable = true; 355 356 if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled && 357 tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 358 tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN) 359 dev_info->gre_enable = true; 360 361 if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled && 362 tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 363 tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN) 364 dev_info->geneve_enable = true; 365 366 dev_info->num_hwfns = edev->num_hwfns; 367 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]); 368 dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu; 369 dev_info->dev_type = edev->type; 370 371 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 372 ETHER_ADDR_LEN); 373 374 dev_info->fw_major = FW_MAJOR_VERSION; 375 dev_info->fw_minor = FW_MINOR_VERSION; 376 dev_info->fw_rev = FW_REVISION_VERSION; 377 dev_info->fw_eng = FW_ENGINEERING_VERSION; 378 379 if (IS_PF(edev)) { 380 dev_info->b_inter_pf_switch = 381 OSAL_TEST_BIT(ECORE_MF_INTER_PF_SWITCH, &edev->mf_bits); 382 if (!OSAL_TEST_BIT(ECORE_MF_DISABLE_ARFS, &edev->mf_bits)) 383 dev_info->b_arfs_capable = true; 384 dev_info->tx_switching = false; 385 386 dev_info->smart_an = ecore_mcp_is_smart_an_supported(p_hwfn); 387 388 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev)); 389 if (ptt) { 390 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt, 391 &dev_info->mfw_rev, NULL); 392 393 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt, 394 &dev_info->flash_size); 395 396 /* Workaround to allow PHY-read commands for 397 * B0 bringup. 398 */ 399 if (ECORE_IS_BB_B0(edev)) 400 dev_info->flash_size = 0xffffffff; 401 402 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt); 403 } 404 } else { 405 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt, 406 &dev_info->mfw_rev, NULL); 407 } 408 409 return 0; 410 } 411 412 int 413 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info) 414 { 415 uint8_t queues = 0; 416 int i; 417 418 memset(info, 0, sizeof(*info)); 419 420 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */; 421 422 if (IS_PF(edev)) { 423 int max_vf_vlan_filters = 0; 424 425 info->num_queues = 0; 426 for_each_hwfn(edev, i) 427 info->num_queues += 428 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE); 429 430 if (IS_ECORE_SRIOV(edev)) 431 max_vf_vlan_filters = edev->p_iov_info->total_vfs * 432 ECORE_ETH_VF_NUM_VLAN_FILTERS; 433 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) - 434 max_vf_vlan_filters; 435 436 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 437 ETHER_ADDR_LEN); 438 } else { 439 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev), 440 &info->num_queues); 441 if (ECORE_IS_CMT(edev)) { 442 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues); 443 info->num_queues += queues; 444 } 445 446 ecore_vf_get_num_vlan_filters(&edev->hwfns[0], 447 (u8 *)&info->num_vlan_filters); 448 449 ecore_vf_get_port_mac(&edev->hwfns[0], 450 (uint8_t *)&info->port_mac); 451 452 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]); 453 } 454 455 qed_fill_dev_info(edev, &info->common); 456 457 if (IS_VF(edev)) 458 memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN); 459 460 return 0; 461 } 462 463 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE]) 464 { 465 int i; 466 467 rte_memcpy(edev->name, name, NAME_SIZE); 468 for_each_hwfn(edev, i) { 469 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i); 470 } 471 } 472 473 static uint32_t 474 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info, 475 void *sb_virt_addr, dma_addr_t sb_phy_addr, uint16_t sb_id) 476 { 477 struct ecore_hwfn *p_hwfn; 478 int hwfn_index; 479 uint16_t rel_sb_id; 480 uint8_t n_hwfns = edev->num_hwfns; 481 uint32_t rc; 482 483 hwfn_index = sb_id % n_hwfns; 484 p_hwfn = &edev->hwfns[hwfn_index]; 485 rel_sb_id = sb_id / n_hwfns; 486 487 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n", 488 hwfn_index, rel_sb_id, sb_id); 489 490 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info, 491 sb_virt_addr, sb_phy_addr, rel_sb_id); 492 493 return rc; 494 } 495 496 static void qed_fill_link(struct ecore_hwfn *hwfn, 497 __rte_unused struct ecore_ptt *ptt, 498 struct qed_link_output *if_link) 499 { 500 struct ecore_mcp_link_params params; 501 struct ecore_mcp_link_state link; 502 struct ecore_mcp_link_capabilities link_caps; 503 uint8_t change = 0; 504 505 memset(if_link, 0, sizeof(*if_link)); 506 507 /* Prepare source inputs */ 508 if (IS_PF(hwfn->p_dev)) { 509 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn), 510 sizeof(params)); 511 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link)); 512 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn), 513 sizeof(link_caps)); 514 } else { 515 ecore_vf_read_bulletin(hwfn, &change); 516 ecore_vf_get_link_params(hwfn, ¶ms); 517 ecore_vf_get_link_state(hwfn, &link); 518 ecore_vf_get_link_caps(hwfn, &link_caps); 519 } 520 521 /* Set the link parameters to pass to protocol driver */ 522 if (link.link_up) 523 if_link->link_up = true; 524 525 if (link.link_up) 526 if_link->speed = link.speed; 527 528 if_link->duplex = QEDE_DUPLEX_FULL; 529 530 /* Fill up the native advertised speed cap mask */ 531 if_link->adv_speed = params.speed.advertised_speeds; 532 533 if (params.speed.autoneg) 534 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG; 535 536 if (params.pause.autoneg || params.pause.forced_rx || 537 params.pause.forced_tx) 538 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE; 539 540 if (params.pause.autoneg) 541 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 542 543 if (params.pause.forced_rx) 544 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE; 545 546 if (params.pause.forced_tx) 547 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE; 548 549 if (link_caps.default_eee == ECORE_MCP_EEE_UNSUPPORTED) { 550 if_link->eee_supported = false; 551 } else { 552 if_link->eee_supported = true; 553 if_link->eee_active = link.eee_active; 554 if_link->sup_caps = link_caps.eee_speed_caps; 555 /* MFW clears adv_caps on eee disable; use configured value */ 556 if_link->eee.adv_caps = link.eee_adv_caps ? link.eee_adv_caps : 557 params.eee.adv_caps; 558 if_link->eee.lp_adv_caps = link.eee_lp_adv_caps; 559 if_link->eee.enable = params.eee.enable; 560 if_link->eee.tx_lpi_enable = params.eee.tx_lpi_enable; 561 if_link->eee.tx_lpi_timer = params.eee.tx_lpi_timer; 562 } 563 } 564 565 static void 566 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link) 567 { 568 struct ecore_hwfn *hwfn; 569 struct ecore_ptt *ptt; 570 571 hwfn = &edev->hwfns[0]; 572 if (IS_PF(edev)) { 573 ptt = ecore_ptt_acquire(hwfn); 574 if (!ptt) 575 DP_NOTICE(hwfn, true, "Failed to fill link; No PTT\n"); 576 577 qed_fill_link(hwfn, ptt, if_link); 578 579 if (ptt) 580 ecore_ptt_release(hwfn, ptt); 581 } else { 582 qed_fill_link(hwfn, NULL, if_link); 583 } 584 } 585 586 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params) 587 { 588 struct ecore_hwfn *hwfn; 589 struct ecore_ptt *ptt; 590 struct ecore_mcp_link_params *link_params; 591 int rc; 592 593 if (IS_VF(edev)) 594 return 0; 595 596 /* The link should be set only once per PF */ 597 hwfn = &edev->hwfns[0]; 598 599 ptt = ecore_ptt_acquire(hwfn); 600 if (!ptt) 601 return -EBUSY; 602 603 link_params = ecore_mcp_get_link_params(hwfn); 604 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG) 605 link_params->speed.autoneg = params->autoneg; 606 607 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) { 608 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 609 link_params->pause.autoneg = true; 610 else 611 link_params->pause.autoneg = false; 612 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE) 613 link_params->pause.forced_rx = true; 614 else 615 link_params->pause.forced_rx = false; 616 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE) 617 link_params->pause.forced_tx = true; 618 else 619 link_params->pause.forced_tx = false; 620 } 621 622 if (params->override_flags & QED_LINK_OVERRIDE_EEE_CONFIG) 623 memcpy(&link_params->eee, ¶ms->eee, 624 sizeof(link_params->eee)); 625 626 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up); 627 628 ecore_ptt_release(hwfn, ptt); 629 630 return rc; 631 } 632 633 void qed_link_update(struct ecore_hwfn *hwfn) 634 { 635 struct ecore_dev *edev = hwfn->p_dev; 636 struct qede_dev *qdev = (struct qede_dev *)edev; 637 638 qede_link_update((struct rte_eth_dev *)qdev->ethdev, 0); 639 } 640 641 static int qed_drain(struct ecore_dev *edev) 642 { 643 struct ecore_hwfn *hwfn; 644 struct ecore_ptt *ptt; 645 int i, rc; 646 647 if (IS_VF(edev)) 648 return 0; 649 650 for_each_hwfn(edev, i) { 651 hwfn = &edev->hwfns[i]; 652 ptt = ecore_ptt_acquire(hwfn); 653 if (!ptt) { 654 DP_ERR(hwfn, "Failed to drain NIG; No PTT\n"); 655 return -EBUSY; 656 } 657 rc = ecore_mcp_drain(hwfn, ptt); 658 if (rc) 659 return rc; 660 ecore_ptt_release(hwfn, ptt); 661 } 662 663 return 0; 664 } 665 666 static int qed_nic_stop(struct ecore_dev *edev) 667 { 668 int i, rc; 669 670 rc = ecore_hw_stop(edev); 671 for (i = 0; i < edev->num_hwfns; i++) { 672 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 673 674 if (p_hwfn->b_sp_dpc_enabled) 675 p_hwfn->b_sp_dpc_enabled = false; 676 } 677 return rc; 678 } 679 680 static int qed_slowpath_stop(struct ecore_dev *edev) 681 { 682 #ifdef CONFIG_QED_SRIOV 683 int i; 684 #endif 685 686 if (!edev) 687 return -ENODEV; 688 689 if (IS_PF(edev)) { 690 #ifdef CONFIG_ECORE_ZIPPED_FW 691 qed_free_stream_mem(edev); 692 #endif 693 694 #ifdef CONFIG_QED_SRIOV 695 if (IS_QED_ETH_IF(edev)) 696 qed_sriov_disable(edev, true); 697 #endif 698 } 699 700 qed_nic_stop(edev); 701 702 ecore_resc_free(edev); 703 qed_stop_iov_task(edev); 704 705 return 0; 706 } 707 708 static void qed_remove(struct ecore_dev *edev) 709 { 710 if (!edev) 711 return; 712 713 ecore_hw_remove(edev); 714 } 715 716 static int qed_send_drv_state(struct ecore_dev *edev, bool active) 717 { 718 struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev); 719 struct ecore_ptt *ptt; 720 int status = 0; 721 722 ptt = ecore_ptt_acquire(hwfn); 723 if (!ptt) 724 return -EAGAIN; 725 726 status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ? 727 ECORE_OV_DRIVER_STATE_ACTIVE : 728 ECORE_OV_DRIVER_STATE_DISABLED); 729 730 ecore_ptt_release(hwfn, ptt); 731 732 return status; 733 } 734 735 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb, 736 u16 qid, struct ecore_sb_info_dbg *sb_dbg) 737 { 738 struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns]; 739 struct ecore_ptt *ptt; 740 int rc; 741 742 if (IS_VF(edev)) 743 return -EINVAL; 744 745 ptt = ecore_ptt_acquire(hwfn); 746 if (!ptt) { 747 DP_ERR(hwfn, "Can't acquire PTT\n"); 748 return -EAGAIN; 749 } 750 751 memset(sb_dbg, 0, sizeof(*sb_dbg)); 752 rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg); 753 754 ecore_ptt_release(hwfn, ptt); 755 return rc; 756 } 757 758 const struct qed_common_ops qed_common_ops_pass = { 759 INIT_STRUCT_FIELD(probe, &qed_probe), 760 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params), 761 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start), 762 INIT_STRUCT_FIELD(set_name, &qed_set_name), 763 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc), 764 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free), 765 INIT_STRUCT_FIELD(sb_init, &qed_sb_init), 766 INIT_STRUCT_FIELD(get_sb_info, &qed_get_sb_info), 767 INIT_STRUCT_FIELD(get_link, &qed_get_current_link), 768 INIT_STRUCT_FIELD(set_link, &qed_set_link), 769 INIT_STRUCT_FIELD(drain, &qed_drain), 770 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop), 771 INIT_STRUCT_FIELD(remove, &qed_remove), 772 INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state), 773 }; 774 775 const struct qed_eth_ops qed_eth_ops_pass = { 776 INIT_STRUCT_FIELD(common, &qed_common_ops_pass), 777 INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info), 778 }; 779 780 const struct qed_eth_ops *qed_get_eth_ops(void) 781 { 782 return &qed_eth_ops_pass; 783 } 784