1 /* 2 * Copyright (c) 2016 QLogic Corporation. 3 * All rights reserved. 4 * www.qlogic.com 5 * 6 * See LICENSE.qede_pmd for copyright and licensing details. 7 */ 8 9 #include <limits.h> 10 #include <time.h> 11 #include <rte_alarm.h> 12 13 #include "qede_ethdev.h" 14 15 /* Alarm timeout. */ 16 #define QEDE_ALARM_TIMEOUT_US 100000 17 18 /* Global variable to hold absolute path of fw file */ 19 char fw_file[PATH_MAX]; 20 21 const char *QEDE_DEFAULT_FIRMWARE = 22 "/lib/firmware/qed/qed_init_values-8.20.0.0.bin"; 23 24 static void 25 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params) 26 { 27 int i; 28 29 for (i = 0; i < edev->num_hwfns; i++) { 30 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 31 p_hwfn->pf_params = *params; 32 } 33 } 34 35 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev) 36 { 37 edev->regview = pci_dev->mem_resource[0].addr; 38 edev->doorbells = pci_dev->mem_resource[2].addr; 39 edev->db_size = pci_dev->mem_resource[2].len; 40 } 41 42 static int 43 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev, 44 uint32_t dp_module, uint8_t dp_level, bool is_vf) 45 { 46 struct ecore_hw_prepare_params hw_prepare_params; 47 int rc; 48 49 ecore_init_struct(edev); 50 edev->drv_type = DRV_ID_DRV_TYPE_LINUX; 51 /* Protocol type is always fixed to PROTOCOL_ETH */ 52 53 if (is_vf) 54 edev->b_is_vf = true; 55 56 ecore_init_dp(edev, dp_module, dp_level, NULL); 57 qed_init_pci(edev, pci_dev); 58 59 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params)); 60 hw_prepare_params.personality = ECORE_PCI_ETH; 61 hw_prepare_params.drv_resc_alloc = false; 62 hw_prepare_params.chk_reg_fifo = false; 63 hw_prepare_params.initiate_pf_flr = true; 64 hw_prepare_params.allow_mdump = false; 65 hw_prepare_params.epoch = (u32)time(NULL); 66 rc = ecore_hw_prepare(edev, &hw_prepare_params); 67 if (rc) { 68 DP_ERR(edev, "hw prepare failed\n"); 69 return rc; 70 } 71 72 return rc; 73 } 74 75 static int qed_nic_setup(struct ecore_dev *edev) 76 { 77 int rc; 78 79 rc = ecore_resc_alloc(edev); 80 if (rc) 81 return rc; 82 83 DP_INFO(edev, "Allocated qed resources\n"); 84 ecore_resc_setup(edev); 85 86 return rc; 87 } 88 89 #ifdef CONFIG_ECORE_ZIPPED_FW 90 static int qed_alloc_stream_mem(struct ecore_dev *edev) 91 { 92 int i; 93 94 for_each_hwfn(edev, i) { 95 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 96 97 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, 98 sizeof(*p_hwfn->stream)); 99 if (!p_hwfn->stream) 100 return -ENOMEM; 101 } 102 103 return 0; 104 } 105 106 static void qed_free_stream_mem(struct ecore_dev *edev) 107 { 108 int i; 109 110 for_each_hwfn(edev, i) { 111 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 112 113 if (!p_hwfn->stream) 114 return; 115 116 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream); 117 } 118 } 119 #endif 120 121 #ifdef CONFIG_ECORE_BINARY_FW 122 static int qed_load_firmware_data(struct ecore_dev *edev) 123 { 124 int fd; 125 struct stat st; 126 const char *fw = RTE_LIBRTE_QEDE_FW; 127 128 if (strcmp(fw, "") == 0) 129 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE); 130 else 131 strcpy(fw_file, fw); 132 133 fd = open(fw_file, O_RDONLY); 134 if (fd < 0) { 135 DP_ERR(edev, "Can't open firmware file\n"); 136 return -ENOENT; 137 } 138 139 if (fstat(fd, &st) < 0) { 140 DP_ERR(edev, "Can't stat firmware file\n"); 141 close(fd); 142 return -1; 143 } 144 145 edev->firmware = rte_zmalloc("qede_fw", st.st_size, 146 RTE_CACHE_LINE_SIZE); 147 if (!edev->firmware) { 148 DP_ERR(edev, "Can't allocate memory for firmware\n"); 149 close(fd); 150 return -ENOMEM; 151 } 152 153 if (read(fd, edev->firmware, st.st_size) != st.st_size) { 154 DP_ERR(edev, "Can't read firmware data\n"); 155 close(fd); 156 return -1; 157 } 158 159 edev->fw_len = st.st_size; 160 if (edev->fw_len < 104) { 161 DP_ERR(edev, "Invalid fw size: %" PRIu64 "\n", 162 edev->fw_len); 163 close(fd); 164 return -EINVAL; 165 } 166 167 close(fd); 168 return 0; 169 } 170 #endif 171 172 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn) 173 { 174 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced; 175 176 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac, 177 &is_mac_forced); 178 if (is_mac_exist && is_mac_forced) 179 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN); 180 181 /* Always update link configuration according to bulletin */ 182 qed_link_update(hwfn, NULL); 183 } 184 185 static void qede_vf_task(void *arg) 186 { 187 struct ecore_hwfn *p_hwfn = arg; 188 uint8_t change = 0; 189 190 /* Read the bulletin board, and re-schedule the task */ 191 ecore_vf_read_bulletin(p_hwfn, &change); 192 if (change) 193 qed_handle_bulletin_change(p_hwfn); 194 195 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn); 196 } 197 198 static void qed_start_iov_task(struct ecore_dev *edev) 199 { 200 struct ecore_hwfn *p_hwfn; 201 int i; 202 203 for_each_hwfn(edev, i) { 204 p_hwfn = &edev->hwfns[i]; 205 if (!IS_PF(edev)) 206 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, 207 p_hwfn); 208 } 209 } 210 211 static void qed_stop_iov_task(struct ecore_dev *edev) 212 { 213 struct ecore_hwfn *p_hwfn; 214 int i; 215 216 for_each_hwfn(edev, i) { 217 p_hwfn = &edev->hwfns[i]; 218 if (!IS_PF(edev)) 219 rte_eal_alarm_cancel(qede_vf_task, p_hwfn); 220 } 221 } 222 static int qed_slowpath_start(struct ecore_dev *edev, 223 struct qed_slowpath_params *params) 224 { 225 struct ecore_drv_load_params drv_load_params; 226 struct ecore_hw_init_params hw_init_params; 227 struct ecore_mcp_drv_version drv_version; 228 const uint8_t *data = NULL; 229 struct ecore_hwfn *hwfn; 230 struct ecore_ptt *p_ptt; 231 int rc; 232 233 if (IS_PF(edev)) { 234 #ifdef CONFIG_ECORE_BINARY_FW 235 rc = qed_load_firmware_data(edev); 236 if (rc) { 237 DP_ERR(edev, "Failed to find fw file %s\n", fw_file); 238 goto err; 239 } 240 #endif 241 hwfn = ECORE_LEADING_HWFN(edev); 242 if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */ 243 p_ptt = ecore_ptt_acquire(hwfn); 244 if (p_ptt) { 245 ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt; 246 } else { 247 DP_ERR(edev, "Failed to acquire PTT for flowdir\n"); 248 rc = -ENOMEM; 249 goto err; 250 } 251 } 252 } 253 254 rc = qed_nic_setup(edev); 255 if (rc) 256 goto err; 257 258 /* set int_coalescing_mode */ 259 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE; 260 261 #ifdef CONFIG_ECORE_ZIPPED_FW 262 if (IS_PF(edev)) { 263 /* Allocate stream for unzipping */ 264 rc = qed_alloc_stream_mem(edev); 265 if (rc) { 266 DP_ERR(edev, "Failed to allocate stream memory\n"); 267 goto err1; 268 } 269 } 270 #endif 271 272 qed_start_iov_task(edev); 273 274 #ifdef CONFIG_ECORE_BINARY_FW 275 if (IS_PF(edev)) 276 data = (const uint8_t *)edev->firmware + sizeof(u32); 277 #endif 278 279 /* Start the slowpath */ 280 memset(&hw_init_params, 0, sizeof(hw_init_params)); 281 hw_init_params.b_hw_start = true; 282 hw_init_params.int_mode = ECORE_INT_MODE_MSIX; 283 hw_init_params.allow_npar_tx_switch = true; 284 hw_init_params.bin_fw_data = data; 285 286 memset(&drv_load_params, 0, sizeof(drv_load_params)); 287 drv_load_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT; 288 drv_load_params.avoid_eng_reset = false; 289 drv_load_params.override_force_load = ECORE_OVERRIDE_FORCE_LOAD_ALWAYS; 290 hw_init_params.p_drv_load_params = &drv_load_params; 291 292 rc = ecore_hw_init(edev, &hw_init_params); 293 if (rc) { 294 DP_ERR(edev, "ecore_hw_init failed\n"); 295 goto err2; 296 } 297 298 DP_INFO(edev, "HW inited and function started\n"); 299 300 if (IS_PF(edev)) { 301 hwfn = ECORE_LEADING_HWFN(edev); 302 drv_version.version = (params->drv_major << 24) | 303 (params->drv_minor << 16) | 304 (params->drv_rev << 8) | (params->drv_eng); 305 /* TBD: strlcpy() */ 306 strncpy((char *)drv_version.name, (const char *)params->name, 307 MCP_DRV_VER_STR_SIZE - 4); 308 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt, 309 &drv_version); 310 if (rc) { 311 DP_ERR(edev, "Failed sending drv version command\n"); 312 goto err3; 313 } 314 } 315 316 ecore_reset_vport_stats(edev); 317 318 return 0; 319 320 err3: 321 ecore_hw_stop(edev); 322 err2: 323 qed_stop_iov_task(edev); 324 #ifdef CONFIG_ECORE_ZIPPED_FW 325 qed_free_stream_mem(edev); 326 err1: 327 #endif 328 ecore_resc_free(edev); 329 err: 330 #ifdef CONFIG_ECORE_BINARY_FW 331 if (IS_PF(edev)) { 332 if (edev->firmware) 333 rte_free(edev->firmware); 334 edev->firmware = NULL; 335 } 336 #endif 337 qed_stop_iov_task(edev); 338 339 return rc; 340 } 341 342 static int 343 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info) 344 { 345 struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(edev); 346 struct ecore_ptt *ptt = NULL; 347 struct ecore_tunnel_info *tun = &edev->tunnel; 348 349 memset(dev_info, 0, sizeof(struct qed_dev_info)); 350 351 if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 352 tun->vxlan.b_mode_enabled) 353 dev_info->vxlan_enable = true; 354 355 if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled && 356 tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 357 tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN) 358 dev_info->gre_enable = true; 359 360 if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled && 361 tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 362 tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN) 363 dev_info->geneve_enable = true; 364 365 dev_info->num_hwfns = edev->num_hwfns; 366 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]); 367 dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu; 368 dev_info->dev_type = edev->type; 369 370 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 371 ETHER_ADDR_LEN); 372 373 dev_info->fw_major = FW_MAJOR_VERSION; 374 dev_info->fw_minor = FW_MINOR_VERSION; 375 dev_info->fw_rev = FW_REVISION_VERSION; 376 dev_info->fw_eng = FW_ENGINEERING_VERSION; 377 378 if (IS_PF(edev)) { 379 dev_info->mf_mode = edev->mf_mode; 380 dev_info->tx_switching = false; 381 382 dev_info->smart_an = ecore_mcp_is_smart_an_supported(p_hwfn); 383 384 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev)); 385 if (ptt) { 386 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt, 387 &dev_info->mfw_rev, NULL); 388 389 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt, 390 &dev_info->flash_size); 391 392 /* Workaround to allow PHY-read commands for 393 * B0 bringup. 394 */ 395 if (ECORE_IS_BB_B0(edev)) 396 dev_info->flash_size = 0xffffffff; 397 398 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt); 399 } 400 } else { 401 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt, 402 &dev_info->mfw_rev, NULL); 403 } 404 405 return 0; 406 } 407 408 int 409 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info) 410 { 411 uint8_t queues = 0; 412 int i; 413 414 memset(info, 0, sizeof(*info)); 415 416 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */; 417 418 if (IS_PF(edev)) { 419 int max_vf_vlan_filters = 0; 420 421 info->num_queues = 0; 422 for_each_hwfn(edev, i) 423 info->num_queues += 424 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE); 425 426 if (IS_ECORE_SRIOV(edev)) 427 max_vf_vlan_filters = edev->p_iov_info->total_vfs * 428 ECORE_ETH_VF_NUM_VLAN_FILTERS; 429 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) - 430 max_vf_vlan_filters; 431 432 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 433 ETHER_ADDR_LEN); 434 } else { 435 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev), 436 &info->num_queues); 437 if (ECORE_IS_CMT(edev)) { 438 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues); 439 info->num_queues += queues; 440 } 441 442 ecore_vf_get_num_vlan_filters(&edev->hwfns[0], 443 (u8 *)&info->num_vlan_filters); 444 445 ecore_vf_get_port_mac(&edev->hwfns[0], 446 (uint8_t *)&info->port_mac); 447 448 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]); 449 } 450 451 qed_fill_dev_info(edev, &info->common); 452 453 if (IS_VF(edev)) 454 memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN); 455 456 return 0; 457 } 458 459 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE]) 460 { 461 int i; 462 463 rte_memcpy(edev->name, name, NAME_SIZE); 464 for_each_hwfn(edev, i) { 465 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i); 466 } 467 } 468 469 static uint32_t 470 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info, 471 void *sb_virt_addr, dma_addr_t sb_phy_addr, uint16_t sb_id) 472 { 473 struct ecore_hwfn *p_hwfn; 474 int hwfn_index; 475 uint16_t rel_sb_id; 476 uint8_t n_hwfns = edev->num_hwfns; 477 uint32_t rc; 478 479 hwfn_index = sb_id % n_hwfns; 480 p_hwfn = &edev->hwfns[hwfn_index]; 481 rel_sb_id = sb_id / n_hwfns; 482 483 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n", 484 hwfn_index, rel_sb_id, sb_id); 485 486 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info, 487 sb_virt_addr, sb_phy_addr, rel_sb_id); 488 489 return rc; 490 } 491 492 static void qed_fill_link(struct ecore_hwfn *hwfn, 493 __rte_unused struct ecore_ptt *ptt, 494 struct qed_link_output *if_link) 495 { 496 struct ecore_mcp_link_params params; 497 struct ecore_mcp_link_state link; 498 struct ecore_mcp_link_capabilities link_caps; 499 uint8_t change = 0; 500 501 memset(if_link, 0, sizeof(*if_link)); 502 503 /* Prepare source inputs */ 504 if (IS_PF(hwfn->p_dev)) { 505 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn), 506 sizeof(params)); 507 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link)); 508 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn), 509 sizeof(link_caps)); 510 } else { 511 ecore_vf_read_bulletin(hwfn, &change); 512 ecore_vf_get_link_params(hwfn, ¶ms); 513 ecore_vf_get_link_state(hwfn, &link); 514 ecore_vf_get_link_caps(hwfn, &link_caps); 515 } 516 517 /* Set the link parameters to pass to protocol driver */ 518 if (link.link_up) 519 if_link->link_up = true; 520 521 if (link.link_up) 522 if_link->speed = link.speed; 523 524 if_link->duplex = QEDE_DUPLEX_FULL; 525 526 /* Fill up the native advertised speed cap mask */ 527 if_link->adv_speed = params.speed.advertised_speeds; 528 529 if (params.speed.autoneg) 530 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG; 531 532 if (params.pause.autoneg || params.pause.forced_rx || 533 params.pause.forced_tx) 534 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE; 535 536 if (params.pause.autoneg) 537 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 538 539 if (params.pause.forced_rx) 540 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE; 541 542 if (params.pause.forced_tx) 543 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE; 544 545 if (link_caps.default_eee == ECORE_MCP_EEE_UNSUPPORTED) { 546 if_link->eee_supported = false; 547 } else { 548 if_link->eee_supported = true; 549 if_link->eee_active = link.eee_active; 550 if_link->sup_caps = link_caps.eee_speed_caps; 551 /* MFW clears adv_caps on eee disable; use configured value */ 552 if_link->eee.adv_caps = link.eee_adv_caps ? link.eee_adv_caps : 553 params.eee.adv_caps; 554 if_link->eee.lp_adv_caps = link.eee_lp_adv_caps; 555 if_link->eee.enable = params.eee.enable; 556 if_link->eee.tx_lpi_enable = params.eee.tx_lpi_enable; 557 if_link->eee.tx_lpi_timer = params.eee.tx_lpi_timer; 558 } 559 } 560 561 static void 562 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link) 563 { 564 struct ecore_hwfn *hwfn; 565 struct ecore_ptt *ptt; 566 567 hwfn = &edev->hwfns[0]; 568 if (IS_PF(edev)) { 569 ptt = ecore_ptt_acquire(hwfn); 570 if (!ptt) 571 DP_NOTICE(hwfn, true, "Failed to fill link; No PTT\n"); 572 573 qed_fill_link(hwfn, ptt, if_link); 574 575 if (ptt) 576 ecore_ptt_release(hwfn, ptt); 577 } else { 578 qed_fill_link(hwfn, NULL, if_link); 579 } 580 } 581 582 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params) 583 { 584 struct ecore_hwfn *hwfn; 585 struct ecore_ptt *ptt; 586 struct ecore_mcp_link_params *link_params; 587 int rc; 588 589 if (IS_VF(edev)) 590 return 0; 591 592 /* The link should be set only once per PF */ 593 hwfn = &edev->hwfns[0]; 594 595 ptt = ecore_ptt_acquire(hwfn); 596 if (!ptt) 597 return -EBUSY; 598 599 link_params = ecore_mcp_get_link_params(hwfn); 600 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG) 601 link_params->speed.autoneg = params->autoneg; 602 603 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) { 604 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 605 link_params->pause.autoneg = true; 606 else 607 link_params->pause.autoneg = false; 608 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE) 609 link_params->pause.forced_rx = true; 610 else 611 link_params->pause.forced_rx = false; 612 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE) 613 link_params->pause.forced_tx = true; 614 else 615 link_params->pause.forced_tx = false; 616 } 617 618 if (params->override_flags & QED_LINK_OVERRIDE_EEE_CONFIG) 619 memcpy(&link_params->eee, ¶ms->eee, 620 sizeof(link_params->eee)); 621 622 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up); 623 624 ecore_ptt_release(hwfn, ptt); 625 626 return rc; 627 } 628 629 void qed_link_update(struct ecore_hwfn *hwfn, struct ecore_ptt *ptt) 630 { 631 struct qed_link_output if_link; 632 633 qed_fill_link(hwfn, ptt, &if_link); 634 } 635 636 static int qed_drain(struct ecore_dev *edev) 637 { 638 struct ecore_hwfn *hwfn; 639 struct ecore_ptt *ptt; 640 int i, rc; 641 642 if (IS_VF(edev)) 643 return 0; 644 645 for_each_hwfn(edev, i) { 646 hwfn = &edev->hwfns[i]; 647 ptt = ecore_ptt_acquire(hwfn); 648 if (!ptt) { 649 DP_ERR(hwfn, "Failed to drain NIG; No PTT\n"); 650 return -EBUSY; 651 } 652 rc = ecore_mcp_drain(hwfn, ptt); 653 if (rc) 654 return rc; 655 ecore_ptt_release(hwfn, ptt); 656 } 657 658 return 0; 659 } 660 661 static int qed_nic_stop(struct ecore_dev *edev) 662 { 663 int i, rc; 664 665 rc = ecore_hw_stop(edev); 666 for (i = 0; i < edev->num_hwfns; i++) { 667 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 668 669 if (p_hwfn->b_sp_dpc_enabled) 670 p_hwfn->b_sp_dpc_enabled = false; 671 } 672 return rc; 673 } 674 675 static int qed_slowpath_stop(struct ecore_dev *edev) 676 { 677 #ifdef CONFIG_QED_SRIOV 678 int i; 679 #endif 680 681 if (!edev) 682 return -ENODEV; 683 684 if (IS_PF(edev)) { 685 #ifdef CONFIG_ECORE_ZIPPED_FW 686 qed_free_stream_mem(edev); 687 #endif 688 689 #ifdef CONFIG_QED_SRIOV 690 if (IS_QED_ETH_IF(edev)) 691 qed_sriov_disable(edev, true); 692 #endif 693 } 694 695 qed_nic_stop(edev); 696 697 ecore_resc_free(edev); 698 qed_stop_iov_task(edev); 699 700 return 0; 701 } 702 703 static void qed_remove(struct ecore_dev *edev) 704 { 705 if (!edev) 706 return; 707 708 ecore_hw_remove(edev); 709 } 710 711 static int qed_send_drv_state(struct ecore_dev *edev, bool active) 712 { 713 struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev); 714 struct ecore_ptt *ptt; 715 int status = 0; 716 717 ptt = ecore_ptt_acquire(hwfn); 718 if (!ptt) 719 return -EAGAIN; 720 721 status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ? 722 ECORE_OV_DRIVER_STATE_ACTIVE : 723 ECORE_OV_DRIVER_STATE_DISABLED); 724 725 ecore_ptt_release(hwfn, ptt); 726 727 return status; 728 } 729 730 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb, 731 u16 qid, struct ecore_sb_info_dbg *sb_dbg) 732 { 733 struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns]; 734 struct ecore_ptt *ptt; 735 int rc; 736 737 if (IS_VF(edev)) 738 return -EINVAL; 739 740 ptt = ecore_ptt_acquire(hwfn); 741 if (!ptt) { 742 DP_ERR(hwfn, "Can't acquire PTT\n"); 743 return -EAGAIN; 744 } 745 746 memset(sb_dbg, 0, sizeof(*sb_dbg)); 747 rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg); 748 749 ecore_ptt_release(hwfn, ptt); 750 return rc; 751 } 752 753 const struct qed_common_ops qed_common_ops_pass = { 754 INIT_STRUCT_FIELD(probe, &qed_probe), 755 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params), 756 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start), 757 INIT_STRUCT_FIELD(set_name, &qed_set_name), 758 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc), 759 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free), 760 INIT_STRUCT_FIELD(sb_init, &qed_sb_init), 761 INIT_STRUCT_FIELD(get_sb_info, &qed_get_sb_info), 762 INIT_STRUCT_FIELD(get_link, &qed_get_current_link), 763 INIT_STRUCT_FIELD(set_link, &qed_set_link), 764 INIT_STRUCT_FIELD(drain, &qed_drain), 765 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop), 766 INIT_STRUCT_FIELD(remove, &qed_remove), 767 INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state), 768 }; 769 770 const struct qed_eth_ops qed_eth_ops_pass = { 771 INIT_STRUCT_FIELD(common, &qed_common_ops_pass), 772 INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info), 773 }; 774 775 const struct qed_eth_ops *qed_get_eth_ops(void) 776 { 777 return &qed_eth_ops_pass; 778 } 779